drivers/media/sprd_isp/isp1.0/Tiger_reg_isp.h

   1 /*
   2  * Copyright (C) 2012 Spreadtrum Communications Inc.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 #ifndef _TIGER_REG_ISP_H_
  14 #define _TIGER_REG_ISP_H_
  15 #include <mach/globalregs.h>
  16
  17 #ifdef   __cplusplus
  18 extern   "C"
  19 {
  20 #endif
  21
  22 #define BIT_0                                          0x01
  23 #define BIT_1                                          0x02
  24 #define BIT_2                                          0x04
  25 #define BIT_3                                          0x08
  26 #define BIT_4                                          0x10
  27 #define BIT_5                                          0x20
  28 #define BIT_6                                          0x40
  29 #define BIT_7                                          0x80
  30 #define BIT_8                                          0x0100
  31 #define BIT_9                                          0x0200
  32 #define BIT_10                                         0x0400
  33 #define BIT_11                                         0x0800
  34 #define BIT_12                                         0x1000
  35 #define BIT_13                                         0x2000
  36 #define BIT_14                                         0x4000
  37 #define BIT_15                                         0x8000
  38 #define BIT_16                                         0x010000
  39 #define BIT_17                                         0x020000
  40 #define BIT_18                                         0x040000
  41 #define BIT_19                                         0x080000
  42 #define BIT_20                                         0x100000
  43 #define BIT_21                                         0x200000
  44 #define BIT_22                                         0x400000
  45 #define BIT_23                                         0x800000
  46 #define BIT_24                                         0x01000000
  47 #define BIT_25                                         0x02000000
  48 #define BIT_26                                         0x04000000
  49 #define BIT_27                                         0x08000000
  50 #define BIT_28                                         0x10000000
  51 #define BIT_29                                         0x20000000
  52 #define BIT_30                                         0x40000000
  53 #define BIT_31                                         0x80000000
  54
  55
  56 #define ISP_DCAM_BASE           DCAM_BASE
  57 #define ISP_DCAM_INT_STS                (ISP_DCAM_BASE + 0x0030UL)
  58 #define ISP_DCAM_INT_CLR                (ISP_DCAM_BASE + 0x0038UL)
  59
  60 #define ISP_BASE_ADDR           ISP_BASE
  61 #define ISP_LNC_LOAD            (ISP_BASE_ADDR+0x0220UL)
  62 #define ISP_AXI_MASTER          (ISP_BASE_ADDR+0x2000UL)
  63 #define ISP_INT_RAW             (ISP_BASE_ADDR+0x2080UL)
  64 #define ISP_INT_STATUS          (ISP_BASE_ADDR+0x2084UL)
  65 #define ISP_INT_EN              (ISP_BASE_ADDR+0x2078UL)
  66 #define ISP_INT_CLEAR           (ISP_BASE_ADDR+0x207cUL)
  67 #define ISP_REG_MAX_SIZE                SPRD_ISP_SIZE
  68
  69 #define ISP_AHB_BASE            SPRD_AHB_BASE
  70 #define ISP_AHB_CTL0            (ISP_AHB_BASE + 0x0200UL)
  71 #define ISP_MODULE_EB           (ISP_AHB_CTL0 + 0x0000UL)
  72 #define ISP_MODULE_RESET                (ISP_AHB_CTL0 + 0x0010UL)
  73
  74 #define ISP_CORE_CLK_EB         (ISP_AHB_BASE + 0x0208UL)
  75
  76 /*irq line number in system*/
  77 #define ISP_IRQ                 IRQ_ISP_INT
  78 #define DCAM_IRQ                        IRQ_DCAM_INT
  79
  80 #define ISP_EB_BIT              BIT_12
  81 #define ISP_RST_BIT             BIT_8
  82 #define ISP_CORE_CLK_EB_BIT     BIT_7
  83 #define ISP_IRQ_HW_MASK_V0000 (0xfff)
  84 #define ISP_IRQ_NUM_V0000 (12)
  85 #define ISP_TMP_BUF_SIZE_MAX_V0000 (36 * 1024)
  86
  87 #ifdef __cplusplus
  88 }
  89 #endif
  90
  91 #endif //_TIGER_REG_ISP_H_