drivers/media/rc/ite-cir.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
   4  *
   5  * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
   6  *
   7  * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
   8  * skeleton provided by the nuvoton-cir driver.
   9  *
  10  * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
  11  * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
  12  * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
  13  * <jimbo-lirc@edwardsclan.net>.
  14  *
  15  * The lirc_ite8709 driver was written by Grégory Lardière
  16  * <spmf2004-lirc@yahoo.fr> in 2008.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/pnp.h>
  22 #include <linux/io.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/input.h>
  28 #include <linux/bitops.h>
  29 #include <media/rc-core.h>
  30 #include <linux/pci_ids.h>
  31
  32 #include "ite-cir.h"
  33
  34 /* module parameters */
  35
  36 /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
  37 static int rx_low_carrier_freq;
  38 module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
  39 MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, 0 for no RX demodulation");
  40
  41 /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
  42 static int rx_high_carrier_freq;
  43 module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
  44 MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, Hz, 0 for no RX demodulation");
  45
  46 /* override tx carrier frequency */
  47 static int tx_carrier_freq;
  48 module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
  49 MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
  50
  51 /* override tx duty cycle */
  52 static int tx_duty_cycle;
  53 module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
  54 MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
  55
  56 /* override default sample period */
  57 static long sample_period;
  58 module_param(sample_period, long, S_IRUGO | S_IWUSR);
  59 MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
  60
  61 /* override detected model id */
  62 static int model_number = -1;
  63 module_param(model_number, int, S_IRUGO | S_IWUSR);
  64 MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
  65
  66
  67 /* HW-independent code functions */
  68
  69 /* check whether carrier frequency is high frequency */
  70 static inline bool ite_is_high_carrier_freq(unsigned int freq)
  71 {
  72         return freq >= ITE_HCF_MIN_CARRIER_FREQ;
  73 }
  74
  75 /* get the bits required to program the carrier frequency in CFQ bits,
  76  * unshifted */
  77 static u8 ite_get_carrier_freq_bits(unsigned int freq)
  78 {
  79         if (ite_is_high_carrier_freq(freq)) {
  80                 if (freq < 425000)
  81                         return ITE_CFQ_400;
  82
  83                 else if (freq < 465000)
  84                         return ITE_CFQ_450;
  85
  86                 else if (freq < 490000)
  87                         return ITE_CFQ_480;
  88
  89                 else
  90                         return ITE_CFQ_500;
  91         } else {
  92                         /* trim to limits */
  93                 if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  94                         freq = ITE_LCF_MIN_CARRIER_FREQ;
  95                 if (freq > ITE_LCF_MAX_CARRIER_FREQ)
  96                         freq = ITE_LCF_MAX_CARRIER_FREQ;
  97
  98                 /* convert to kHz and subtract the base freq */
  99                 freq = DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ, 1000);
 100
 101                 return (u8) freq;
 102         }
 103 }
 104
 105 /* get the bits required to program the pulse with in TXMPW */
 106 static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
 107 {
 108         unsigned long period_ns, on_ns;
 109
 110         /* sanitize freq into range */
 111         if (freq < ITE_LCF_MIN_CARRIER_FREQ)
 112                 freq = ITE_LCF_MIN_CARRIER_FREQ;
 113         if (freq > ITE_HCF_MAX_CARRIER_FREQ)
 114                 freq = ITE_HCF_MAX_CARRIER_FREQ;
 115
 116         period_ns = 1000000000UL / freq;
 117         on_ns = period_ns * duty_cycle / 100;
 118
 119         if (ite_is_high_carrier_freq(freq)) {
 120                 if (on_ns < 750)
 121                         return ITE_TXMPW_A;
 122
 123                 else if (on_ns < 850)
 124                         return ITE_TXMPW_B;
 125
 126                 else if (on_ns < 950)
 127                         return ITE_TXMPW_C;
 128
 129                 else if (on_ns < 1080)
 130                         return ITE_TXMPW_D;
 131
 132                 else
 133                         return ITE_TXMPW_E;
 134         } else {
 135                 if (on_ns < 6500)
 136                         return ITE_TXMPW_A;
 137
 138                 else if (on_ns < 7850)
 139                         return ITE_TXMPW_B;
 140
 141                 else if (on_ns < 9650)
 142                         return ITE_TXMPW_C;
 143
 144                 else if (on_ns < 11950)
 145                         return ITE_TXMPW_D;
 146
 147                 else
 148                         return ITE_TXMPW_E;
 149         }
 150 }
 151
 152 /* decode raw bytes as received by the hardware, and push them to the ir-core
 153  * layer */
 154 static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
 155                              length)
 156 {
 157         u32 sample_period;
 158         unsigned long *ldata;
 159         unsigned int next_one, next_zero, size;
 160         struct ir_raw_event ev = {};
 161
 162         if (length == 0)
 163                 return;
 164
 165         sample_period = dev->params.sample_period;
 166         ldata = (unsigned long *)data;
 167         size = length << 3;
 168         next_one = find_next_bit_le(ldata, size, 0);
 169         if (next_one > 0) {
 170                 ev.pulse = true;
 171                 ev.duration = ITE_BITS_TO_US(next_one, sample_period);
 172                 ir_raw_event_store_with_filter(dev->rdev, &ev);
 173         }
 174
 175         while (next_one < size) {
 176                 next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
 177                 ev.pulse = false;
 178                 ev.duration = ITE_BITS_TO_US(next_zero - next_one, sample_period);
 179                 ir_raw_event_store_with_filter(dev->rdev, &ev);
 180
 181                 if (next_zero < size) {
 182                         next_one = find_next_bit_le(ldata, size, next_zero + 1);
 183                         ev.pulse = true;
 184                         ev.duration = ITE_BITS_TO_US(next_one - next_zero,
 185                                                      sample_period);
 186                         ir_raw_event_store_with_filter(dev->rdev, &ev);
 187                 } else
 188                         next_one = size;
 189         }
 190
 191         ir_raw_event_handle(dev->rdev);
 192
 193         dev_dbg(&dev->rdev->dev, "decoded %d bytes\n", length);
 194 }
 195
 196 /* set all the rx/tx carrier parameters; this must be called with the device
 197  * spinlock held */
 198 static void ite_set_carrier_params(struct ite_dev *dev)
 199 {
 200         unsigned int freq, low_freq, high_freq;
 201         int allowance;
 202         bool use_demodulator;
 203         bool for_tx = dev->transmitting;
 204
 205         if (for_tx) {
 206                 /* we don't need no stinking calculations */
 207                 freq = dev->params.tx_carrier_freq;
 208                 allowance = ITE_RXDCR_DEFAULT;
 209                 use_demodulator = false;
 210         } else {
 211                 low_freq = dev->params.rx_low_carrier_freq;
 212                 high_freq = dev->params.rx_high_carrier_freq;
 213
 214                 if (low_freq == 0) {
 215                         /* don't demodulate */
 216                         freq = ITE_DEFAULT_CARRIER_FREQ;
 217                         allowance = ITE_RXDCR_DEFAULT;
 218                         use_demodulator = false;
 219                 } else {
 220                         /* calculate the middle freq */
 221                         freq = (low_freq + high_freq) / 2;
 222
 223                         /* calculate the allowance */
 224                         allowance =
 225                             DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
 226                                               ITE_RXDCR_PER_10000_STEP
 227                                               * (high_freq + low_freq));
 228
 229                         if (allowance < 1)
 230                                 allowance = 1;
 231
 232                         if (allowance > ITE_RXDCR_MAX)
 233                                 allowance = ITE_RXDCR_MAX;
 234
 235                         use_demodulator = true;
 236                 }
 237         }
 238
 239         /* set the carrier parameters in a device-dependent way */
 240         dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
 241                  use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
 242                  ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
 243 }
 244
 245 /* interrupt service routine for incoming and outgoing CIR data */
 246 static irqreturn_t ite_cir_isr(int irq, void *data)
 247 {
 248         struct ite_dev *dev = data;
 249         irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
 250         u8 rx_buf[ITE_RX_FIFO_LEN];
 251         int rx_bytes;
 252         int iflags;
 253
 254         /* grab the spinlock */
 255         spin_lock(&dev->lock);
 256
 257         /* read the interrupt flags */
 258         iflags = dev->params.get_irq_causes(dev);
 259
 260         /* check for the receive interrupt */
 261         if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
 262                 /* read the FIFO bytes */
 263                 rx_bytes = dev->params.get_rx_bytes(dev, rx_buf,
 264                                                     ITE_RX_FIFO_LEN);
 265
 266                 dev_dbg(&dev->rdev->dev, "interrupt %d RX bytes\n", rx_bytes);
 267
 268                 if (rx_bytes > 0) {
 269                         /* drop the spinlock, since the ir-core layer
 270                          * may call us back again through
 271                          * ite_s_idle() */
 272                         spin_unlock(&dev->lock);
 273
 274                         /* decode the data we've just received */
 275                         ite_decode_bytes(dev, rx_buf, rx_bytes);
 276
 277                         /* reacquire the spinlock */
 278                         spin_lock(&dev->lock);
 279
 280                         /* mark the interrupt as serviced */
 281                         ret = IRQ_RETVAL(IRQ_HANDLED);
 282                 }
 283         } else if (iflags & ITE_IRQ_TX_FIFO) {
 284                 /* FIFO space available interrupt */
 285                 dev_dbg(&dev->rdev->dev, "interrupt TX FIFO\n");
 286
 287                 /* wake any sleeping transmitter */
 288                 wake_up_interruptible(&dev->tx_queue);
 289
 290                 /* mark the interrupt as serviced */
 291                 ret = IRQ_RETVAL(IRQ_HANDLED);
 292         }
 293
 294         /* drop the spinlock */
 295         spin_unlock(&dev->lock);
 296
 297         return ret;
 298 }
 299
 300 /* set the rx carrier freq range, guess it's in Hz... */
 301 static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
 302                                     carrier_high)
 303 {
 304         unsigned long flags;
 305         struct ite_dev *dev = rcdev->priv;
 306
 307         spin_lock_irqsave(&dev->lock, flags);
 308         dev->params.rx_low_carrier_freq = carrier_low;
 309         dev->params.rx_high_carrier_freq = carrier_high;
 310         ite_set_carrier_params(dev);
 311         spin_unlock_irqrestore(&dev->lock, flags);
 312
 313         return 0;
 314 }
 315
 316 /* set the tx carrier freq, guess it's in Hz... */
 317 static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
 318 {
 319         unsigned long flags;
 320         struct ite_dev *dev = rcdev->priv;
 321
 322         spin_lock_irqsave(&dev->lock, flags);
 323         dev->params.tx_carrier_freq = carrier;
 324         ite_set_carrier_params(dev);
 325         spin_unlock_irqrestore(&dev->lock, flags);
 326
 327         return 0;
 328 }
 329
 330 /* set the tx duty cycle by controlling the pulse width */
 331 static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
 332 {
 333         unsigned long flags;
 334         struct ite_dev *dev = rcdev->priv;
 335
 336         spin_lock_irqsave(&dev->lock, flags);
 337         dev->params.tx_duty_cycle = duty_cycle;
 338         ite_set_carrier_params(dev);
 339         spin_unlock_irqrestore(&dev->lock, flags);
 340
 341         return 0;
 342 }
 343
 344 /* transmit out IR pulses; what you get here is a batch of alternating
 345  * pulse/space/pulse/space lengths that we should write out completely through
 346  * the FIFO, blocking on a full FIFO */
 347 static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
 348 {
 349         unsigned long flags;
 350         struct ite_dev *dev = rcdev->priv;
 351         bool is_pulse = false;
 352         int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
 353         int max_rle_us, next_rle_us;
 354         int ret = n;
 355         u8 last_sent[ITE_TX_FIFO_LEN];
 356         u8 val;
 357
 358         /* clear the array just in case */
 359         memset(last_sent, 0, sizeof(last_sent));
 360
 361         spin_lock_irqsave(&dev->lock, flags);
 362
 363         /* let everybody know we're now transmitting */
 364         dev->transmitting = true;
 365
 366         /* and set the carrier values for transmission */
 367         ite_set_carrier_params(dev);
 368
 369         /* calculate how much time we can send in one byte */
 370         max_rle_us =
 371             (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
 372              ITE_TX_MAX_RLE) / 1000;
 373
 374         /* disable the receiver */
 375         dev->params.disable_rx(dev);
 376
 377         /* this is where we'll begin filling in the FIFO, until it's full.
 378          * then we'll just activate the interrupt, wait for it to wake us up
 379          * again, disable it, continue filling the FIFO... until everything
 380          * has been pushed out */
 381         fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
 382
 383         while (n > 0 && dev->in_use) {
 384                 /* transmit the next sample */
 385                 is_pulse = !is_pulse;
 386                 remaining_us = *(txbuf++);
 387                 n--;
 388
 389                 dev_dbg(&dev->rdev->dev, "%s: %d\n",
 390                         is_pulse ? "pulse" : "space", remaining_us);
 391
 392                 /* repeat while the pulse is non-zero length */
 393                 while (remaining_us > 0 && dev->in_use) {
 394                         if (remaining_us > max_rle_us)
 395                                 next_rle_us = max_rle_us;
 396
 397                         else
 398                                 next_rle_us = remaining_us;
 399
 400                         remaining_us -= next_rle_us;
 401
 402                         /* check what's the length we have to pump out */
 403                         val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
 404
 405                         /* put it into the sent buffer */
 406                         last_sent[last_idx++] = val;
 407                         last_idx &= (ITE_TX_FIFO_LEN);
 408
 409                         /* encode it for 7 bits */
 410                         val = (val - 1) & ITE_TX_RLE_MASK;
 411
 412                         /* take into account pulse/space prefix */
 413                         if (is_pulse)
 414                                 val |= ITE_TX_PULSE;
 415
 416                         else
 417                                 val |= ITE_TX_SPACE;
 418
 419                         /*
 420                          * if we get to 0 available, read again, just in case
 421                          * some other slot got freed
 422                          */
 423                         if (fifo_avail <= 0)
 424                                 fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
 425
 426                         /* if it's still full */
 427                         if (fifo_avail <= 0) {
 428                                 /* enable the tx interrupt */
 429                                 dev->params.
 430                                 enable_tx_interrupt(dev);
 431
 432                                 /* drop the spinlock */
 433                                 spin_unlock_irqrestore(&dev->lock, flags);
 434
 435                                 /* wait for the FIFO to empty enough */
 436                                 wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
 437
 438                                 /* get the spinlock again */
 439                                 spin_lock_irqsave(&dev->lock, flags);
 440
 441                                 /* disable the tx interrupt again. */
 442                                 dev->params.
 443                                 disable_tx_interrupt(dev);
 444                         }
 445
 446                         /* now send the byte through the FIFO */
 447                         dev->params.put_tx_byte(dev, val);
 448                         fifo_avail--;
 449                 }
 450         }
 451
 452         /* wait and don't return until the whole FIFO has been sent out;
 453          * otherwise we could configure the RX carrier params instead of the
 454          * TX ones while the transmission is still being performed! */
 455         fifo_remaining = dev->params.get_tx_used_slots(dev);
 456         remaining_us = 0;
 457         while (fifo_remaining > 0) {
 458                 fifo_remaining--;
 459                 last_idx--;
 460                 last_idx &= (ITE_TX_FIFO_LEN - 1);
 461                 remaining_us += last_sent[last_idx];
 462         }
 463         remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
 464
 465         /* drop the spinlock while we sleep */
 466         spin_unlock_irqrestore(&dev->lock, flags);
 467
 468         /* sleep remaining_us microseconds */
 469         mdelay(DIV_ROUND_UP(remaining_us, 1000));
 470
 471         /* reacquire the spinlock */
 472         spin_lock_irqsave(&dev->lock, flags);
 473
 474         /* now we're not transmitting anymore */
 475         dev->transmitting = false;
 476
 477         /* and set the carrier values for reception */
 478         ite_set_carrier_params(dev);
 479
 480         /* re-enable the receiver */
 481         if (dev->in_use)
 482                 dev->params.enable_rx(dev);
 483
 484         /* notify transmission end */
 485         wake_up_interruptible(&dev->tx_ended);
 486
 487         spin_unlock_irqrestore(&dev->lock, flags);
 488
 489         return ret;
 490 }
 491
 492 /* idle the receiver if needed */
 493 static void ite_s_idle(struct rc_dev *rcdev, bool enable)
 494 {
 495         unsigned long flags;
 496         struct ite_dev *dev = rcdev->priv;
 497
 498         if (enable) {
 499                 spin_lock_irqsave(&dev->lock, flags);
 500                 dev->params.idle_rx(dev);
 501                 spin_unlock_irqrestore(&dev->lock, flags);
 502         }
 503 }
 504
 505
 506 /* IT8712F HW-specific functions */
 507
 508 /* retrieve a bitmask of the current causes for a pending interrupt; this may
 509  * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
 510  * */
 511 static int it87_get_irq_causes(struct ite_dev *dev)
 512 {
 513         u8 iflags;
 514         int ret = 0;
 515
 516         /* read the interrupt flags */
 517         iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
 518
 519         switch (iflags) {
 520         case IT87_II_RXDS:
 521                 ret = ITE_IRQ_RX_FIFO;
 522                 break;
 523         case IT87_II_RXFO:
 524                 ret = ITE_IRQ_RX_FIFO_OVERRUN;
 525                 break;
 526         case IT87_II_TXLDL:
 527                 ret = ITE_IRQ_TX_FIFO;
 528                 break;
 529         }
 530
 531         return ret;
 532 }
 533
 534 /* set the carrier parameters; to be called with the spinlock held */
 535 static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
 536                                     bool use_demodulator,
 537                                     u8 carrier_freq_bits, u8 allowance_bits,
 538                                     u8 pulse_width_bits)
 539 {
 540         u8 val;
 541
 542         /* program the RCR register */
 543         val = inb(dev->cir_addr + IT87_RCR)
 544                 & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
 545
 546         if (high_freq)
 547                 val |= IT87_HCFS;
 548
 549         if (use_demodulator)
 550                 val |= IT87_RXEND;
 551
 552         val |= allowance_bits;
 553
 554         outb(val, dev->cir_addr + IT87_RCR);
 555
 556         /* program the TCR2 register */
 557         outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
 558                 dev->cir_addr + IT87_TCR2);
 559 }
 560
 561 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
 562  * held */
 563 static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
 564 {
 565         int fifo, read = 0;
 566
 567         /* read how many bytes are still in the FIFO */
 568         fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
 569
 570         while (fifo > 0 && buf_size > 0) {
 571                 *(buf++) = inb(dev->cir_addr + IT87_DR);
 572                 fifo--;
 573                 read++;
 574                 buf_size--;
 575         }
 576
 577         return read;
 578 }
 579
 580 /* return how many bytes are still in the FIFO; this will be called
 581  * with the device spinlock NOT HELD while waiting for the TX FIFO to get
 582  * empty; let's expect this won't be a problem */
 583 static int it87_get_tx_used_slots(struct ite_dev *dev)
 584 {
 585         return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
 586 }
 587
 588 /* put a byte to the TX fifo; this should be called with the spinlock held */
 589 static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
 590 {
 591         outb(value, dev->cir_addr + IT87_DR);
 592 }
 593
 594 /* idle the receiver so that we won't receive samples until another
 595   pulse is detected; this must be called with the device spinlock held */
 596 static void it87_idle_rx(struct ite_dev *dev)
 597 {
 598         /* disable streaming by clearing RXACT writing it as 1 */
 599         outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
 600                 dev->cir_addr + IT87_RCR);
 601
 602         /* clear the FIFO */
 603         outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
 604                 dev->cir_addr + IT87_TCR1);
 605 }
 606
 607 /* disable the receiver; this must be called with the device spinlock held */
 608 static void it87_disable_rx(struct ite_dev *dev)
 609 {
 610         /* disable the receiver interrupts */
 611         outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
 612                 dev->cir_addr + IT87_IER);
 613
 614         /* disable the receiver */
 615         outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
 616                 dev->cir_addr + IT87_RCR);
 617
 618         /* clear the FIFO and RXACT (actually RXACT should have been cleared
 619         * in the previous outb() call) */
 620         it87_idle_rx(dev);
 621 }
 622
 623 /* enable the receiver; this must be called with the device spinlock held */
 624 static void it87_enable_rx(struct ite_dev *dev)
 625 {
 626         /* enable the receiver by setting RXEN */
 627         outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
 628                 dev->cir_addr + IT87_RCR);
 629
 630         /* just prepare it to idle for the next reception */
 631         it87_idle_rx(dev);
 632
 633         /* enable the receiver interrupts and master enable flag */
 634         outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
 635                 dev->cir_addr + IT87_IER);
 636 }
 637
 638 /* disable the transmitter interrupt; this must be called with the device
 639  * spinlock held */
 640 static void it87_disable_tx_interrupt(struct ite_dev *dev)
 641 {
 642         /* disable the transmitter interrupts */
 643         outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
 644                 dev->cir_addr + IT87_IER);
 645 }
 646
 647 /* enable the transmitter interrupt; this must be called with the device
 648  * spinlock held */
 649 static void it87_enable_tx_interrupt(struct ite_dev *dev)
 650 {
 651         /* enable the transmitter interrupts and master enable flag */
 652         outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
 653                 dev->cir_addr + IT87_IER);
 654 }
 655
 656 /* disable the device; this must be called with the device spinlock held */
 657 static void it87_disable(struct ite_dev *dev)
 658 {
 659         /* clear out all interrupt enable flags */
 660         outb(inb(dev->cir_addr + IT87_IER) &
 661                 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
 662                 dev->cir_addr + IT87_IER);
 663
 664         /* disable the receiver */
 665         it87_disable_rx(dev);
 666
 667         /* erase the FIFO */
 668         outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
 669                 dev->cir_addr + IT87_TCR1);
 670 }
 671
 672 /* initialize the hardware */
 673 static void it87_init_hardware(struct ite_dev *dev)
 674 {
 675         /* enable just the baud rate divisor register,
 676         disabling all the interrupts at the same time */
 677         outb((inb(dev->cir_addr + IT87_IER) &
 678                 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
 679                 dev->cir_addr + IT87_IER);
 680
 681         /* write out the baud rate divisor */
 682         outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
 683         outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
 684
 685         /* disable the baud rate divisor register again */
 686         outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
 687                 dev->cir_addr + IT87_IER);
 688
 689         /* program the RCR register defaults */
 690         outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
 691
 692         /* program the TCR1 register */
 693         outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
 694                 | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
 695                 dev->cir_addr + IT87_TCR1);
 696
 697         /* program the carrier parameters */
 698         ite_set_carrier_params(dev);
 699 }
 700
 701 /* IT8512F on ITE8708 HW-specific functions */
 702
 703 /* retrieve a bitmask of the current causes for a pending interrupt; this may
 704  * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
 705  * */
 706 static int it8708_get_irq_causes(struct ite_dev *dev)
 707 {
 708         u8 iflags;
 709         int ret = 0;
 710
 711         /* read the interrupt flags */
 712         iflags = inb(dev->cir_addr + IT8708_C0IIR);
 713
 714         if (iflags & IT85_TLDLI)
 715                 ret |= ITE_IRQ_TX_FIFO;
 716         if (iflags & IT85_RDAI)
 717                 ret |= ITE_IRQ_RX_FIFO;
 718         if (iflags & IT85_RFOI)
 719                 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
 720
 721         return ret;
 722 }
 723
 724 /* set the carrier parameters; to be called with the spinlock held */
 725 static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
 726                                       bool use_demodulator,
 727                                       u8 carrier_freq_bits, u8 allowance_bits,
 728                                       u8 pulse_width_bits)
 729 {
 730         u8 val;
 731
 732         /* program the C0CFR register, with HRAE=1 */
 733         outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
 734                 dev->cir_addr + IT8708_BANKSEL);
 735
 736         val = (inb(dev->cir_addr + IT8708_C0CFR)
 737                 & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
 738
 739         if (high_freq)
 740                 val |= IT85_HCFS;
 741
 742         outb(val, dev->cir_addr + IT8708_C0CFR);
 743
 744         outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
 745                    dev->cir_addr + IT8708_BANKSEL);
 746
 747         /* program the C0RCR register */
 748         val = inb(dev->cir_addr + IT8708_C0RCR)
 749                 & ~(IT85_RXEND | IT85_RXDCR);
 750
 751         if (use_demodulator)
 752                 val |= IT85_RXEND;
 753
 754         val |= allowance_bits;
 755
 756         outb(val, dev->cir_addr + IT8708_C0RCR);
 757
 758         /* program the C0TCR register */
 759         val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
 760         val |= pulse_width_bits;
 761         outb(val, dev->cir_addr + IT8708_C0TCR);
 762 }
 763
 764 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
 765  * held */
 766 static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
 767 {
 768         int fifo, read = 0;
 769
 770         /* read how many bytes are still in the FIFO */
 771         fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
 772
 773         while (fifo > 0 && buf_size > 0) {
 774                 *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
 775                 fifo--;
 776                 read++;
 777                 buf_size--;
 778         }
 779
 780         return read;
 781 }
 782
 783 /* return how many bytes are still in the FIFO; this will be called
 784  * with the device spinlock NOT HELD while waiting for the TX FIFO to get
 785  * empty; let's expect this won't be a problem */
 786 static int it8708_get_tx_used_slots(struct ite_dev *dev)
 787 {
 788         return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
 789 }
 790
 791 /* put a byte to the TX fifo; this should be called with the spinlock held */
 792 static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
 793 {
 794         outb(value, dev->cir_addr + IT8708_C0DR);
 795 }
 796
 797 /* idle the receiver so that we won't receive samples until another
 798   pulse is detected; this must be called with the device spinlock held */
 799 static void it8708_idle_rx(struct ite_dev *dev)
 800 {
 801         /* disable streaming by clearing RXACT writing it as 1 */
 802         outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
 803                 dev->cir_addr + IT8708_C0RCR);
 804
 805         /* clear the FIFO */
 806         outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
 807                 dev->cir_addr + IT8708_C0MSTCR);
 808 }
 809
 810 /* disable the receiver; this must be called with the device spinlock held */
 811 static void it8708_disable_rx(struct ite_dev *dev)
 812 {
 813         /* disable the receiver interrupts */
 814         outb(inb(dev->cir_addr + IT8708_C0IER) &
 815                 ~(IT85_RDAIE | IT85_RFOIE),
 816                 dev->cir_addr + IT8708_C0IER);
 817
 818         /* disable the receiver */
 819         outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
 820                 dev->cir_addr + IT8708_C0RCR);
 821
 822         /* clear the FIFO and RXACT (actually RXACT should have been cleared
 823          * in the previous outb() call) */
 824         it8708_idle_rx(dev);
 825 }
 826
 827 /* enable the receiver; this must be called with the device spinlock held */
 828 static void it8708_enable_rx(struct ite_dev *dev)
 829 {
 830         /* enable the receiver by setting RXEN */
 831         outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
 832                 dev->cir_addr + IT8708_C0RCR);
 833
 834         /* just prepare it to idle for the next reception */
 835         it8708_idle_rx(dev);
 836
 837         /* enable the receiver interrupts and master enable flag */
 838         outb(inb(dev->cir_addr + IT8708_C0IER)
 839                 |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
 840                 dev->cir_addr + IT8708_C0IER);
 841 }
 842
 843 /* disable the transmitter interrupt; this must be called with the device
 844  * spinlock held */
 845 static void it8708_disable_tx_interrupt(struct ite_dev *dev)
 846 {
 847         /* disable the transmitter interrupts */
 848         outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
 849                 dev->cir_addr + IT8708_C0IER);
 850 }
 851
 852 /* enable the transmitter interrupt; this must be called with the device
 853  * spinlock held */
 854 static void it8708_enable_tx_interrupt(struct ite_dev *dev)
 855 {
 856         /* enable the transmitter interrupts and master enable flag */
 857         outb(inb(dev->cir_addr + IT8708_C0IER)
 858                 |IT85_TLDLIE | IT85_IEC,
 859                 dev->cir_addr + IT8708_C0IER);
 860 }
 861
 862 /* disable the device; this must be called with the device spinlock held */
 863 static void it8708_disable(struct ite_dev *dev)
 864 {
 865         /* clear out all interrupt enable flags */
 866         outb(inb(dev->cir_addr + IT8708_C0IER) &
 867                 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
 868                 dev->cir_addr + IT8708_C0IER);
 869
 870         /* disable the receiver */
 871         it8708_disable_rx(dev);
 872
 873         /* erase the FIFO */
 874         outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
 875                 dev->cir_addr + IT8708_C0MSTCR);
 876 }
 877
 878 /* initialize the hardware */
 879 static void it8708_init_hardware(struct ite_dev *dev)
 880 {
 881         /* disable all the interrupts */
 882         outb(inb(dev->cir_addr + IT8708_C0IER) &
 883                 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
 884                 dev->cir_addr + IT8708_C0IER);
 885
 886         /* program the baud rate divisor */
 887         outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
 888                 dev->cir_addr + IT8708_BANKSEL);
 889
 890         outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
 891         outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
 892                    dev->cir_addr + IT8708_C0BDHR);
 893
 894         outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
 895                    dev->cir_addr + IT8708_BANKSEL);
 896
 897         /* program the C0MSTCR register defaults */
 898         outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
 899                         ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
 900                           IT85_FIFOCLR | IT85_RESET)) |
 901                        IT85_FIFOTL_DEFAULT,
 902                        dev->cir_addr + IT8708_C0MSTCR);
 903
 904         /* program the C0RCR register defaults */
 905         outb((inb(dev->cir_addr + IT8708_C0RCR) &
 906                         ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
 907                           IT85_RXACT | IT85_RXDCR)) |
 908                        ITE_RXDCR_DEFAULT,
 909                        dev->cir_addr + IT8708_C0RCR);
 910
 911         /* program the C0TCR register defaults */
 912         outb((inb(dev->cir_addr + IT8708_C0TCR) &
 913                         ~(IT85_TXMPM | IT85_TXMPW))
 914                        |IT85_TXRLE | IT85_TXENDF |
 915                        IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
 916                        dev->cir_addr + IT8708_C0TCR);
 917
 918         /* program the carrier parameters */
 919         ite_set_carrier_params(dev);
 920 }
 921
 922 /* IT8512F on ITE8709 HW-specific functions */
 923
 924 /* read a byte from the SRAM module */
 925 static inline u8 it8709_rm(struct ite_dev *dev, int index)
 926 {
 927         outb(index, dev->cir_addr + IT8709_RAM_IDX);
 928         return inb(dev->cir_addr + IT8709_RAM_VAL);
 929 }
 930
 931 /* write a byte to the SRAM module */
 932 static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
 933 {
 934         outb(index, dev->cir_addr + IT8709_RAM_IDX);
 935         outb(val, dev->cir_addr + IT8709_RAM_VAL);
 936 }
 937
 938 static void it8709_wait(struct ite_dev *dev)
 939 {
 940         int i = 0;
 941         /*
 942          * loop until device tells it's ready to continue
 943          * iterations count is usually ~750 but can sometimes achieve 13000
 944          */
 945         for (i = 0; i < 15000; i++) {
 946                 udelay(2);
 947                 if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
 948                         break;
 949         }
 950 }
 951
 952 /* read the value of a CIR register */
 953 static u8 it8709_rr(struct ite_dev *dev, int index)
 954 {
 955         /* just wait in case the previous access was a write */
 956         it8709_wait(dev);
 957         it8709_wm(dev, index, IT8709_REG_IDX);
 958         it8709_wm(dev, IT8709_READ, IT8709_MODE);
 959
 960         /* wait for the read data to be available */
 961         it8709_wait(dev);
 962
 963         /* return the read value */
 964         return it8709_rm(dev, IT8709_REG_VAL);
 965 }
 966
 967 /* write the value of a CIR register */
 968 static void it8709_wr(struct ite_dev *dev, u8 val, int index)
 969 {
 970         /* we wait before writing, and not afterwards, since this allows us to
 971          * pipeline the host CPU with the microcontroller */
 972         it8709_wait(dev);
 973         it8709_wm(dev, val, IT8709_REG_VAL);
 974         it8709_wm(dev, index, IT8709_REG_IDX);
 975         it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
 976 }
 977
 978 /* retrieve a bitmask of the current causes for a pending interrupt; this may
 979  * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
 980  * */
 981 static int it8709_get_irq_causes(struct ite_dev *dev)
 982 {
 983         u8 iflags;
 984         int ret = 0;
 985
 986         /* read the interrupt flags */
 987         iflags = it8709_rm(dev, IT8709_IIR);
 988
 989         if (iflags & IT85_TLDLI)
 990                 ret |= ITE_IRQ_TX_FIFO;
 991         if (iflags & IT85_RDAI)
 992                 ret |= ITE_IRQ_RX_FIFO;
 993         if (iflags & IT85_RFOI)
 994                 ret |= ITE_IRQ_RX_FIFO_OVERRUN;
 995
 996         return ret;
 997 }
 998
 999 /* set the carrier parameters; to be called with the spinlock held */
1000 static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
1001                                       bool use_demodulator,
1002                                       u8 carrier_freq_bits, u8 allowance_bits,
1003                                       u8 pulse_width_bits)
1004 {
1005         u8 val;
1006
1007         val = (it8709_rr(dev, IT85_C0CFR)
1008                      &~(IT85_HCFS | IT85_CFQ)) |
1009             carrier_freq_bits;
1010
1011         if (high_freq)
1012                 val |= IT85_HCFS;
1013
1014         it8709_wr(dev, val, IT85_C0CFR);
1015
1016         /* program the C0RCR register */
1017         val = it8709_rr(dev, IT85_C0RCR)
1018                 & ~(IT85_RXEND | IT85_RXDCR);
1019
1020         if (use_demodulator)
1021                 val |= IT85_RXEND;
1022
1023         val |= allowance_bits;
1024
1025         it8709_wr(dev, val, IT85_C0RCR);
1026
1027         /* program the C0TCR register */
1028         val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
1029         val |= pulse_width_bits;
1030         it8709_wr(dev, val, IT85_C0TCR);
1031 }
1032
1033 /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
1034  * held */
1035 static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
1036 {
1037         int fifo, read = 0;
1038
1039         /* read how many bytes are still in the FIFO */
1040         fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
1041
1042         while (fifo > 0 && buf_size > 0) {
1043                 *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
1044                 fifo--;
1045                 read++;
1046                 buf_size--;
1047         }
1048
1049         /* 'clear' the FIFO by setting the writing index to 0; this is
1050          * completely bound to be racy, but we can't help it, since it's a
1051          * limitation of the protocol */
1052         it8709_wm(dev, 0, IT8709_RFSR);
1053
1054         return read;
1055 }
1056
1057 /* return how many bytes are still in the FIFO; this will be called
1058  * with the device spinlock NOT HELD while waiting for the TX FIFO to get
1059  * empty; let's expect this won't be a problem */
1060 static int it8709_get_tx_used_slots(struct ite_dev *dev)
1061 {
1062         return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
1063 }
1064
1065 /* put a byte to the TX fifo; this should be called with the spinlock held */
1066 static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
1067 {
1068         it8709_wr(dev, value, IT85_C0DR);
1069 }
1070
1071 /* idle the receiver so that we won't receive samples until another
1072   pulse is detected; this must be called with the device spinlock held */
1073 static void it8709_idle_rx(struct ite_dev *dev)
1074 {
1075         /* disable streaming by clearing RXACT writing it as 1 */
1076         it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
1077                             IT85_C0RCR);
1078
1079         /* clear the FIFO */
1080         it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
1081                             IT85_C0MSTCR);
1082 }
1083
1084 /* disable the receiver; this must be called with the device spinlock held */
1085 static void it8709_disable_rx(struct ite_dev *dev)
1086 {
1087         /* disable the receiver interrupts */
1088         it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1089                             ~(IT85_RDAIE | IT85_RFOIE),
1090                             IT85_C0IER);
1091
1092         /* disable the receiver */
1093         it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
1094                             IT85_C0RCR);
1095
1096         /* clear the FIFO and RXACT (actually RXACT should have been cleared
1097          * in the previous it8709_wr(dev, ) call) */
1098         it8709_idle_rx(dev);
1099 }
1100
1101 /* enable the receiver; this must be called with the device spinlock held */
1102 static void it8709_enable_rx(struct ite_dev *dev)
1103 {
1104         /* enable the receiver by setting RXEN */
1105         it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
1106                             IT85_C0RCR);
1107
1108         /* just prepare it to idle for the next reception */
1109         it8709_idle_rx(dev);
1110
1111         /* enable the receiver interrupts and master enable flag */
1112         it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1113                             |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
1114                             IT85_C0IER);
1115 }
1116
1117 /* disable the transmitter interrupt; this must be called with the device
1118  * spinlock held */
1119 static void it8709_disable_tx_interrupt(struct ite_dev *dev)
1120 {
1121         /* disable the transmitter interrupts */
1122         it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
1123                             IT85_C0IER);
1124 }
1125
1126 /* enable the transmitter interrupt; this must be called with the device
1127  * spinlock held */
1128 static void it8709_enable_tx_interrupt(struct ite_dev *dev)
1129 {
1130         /* enable the transmitter interrupts and master enable flag */
1131         it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1132                             |IT85_TLDLIE | IT85_IEC,
1133                             IT85_C0IER);
1134 }
1135
1136 /* disable the device; this must be called with the device spinlock held */
1137 static void it8709_disable(struct ite_dev *dev)
1138 {
1139         /* clear out all interrupt enable flags */
1140         it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1141                         ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1142                   IT85_C0IER);
1143
1144         /* disable the receiver */
1145         it8709_disable_rx(dev);
1146
1147         /* erase the FIFO */
1148         it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
1149                             IT85_C0MSTCR);
1150 }
1151
1152 /* initialize the hardware */
1153 static void it8709_init_hardware(struct ite_dev *dev)
1154 {
1155         /* disable all the interrupts */
1156         it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1157                         ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
1158                   IT85_C0IER);
1159
1160         /* program the baud rate divisor */
1161         it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
1162         it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
1163                         IT85_C0BDHR);
1164
1165         /* program the C0MSTCR register defaults */
1166         it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
1167                         ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
1168                           | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
1169                   IT85_C0MSTCR);
1170
1171         /* program the C0RCR register defaults */
1172         it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
1173                         ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
1174                           | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
1175                   IT85_C0RCR);
1176
1177         /* program the C0TCR register defaults */
1178         it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
1179                         | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
1180                         | IT85_TXMPW_DEFAULT,
1181                   IT85_C0TCR);
1182
1183         /* program the carrier parameters */
1184         ite_set_carrier_params(dev);
1185 }
1186
1187
1188 /* generic hardware setup/teardown code */
1189
1190 /* activate the device for use */
1191 static int ite_open(struct rc_dev *rcdev)
1192 {
1193         struct ite_dev *dev = rcdev->priv;
1194         unsigned long flags;
1195
1196         spin_lock_irqsave(&dev->lock, flags);
1197         dev->in_use = true;
1198
1199         /* enable the receiver */
1200         dev->params.enable_rx(dev);
1201
1202         spin_unlock_irqrestore(&dev->lock, flags);
1203
1204         return 0;
1205 }
1206
1207 /* deactivate the device for use */
1208 static void ite_close(struct rc_dev *rcdev)
1209 {
1210         struct ite_dev *dev = rcdev->priv;
1211         unsigned long flags;
1212
1213         spin_lock_irqsave(&dev->lock, flags);
1214         dev->in_use = false;
1215
1216         /* wait for any transmission to end */
1217         spin_unlock_irqrestore(&dev->lock, flags);
1218         wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1219         spin_lock_irqsave(&dev->lock, flags);
1220
1221         dev->params.disable(dev);
1222
1223         spin_unlock_irqrestore(&dev->lock, flags);
1224 }
1225
1226 /* supported models and their parameters */
1227 static const struct ite_dev_params ite_dev_descs[] = {
1228         {       /* 0: ITE8704 */
1229                .model = "ITE8704 CIR transceiver",
1230                .io_region_size = IT87_IOREG_LENGTH,
1231                .io_rsrc_no = 0,
1232                .hw_tx_capable = true,
1233                .sample_period = (u32) (1000000000ULL / 115200),
1234                .tx_carrier_freq = 38000,
1235                .tx_duty_cycle = 33,
1236                .rx_low_carrier_freq = 0,
1237                .rx_high_carrier_freq = 0,
1238
1239                 /* operations */
1240                .get_irq_causes = it87_get_irq_causes,
1241                .enable_rx = it87_enable_rx,
1242                .idle_rx = it87_idle_rx,
1243                .disable_rx = it87_idle_rx,
1244                .get_rx_bytes = it87_get_rx_bytes,
1245                .enable_tx_interrupt = it87_enable_tx_interrupt,
1246                .disable_tx_interrupt = it87_disable_tx_interrupt,
1247                .get_tx_used_slots = it87_get_tx_used_slots,
1248                .put_tx_byte = it87_put_tx_byte,
1249                .disable = it87_disable,
1250                .init_hardware = it87_init_hardware,
1251                .set_carrier_params = it87_set_carrier_params,
1252                },
1253         {       /* 1: ITE8713 */
1254                .model = "ITE8713 CIR transceiver",
1255                .io_region_size = IT87_IOREG_LENGTH,
1256                .io_rsrc_no = 0,
1257                .hw_tx_capable = true,
1258                .sample_period = (u32) (1000000000ULL / 115200),
1259                .tx_carrier_freq = 38000,
1260                .tx_duty_cycle = 33,
1261                .rx_low_carrier_freq = 0,
1262                .rx_high_carrier_freq = 0,
1263
1264                 /* operations */
1265                .get_irq_causes = it87_get_irq_causes,
1266                .enable_rx = it87_enable_rx,
1267                .idle_rx = it87_idle_rx,
1268                .disable_rx = it87_idle_rx,
1269                .get_rx_bytes = it87_get_rx_bytes,
1270                .enable_tx_interrupt = it87_enable_tx_interrupt,
1271                .disable_tx_interrupt = it87_disable_tx_interrupt,
1272                .get_tx_used_slots = it87_get_tx_used_slots,
1273                .put_tx_byte = it87_put_tx_byte,
1274                .disable = it87_disable,
1275                .init_hardware = it87_init_hardware,
1276                .set_carrier_params = it87_set_carrier_params,
1277                },
1278         {       /* 2: ITE8708 */
1279                .model = "ITE8708 CIR transceiver",
1280                .io_region_size = IT8708_IOREG_LENGTH,
1281                .io_rsrc_no = 0,
1282                .hw_tx_capable = true,
1283                .sample_period = (u32) (1000000000ULL / 115200),
1284                .tx_carrier_freq = 38000,
1285                .tx_duty_cycle = 33,
1286                .rx_low_carrier_freq = 0,
1287                .rx_high_carrier_freq = 0,
1288
1289                 /* operations */
1290                .get_irq_causes = it8708_get_irq_causes,
1291                .enable_rx = it8708_enable_rx,
1292                .idle_rx = it8708_idle_rx,
1293                .disable_rx = it8708_idle_rx,
1294                .get_rx_bytes = it8708_get_rx_bytes,
1295                .enable_tx_interrupt = it8708_enable_tx_interrupt,
1296                .disable_tx_interrupt =
1297                it8708_disable_tx_interrupt,
1298                .get_tx_used_slots = it8708_get_tx_used_slots,
1299                .put_tx_byte = it8708_put_tx_byte,
1300                .disable = it8708_disable,
1301                .init_hardware = it8708_init_hardware,
1302                .set_carrier_params = it8708_set_carrier_params,
1303                },
1304         {       /* 3: ITE8709 */
1305                .model = "ITE8709 CIR transceiver",
1306                .io_region_size = IT8709_IOREG_LENGTH,
1307                .io_rsrc_no = 2,
1308                .hw_tx_capable = true,
1309                .sample_period = (u32) (1000000000ULL / 115200),
1310                .tx_carrier_freq = 38000,
1311                .tx_duty_cycle = 33,
1312                .rx_low_carrier_freq = 0,
1313                .rx_high_carrier_freq = 0,
1314
1315                 /* operations */
1316                .get_irq_causes = it8709_get_irq_causes,
1317                .enable_rx = it8709_enable_rx,
1318                .idle_rx = it8709_idle_rx,
1319                .disable_rx = it8709_idle_rx,
1320                .get_rx_bytes = it8709_get_rx_bytes,
1321                .enable_tx_interrupt = it8709_enable_tx_interrupt,
1322                .disable_tx_interrupt =
1323                it8709_disable_tx_interrupt,
1324                .get_tx_used_slots = it8709_get_tx_used_slots,
1325                .put_tx_byte = it8709_put_tx_byte,
1326                .disable = it8709_disable,
1327                .init_hardware = it8709_init_hardware,
1328                .set_carrier_params = it8709_set_carrier_params,
1329                },
1330 };
1331
1332 static const struct pnp_device_id ite_ids[] = {
1333         {"ITE8704", 0},         /* Default model */
1334         {"ITE8713", 1},         /* CIR found in EEEBox 1501U */
1335         {"ITE8708", 2},         /* Bridged IT8512 */
1336         {"ITE8709", 3},         /* SRAM-Bridged IT8512 */
1337         {"", 0},
1338 };
1339
1340 /* allocate memory, probe hardware, and initialize everything */
1341 static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
1342                      *dev_id)
1343 {
1344         const struct ite_dev_params *dev_desc = NULL;
1345         struct ite_dev *itdev = NULL;
1346         struct rc_dev *rdev = NULL;
1347         int ret = -ENOMEM;
1348         int model_no;
1349         int io_rsrc_no;
1350
1351         itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
1352         if (!itdev)
1353                 return ret;
1354
1355         /* input device for IR remote (and tx) */
1356         rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
1357         if (!rdev)
1358                 goto exit_free_dev_rdev;
1359         itdev->rdev = rdev;
1360
1361         ret = -ENODEV;
1362
1363         /* get the model number */
1364         model_no = (int)dev_id->driver_data;
1365         dev_dbg(&pdev->dev, "Auto-detected model: %s\n",
1366                 ite_dev_descs[model_no].model);
1367
1368         if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
1369                 model_no = model_number;
1370                 dev_info(&pdev->dev, "model has been forced to: %s",
1371                          ite_dev_descs[model_no].model);
1372         }
1373
1374         /* get the description for the device */
1375         dev_desc = &ite_dev_descs[model_no];
1376         io_rsrc_no = dev_desc->io_rsrc_no;
1377
1378         /* validate pnp resources */
1379         if (!pnp_port_valid(pdev, io_rsrc_no) ||
1380             pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
1381                 dev_err(&pdev->dev, "IR PNP Port not valid!\n");
1382                 goto exit_free_dev_rdev;
1383         }
1384
1385         if (!pnp_irq_valid(pdev, 0)) {
1386                 dev_err(&pdev->dev, "PNP IRQ not valid!\n");
1387                 goto exit_free_dev_rdev;
1388         }
1389
1390         /* store resource values */
1391         itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
1392         itdev->cir_irq = pnp_irq(pdev, 0);
1393
1394         /* initialize spinlocks */
1395         spin_lock_init(&itdev->lock);
1396
1397         /* set driver data into the pnp device */
1398         pnp_set_drvdata(pdev, itdev);
1399         itdev->pdev = pdev;
1400
1401         /* initialize waitqueues for transmission */
1402         init_waitqueue_head(&itdev->tx_queue);
1403         init_waitqueue_head(&itdev->tx_ended);
1404
1405         /* copy model-specific parameters */
1406         itdev->params = *dev_desc;
1407
1408         /* apply any overrides */
1409         if (sample_period > 0)
1410                 itdev->params.sample_period = sample_period;
1411
1412         if (tx_carrier_freq > 0)
1413                 itdev->params.tx_carrier_freq = tx_carrier_freq;
1414
1415         if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
1416                 itdev->params.tx_duty_cycle = tx_duty_cycle;
1417
1418         if (rx_low_carrier_freq > 0)
1419                 itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
1420
1421         if (rx_high_carrier_freq > 0)
1422                 itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
1423
1424         /* set up hardware initial state */
1425         itdev->params.init_hardware(itdev);
1426
1427         /* set up ir-core props */
1428         rdev->priv = itdev;
1429         rdev->dev.parent = &pdev->dev;
1430         rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
1431         rdev->open = ite_open;
1432         rdev->close = ite_close;
1433         rdev->s_idle = ite_s_idle;
1434         rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
1435         /* FIFO threshold is 17 bytes, so 17 * 8 samples minimum */
1436         rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR *
1437                             itdev->params.sample_period / 1000;
1438         rdev->timeout = IR_DEFAULT_TIMEOUT;
1439         rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
1440         rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
1441                                 itdev->params.sample_period / 1000;
1442         rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
1443                                 itdev->params.sample_period / 1000;
1444
1445         /* set up transmitter related values if needed */
1446         if (itdev->params.hw_tx_capable) {
1447                 rdev->tx_ir = ite_tx_ir;
1448                 rdev->s_tx_carrier = ite_set_tx_carrier;
1449                 rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
1450         }
1451
1452         rdev->device_name = dev_desc->model;
1453         rdev->input_id.bustype = BUS_HOST;
1454         rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
1455         rdev->input_id.product = 0;
1456         rdev->input_id.version = 0;
1457         rdev->driver_name = ITE_DRIVER_NAME;
1458         rdev->map_name = RC_MAP_RC6_MCE;
1459
1460         ret = rc_register_device(rdev);
1461         if (ret)
1462                 goto exit_free_dev_rdev;
1463
1464         ret = -EBUSY;
1465         /* now claim resources */
1466         if (!request_region(itdev->cir_addr,
1467                                 dev_desc->io_region_size, ITE_DRIVER_NAME))
1468                 goto exit_unregister_device;
1469
1470         if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
1471                         ITE_DRIVER_NAME, (void *)itdev))
1472                 goto exit_release_cir_addr;
1473
1474         return 0;
1475
1476 exit_release_cir_addr:
1477         release_region(itdev->cir_addr, itdev->params.io_region_size);
1478 exit_unregister_device:
1479         rc_unregister_device(rdev);
1480         rdev = NULL;
1481 exit_free_dev_rdev:
1482         rc_free_device(rdev);
1483         kfree(itdev);
1484
1485         return ret;
1486 }
1487
1488 static void ite_remove(struct pnp_dev *pdev)
1489 {
1490         struct ite_dev *dev = pnp_get_drvdata(pdev);
1491         unsigned long flags;
1492
1493         spin_lock_irqsave(&dev->lock, flags);
1494
1495         /* disable hardware */
1496         dev->params.disable(dev);
1497
1498         spin_unlock_irqrestore(&dev->lock, flags);
1499
1500         /* free resources */
1501         free_irq(dev->cir_irq, dev);
1502         release_region(dev->cir_addr, dev->params.io_region_size);
1503
1504         rc_unregister_device(dev->rdev);
1505
1506         kfree(dev);
1507 }
1508
1509 static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
1510 {
1511         struct ite_dev *dev = pnp_get_drvdata(pdev);
1512         unsigned long flags;
1513
1514         /* wait for any transmission to end */
1515         wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1516
1517         spin_lock_irqsave(&dev->lock, flags);
1518
1519         /* disable all interrupts */
1520         dev->params.disable(dev);
1521
1522         spin_unlock_irqrestore(&dev->lock, flags);
1523
1524         return 0;
1525 }
1526
1527 static int ite_resume(struct pnp_dev *pdev)
1528 {
1529         struct ite_dev *dev = pnp_get_drvdata(pdev);
1530         unsigned long flags;
1531
1532         spin_lock_irqsave(&dev->lock, flags);
1533
1534         /* reinitialize hardware config registers */
1535         dev->params.init_hardware(dev);
1536         /* enable the receiver */
1537         dev->params.enable_rx(dev);
1538
1539         spin_unlock_irqrestore(&dev->lock, flags);
1540
1541         return 0;
1542 }
1543
1544 static void ite_shutdown(struct pnp_dev *pdev)
1545 {
1546         struct ite_dev *dev = pnp_get_drvdata(pdev);
1547         unsigned long flags;
1548
1549         spin_lock_irqsave(&dev->lock, flags);
1550
1551         /* disable all interrupts */
1552         dev->params.disable(dev);
1553
1554         spin_unlock_irqrestore(&dev->lock, flags);
1555 }
1556
1557 static struct pnp_driver ite_driver = {
1558         .name           = ITE_DRIVER_NAME,
1559         .id_table       = ite_ids,
1560         .probe          = ite_probe,
1561         .remove         = ite_remove,
1562         .suspend        = ite_suspend,
1563         .resume         = ite_resume,
1564         .shutdown       = ite_shutdown,
1565 };
1566
1567 MODULE_DEVICE_TABLE(pnp, ite_ids);
1568 MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
1569
1570 MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
1571 MODULE_LICENSE("GPL");
1572
1573 module_pnp_driver(ite_driver);