drivers/media/platform/vsp1/vsp1_bru.c

   1 /*
   2  * vsp1_bru.c  --  R-Car VSP1 Blend ROP Unit
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/gfp.h>
  16
  17 #include <media/v4l2-subdev.h>
  18
  19 #include "vsp1.h"
  20 #include "vsp1_bru.h"
  21 #include "vsp1_rwpf.h"
  22
  23 #define BRU_MIN_SIZE                            4U
  24 #define BRU_MAX_SIZE                            8190U
  25
  26 /* -----------------------------------------------------------------------------
  27  * Device Access
  28  */
  29
  30 static inline u32 vsp1_bru_read(struct vsp1_bru *bru, u32 reg)
  31 {
  32         return vsp1_read(bru->entity.vsp1, reg);
  33 }
  34
  35 static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
  36 {
  37         vsp1_write(bru->entity.vsp1, reg, data);
  38 }
  39
  40 /* -----------------------------------------------------------------------------
  41  * V4L2 Subdevice Core Operations
  42  */
  43
  44 static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
  45 {
  46         struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
  47         struct vsp1_bru *bru = to_bru(subdev);
  48         struct v4l2_mbus_framefmt *format;
  49         unsigned int flags;
  50         unsigned int i;
  51
  52         if (!enable)
  53                 return 0;
  54
  55         format = &bru->entity.formats[BRU_PAD_SOURCE];
  56
  57         /* The hardware is extremely flexible but we have no userspace API to
  58          * expose all the parameters, nor is it clear whether we would have use
  59          * cases for all the supported modes. Let's just harcode the parameters
  60          * to sane default values for now.
  61          */
  62
  63         /* Disable dithering and enable color data normalization unless the
  64          * format at the pipeline output is premultiplied.
  65          */
  66         flags = pipe->output ? pipe->output->video.format.flags : 0;
  67         vsp1_bru_write(bru, VI6_BRU_INCTRL,
  68                        flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
  69                        0 : VI6_BRU_INCTRL_NRM);
  70
  71         /* Set the background position to cover the whole output image and
  72          * set its color to opaque black.
  73          */
  74         vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
  75                        (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
  76                        (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
  77         vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
  78         vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL,
  79                        0xff << VI6_BRU_VIRRPF_COL_A_SHIFT);
  80
  81         /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
  82          * unit with a NOP operation to make BRU input 1 available as the
  83          * Blend/ROP unit B SRC input.
  84          */
  85         vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
  86                        VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
  87                        VI6_BRU_ROP_AROP(VI6_ROP_NOP));
  88
  89         for (i = 0; i < 4; ++i) {
  90                 bool premultiplied = false;
  91                 u32 ctrl = 0;
  92
  93                 /* Configure all Blend/ROP units corresponding to an enabled BRU
  94                  * input for alpha blending. Blend/ROP units corresponding to
  95                  * disabled BRU inputs are used in ROP NOP mode to ignore the
  96                  * SRC input.
  97                  */
  98                 if (bru->inputs[i].rpf) {
  99                         ctrl |= VI6_BRU_CTRL_RBC;
 100
 101                         premultiplied = bru->inputs[i].rpf->video.format.flags
 102                                       & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
 103                 } else {
 104                         ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
 105                              |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
 106                 }
 107
 108                 /* Select the virtual RPF as the Blend/ROP unit A DST input to
 109                  * serve as a background color.
 110                  */
 111                 if (i == 0)
 112                         ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
 113
 114                 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
 115                  * D in that order. The Blend/ROP unit B SRC is hardwired to the
 116                  * ROP unit output, the corresponding register bits must be set
 117                  * to 0.
 118                  */
 119                 if (i != 1)
 120                         ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
 121
 122                 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
 123
 124                 /* Harcode the blending formula to
 125                  *
 126                  *      DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
 127                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 128                  *
 129                  * when the SRC input isn't premultiplied, and to
 130                  *
 131                  *      DSTc = DSTc * (1 - SRCa) + SRCc
 132                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 133                  *
 134                  * otherwise.
 135                  */
 136                 vsp1_bru_write(bru, VI6_BRU_BLD(i),
 137                                VI6_BRU_BLD_CCMDX_255_SRC_A |
 138                                (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
 139                                                 VI6_BRU_BLD_CCMDY_SRC_A) |
 140                                VI6_BRU_BLD_ACMDX_255_SRC_A |
 141                                VI6_BRU_BLD_ACMDY_COEFY |
 142                                (0xff << VI6_BRU_BLD_COEFY_SHIFT));
 143         }
 144
 145         return 0;
 146 }
 147
 148 /* -----------------------------------------------------------------------------
 149  * V4L2 Subdevice Pad Operations
 150  */
 151
 152 /*
 153  * The BRU can't perform format conversion, all sink and source formats must be
 154  * identical. We pick the format on the first sink pad (pad 0) and propagate it
 155  * to all other pads.
 156  */
 157
 158 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
 159                               struct v4l2_subdev_fh *fh,
 160                               struct v4l2_subdev_mbus_code_enum *code)
 161 {
 162         static const unsigned int codes[] = {
 163                 V4L2_MBUS_FMT_ARGB8888_1X32,
 164                 V4L2_MBUS_FMT_AYUV8_1X32,
 165         };
 166         struct v4l2_mbus_framefmt *format;
 167
 168         if (code->pad == BRU_PAD_SINK(0)) {
 169                 if (code->index >= ARRAY_SIZE(codes))
 170                         return -EINVAL;
 171
 172                 code->code = codes[code->index];
 173         } else {
 174                 if (code->index)
 175                         return -EINVAL;
 176
 177                 format = v4l2_subdev_get_try_format(fh, BRU_PAD_SINK(0));
 178                 code->code = format->code;
 179         }
 180
 181         return 0;
 182 }
 183
 184 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
 185                                struct v4l2_subdev_fh *fh,
 186                                struct v4l2_subdev_frame_size_enum *fse)
 187 {
 188         if (fse->index)
 189                 return -EINVAL;
 190
 191         if (fse->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
 192             fse->code != V4L2_MBUS_FMT_AYUV8_1X32)
 193                 return -EINVAL;
 194
 195         fse->min_width = BRU_MIN_SIZE;
 196         fse->max_width = BRU_MAX_SIZE;
 197         fse->min_height = BRU_MIN_SIZE;
 198         fse->max_height = BRU_MAX_SIZE;
 199
 200         return 0;
 201 }
 202
 203 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
 204                                          struct v4l2_subdev_fh *fh,
 205                                          unsigned int pad, u32 which)
 206 {
 207         switch (which) {
 208         case V4L2_SUBDEV_FORMAT_TRY:
 209                 return v4l2_subdev_get_try_crop(fh, pad);
 210         case V4L2_SUBDEV_FORMAT_ACTIVE:
 211                 return &bru->inputs[pad].compose;
 212         default:
 213                 return NULL;
 214         }
 215 }
 216
 217 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
 218                           struct v4l2_subdev_format *fmt)
 219 {
 220         struct vsp1_bru *bru = to_bru(subdev);
 221
 222         fmt->format = *vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
 223                                                   fmt->which);
 224
 225         return 0;
 226 }
 227
 228 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_fh *fh,
 229                            unsigned int pad, struct v4l2_mbus_framefmt *fmt,
 230                            enum v4l2_subdev_format_whence which)
 231 {
 232         struct v4l2_mbus_framefmt *format;
 233
 234         switch (pad) {
 235         case BRU_PAD_SINK(0):
 236                 /* Default to YUV if the requested format is not supported. */
 237                 if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
 238                     fmt->code != V4L2_MBUS_FMT_AYUV8_1X32)
 239                         fmt->code = V4L2_MBUS_FMT_AYUV8_1X32;
 240                 break;
 241
 242         default:
 243                 /* The BRU can't perform format conversion. */
 244                 format = vsp1_entity_get_pad_format(&bru->entity, fh,
 245                                                     BRU_PAD_SINK(0), which);
 246                 fmt->code = format->code;
 247                 break;
 248         }
 249
 250         fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
 251         fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
 252         fmt->field = V4L2_FIELD_NONE;
 253         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 254 }
 255
 256 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
 257                           struct v4l2_subdev_format *fmt)
 258 {
 259         struct vsp1_bru *bru = to_bru(subdev);
 260         struct v4l2_mbus_framefmt *format;
 261
 262         bru_try_format(bru, fh, fmt->pad, &fmt->format, fmt->which);
 263
 264         format = vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
 265                                             fmt->which);
 266         *format = fmt->format;
 267
 268         /* Reset the compose rectangle */
 269         if (fmt->pad != BRU_PAD_SOURCE) {
 270                 struct v4l2_rect *compose;
 271
 272                 compose = bru_get_compose(bru, fh, fmt->pad, fmt->which);
 273                 compose->left = 0;
 274                 compose->top = 0;
 275                 compose->width = format->width;
 276                 compose->height = format->height;
 277         }
 278
 279         /* Propagate the format code to all pads */
 280         if (fmt->pad == BRU_PAD_SINK(0)) {
 281                 unsigned int i;
 282
 283                 for (i = 0; i <= BRU_PAD_SOURCE; ++i) {
 284                         format = vsp1_entity_get_pad_format(&bru->entity, fh,
 285                                                             i, fmt->which);
 286                         format->code = fmt->format.code;
 287                 }
 288         }
 289
 290         return 0;
 291 }
 292
 293 static int bru_get_selection(struct v4l2_subdev *subdev,
 294                              struct v4l2_subdev_fh *fh,
 295                              struct v4l2_subdev_selection *sel)
 296 {
 297         struct vsp1_bru *bru = to_bru(subdev);
 298
 299         if (sel->pad == BRU_PAD_SOURCE)
 300                 return -EINVAL;
 301
 302         switch (sel->target) {
 303         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 304                 sel->r.left = 0;
 305                 sel->r.top = 0;
 306                 sel->r.width = BRU_MAX_SIZE;
 307                 sel->r.height = BRU_MAX_SIZE;
 308                 return 0;
 309
 310         case V4L2_SEL_TGT_COMPOSE:
 311                 sel->r = *bru_get_compose(bru, fh, sel->pad, sel->which);
 312                 return 0;
 313
 314         default:
 315                 return -EINVAL;
 316         }
 317 }
 318
 319 static int bru_set_selection(struct v4l2_subdev *subdev,
 320                              struct v4l2_subdev_fh *fh,
 321                              struct v4l2_subdev_selection *sel)
 322 {
 323         struct vsp1_bru *bru = to_bru(subdev);
 324         struct v4l2_mbus_framefmt *format;
 325         struct v4l2_rect *compose;
 326
 327         if (sel->pad == BRU_PAD_SOURCE)
 328                 return -EINVAL;
 329
 330         if (sel->target != V4L2_SEL_TGT_COMPOSE)
 331                 return -EINVAL;
 332
 333         /* The compose rectangle top left corner must be inside the output
 334          * frame.
 335          */
 336         format = vsp1_entity_get_pad_format(&bru->entity, fh, BRU_PAD_SOURCE,
 337                                             sel->which);
 338         sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
 339         sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
 340
 341         /* Scaling isn't supported, the compose rectangle size must be identical
 342          * to the sink format size.
 343          */
 344         format = vsp1_entity_get_pad_format(&bru->entity, fh, sel->pad,
 345                                             sel->which);
 346         sel->r.width = format->width;
 347         sel->r.height = format->height;
 348
 349         compose = bru_get_compose(bru, fh, sel->pad, sel->which);
 350         *compose = sel->r;
 351
 352         return 0;
 353 }
 354
 355 /* -----------------------------------------------------------------------------
 356  * V4L2 Subdevice Operations
 357  */
 358
 359 static struct v4l2_subdev_video_ops bru_video_ops = {
 360         .s_stream = bru_s_stream,
 361 };
 362
 363 static struct v4l2_subdev_pad_ops bru_pad_ops = {
 364         .enum_mbus_code = bru_enum_mbus_code,
 365         .enum_frame_size = bru_enum_frame_size,
 366         .get_fmt = bru_get_format,
 367         .set_fmt = bru_set_format,
 368         .get_selection = bru_get_selection,
 369         .set_selection = bru_set_selection,
 370 };
 371
 372 static struct v4l2_subdev_ops bru_ops = {
 373         .video  = &bru_video_ops,
 374         .pad    = &bru_pad_ops,
 375 };
 376
 377 /* -----------------------------------------------------------------------------
 378  * Initialization and Cleanup
 379  */
 380
 381 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
 382 {
 383         struct v4l2_subdev *subdev;
 384         struct vsp1_bru *bru;
 385         int ret;
 386
 387         bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
 388         if (bru == NULL)
 389                 return ERR_PTR(-ENOMEM);
 390
 391         bru->entity.type = VSP1_ENTITY_BRU;
 392
 393         ret = vsp1_entity_init(vsp1, &bru->entity, 5);
 394         if (ret < 0)
 395                 return ERR_PTR(ret);
 396
 397         /* Initialize the V4L2 subdev. */
 398         subdev = &bru->entity.subdev;
 399         v4l2_subdev_init(subdev, &bru_ops);
 400
 401         subdev->entity.ops = &vsp1_media_ops;
 402         subdev->internal_ops = &vsp1_subdev_internal_ops;
 403         snprintf(subdev->name, sizeof(subdev->name), "%s bru",
 404                  dev_name(vsp1->dev));
 405         v4l2_set_subdevdata(subdev, bru);
 406         subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 407
 408         vsp1_entity_init_formats(subdev, NULL);
 409
 410         return bru;
 411 }