1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STM32 Digital Camera Memory Interface
5 * Copyright (C) STMicroelectronics SA 2017
6 * Authors: Yannick Fertre <yannick.fertre@st.com>
7 * Hugues Fruchet <hugues.fruchet@st.com>
8 * for STMicroelectronics.
10 * This driver is based on atmel_isi.c
14 #include <linux/clk.h>
15 #include <linux/completion.h>
16 #include <linux/delay.h>
17 #include <linux/dmaengine.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/of_graph.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/reset.h>
29 #include <linux/videodev2.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-dev.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-event.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-image-sizes.h>
37 #include <media/v4l2-ioctl.h>
38 #include <media/v4l2-rect.h>
39 #include <media/videobuf2-dma-contig.h>
41 #define DRV_NAME "stm32-dcmi"
43 /* Registers offset for DCMI */
44 #define DCMI_CR 0x00 /* Control Register */
45 #define DCMI_SR 0x04 /* Status Register */
46 #define DCMI_RIS 0x08 /* Raw Interrupt Status register */
47 #define DCMI_IER 0x0C /* Interrupt Enable Register */
48 #define DCMI_MIS 0x10 /* Masked Interrupt Status register */
49 #define DCMI_ICR 0x14 /* Interrupt Clear Register */
50 #define DCMI_ESCR 0x18 /* Embedded Synchronization Code Register */
51 #define DCMI_ESUR 0x1C /* Embedded Synchronization Unmask Register */
52 #define DCMI_CWSTRT 0x20 /* Crop Window STaRT */
53 #define DCMI_CWSIZE 0x24 /* Crop Window SIZE */
54 #define DCMI_DR 0x28 /* Data Register */
55 #define DCMI_IDR 0x2C /* IDentifier Register */
57 /* Bits definition for control register (DCMI_CR) */
58 #define CR_CAPTURE BIT(0)
60 #define CR_CROP BIT(2)
61 #define CR_JPEG BIT(3)
63 #define CR_PCKPOL BIT(5)
64 #define CR_HSPOL BIT(6)
65 #define CR_VSPOL BIT(7)
66 #define CR_FCRC_0 BIT(8)
67 #define CR_FCRC_1 BIT(9)
68 #define CR_EDM_0 BIT(10)
69 #define CR_EDM_1 BIT(11)
70 #define CR_ENABLE BIT(14)
72 /* Bits definition for status register (DCMI_SR) */
73 #define SR_HSYNC BIT(0)
74 #define SR_VSYNC BIT(1)
78 * Bits definition for interrupt registers
79 * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR)
81 #define IT_FRAME BIT(0)
84 #define IT_VSYNC BIT(3)
85 #define IT_LINE BIT(4)
94 #define MAX_WIDTH 2592U
95 #define MIN_HEIGHT 16U
96 #define MAX_HEIGHT 2592U
98 #define TIMEOUT_MS 1000
100 #define OVERRUN_ERROR_THRESHOLD 3
108 struct dcmi_framesize {
114 struct vb2_v4l2_buffer vb;
118 struct list_head list;
122 /* Protects the access of variables shared within the interrupt */
126 struct resource *res;
127 struct reset_control *rstc;
129 struct list_head buffers;
130 struct dcmi_buf *active;
133 struct v4l2_device v4l2_dev;
134 struct video_device *vdev;
135 struct v4l2_async_notifier notifier;
136 struct v4l2_subdev *source;
137 struct v4l2_format fmt;
138 struct v4l2_rect crop;
141 const struct dcmi_format **sd_formats;
142 unsigned int num_of_sd_formats;
143 const struct dcmi_format *sd_format;
144 struct dcmi_framesize *sd_framesizes;
145 unsigned int num_of_sd_framesizes;
146 struct dcmi_framesize sd_framesize;
147 struct v4l2_rect sd_bounds;
149 /* Protect this data structure */
151 struct vb2_queue queue;
153 struct v4l2_mbus_config_parallel bus;
154 enum v4l2_mbus_type bus_type;
155 struct completion complete;
158 struct dma_chan *dma_chan;
159 dma_cookie_t dma_cookie;
166 /* Ensure DMA operations atomicity */
167 struct mutex dma_lock;
169 struct media_device mdev;
170 struct media_pad vid_cap_pad;
171 struct media_pipeline pipeline;
174 static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n)
176 return container_of(n, struct stm32_dcmi, notifier);
179 static inline u32 reg_read(void __iomem *base, u32 reg)
181 return readl_relaxed(base + reg);
184 static inline void reg_write(void __iomem *base, u32 reg, u32 val)
186 writel_relaxed(val, base + reg);
189 static inline void reg_set(void __iomem *base, u32 reg, u32 mask)
191 reg_write(base, reg, reg_read(base, reg) | mask);
194 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask)
196 reg_write(base, reg, reg_read(base, reg) & ~mask);
199 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf);
201 static void dcmi_buffer_done(struct stm32_dcmi *dcmi,
202 struct dcmi_buf *buf,
206 struct vb2_v4l2_buffer *vbuf;
211 list_del_init(&buf->list);
215 vbuf->sequence = dcmi->sequence++;
216 vbuf->field = V4L2_FIELD_NONE;
217 vbuf->vb2_buf.timestamp = ktime_get_ns();
218 vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused);
219 vb2_buffer_done(&vbuf->vb2_buf,
220 err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
221 dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n",
222 vbuf->vb2_buf.index, vbuf->sequence, bytesused);
224 dcmi->buffers_count++;
228 static int dcmi_restart_capture(struct stm32_dcmi *dcmi)
230 struct dcmi_buf *buf;
232 spin_lock_irq(&dcmi->irqlock);
234 if (dcmi->state != RUNNING) {
235 spin_unlock_irq(&dcmi->irqlock);
239 /* Restart a new DMA transfer with next buffer */
240 if (list_empty(&dcmi->buffers)) {
241 dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n");
242 dcmi->state = WAIT_FOR_BUFFER;
243 spin_unlock_irq(&dcmi->irqlock);
246 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
249 spin_unlock_irq(&dcmi->irqlock);
251 return dcmi_start_capture(dcmi, buf);
254 static void dcmi_dma_callback(void *param)
256 struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param;
257 struct dma_tx_state state;
258 enum dma_status status;
259 struct dcmi_buf *buf = dcmi->active;
261 spin_lock_irq(&dcmi->irqlock);
263 /* Check DMA status */
264 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
267 case DMA_IN_PROGRESS:
268 dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__);
271 dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__);
274 dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__);
276 /* Return buffer to V4L2 in error state */
277 dcmi_buffer_done(dcmi, buf, 0, -EIO);
280 dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__);
282 /* Return buffer to V4L2 */
283 dcmi_buffer_done(dcmi, buf, buf->size, 0);
285 spin_unlock_irq(&dcmi->irqlock);
287 /* Restart capture */
288 if (dcmi_restart_capture(dcmi))
289 dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n",
293 dev_err(dcmi->dev, "%s: Received unknown status\n", __func__);
297 spin_unlock_irq(&dcmi->irqlock);
300 static int dcmi_start_dma(struct stm32_dcmi *dcmi,
301 struct dcmi_buf *buf)
303 struct dma_async_tx_descriptor *desc = NULL;
304 struct dma_slave_config config;
307 memset(&config, 0, sizeof(config));
309 config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR;
310 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
311 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
312 config.dst_maxburst = 4;
314 /* Configure DMA channel */
315 ret = dmaengine_slave_config(dcmi->dma_chan, &config);
317 dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n",
323 * Avoid call of dmaengine_terminate_sync() between
324 * dmaengine_prep_slave_single() and dmaengine_submit()
325 * by locking the whole DMA submission sequence
327 mutex_lock(&dcmi->dma_lock);
329 /* Prepare a DMA transaction */
330 desc = dmaengine_prep_slave_sg(dcmi->dma_chan, buf->sgt.sgl, buf->sgt.nents,
334 dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_sg failed\n", __func__);
335 mutex_unlock(&dcmi->dma_lock);
339 /* Set completion callback routine for notification */
340 desc->callback = dcmi_dma_callback;
341 desc->callback_param = dcmi;
343 /* Push current DMA transaction in the pending queue */
344 dcmi->dma_cookie = dmaengine_submit(desc);
345 if (dma_submit_error(dcmi->dma_cookie)) {
346 dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__);
347 mutex_unlock(&dcmi->dma_lock);
351 mutex_unlock(&dcmi->dma_lock);
353 dma_async_issue_pending(dcmi->dma_chan);
358 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf)
365 ret = dcmi_start_dma(dcmi, buf);
367 dcmi->errors_count++;
372 reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE);
377 static void dcmi_set_crop(struct stm32_dcmi *dcmi)
381 /* Crop resolution */
382 size = ((dcmi->crop.height - 1) << 16) |
383 ((dcmi->crop.width << 1) - 1);
384 reg_write(dcmi->regs, DCMI_CWSIZE, size);
386 /* Crop start point */
387 start = ((dcmi->crop.top) << 16) |
388 ((dcmi->crop.left << 1));
389 reg_write(dcmi->regs, DCMI_CWSTRT, start);
391 dev_dbg(dcmi->dev, "Cropping to %ux%u@%u:%u\n",
392 dcmi->crop.width, dcmi->crop.height,
393 dcmi->crop.left, dcmi->crop.top);
396 reg_set(dcmi->regs, DCMI_CR, CR_CROP);
399 static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
401 struct dma_tx_state state;
402 enum dma_status status;
403 struct dcmi_buf *buf = dcmi->active;
409 * Because of variable JPEG buffer size sent by sensor,
410 * DMA transfer never completes due to transfer size never reached.
411 * In order to ensure that all the JPEG data are transferred
412 * in active buffer memory, DMA is drained.
413 * Then DMA tx status gives the amount of data transferred
414 * to memory, which is then returned to V4L2 through the active
419 dmaengine_synchronize(dcmi->dma_chan);
421 /* Get DMA residue to get JPEG size */
422 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
423 if (status != DMA_ERROR && state.residue < buf->size) {
424 /* Return JPEG buffer to V4L2 with received JPEG buffer size */
425 dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0);
427 dcmi->errors_count++;
428 dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n",
430 /* Return JPEG buffer to V4L2 in ERROR state */
431 dcmi_buffer_done(dcmi, buf, 0, -EIO);
434 /* Abort DMA operation */
435 dmaengine_terminate_sync(dcmi->dma_chan);
437 /* Restart capture */
438 if (dcmi_restart_capture(dcmi))
439 dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n",
443 static irqreturn_t dcmi_irq_thread(int irq, void *arg)
445 struct stm32_dcmi *dcmi = arg;
447 spin_lock_irq(&dcmi->irqlock);
449 if (dcmi->misr & IT_OVR) {
450 dcmi->overrun_count++;
451 if (dcmi->overrun_count > OVERRUN_ERROR_THRESHOLD)
452 dcmi->errors_count++;
454 if (dcmi->misr & IT_ERR)
455 dcmi->errors_count++;
457 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG &&
458 dcmi->misr & IT_FRAME) {
460 spin_unlock_irq(&dcmi->irqlock);
461 dcmi_process_jpeg(dcmi);
465 spin_unlock_irq(&dcmi->irqlock);
469 static irqreturn_t dcmi_irq_callback(int irq, void *arg)
471 struct stm32_dcmi *dcmi = arg;
474 spin_lock_irqsave(&dcmi->irqlock, flags);
476 dcmi->misr = reg_read(dcmi->regs, DCMI_MIS);
478 /* Clear interrupt */
479 reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR);
481 spin_unlock_irqrestore(&dcmi->irqlock, flags);
483 return IRQ_WAKE_THREAD;
486 static int dcmi_queue_setup(struct vb2_queue *vq,
487 unsigned int *nbuffers,
488 unsigned int *nplanes,
489 unsigned int sizes[],
490 struct device *alloc_devs[])
492 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
495 size = dcmi->fmt.fmt.pix.sizeimage;
497 /* Make sure the image size is large enough */
499 return sizes[0] < size ? -EINVAL : 0;
504 dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n",
510 static int dcmi_buf_init(struct vb2_buffer *vb)
512 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
513 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
515 INIT_LIST_HEAD(&buf->list);
520 static int dcmi_buf_prepare(struct vb2_buffer *vb)
522 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
523 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
524 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
526 unsigned int num_sgs = 1;
528 struct scatterlist *sg;
531 size = dcmi->fmt.fmt.pix.sizeimage;
533 if (vb2_plane_size(vb, 0) < size) {
534 dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n",
535 __func__, vb2_plane_size(vb, 0), size);
539 vb2_set_plane_payload(vb, 0, size);
541 if (!buf->prepared) {
542 /* Get memory addresses */
543 buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
544 if (buf->size > dcmi->dma_max_burst)
545 num_sgs = DIV_ROUND_UP(buf->size, dcmi->dma_max_burst);
547 ret = sg_alloc_table(&buf->sgt, num_sgs, GFP_ATOMIC);
549 dev_err(dcmi->dev, "sg table alloc failed\n");
553 dma_buf = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
555 dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
556 vb->index, &dma_buf, buf->size);
558 for_each_sg(buf->sgt.sgl, sg, num_sgs, i) {
559 size_t bytes = min_t(size_t, size, dcmi->dma_max_burst);
561 sg_dma_address(sg) = dma_buf;
562 sg_dma_len(sg) = bytes;
567 buf->prepared = true;
569 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
575 static void dcmi_buf_queue(struct vb2_buffer *vb)
577 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
578 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
579 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
581 spin_lock_irq(&dcmi->irqlock);
583 /* Enqueue to video buffers list */
584 list_add_tail(&buf->list, &dcmi->buffers);
586 if (dcmi->state == WAIT_FOR_BUFFER) {
587 dcmi->state = RUNNING;
590 dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n",
591 buf->vb.vb2_buf.index);
593 spin_unlock_irq(&dcmi->irqlock);
594 if (dcmi_start_capture(dcmi, buf))
595 dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n",
600 spin_unlock_irq(&dcmi->irqlock);
603 static struct media_entity *dcmi_find_source(struct stm32_dcmi *dcmi)
605 struct media_entity *entity = &dcmi->vdev->entity;
606 struct media_pad *pad;
608 /* Walk searching for entity having no sink */
610 pad = &entity->pads[0];
611 if (!(pad->flags & MEDIA_PAD_FL_SINK))
614 pad = media_pad_remote_pad_first(pad);
615 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
618 entity = pad->entity;
624 static int dcmi_pipeline_s_fmt(struct stm32_dcmi *dcmi,
625 struct v4l2_subdev_format *format)
627 struct media_entity *entity = &dcmi->source->entity;
628 struct v4l2_subdev *subdev;
629 struct media_pad *sink_pad = NULL;
630 struct media_pad *src_pad = NULL;
631 struct media_pad *pad = NULL;
632 struct v4l2_subdev_format fmt = *format;
637 * Starting from sensor subdevice, walk within
638 * pipeline and set format on each subdevice
643 /* Search if current entity has a source pad */
644 for (i = 0; i < entity->num_pads; i++) {
645 pad = &entity->pads[i];
646 if (pad->flags & MEDIA_PAD_FL_SOURCE) {
655 subdev = media_entity_to_v4l2_subdev(entity);
657 /* Propagate format on sink pad if any, otherwise source pad */
661 dev_dbg(dcmi->dev, "\"%s\":%d pad format set to 0x%x %ux%u\n",
662 subdev->name, pad->index, format->format.code,
663 format->format.width, format->format.height);
665 fmt.pad = pad->index;
666 ret = v4l2_subdev_call(subdev, pad, set_fmt, NULL, &fmt);
668 dev_err(dcmi->dev, "%s: Failed to set format 0x%x %ux%u on \"%s\":%d pad (%d)\n",
669 __func__, format->format.code,
670 format->format.width, format->format.height,
671 subdev->name, pad->index, ret);
675 if (fmt.format.code != format->format.code ||
676 fmt.format.width != format->format.width ||
677 fmt.format.height != format->format.height) {
678 dev_dbg(dcmi->dev, "\"%s\":%d pad format has been changed to 0x%x %ux%u\n",
679 subdev->name, pad->index, fmt.format.code,
680 fmt.format.width, fmt.format.height);
683 /* Walk to next entity */
684 sink_pad = media_pad_remote_pad_first(src_pad);
685 if (!sink_pad || !is_media_entity_v4l2_subdev(sink_pad->entity))
688 entity = sink_pad->entity;
695 static int dcmi_pipeline_s_stream(struct stm32_dcmi *dcmi, int state)
697 struct media_entity *entity = &dcmi->vdev->entity;
698 struct v4l2_subdev *subdev;
699 struct media_pad *pad;
702 /* Start/stop all entities within pipeline */
704 pad = &entity->pads[0];
705 if (!(pad->flags & MEDIA_PAD_FL_SINK))
708 pad = media_pad_remote_pad_first(pad);
709 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
712 entity = pad->entity;
713 subdev = media_entity_to_v4l2_subdev(entity);
715 ret = v4l2_subdev_call(subdev, video, s_stream, state);
716 if (ret < 0 && ret != -ENOIOCTLCMD) {
717 dev_err(dcmi->dev, "%s: \"%s\" failed to %s streaming (%d)\n",
718 __func__, subdev->name,
719 state ? "start" : "stop", ret);
723 dev_dbg(dcmi->dev, "\"%s\" is %s\n",
724 subdev->name, state ? "started" : "stopped");
730 static int dcmi_pipeline_start(struct stm32_dcmi *dcmi)
732 return dcmi_pipeline_s_stream(dcmi, 1);
735 static void dcmi_pipeline_stop(struct stm32_dcmi *dcmi)
737 dcmi_pipeline_s_stream(dcmi, 0);
740 static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
742 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
743 struct dcmi_buf *buf, *node;
747 ret = pm_runtime_resume_and_get(dcmi->dev);
749 dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
754 ret = video_device_pipeline_start(dcmi->vdev, &dcmi->pipeline);
756 dev_err(dcmi->dev, "%s: Failed to start streaming, media pipeline start error (%d)\n",
761 ret = dcmi_pipeline_start(dcmi);
763 goto err_media_pipeline_stop;
765 spin_lock_irq(&dcmi->irqlock);
768 switch (dcmi->bus.bus_width) {
770 val |= CR_EDM_0 | CR_EDM_1;
779 /* Set bus width to 8 bits by default */
783 /* Set vertical synchronization polarity */
784 if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
787 /* Set horizontal synchronization polarity */
788 if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
791 /* Set pixel clock polarity */
792 if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
796 * BT656 embedded synchronisation bus mode.
798 * Default SAV/EAV mode is supported here with default codes
799 * SAV=0xff000080 & EAV=0xff00009d.
800 * With DCMI this means LSC=SAV=0x80 & LEC=EAV=0x9d.
802 if (dcmi->bus_type == V4L2_MBUS_BT656) {
805 /* Unmask all codes */
806 reg_write(dcmi->regs, DCMI_ESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */
808 /* Trig on LSC=0x80 & LEC=0x9d codes, ignore FSC and FEC */
809 reg_write(dcmi->regs, DCMI_ESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */
812 reg_write(dcmi->regs, DCMI_CR, val);
818 /* Enable jpeg capture */
819 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
820 reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */
823 reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
826 dcmi->errors_count = 0;
827 dcmi->overrun_count = 0;
828 dcmi->buffers_count = 0;
831 * Start transfer if at least one buffer has been queued,
832 * otherwise transfer is deferred at buffer queueing
834 if (list_empty(&dcmi->buffers)) {
835 dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n");
836 dcmi->state = WAIT_FOR_BUFFER;
837 spin_unlock_irq(&dcmi->irqlock);
841 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
844 dcmi->state = RUNNING;
846 dev_dbg(dcmi->dev, "Start streaming, starting capture\n");
848 spin_unlock_irq(&dcmi->irqlock);
849 ret = dcmi_start_capture(dcmi, buf);
851 dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n",
853 goto err_pipeline_stop;
856 /* Enable interruptions */
857 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
858 reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
860 reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR);
865 dcmi_pipeline_stop(dcmi);
867 err_media_pipeline_stop:
868 video_device_pipeline_stop(dcmi->vdev);
871 pm_runtime_put(dcmi->dev);
873 spin_lock_irq(&dcmi->irqlock);
875 * Return all buffers to vb2 in QUEUED state.
876 * This will give ownership back to userspace
878 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
879 list_del_init(&buf->list);
880 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
883 spin_unlock_irq(&dcmi->irqlock);
888 static void dcmi_stop_streaming(struct vb2_queue *vq)
890 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
891 struct dcmi_buf *buf, *node;
893 dcmi_pipeline_stop(dcmi);
895 video_device_pipeline_stop(dcmi->vdev);
897 spin_lock_irq(&dcmi->irqlock);
899 /* Disable interruptions */
900 reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
903 reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE);
905 /* Return all queued buffers to vb2 in ERROR state */
906 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
907 list_del_init(&buf->list);
908 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
912 dcmi->state = STOPPED;
914 spin_unlock_irq(&dcmi->irqlock);
916 /* Stop all pending DMA operations */
917 mutex_lock(&dcmi->dma_lock);
918 dmaengine_terminate_sync(dcmi->dma_chan);
919 mutex_unlock(&dcmi->dma_lock);
921 pm_runtime_put(dcmi->dev);
923 if (dcmi->errors_count)
924 dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n",
925 dcmi->errors_count, dcmi->overrun_count,
926 dcmi->buffers_count);
927 dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n",
928 dcmi->errors_count, dcmi->overrun_count,
929 dcmi->buffers_count);
932 static const struct vb2_ops dcmi_video_qops = {
933 .queue_setup = dcmi_queue_setup,
934 .buf_init = dcmi_buf_init,
935 .buf_prepare = dcmi_buf_prepare,
936 .buf_queue = dcmi_buf_queue,
937 .start_streaming = dcmi_start_streaming,
938 .stop_streaming = dcmi_stop_streaming,
939 .wait_prepare = vb2_ops_wait_prepare,
940 .wait_finish = vb2_ops_wait_finish,
943 static int dcmi_g_fmt_vid_cap(struct file *file, void *priv,
944 struct v4l2_format *fmt)
946 struct stm32_dcmi *dcmi = video_drvdata(file);
953 static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi,
956 unsigned int num_formats = dcmi->num_of_sd_formats;
957 const struct dcmi_format *fmt;
960 for (i = 0; i < num_formats; i++) {
961 fmt = dcmi->sd_formats[i];
962 if (fmt->fourcc == fourcc)
969 static void __find_outer_frame_size(struct stm32_dcmi *dcmi,
970 struct v4l2_pix_format *pix,
971 struct dcmi_framesize *framesize)
973 struct dcmi_framesize *match = NULL;
975 unsigned int min_err = UINT_MAX;
977 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
978 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
979 int w_err = (fsize->width - pix->width);
980 int h_err = (fsize->height - pix->height);
981 int err = w_err + h_err;
983 if (w_err >= 0 && h_err >= 0 && err < min_err) {
989 match = &dcmi->sd_framesizes[0];
994 static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f,
995 const struct dcmi_format **sd_format,
996 struct dcmi_framesize *sd_framesize)
998 const struct dcmi_format *sd_fmt;
999 struct dcmi_framesize sd_fsize;
1000 struct v4l2_pix_format *pix = &f->fmt.pix;
1001 struct v4l2_subdev_format format = {
1002 .which = V4L2_SUBDEV_FORMAT_TRY,
1007 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1009 if (!dcmi->num_of_sd_formats)
1012 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1013 pix->pixelformat = sd_fmt->fourcc;
1016 /* Limit to hardware capabilities */
1017 pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH);
1018 pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT);
1020 /* No crop if JPEG is requested */
1021 do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG);
1023 if (do_crop && dcmi->num_of_sd_framesizes) {
1024 struct dcmi_framesize outer_sd_fsize;
1026 * If crop is requested and sensor have discrete frame sizes,
1027 * select the frame size that is just larger than request
1029 __find_outer_frame_size(dcmi, pix, &outer_sd_fsize);
1030 pix->width = outer_sd_fsize.width;
1031 pix->height = outer_sd_fsize.height;
1034 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1035 ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
1039 /* Update pix regarding to what sensor can do */
1040 v4l2_fill_pix_format(pix, &format.format);
1042 /* Save resolution that sensor can actually do */
1043 sd_fsize.width = pix->width;
1044 sd_fsize.height = pix->height;
1047 struct v4l2_rect c = dcmi->crop;
1048 struct v4l2_rect max_rect;
1051 * Adjust crop by making the intersection between
1052 * format resolution request and crop request
1056 max_rect.width = pix->width;
1057 max_rect.height = pix->height;
1058 v4l2_rect_map_inside(&c, &max_rect);
1059 c.top = clamp_t(s32, c.top, 0, pix->height - c.height);
1060 c.left = clamp_t(s32, c.left, 0, pix->width - c.width);
1063 /* Adjust format resolution request to crop */
1064 pix->width = dcmi->crop.width;
1065 pix->height = dcmi->crop.height;
1068 pix->field = V4L2_FIELD_NONE;
1069 pix->bytesperline = pix->width * sd_fmt->bpp;
1070 pix->sizeimage = pix->bytesperline * pix->height;
1073 *sd_format = sd_fmt;
1075 *sd_framesize = sd_fsize;
1080 static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
1082 struct v4l2_subdev_format format = {
1083 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1085 const struct dcmi_format *sd_format;
1086 struct dcmi_framesize sd_framesize;
1087 struct v4l2_mbus_framefmt *mf = &format.format;
1088 struct v4l2_pix_format *pix = &f->fmt.pix;
1092 * Try format, fmt.width/height could have been changed
1093 * to match sensor capability or crop request
1094 * sd_format & sd_framesize will contain what subdev
1095 * can do for this request.
1097 ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize);
1101 /* Disable crop if JPEG is requested or BT656 bus is selected */
1102 if (pix->pixelformat == V4L2_PIX_FMT_JPEG &&
1103 dcmi->bus_type != V4L2_MBUS_BT656)
1104 dcmi->do_crop = false;
1106 /* pix to mbus format */
1107 v4l2_fill_mbus_format(mf, pix,
1108 sd_format->mbus_code);
1109 mf->width = sd_framesize.width;
1110 mf->height = sd_framesize.height;
1112 ret = dcmi_pipeline_s_fmt(dcmi, &format);
1116 dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n",
1117 mf->code, mf->width, mf->height);
1118 dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n",
1119 (char *)&pix->pixelformat,
1120 pix->width, pix->height);
1123 dcmi->sd_format = sd_format;
1124 dcmi->sd_framesize = sd_framesize;
1129 static int dcmi_s_fmt_vid_cap(struct file *file, void *priv,
1130 struct v4l2_format *f)
1132 struct stm32_dcmi *dcmi = video_drvdata(file);
1134 if (vb2_is_streaming(&dcmi->queue))
1137 return dcmi_set_fmt(dcmi, f);
1140 static int dcmi_try_fmt_vid_cap(struct file *file, void *priv,
1141 struct v4l2_format *f)
1143 struct stm32_dcmi *dcmi = video_drvdata(file);
1145 return dcmi_try_fmt(dcmi, f, NULL, NULL);
1148 static int dcmi_enum_fmt_vid_cap(struct file *file, void *priv,
1149 struct v4l2_fmtdesc *f)
1151 struct stm32_dcmi *dcmi = video_drvdata(file);
1153 if (f->index >= dcmi->num_of_sd_formats)
1156 f->pixelformat = dcmi->sd_formats[f->index]->fourcc;
1160 static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi,
1161 struct v4l2_pix_format *pix)
1163 struct v4l2_subdev_format fmt = {
1164 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1168 ret = v4l2_subdev_call(dcmi->source, pad, get_fmt, NULL, &fmt);
1172 v4l2_fill_pix_format(pix, &fmt.format);
1177 static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi,
1178 struct v4l2_pix_format *pix)
1180 const struct dcmi_format *sd_fmt;
1181 struct v4l2_subdev_format format = {
1182 .which = V4L2_SUBDEV_FORMAT_TRY,
1186 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1188 if (!dcmi->num_of_sd_formats)
1191 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1192 pix->pixelformat = sd_fmt->fourcc;
1195 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1196 ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
1203 static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi,
1204 struct v4l2_rect *r)
1206 struct v4l2_subdev_selection bounds = {
1207 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1208 .target = V4L2_SEL_TGT_CROP_BOUNDS,
1210 unsigned int max_width, max_height, max_pixsize;
1211 struct v4l2_pix_format pix;
1216 * Get sensor bounds first
1218 ret = v4l2_subdev_call(dcmi->source, pad, get_selection,
1222 if (ret != -ENOIOCTLCMD)
1226 * If selection is not implemented,
1227 * fallback by enumerating sensor frame sizes
1228 * and take the largest one
1233 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1234 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
1235 unsigned int pixsize = fsize->width * fsize->height;
1237 if (pixsize > max_pixsize) {
1238 max_pixsize = pixsize;
1239 max_width = fsize->width;
1240 max_height = fsize->height;
1243 if (max_pixsize > 0) {
1246 r->width = max_width;
1247 r->height = max_height;
1252 * If frame sizes enumeration is not implemented,
1253 * fallback by getting current sensor frame size
1255 ret = dcmi_get_sensor_format(dcmi, &pix);
1261 r->width = pix.width;
1262 r->height = pix.height;
1267 static int dcmi_g_selection(struct file *file, void *fh,
1268 struct v4l2_selection *s)
1270 struct stm32_dcmi *dcmi = video_drvdata(file);
1272 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1275 switch (s->target) {
1276 case V4L2_SEL_TGT_CROP_DEFAULT:
1277 case V4L2_SEL_TGT_CROP_BOUNDS:
1278 s->r = dcmi->sd_bounds;
1280 case V4L2_SEL_TGT_CROP:
1281 if (dcmi->do_crop) {
1286 s->r.width = dcmi->fmt.fmt.pix.width;
1287 s->r.height = dcmi->fmt.fmt.pix.height;
1297 static int dcmi_s_selection(struct file *file, void *priv,
1298 struct v4l2_selection *s)
1300 struct stm32_dcmi *dcmi = video_drvdata(file);
1301 struct v4l2_rect r = s->r;
1302 struct v4l2_rect max_rect;
1303 struct v4l2_pix_format pix;
1305 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1306 s->target != V4L2_SEL_TGT_CROP)
1309 /* Reset sensor resolution to max resolution */
1310 pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat;
1311 pix.width = dcmi->sd_bounds.width;
1312 pix.height = dcmi->sd_bounds.height;
1313 dcmi_set_sensor_format(dcmi, &pix);
1316 * Make the intersection between
1322 max_rect.width = pix.width;
1323 max_rect.height = pix.height;
1324 v4l2_rect_map_inside(&r, &max_rect);
1325 r.top = clamp_t(s32, r.top, 0, pix.height - r.height);
1326 r.left = clamp_t(s32, r.left, 0, pix.width - r.width);
1328 if (!(r.top == dcmi->sd_bounds.top &&
1329 r.left == dcmi->sd_bounds.left &&
1330 r.width == dcmi->sd_bounds.width &&
1331 r.height == dcmi->sd_bounds.height)) {
1332 /* Crop if request is different than sensor resolution */
1333 dcmi->do_crop = true;
1335 dev_dbg(dcmi->dev, "s_selection: crop %ux%u@(%u,%u) from %ux%u\n",
1336 r.width, r.height, r.left, r.top,
1337 pix.width, pix.height);
1340 dcmi->do_crop = false;
1341 dev_dbg(dcmi->dev, "s_selection: crop is disabled\n");
1348 static int dcmi_querycap(struct file *file, void *priv,
1349 struct v4l2_capability *cap)
1351 strscpy(cap->driver, DRV_NAME, sizeof(cap->driver));
1352 strscpy(cap->card, "STM32 Camera Memory Interface",
1354 strscpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info));
1358 static int dcmi_enum_input(struct file *file, void *priv,
1359 struct v4l2_input *i)
1364 i->type = V4L2_INPUT_TYPE_CAMERA;
1365 strscpy(i->name, "Camera", sizeof(i->name));
1369 static int dcmi_g_input(struct file *file, void *priv, unsigned int *i)
1375 static int dcmi_s_input(struct file *file, void *priv, unsigned int i)
1382 static int dcmi_enum_framesizes(struct file *file, void *fh,
1383 struct v4l2_frmsizeenum *fsize)
1385 struct stm32_dcmi *dcmi = video_drvdata(file);
1386 const struct dcmi_format *sd_fmt;
1387 struct v4l2_subdev_frame_size_enum fse = {
1388 .index = fsize->index,
1389 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1393 sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format);
1397 fse.code = sd_fmt->mbus_code;
1399 ret = v4l2_subdev_call(dcmi->source, pad, enum_frame_size,
1404 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1405 fsize->discrete.width = fse.max_width;
1406 fsize->discrete.height = fse.max_height;
1411 static int dcmi_g_parm(struct file *file, void *priv,
1412 struct v4l2_streamparm *p)
1414 struct stm32_dcmi *dcmi = video_drvdata(file);
1416 return v4l2_g_parm_cap(video_devdata(file), dcmi->source, p);
1419 static int dcmi_s_parm(struct file *file, void *priv,
1420 struct v4l2_streamparm *p)
1422 struct stm32_dcmi *dcmi = video_drvdata(file);
1424 return v4l2_s_parm_cap(video_devdata(file), dcmi->source, p);
1427 static int dcmi_enum_frameintervals(struct file *file, void *fh,
1428 struct v4l2_frmivalenum *fival)
1430 struct stm32_dcmi *dcmi = video_drvdata(file);
1431 const struct dcmi_format *sd_fmt;
1432 struct v4l2_subdev_frame_interval_enum fie = {
1433 .index = fival->index,
1434 .width = fival->width,
1435 .height = fival->height,
1436 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1440 sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format);
1444 fie.code = sd_fmt->mbus_code;
1446 ret = v4l2_subdev_call(dcmi->source, pad,
1447 enum_frame_interval, NULL, &fie);
1451 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1452 fival->discrete = fie.interval;
1457 static const struct of_device_id stm32_dcmi_of_match[] = {
1458 { .compatible = "st,stm32-dcmi"},
1461 MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match);
1463 static int dcmi_open(struct file *file)
1465 struct stm32_dcmi *dcmi = video_drvdata(file);
1466 struct v4l2_subdev *sd = dcmi->source;
1469 if (mutex_lock_interruptible(&dcmi->lock))
1470 return -ERESTARTSYS;
1472 ret = v4l2_fh_open(file);
1476 if (!v4l2_fh_is_singular_file(file))
1479 ret = v4l2_subdev_call(sd, core, s_power, 1);
1480 if (ret < 0 && ret != -ENOIOCTLCMD)
1483 ret = dcmi_set_fmt(dcmi, &dcmi->fmt);
1485 v4l2_subdev_call(sd, core, s_power, 0);
1488 v4l2_fh_release(file);
1490 mutex_unlock(&dcmi->lock);
1494 static int dcmi_release(struct file *file)
1496 struct stm32_dcmi *dcmi = video_drvdata(file);
1497 struct v4l2_subdev *sd = dcmi->source;
1501 mutex_lock(&dcmi->lock);
1503 fh_singular = v4l2_fh_is_singular_file(file);
1505 ret = _vb2_fop_release(file, NULL);
1508 v4l2_subdev_call(sd, core, s_power, 0);
1510 mutex_unlock(&dcmi->lock);
1515 static const struct v4l2_ioctl_ops dcmi_ioctl_ops = {
1516 .vidioc_querycap = dcmi_querycap,
1518 .vidioc_try_fmt_vid_cap = dcmi_try_fmt_vid_cap,
1519 .vidioc_g_fmt_vid_cap = dcmi_g_fmt_vid_cap,
1520 .vidioc_s_fmt_vid_cap = dcmi_s_fmt_vid_cap,
1521 .vidioc_enum_fmt_vid_cap = dcmi_enum_fmt_vid_cap,
1522 .vidioc_g_selection = dcmi_g_selection,
1523 .vidioc_s_selection = dcmi_s_selection,
1525 .vidioc_enum_input = dcmi_enum_input,
1526 .vidioc_g_input = dcmi_g_input,
1527 .vidioc_s_input = dcmi_s_input,
1529 .vidioc_g_parm = dcmi_g_parm,
1530 .vidioc_s_parm = dcmi_s_parm,
1532 .vidioc_enum_framesizes = dcmi_enum_framesizes,
1533 .vidioc_enum_frameintervals = dcmi_enum_frameintervals,
1535 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1536 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1537 .vidioc_querybuf = vb2_ioctl_querybuf,
1538 .vidioc_qbuf = vb2_ioctl_qbuf,
1539 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1540 .vidioc_expbuf = vb2_ioctl_expbuf,
1541 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1542 .vidioc_streamon = vb2_ioctl_streamon,
1543 .vidioc_streamoff = vb2_ioctl_streamoff,
1545 .vidioc_log_status = v4l2_ctrl_log_status,
1546 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1547 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1550 static const struct v4l2_file_operations dcmi_fops = {
1551 .owner = THIS_MODULE,
1552 .unlocked_ioctl = video_ioctl2,
1554 .release = dcmi_release,
1555 .poll = vb2_fop_poll,
1556 .mmap = vb2_fop_mmap,
1558 .get_unmapped_area = vb2_fop_get_unmapped_area,
1560 .read = vb2_fop_read,
1563 static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi)
1565 struct v4l2_format f = {
1566 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
1569 .height = CIF_HEIGHT,
1570 .field = V4L2_FIELD_NONE,
1571 .pixelformat = dcmi->sd_formats[0]->fourcc,
1576 ret = dcmi_try_fmt(dcmi, &f, NULL, NULL);
1579 dcmi->sd_format = dcmi->sd_formats[0];
1584 static const struct dcmi_format dcmi_formats[] = {
1586 .fourcc = V4L2_PIX_FMT_RGB565,
1587 .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
1590 .fourcc = V4L2_PIX_FMT_RGB565,
1591 .mbus_code = MEDIA_BUS_FMT_RGB565_1X16,
1594 .fourcc = V4L2_PIX_FMT_YUYV,
1595 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
1598 .fourcc = V4L2_PIX_FMT_YUYV,
1599 .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16,
1602 .fourcc = V4L2_PIX_FMT_UYVY,
1603 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
1606 .fourcc = V4L2_PIX_FMT_UYVY,
1607 .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
1610 .fourcc = V4L2_PIX_FMT_JPEG,
1611 .mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
1614 .fourcc = V4L2_PIX_FMT_SBGGR8,
1615 .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
1618 .fourcc = V4L2_PIX_FMT_SGBRG8,
1619 .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
1622 .fourcc = V4L2_PIX_FMT_SGRBG8,
1623 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
1626 .fourcc = V4L2_PIX_FMT_SRGGB8,
1627 .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
1630 .fourcc = V4L2_PIX_FMT_SBGGR10,
1631 .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
1634 .fourcc = V4L2_PIX_FMT_SGBRG10,
1635 .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
1638 .fourcc = V4L2_PIX_FMT_SGRBG10,
1639 .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
1642 .fourcc = V4L2_PIX_FMT_SRGGB10,
1643 .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
1646 .fourcc = V4L2_PIX_FMT_SBGGR12,
1647 .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
1650 .fourcc = V4L2_PIX_FMT_SGBRG12,
1651 .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12,
1654 .fourcc = V4L2_PIX_FMT_SGRBG12,
1655 .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
1658 .fourcc = V4L2_PIX_FMT_SRGGB12,
1659 .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12,
1662 .fourcc = V4L2_PIX_FMT_SBGGR14,
1663 .mbus_code = MEDIA_BUS_FMT_SBGGR14_1X14,
1666 .fourcc = V4L2_PIX_FMT_SGBRG14,
1667 .mbus_code = MEDIA_BUS_FMT_SGBRG14_1X14,
1670 .fourcc = V4L2_PIX_FMT_SGRBG14,
1671 .mbus_code = MEDIA_BUS_FMT_SGRBG14_1X14,
1674 .fourcc = V4L2_PIX_FMT_SRGGB14,
1675 .mbus_code = MEDIA_BUS_FMT_SRGGB14_1X14,
1680 static int dcmi_formats_init(struct stm32_dcmi *dcmi)
1682 const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)];
1683 unsigned int num_fmts = 0, i, j;
1684 struct v4l2_subdev *subdev = dcmi->source;
1685 struct v4l2_subdev_mbus_code_enum mbus_code = {
1686 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1689 while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
1690 NULL, &mbus_code)) {
1691 for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) {
1692 if (dcmi_formats[i].mbus_code != mbus_code.code)
1695 /* Exclude JPEG if BT656 bus is selected */
1696 if (dcmi_formats[i].fourcc == V4L2_PIX_FMT_JPEG &&
1697 dcmi->bus_type == V4L2_MBUS_BT656)
1700 /* Code supported, have we got this fourcc yet? */
1701 for (j = 0; j < num_fmts; j++)
1702 if (sd_fmts[j]->fourcc ==
1703 dcmi_formats[i].fourcc) {
1704 /* Already available */
1705 dev_dbg(dcmi->dev, "Skipping fourcc/code: %4.4s/0x%x\n",
1706 (char *)&sd_fmts[j]->fourcc,
1710 if (j == num_fmts) {
1712 sd_fmts[num_fmts++] = dcmi_formats + i;
1713 dev_dbg(dcmi->dev, "Supported fourcc/code: %4.4s/0x%x\n",
1714 (char *)&sd_fmts[num_fmts - 1]->fourcc,
1715 sd_fmts[num_fmts - 1]->mbus_code);
1724 dcmi->num_of_sd_formats = num_fmts;
1725 dcmi->sd_formats = devm_kcalloc(dcmi->dev,
1726 num_fmts, sizeof(struct dcmi_format *),
1728 if (!dcmi->sd_formats) {
1729 dev_err(dcmi->dev, "Could not allocate memory\n");
1733 memcpy(dcmi->sd_formats, sd_fmts,
1734 num_fmts * sizeof(struct dcmi_format *));
1735 dcmi->sd_format = dcmi->sd_formats[0];
1740 static int dcmi_framesizes_init(struct stm32_dcmi *dcmi)
1742 unsigned int num_fsize = 0;
1743 struct v4l2_subdev *subdev = dcmi->source;
1744 struct v4l2_subdev_frame_size_enum fse = {
1745 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1746 .code = dcmi->sd_format->mbus_code,
1751 /* Allocate discrete framesizes array */
1752 while (!v4l2_subdev_call(subdev, pad, enum_frame_size,
1756 num_fsize = fse.index;
1760 dcmi->num_of_sd_framesizes = num_fsize;
1761 dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize,
1762 sizeof(struct dcmi_framesize),
1764 if (!dcmi->sd_framesizes) {
1765 dev_err(dcmi->dev, "Could not allocate memory\n");
1769 /* Fill array with sensor supported framesizes */
1770 dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize);
1771 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1773 ret = v4l2_subdev_call(subdev, pad, enum_frame_size,
1777 dcmi->sd_framesizes[fse.index].width = fse.max_width;
1778 dcmi->sd_framesizes[fse.index].height = fse.max_height;
1779 dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height);
1785 static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier)
1787 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1791 * Now that the graph is complete,
1792 * we search for the source subdevice
1793 * in order to expose it through V4L2 interface
1795 dcmi->source = media_entity_to_v4l2_subdev(dcmi_find_source(dcmi));
1796 if (!dcmi->source) {
1797 dev_err(dcmi->dev, "Source subdevice not found\n");
1801 dcmi->vdev->ctrl_handler = dcmi->source->ctrl_handler;
1803 ret = dcmi_formats_init(dcmi);
1805 dev_err(dcmi->dev, "No supported mediabus format found\n");
1809 ret = dcmi_framesizes_init(dcmi);
1811 dev_err(dcmi->dev, "Could not initialize framesizes\n");
1815 ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds);
1817 dev_err(dcmi->dev, "Could not get sensor bounds\n");
1821 ret = dcmi_set_default_fmt(dcmi);
1823 dev_err(dcmi->dev, "Could not set default format\n");
1827 ret = devm_request_threaded_irq(dcmi->dev, dcmi->irq, dcmi_irq_callback,
1828 dcmi_irq_thread, IRQF_ONESHOT,
1829 dev_name(dcmi->dev), dcmi);
1831 dev_err(dcmi->dev, "Unable to request irq %d\n", dcmi->irq);
1838 static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
1839 struct v4l2_subdev *sd,
1840 struct v4l2_async_connection *asd)
1842 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1844 dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
1846 /* Checks internally if vdev has been init or not */
1847 video_unregister_device(dcmi->vdev);
1850 static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
1851 struct v4l2_subdev *subdev,
1852 struct v4l2_async_connection *asd)
1854 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1858 dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
1861 * Link this sub-device to DCMI, it could be
1862 * a parallel camera sensor or a bridge
1864 src_pad = media_entity_get_fwnode_pad(&subdev->entity,
1866 MEDIA_PAD_FL_SOURCE);
1868 ret = media_create_pad_link(&subdev->entity, src_pad,
1869 &dcmi->vdev->entity, 0,
1870 MEDIA_LNK_FL_IMMUTABLE |
1871 MEDIA_LNK_FL_ENABLED);
1873 dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n",
1876 dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
1882 static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
1883 .bound = dcmi_graph_notify_bound,
1884 .unbind = dcmi_graph_notify_unbind,
1885 .complete = dcmi_graph_notify_complete,
1888 static int dcmi_graph_init(struct stm32_dcmi *dcmi)
1890 struct v4l2_async_connection *asd;
1891 struct device_node *ep;
1894 ep = of_graph_get_next_endpoint(dcmi->dev->of_node, NULL);
1896 dev_err(dcmi->dev, "Failed to get next endpoint\n");
1900 v4l2_async_nf_init(&dcmi->notifier);
1902 asd = v4l2_async_nf_add_fwnode_remote(&dcmi->notifier,
1903 of_fwnode_handle(ep),
1904 struct v4l2_async_connection);
1909 dev_err(dcmi->dev, "Failed to add subdev notifier\n");
1910 return PTR_ERR(asd);
1913 dcmi->notifier.ops = &dcmi_graph_notify_ops;
1915 ret = v4l2_async_nf_register(&dcmi->v4l2_dev, &dcmi->notifier);
1917 dev_err(dcmi->dev, "Failed to register notifier\n");
1918 v4l2_async_nf_cleanup(&dcmi->notifier);
1925 static int dcmi_probe(struct platform_device *pdev)
1927 struct device_node *np = pdev->dev.of_node;
1928 const struct of_device_id *match = NULL;
1929 struct v4l2_fwnode_endpoint ep = { .bus_type = 0 };
1930 struct stm32_dcmi *dcmi;
1931 struct vb2_queue *q;
1932 struct dma_chan *chan;
1933 struct dma_slave_caps caps;
1937 match = of_match_device(of_match_ptr(stm32_dcmi_of_match), &pdev->dev);
1939 dev_err(&pdev->dev, "Could not find a match in devicetree\n");
1943 dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL);
1947 dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1948 if (IS_ERR(dcmi->rstc))
1949 return dev_err_probe(&pdev->dev, PTR_ERR(dcmi->rstc),
1950 "Could not get reset control\n");
1952 /* Get bus characteristics from devicetree */
1953 np = of_graph_get_next_endpoint(np, NULL);
1955 dev_err(&pdev->dev, "Could not find the endpoint\n");
1959 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
1962 dev_err(&pdev->dev, "Could not parse the endpoint\n");
1966 if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1967 dev_err(&pdev->dev, "CSI bus not supported\n");
1971 if (ep.bus_type == V4L2_MBUS_BT656 &&
1972 ep.bus.parallel.bus_width != 8) {
1973 dev_err(&pdev->dev, "BT656 bus conflicts with %u bits bus width (8 bits required)\n",
1974 ep.bus.parallel.bus_width);
1978 dcmi->bus.flags = ep.bus.parallel.flags;
1979 dcmi->bus.bus_width = ep.bus.parallel.bus_width;
1980 dcmi->bus.data_shift = ep.bus.parallel.data_shift;
1981 dcmi->bus_type = ep.bus_type;
1983 dcmi->irq = platform_get_irq(pdev, 0);
1987 dcmi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &dcmi->res);
1988 if (IS_ERR(dcmi->regs))
1989 return PTR_ERR(dcmi->regs);
1991 mclk = devm_clk_get(&pdev->dev, "mclk");
1993 return dev_err_probe(&pdev->dev, PTR_ERR(mclk),
1994 "Unable to get mclk\n");
1996 chan = dma_request_chan(&pdev->dev, "tx");
1998 return dev_err_probe(&pdev->dev, PTR_ERR(chan),
1999 "Failed to request DMA channel\n");
2001 dcmi->dma_max_burst = UINT_MAX;
2002 ret = dma_get_slave_caps(chan, &caps);
2003 if (!ret && caps.max_sg_burst)
2004 dcmi->dma_max_burst = caps.max_sg_burst * DMA_SLAVE_BUSWIDTH_4_BYTES;
2006 spin_lock_init(&dcmi->irqlock);
2007 mutex_init(&dcmi->lock);
2008 mutex_init(&dcmi->dma_lock);
2009 init_completion(&dcmi->complete);
2010 INIT_LIST_HEAD(&dcmi->buffers);
2012 dcmi->dev = &pdev->dev;
2014 dcmi->state = STOPPED;
2015 dcmi->dma_chan = chan;
2019 dcmi->v4l2_dev.mdev = &dcmi->mdev;
2021 /* Initialize media device */
2022 strscpy(dcmi->mdev.model, DRV_NAME, sizeof(dcmi->mdev.model));
2023 dcmi->mdev.dev = &pdev->dev;
2024 media_device_init(&dcmi->mdev);
2026 /* Initialize the top-level structure */
2027 ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev);
2029 goto err_media_device_cleanup;
2031 dcmi->vdev = video_device_alloc();
2034 goto err_device_unregister;
2038 dcmi->vdev->fops = &dcmi_fops;
2039 dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev;
2040 dcmi->vdev->queue = &dcmi->queue;
2041 strscpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name));
2042 dcmi->vdev->release = video_device_release;
2043 dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops;
2044 dcmi->vdev->lock = &dcmi->lock;
2045 dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2047 video_set_drvdata(dcmi->vdev, dcmi);
2049 /* Media entity pads */
2050 dcmi->vid_cap_pad.flags = MEDIA_PAD_FL_SINK;
2051 ret = media_entity_pads_init(&dcmi->vdev->entity,
2052 1, &dcmi->vid_cap_pad);
2054 dev_err(dcmi->dev, "Failed to init media entity pad\n");
2055 goto err_device_release;
2057 dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
2059 ret = video_register_device(dcmi->vdev, VFL_TYPE_VIDEO, -1);
2061 dev_err(dcmi->dev, "Failed to register video device\n");
2062 goto err_media_entity_cleanup;
2065 dev_dbg(dcmi->dev, "Device registered as %s\n",
2066 video_device_node_name(dcmi->vdev));
2069 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2070 q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
2071 q->lock = &dcmi->lock;
2073 q->buf_struct_size = sizeof(struct dcmi_buf);
2074 q->ops = &dcmi_video_qops;
2075 q->mem_ops = &vb2_dma_contig_memops;
2076 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2077 q->min_buffers_needed = 2;
2078 q->allow_cache_hints = 1;
2079 q->dev = &pdev->dev;
2081 ret = vb2_queue_init(q);
2083 dev_err(&pdev->dev, "Failed to initialize vb2 queue\n");
2084 goto err_media_entity_cleanup;
2087 ret = dcmi_graph_init(dcmi);
2089 goto err_media_entity_cleanup;
2092 ret = reset_control_assert(dcmi->rstc);
2094 dev_err(&pdev->dev, "Failed to assert the reset line\n");
2098 usleep_range(3000, 5000);
2100 ret = reset_control_deassert(dcmi->rstc);
2102 dev_err(&pdev->dev, "Failed to deassert the reset line\n");
2106 dev_info(&pdev->dev, "Probe done\n");
2108 platform_set_drvdata(pdev, dcmi);
2110 pm_runtime_enable(&pdev->dev);
2115 v4l2_async_nf_cleanup(&dcmi->notifier);
2116 err_media_entity_cleanup:
2117 media_entity_cleanup(&dcmi->vdev->entity);
2119 video_device_release(dcmi->vdev);
2120 err_device_unregister:
2121 v4l2_device_unregister(&dcmi->v4l2_dev);
2122 err_media_device_cleanup:
2123 media_device_cleanup(&dcmi->mdev);
2124 dma_release_channel(dcmi->dma_chan);
2129 static void dcmi_remove(struct platform_device *pdev)
2131 struct stm32_dcmi *dcmi = platform_get_drvdata(pdev);
2133 pm_runtime_disable(&pdev->dev);
2135 v4l2_async_nf_unregister(&dcmi->notifier);
2136 v4l2_async_nf_cleanup(&dcmi->notifier);
2137 media_entity_cleanup(&dcmi->vdev->entity);
2138 v4l2_device_unregister(&dcmi->v4l2_dev);
2139 media_device_cleanup(&dcmi->mdev);
2141 dma_release_channel(dcmi->dma_chan);
2144 static __maybe_unused int dcmi_runtime_suspend(struct device *dev)
2146 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2148 clk_disable_unprepare(dcmi->mclk);
2153 static __maybe_unused int dcmi_runtime_resume(struct device *dev)
2155 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2158 ret = clk_prepare_enable(dcmi->mclk);
2160 dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__);
2165 static __maybe_unused int dcmi_suspend(struct device *dev)
2168 pm_runtime_force_suspend(dev);
2170 /* change pinctrl state */
2171 pinctrl_pm_select_sleep_state(dev);
2176 static __maybe_unused int dcmi_resume(struct device *dev)
2178 /* restore pinctl default state */
2179 pinctrl_pm_select_default_state(dev);
2182 pm_runtime_force_resume(dev);
2187 static const struct dev_pm_ops dcmi_pm_ops = {
2188 SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume)
2189 SET_RUNTIME_PM_OPS(dcmi_runtime_suspend,
2190 dcmi_runtime_resume, NULL)
2193 static struct platform_driver stm32_dcmi_driver = {
2194 .probe = dcmi_probe,
2195 .remove_new = dcmi_remove,
2198 .of_match_table = of_match_ptr(stm32_dcmi_of_match),
2203 module_platform_driver(stm32_dcmi_driver);
2205 MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>");
2206 MODULE_AUTHOR("Hugues Fruchet <hugues.fruchet@st.com>");
2207 MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver");
2208 MODULE_LICENSE("GPL");