drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2019 MediaTek Inc.
   4  * Author: Xia Jiang <xia.jiang@mediatek.com>
   5  *
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/io.h>
  12 #include <linux/kernel.h>
  13 #include <linux/mod_devicetable.h>
  14 #include <linux/module.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/slab.h>
  18 #include <media/media-device.h>
  19 #include <media/videobuf2-core.h>
  20 #include <media/videobuf2-dma-contig.h>
  21 #include <media/videobuf2-v4l2.h>
  22 #include <media/v4l2-mem2mem.h>
  23 #include <media/v4l2-dev.h>
  24 #include <media/v4l2-device.h>
  25 #include <media/v4l2-fh.h>
  26 #include <media/v4l2-event.h>
  27
  28 #include "mtk_jpeg_core.h"
  29 #include "mtk_jpeg_enc_hw.h"
  30
  31 static const struct mtk_jpeg_enc_qlt mtk_jpeg_enc_quality[] = {
  32         {.quality_param = 34, .hardware_value = JPEG_ENC_QUALITY_Q34},
  33         {.quality_param = 39, .hardware_value = JPEG_ENC_QUALITY_Q39},
  34         {.quality_param = 48, .hardware_value = JPEG_ENC_QUALITY_Q48},
  35         {.quality_param = 60, .hardware_value = JPEG_ENC_QUALITY_Q60},
  36         {.quality_param = 64, .hardware_value = JPEG_ENC_QUALITY_Q64},
  37         {.quality_param = 68, .hardware_value = JPEG_ENC_QUALITY_Q68},
  38         {.quality_param = 74, .hardware_value = JPEG_ENC_QUALITY_Q74},
  39         {.quality_param = 80, .hardware_value = JPEG_ENC_QUALITY_Q80},
  40         {.quality_param = 82, .hardware_value = JPEG_ENC_QUALITY_Q82},
  41         {.quality_param = 84, .hardware_value = JPEG_ENC_QUALITY_Q84},
  42         {.quality_param = 87, .hardware_value = JPEG_ENC_QUALITY_Q87},
  43         {.quality_param = 90, .hardware_value = JPEG_ENC_QUALITY_Q90},
  44         {.quality_param = 92, .hardware_value = JPEG_ENC_QUALITY_Q92},
  45         {.quality_param = 95, .hardware_value = JPEG_ENC_QUALITY_Q95},
  46         {.quality_param = 97, .hardware_value = JPEG_ENC_QUALITY_Q97},
  47 };
  48
  49 static const struct of_device_id mtk_jpegenc_drv_ids[] = {
  50         {
  51                 .compatible = "mediatek,mt8195-jpgenc-hw",
  52         },
  53         {},
  54 };
  55 MODULE_DEVICE_TABLE(of, mtk_jpegenc_drv_ids);
  56
  57 void mtk_jpeg_enc_reset(void __iomem *base)
  58 {
  59         writel(0, base + JPEG_ENC_RSTB);
  60         writel(JPEG_ENC_RESET_BIT, base + JPEG_ENC_RSTB);
  61         writel(0, base + JPEG_ENC_CODEC_SEL);
  62 }
  63 EXPORT_SYMBOL_GPL(mtk_jpeg_enc_reset);
  64
  65 u32 mtk_jpeg_enc_get_file_size(void __iomem *base)
  66 {
  67         return readl(base + JPEG_ENC_DMA_ADDR0) -
  68                readl(base + JPEG_ENC_DST_ADDR0);
  69 }
  70 EXPORT_SYMBOL_GPL(mtk_jpeg_enc_get_file_size);
  71
  72 void mtk_jpeg_enc_start(void __iomem *base)
  73 {
  74         u32 value;
  75
  76         value = readl(base + JPEG_ENC_CTRL);
  77         value |= JPEG_ENC_CTRL_INT_EN_BIT | JPEG_ENC_CTRL_ENABLE_BIT;
  78         writel(value, base + JPEG_ENC_CTRL);
  79 }
  80 EXPORT_SYMBOL_GPL(mtk_jpeg_enc_start);
  81
  82 void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx,  void __iomem *base,
  83                           struct vb2_buffer *src_buf)
  84 {
  85         int i;
  86         dma_addr_t dma_addr;
  87
  88         for (i = 0; i < src_buf->num_planes; i++) {
  89                 dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) +
  90                            src_buf->planes[i].data_offset;
  91                 if (!i)
  92                         writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR);
  93                 else
  94                         writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR);
  95         }
  96 }
  97 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_src);
  98
  99 void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
 100                           struct vb2_buffer *dst_buf)
 101 {
 102         dma_addr_t dma_addr;
 103         size_t size;
 104         u32 dma_addr_offset;
 105         u32 dma_addr_offsetmask;
 106
 107         dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 108         dma_addr_offset = ctx->enable_exif ? MTK_JPEG_MAX_EXIF_SIZE : 0;
 109         dma_addr_offsetmask = dma_addr & JPEG_ENC_DST_ADDR_OFFSET_MASK;
 110         size = vb2_plane_size(dst_buf, 0);
 111
 112         writel(dma_addr_offset & ~0xf, base + JPEG_ENC_OFFSET_ADDR);
 113         writel(dma_addr_offsetmask & 0xf, base + JPEG_ENC_BYTE_OFFSET_MASK);
 114         writel(dma_addr & ~0xf, base + JPEG_ENC_DST_ADDR0);
 115         writel((dma_addr + size) & ~0xf, base + JPEG_ENC_STALL_ADDR0);
 116 }
 117 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_dst);
 118
 119 void mtk_jpeg_set_enc_params(struct mtk_jpeg_ctx *ctx,  void __iomem *base)
 120 {
 121         u32 value;
 122         u32 width = ctx->out_q.enc_crop_rect.width;
 123         u32 height = ctx->out_q.enc_crop_rect.height;
 124         u32 enc_format = ctx->out_q.fmt->fourcc;
 125         u32 bytesperline = ctx->out_q.pix_mp.plane_fmt[0].bytesperline;
 126         u32 blk_num;
 127         u32 img_stride;
 128         u32 mem_stride;
 129         u32 i, enc_quality;
 130
 131         value = width << 16 | height;
 132         writel(value, base + JPEG_ENC_IMG_SIZE);
 133
 134         if (enc_format == V4L2_PIX_FMT_NV12M ||
 135             enc_format == V4L2_PIX_FMT_NV21M)
 136             /*
 137              * Total 8 x 8 block number of luma and chroma.
 138              * The number of blocks is counted from 0.
 139              */
 140                 blk_num = DIV_ROUND_UP(width, 16) *
 141                           DIV_ROUND_UP(height, 16) * 6 - 1;
 142         else
 143                 blk_num = DIV_ROUND_UP(width, 16) *
 144                           DIV_ROUND_UP(height, 8) * 4 - 1;
 145         writel(blk_num, base + JPEG_ENC_BLK_NUM);
 146
 147         if (enc_format == V4L2_PIX_FMT_NV12M ||
 148             enc_format == V4L2_PIX_FMT_NV21M) {
 149                 /* 4:2:0 */
 150                 img_stride = round_up(width, 16);
 151                 mem_stride = bytesperline;
 152         } else {
 153                 /* 4:2:2 */
 154                 img_stride = round_up(width * 2, 32);
 155                 mem_stride = img_stride;
 156         }
 157         writel(img_stride, base + JPEG_ENC_IMG_STRIDE);
 158         writel(mem_stride, base + JPEG_ENC_STRIDE);
 159
 160         enc_quality = mtk_jpeg_enc_quality[0].hardware_value;
 161         for (i = 0; i < ARRAY_SIZE(mtk_jpeg_enc_quality); i++) {
 162                 if (ctx->enc_quality <= mtk_jpeg_enc_quality[i].quality_param) {
 163                         enc_quality = mtk_jpeg_enc_quality[i].hardware_value;
 164                         break;
 165                 }
 166         }
 167         writel(enc_quality, base + JPEG_ENC_QUALITY);
 168
 169         value = readl(base + JPEG_ENC_CTRL);
 170         value &= ~JPEG_ENC_CTRL_YUV_FORMAT_MASK;
 171         value |= (ctx->out_q.fmt->hw_format & 3) << 3;
 172         if (ctx->enable_exif)
 173                 value |= JPEG_ENC_CTRL_FILE_FORMAT_BIT;
 174         else
 175                 value &= ~JPEG_ENC_CTRL_FILE_FORMAT_BIT;
 176         if (ctx->restart_interval)
 177                 value |= JPEG_ENC_CTRL_RESTART_EN_BIT;
 178         else
 179                 value &= ~JPEG_ENC_CTRL_RESTART_EN_BIT;
 180         writel(value, base + JPEG_ENC_CTRL);
 181
 182         writel(ctx->restart_interval, base + JPEG_ENC_RST_MCU_NUM);
 183 }
 184 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_params);
 185
 186 static void mtk_jpegenc_put_buf(struct mtk_jpegenc_comp_dev *jpeg)
 187 {
 188         struct mtk_jpeg_ctx *ctx;
 189         struct vb2_v4l2_buffer *dst_buffer;
 190         struct list_head *temp_entry;
 191         struct list_head *pos = NULL;
 192         struct mtk_jpeg_src_buf *dst_done_buf, *tmp_dst_done_buf;
 193         unsigned long flags;
 194
 195         ctx = jpeg->hw_param.curr_ctx;
 196         if (!ctx) {
 197                 dev_err(jpeg->dev, "comp_jpeg ctx fail !!!\n");
 198                 return;
 199         }
 200
 201         dst_buffer = jpeg->hw_param.dst_buffer;
 202         if (!dst_buffer) {
 203                 dev_err(jpeg->dev, "comp_jpeg dst_buffer fail !!!\n");
 204                 return;
 205         }
 206
 207         dst_done_buf = container_of(dst_buffer,
 208                                     struct mtk_jpeg_src_buf, b);
 209
 210         spin_lock_irqsave(&ctx->done_queue_lock, flags);
 211         list_add_tail(&dst_done_buf->list, &ctx->dst_done_queue);
 212         while (!list_empty(&ctx->dst_done_queue) &&
 213                (pos != &ctx->dst_done_queue)) {
 214                 list_for_each_prev_safe(pos, temp_entry, &ctx->dst_done_queue) {
 215                         tmp_dst_done_buf = list_entry(pos,
 216                                                       struct mtk_jpeg_src_buf,
 217                                                       list);
 218                         if (tmp_dst_done_buf->frame_num ==
 219                                 ctx->last_done_frame_num) {
 220                                 list_del(&tmp_dst_done_buf->list);
 221                                 v4l2_m2m_buf_done(&tmp_dst_done_buf->b,
 222                                                   VB2_BUF_STATE_DONE);
 223                                 ctx->last_done_frame_num++;
 224                         }
 225                 }
 226         }
 227         spin_unlock_irqrestore(&ctx->done_queue_lock, flags);
 228 }
 229
 230 static void mtk_jpegenc_timeout_work(struct work_struct *work)
 231 {
 232         struct delayed_work *dly_work = to_delayed_work(work);
 233         struct mtk_jpegenc_comp_dev *cjpeg =
 234                 container_of(dly_work,
 235                              struct mtk_jpegenc_comp_dev,
 236                              job_timeout_work);
 237         struct mtk_jpeg_dev *master_jpeg = cjpeg->master_dev;
 238         enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR;
 239         struct vb2_v4l2_buffer *src_buf, *dst_buf;
 240
 241         src_buf = cjpeg->hw_param.src_buffer;
 242         dst_buf = cjpeg->hw_param.dst_buffer;
 243         v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);
 244
 245         mtk_jpeg_enc_reset(cjpeg->reg_base);
 246         clk_disable_unprepare(cjpeg->venc_clk.clks->clk);
 247         pm_runtime_put(cjpeg->dev);
 248         cjpeg->hw_state = MTK_JPEG_HW_IDLE;
 249         atomic_inc(&master_jpeg->hw_rdy);
 250         wake_up(&master_jpeg->hw_wq);
 251         v4l2_m2m_buf_done(src_buf, buf_state);
 252         mtk_jpegenc_put_buf(cjpeg);
 253 }
 254
 255 static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
 256 {
 257         struct vb2_v4l2_buffer *src_buf, *dst_buf;
 258         enum vb2_buffer_state buf_state;
 259         struct mtk_jpeg_ctx *ctx;
 260         u32 result_size;
 261         u32 irq_status;
 262
 263         struct mtk_jpegenc_comp_dev *jpeg = priv;
 264         struct mtk_jpeg_dev *master_jpeg = jpeg->master_dev;
 265
 266         cancel_delayed_work(&jpeg->job_timeout_work);
 267
 268         ctx = jpeg->hw_param.curr_ctx;
 269         src_buf = jpeg->hw_param.src_buffer;
 270         dst_buf = jpeg->hw_param.dst_buffer;
 271         v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true);
 272
 273         irq_status = readl(jpeg->reg_base + JPEG_ENC_INT_STS) &
 274                 JPEG_ENC_INT_STATUS_MASK_ALLIRQ;
 275         if (irq_status)
 276                 writel(0, jpeg->reg_base + JPEG_ENC_INT_STS);
 277         if (!(irq_status & JPEG_ENC_INT_STATUS_DONE))
 278                 dev_warn(jpeg->dev, "Jpg Enc occurs unknown Err.");
 279
 280         result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base);
 281         vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size);
 282         buf_state = VB2_BUF_STATE_DONE;
 283         v4l2_m2m_buf_done(src_buf, buf_state);
 284         mtk_jpegenc_put_buf(jpeg);
 285         pm_runtime_put(ctx->jpeg->dev);
 286         clk_disable_unprepare(jpeg->venc_clk.clks->clk);
 287
 288         jpeg->hw_state = MTK_JPEG_HW_IDLE;
 289         wake_up(&master_jpeg->hw_wq);
 290         atomic_inc(&master_jpeg->hw_rdy);
 291
 292         return IRQ_HANDLED;
 293 }
 294
 295 static int mtk_jpegenc_hw_init_irq(struct mtk_jpegenc_comp_dev *dev)
 296 {
 297         struct platform_device *pdev = dev->plat_dev;
 298         int ret;
 299
 300         dev->jpegenc_irq = platform_get_irq(pdev, 0);
 301         if (dev->jpegenc_irq < 0)
 302                 return dev->jpegenc_irq;
 303
 304         ret = devm_request_irq(&pdev->dev,
 305                                dev->jpegenc_irq,
 306                                mtk_jpegenc_hw_irq_handler,
 307                                0,
 308                                pdev->name, dev);
 309         if (ret) {
 310                 dev_err(&pdev->dev, "Failed to devm_request_irq %d (%d)",
 311                         dev->jpegenc_irq, ret);
 312                 return ret;
 313         }
 314
 315         return 0;
 316 }
 317
 318 static int mtk_jpegenc_hw_probe(struct platform_device *pdev)
 319 {
 320         struct mtk_jpegenc_clk *jpegenc_clk;
 321         struct mtk_jpeg_dev *master_dev;
 322         struct mtk_jpegenc_comp_dev *dev;
 323         int ret, i;
 324
 325         struct device *decs = &pdev->dev;
 326
 327         if (!decs->parent)
 328                 return -EPROBE_DEFER;
 329
 330         master_dev = dev_get_drvdata(decs->parent);
 331         if (!master_dev)
 332                 return -EPROBE_DEFER;
 333
 334         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 335         if (!dev)
 336                 return -ENOMEM;
 337
 338         dev->plat_dev = pdev;
 339         dev->dev = &pdev->dev;
 340
 341         spin_lock_init(&dev->hw_lock);
 342         dev->hw_state = MTK_JPEG_HW_IDLE;
 343
 344         INIT_DELAYED_WORK(&dev->job_timeout_work,
 345                           mtk_jpegenc_timeout_work);
 346
 347         jpegenc_clk = &dev->venc_clk;
 348
 349         jpegenc_clk->clk_num = devm_clk_bulk_get_all(&pdev->dev,
 350                                                      &jpegenc_clk->clks);
 351         if (jpegenc_clk->clk_num < 0)
 352                 return dev_err_probe(&pdev->dev, jpegenc_clk->clk_num,
 353                                      "Failed to get jpegenc clock count\n");
 354
 355         dev->reg_base = devm_platform_ioremap_resource(pdev, 0);
 356         if (IS_ERR(dev->reg_base))
 357                 return PTR_ERR(dev->reg_base);
 358
 359         ret = mtk_jpegenc_hw_init_irq(dev);
 360         if (ret)
 361                 return ret;
 362
 363         i = atomic_add_return(1, &master_dev->hw_index) - 1;
 364         master_dev->enc_hw_dev[i] = dev;
 365         master_dev->reg_encbase[i] = dev->reg_base;
 366         dev->master_dev = master_dev;
 367
 368         platform_set_drvdata(pdev, dev);
 369         pm_runtime_enable(&pdev->dev);
 370
 371         return 0;
 372 }
 373
 374 static struct platform_driver mtk_jpegenc_hw_driver = {
 375         .probe = mtk_jpegenc_hw_probe,
 376         .driver = {
 377                 .name = "mtk-jpegenc-hw",
 378                 .of_match_table = mtk_jpegenc_drv_ids,
 379         },
 380 };
 381
 382 module_platform_driver(mtk_jpegenc_hw_driver);
 383
 384 MODULE_DESCRIPTION("MediaTek JPEG encode HW driver");
 385 MODULE_LICENSE("GPL");