drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/genalloc.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/module.h>
  22 #include <linux/of_device.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/slab.h>
  25 #include <linux/videodev2.h>
  26 #include <linux/of.h>
  27 #include <linux/platform_data/coda.h>
  28
  29 #include <media/v4l2-ctrls.h>
  30 #include <media/v4l2-device.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-mem2mem.h>
  33 #include <media/videobuf2-core.h>
  34 #include <media/videobuf2-dma-contig.h>
  35
  36 #include "coda.h"
  37
  38 #define CODA_NAME               "coda"
  39
  40 #define CODA_MAX_INSTANCES      4
  41
  42 #define CODA_FMO_BUF_SIZE       32
  43 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  45 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  46 #define CODA_ISRAM_SIZE (2048 * 2)
  47 #define CODADX6_IRAM_SIZE       0xb000
  48 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  49
  50 #define CODA_MAX_FRAMEBUFFERS   2
  51
  52 #define MAX_W           720
  53 #define MAX_H           576
  54 #define CODA_MAX_FRAME_SIZE     0x90000
  55 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  56 #define CODA_DEFAULT_GAMMA              4096
  57
  58 #define MIN_W 176
  59 #define MIN_H 144
  60 #define MAX_W 720
  61 #define MAX_H 576
  62
  63 #define S_ALIGN         1 /* multiple of 2 */
  64 #define W_ALIGN         1 /* multiple of 2 */
  65 #define H_ALIGN         1 /* multiple of 2 */
  66
  67 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  68
  69 static int coda_debug;
  70 module_param(coda_debug, int, 0644);
  71 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  72
  73 enum {
  74         V4L2_M2M_SRC = 0,
  75         V4L2_M2M_DST = 1,
  76 };
  77
  78 enum coda_fmt_type {
  79         CODA_FMT_ENC,
  80         CODA_FMT_RAW,
  81 };
  82
  83 enum coda_inst_type {
  84         CODA_INST_ENCODER,
  85         CODA_INST_DECODER,
  86 };
  87
  88 enum coda_product {
  89         CODA_DX6 = 0xf001,
  90         CODA_7541 = 0xf012,
  91 };
  92
  93 struct coda_fmt {
  94         char *name;
  95         u32 fourcc;
  96         enum coda_fmt_type type;
  97 };
  98
  99 struct coda_devtype {
 100         char                    *firmware;
 101         enum coda_product       product;
 102         struct coda_fmt         *formats;
 103         unsigned int            num_formats;
 104         size_t                  workbuf_size;
 105 };
 106
 107 /* Per-queue, driver-specific private data */
 108 struct coda_q_data {
 109         unsigned int            width;
 110         unsigned int            height;
 111         unsigned int            sizeimage;
 112         struct coda_fmt *fmt;
 113 };
 114
 115 struct coda_aux_buf {
 116         void                    *vaddr;
 117         dma_addr_t              paddr;
 118         u32                     size;
 119 };
 120
 121 struct coda_dev {
 122         struct v4l2_device      v4l2_dev;
 123         struct video_device     vfd;
 124         struct platform_device  *plat_dev;
 125         const struct coda_devtype *devtype;
 126
 127         void __iomem            *regs_base;
 128         struct clk              *clk_per;
 129         struct clk              *clk_ahb;
 130
 131         struct coda_aux_buf     codebuf;
 132         struct coda_aux_buf     workbuf;
 133         struct gen_pool         *iram_pool;
 134         long unsigned int       iram_vaddr;
 135         long unsigned int       iram_paddr;
 136         unsigned long           iram_size;
 137
 138         spinlock_t              irqlock;
 139         struct mutex            dev_mutex;
 140         struct v4l2_m2m_dev     *m2m_dev;
 141         struct vb2_alloc_ctx    *alloc_ctx;
 142         struct list_head        instances;
 143         unsigned long           instance_mask;
 144         struct delayed_work     timeout;
 145         struct completion       done;
 146 };
 147
 148 struct coda_params {
 149         u8                      rot_mode;
 150         u8                      h264_intra_qp;
 151         u8                      h264_inter_qp;
 152         u8                      mpeg4_intra_qp;
 153         u8                      mpeg4_inter_qp;
 154         u8                      gop_size;
 155         int                     codec_mode;
 156         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 157         u32                     framerate;
 158         u16                     bitrate;
 159         u32                     slice_max_bits;
 160         u32                     slice_max_mb;
 161 };
 162
 163 struct coda_ctx {
 164         struct coda_dev                 *dev;
 165         struct list_head                list;
 166         int                             aborting;
 167         int                             rawstreamon;
 168         int                             compstreamon;
 169         u32                             isequence;
 170         struct coda_q_data              q_data[2];
 171         enum coda_inst_type             inst_type;
 172         enum v4l2_colorspace            colorspace;
 173         struct coda_params              params;
 174         struct v4l2_m2m_ctx             *m2m_ctx;
 175         struct v4l2_ctrl_handler        ctrls;
 176         struct v4l2_fh                  fh;
 177         int                             gopcounter;
 178         char                            vpu_header[3][64];
 179         int                             vpu_header_size[3];
 180         struct coda_aux_buf             parabuf;
 181         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 182         int                             num_internal_frames;
 183         int                             idx;
 184 };
 185
 186 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 187                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 188 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 189
 190 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 191 {
 192         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 193                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 194         writel(data, dev->regs_base + reg);
 195 }
 196
 197 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 198 {
 199         u32 data;
 200         data = readl(dev->regs_base + reg);
 201         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 202                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 203         return data;
 204 }
 205
 206 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 207 {
 208         return coda_read(dev, CODA_REG_BIT_BUSY);
 209 }
 210
 211 static inline int coda_is_initialized(struct coda_dev *dev)
 212 {
 213         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 214 }
 215
 216 static int coda_wait_timeout(struct coda_dev *dev)
 217 {
 218         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 219
 220         while (coda_isbusy(dev)) {
 221                 if (time_after(jiffies, timeout))
 222                         return -ETIMEDOUT;
 223         }
 224         return 0;
 225 }
 226
 227 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 228 {
 229         struct coda_dev *dev = ctx->dev;
 230         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 231
 232         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 233         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 234         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 235 }
 236
 237 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 238 {
 239         struct coda_dev *dev = ctx->dev;
 240
 241         coda_command_async(ctx, cmd);
 242         return coda_wait_timeout(dev);
 243 }
 244
 245 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 246                                          enum v4l2_buf_type type)
 247 {
 248         switch (type) {
 249         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 250                 return &(ctx->q_data[V4L2_M2M_SRC]);
 251         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 252                 return &(ctx->q_data[V4L2_M2M_DST]);
 253         default:
 254                 BUG();
 255         }
 256         return NULL;
 257 }
 258
 259 /*
 260  * Add one array of supported formats for each version of Coda:
 261  *  i.MX27 -> codadx6
 262  *  i.MX51 -> coda7
 263  *  i.MX6  -> coda960
 264  */
 265 static struct coda_fmt codadx6_formats[] = {
 266         {
 267                 .name = "YUV 4:2:0 Planar",
 268                 .fourcc = V4L2_PIX_FMT_YUV420,
 269                 .type = CODA_FMT_RAW,
 270         },
 271         {
 272                 .name = "H264 Encoded Stream",
 273                 .fourcc = V4L2_PIX_FMT_H264,
 274                 .type = CODA_FMT_ENC,
 275         },
 276         {
 277                 .name = "MPEG4 Encoded Stream",
 278                 .fourcc = V4L2_PIX_FMT_MPEG4,
 279                 .type = CODA_FMT_ENC,
 280         },
 281 };
 282
 283 static struct coda_fmt coda7_formats[] = {
 284         {
 285                 .name = "YUV 4:2:0 Planar",
 286                 .fourcc = V4L2_PIX_FMT_YUV420,
 287                 .type = CODA_FMT_RAW,
 288         },
 289         {
 290                 .name = "H264 Encoded Stream",
 291                 .fourcc = V4L2_PIX_FMT_H264,
 292                 .type = CODA_FMT_ENC,
 293         },
 294         {
 295                 .name = "MPEG4 Encoded Stream",
 296                 .fourcc = V4L2_PIX_FMT_MPEG4,
 297                 .type = CODA_FMT_ENC,
 298         },
 299 };
 300
 301 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
 302 {
 303         struct coda_fmt *formats = dev->devtype->formats;
 304         int num_formats = dev->devtype->num_formats;
 305         unsigned int k;
 306
 307         for (k = 0; k < num_formats; k++) {
 308                 if (formats[k].fourcc == f->fmt.pix.pixelformat)
 309                         break;
 310         }
 311
 312         if (k == num_formats)
 313                 return NULL;
 314
 315         return &formats[k];
 316 }
 317
 318 /*
 319  * V4L2 ioctl() operations.
 320  */
 321 static int vidioc_querycap(struct file *file, void *priv,
 322                            struct v4l2_capability *cap)
 323 {
 324         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 325         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 326         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
 327         /*
 328          * This is only a mem-to-mem video device. The capture and output
 329          * device capability flags are left only for backward compatibility
 330          * and are scheduled for removal.
 331          */
 332         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 333                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 334         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 335
 336         return 0;
 337 }
 338
 339 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 340                         enum coda_fmt_type type)
 341 {
 342         struct coda_ctx *ctx = fh_to_ctx(priv);
 343         struct coda_dev *dev = ctx->dev;
 344         struct coda_fmt *formats = dev->devtype->formats;
 345         struct coda_fmt *fmt;
 346         int num_formats = dev->devtype->num_formats;
 347         int i, num = 0;
 348
 349         for (i = 0; i < num_formats; i++) {
 350                 if (formats[i].type == type) {
 351                         if (num == f->index)
 352                                 break;
 353                         ++num;
 354                 }
 355         }
 356
 357         if (i < num_formats) {
 358                 fmt = &formats[i];
 359                 strlcpy(f->description, fmt->name, sizeof(f->description));
 360                 f->pixelformat = fmt->fourcc;
 361                 return 0;
 362         }
 363
 364         /* Format not found */
 365         return -EINVAL;
 366 }
 367
 368 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 369                                    struct v4l2_fmtdesc *f)
 370 {
 371         return enum_fmt(priv, f, CODA_FMT_ENC);
 372 }
 373
 374 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 375                                    struct v4l2_fmtdesc *f)
 376 {
 377         return enum_fmt(priv, f, CODA_FMT_RAW);
 378 }
 379
 380 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 381 {
 382         struct vb2_queue *vq;
 383         struct coda_q_data *q_data;
 384         struct coda_ctx *ctx = fh_to_ctx(priv);
 385
 386         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 387         if (!vq)
 388                 return -EINVAL;
 389
 390         q_data = get_q_data(ctx, f->type);
 391
 392         f->fmt.pix.field        = V4L2_FIELD_NONE;
 393         f->fmt.pix.pixelformat  = q_data->fmt->fourcc;
 394         f->fmt.pix.width        = q_data->width;
 395         f->fmt.pix.height       = q_data->height;
 396         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
 397                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 398         else /* encoded formats h.264/mpeg4 */
 399                 f->fmt.pix.bytesperline = 0;
 400
 401         f->fmt.pix.sizeimage    = q_data->sizeimage;
 402         f->fmt.pix.colorspace   = ctx->colorspace;
 403
 404         return 0;
 405 }
 406
 407 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
 408 {
 409         enum v4l2_field field;
 410
 411         field = f->fmt.pix.field;
 412         if (field == V4L2_FIELD_ANY)
 413                 field = V4L2_FIELD_NONE;
 414         else if (V4L2_FIELD_NONE != field)
 415                 return -EINVAL;
 416
 417         /* V4L2 specification suggests the driver corrects the format struct
 418          * if any of the dimensions is unsupported */
 419         f->fmt.pix.field = field;
 420
 421         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
 422                 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
 423                                       W_ALIGN, &f->fmt.pix.height,
 424                                       MIN_H, MAX_H, H_ALIGN, S_ALIGN);
 425                 /* Frame stride must be multiple of 8 */
 426                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
 427                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 428                                         f->fmt.pix.height * 3 / 2;
 429         } else { /*encoded formats h.264/mpeg4 */
 430                 f->fmt.pix.bytesperline = 0;
 431                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 432         }
 433
 434         return 0;
 435 }
 436
 437 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 438                                   struct v4l2_format *f)
 439 {
 440         int ret;
 441         struct coda_fmt *fmt;
 442         struct coda_ctx *ctx = fh_to_ctx(priv);
 443
 444         fmt = find_format(ctx->dev, f);
 445         /*
 446          * Since decoding support is not implemented yet do not allow
 447          * CODA_FMT_RAW formats in the capture interface.
 448          */
 449         if (!fmt || !(fmt->type == CODA_FMT_ENC))
 450                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
 451
 452         f->fmt.pix.colorspace = ctx->colorspace;
 453
 454         ret = vidioc_try_fmt(ctx->dev, f);
 455         if (ret < 0)
 456                 return ret;
 457
 458         return 0;
 459 }
 460
 461 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 462                                   struct v4l2_format *f)
 463 {
 464         struct coda_ctx *ctx = fh_to_ctx(priv);
 465         struct coda_fmt *fmt;
 466         int ret;
 467
 468         fmt = find_format(ctx->dev, f);
 469         /*
 470          * Since decoding support is not implemented yet do not allow
 471          * CODA_FMT formats in the capture interface.
 472          */
 473         if (!fmt || !(fmt->type == CODA_FMT_RAW))
 474                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
 475
 476         if (!f->fmt.pix.colorspace)
 477                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 478
 479         ret = vidioc_try_fmt(ctx->dev, f);
 480         if (ret < 0)
 481                 return ret;
 482
 483         return 0;
 484 }
 485
 486 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 487 {
 488         struct coda_q_data *q_data;
 489         struct vb2_queue *vq;
 490         int ret;
 491
 492         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 493         if (!vq)
 494                 return -EINVAL;
 495
 496         q_data = get_q_data(ctx, f->type);
 497         if (!q_data)
 498                 return -EINVAL;
 499
 500         if (vb2_is_busy(vq)) {
 501                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 502                 return -EBUSY;
 503         }
 504
 505         ret = vidioc_try_fmt(ctx->dev, f);
 506         if (ret)
 507                 return ret;
 508
 509         q_data->fmt = find_format(ctx->dev, f);
 510         q_data->width = f->fmt.pix.width;
 511         q_data->height = f->fmt.pix.height;
 512         q_data->sizeimage = f->fmt.pix.sizeimage;
 513
 514         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 515                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 516                 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
 517
 518         return 0;
 519 }
 520
 521 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 522                                 struct v4l2_format *f)
 523 {
 524         int ret;
 525
 526         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 527         if (ret)
 528                 return ret;
 529
 530         return vidioc_s_fmt(fh_to_ctx(priv), f);
 531 }
 532
 533 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 534                                 struct v4l2_format *f)
 535 {
 536         struct coda_ctx *ctx = fh_to_ctx(priv);
 537         int ret;
 538
 539         ret = vidioc_try_fmt_vid_out(file, priv, f);
 540         if (ret)
 541                 return ret;
 542
 543         ret = vidioc_s_fmt(ctx, f);
 544         if (ret)
 545                 ctx->colorspace = f->fmt.pix.colorspace;
 546
 547         return ret;
 548 }
 549
 550 static int vidioc_reqbufs(struct file *file, void *priv,
 551                           struct v4l2_requestbuffers *reqbufs)
 552 {
 553         struct coda_ctx *ctx = fh_to_ctx(priv);
 554
 555         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 556 }
 557
 558 static int vidioc_querybuf(struct file *file, void *priv,
 559                            struct v4l2_buffer *buf)
 560 {
 561         struct coda_ctx *ctx = fh_to_ctx(priv);
 562
 563         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 564 }
 565
 566 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 567 {
 568         struct coda_ctx *ctx = fh_to_ctx(priv);
 569
 570         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 571 }
 572
 573 static int vidioc_expbuf(struct file *file, void *priv,
 574                          struct v4l2_exportbuffer *eb)
 575 {
 576         struct coda_ctx *ctx = fh_to_ctx(priv);
 577
 578         return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
 579 }
 580
 581 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 582 {
 583         struct coda_ctx *ctx = fh_to_ctx(priv);
 584
 585         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 586 }
 587
 588 static int vidioc_streamon(struct file *file, void *priv,
 589                            enum v4l2_buf_type type)
 590 {
 591         struct coda_ctx *ctx = fh_to_ctx(priv);
 592
 593         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 594 }
 595
 596 static int vidioc_streamoff(struct file *file, void *priv,
 597                             enum v4l2_buf_type type)
 598 {
 599         struct coda_ctx *ctx = fh_to_ctx(priv);
 600
 601         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 602 }
 603
 604 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 605         .vidioc_querycap        = vidioc_querycap,
 606
 607         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 608         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 609         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 610         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 611
 612         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 613         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 614         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 615         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 616
 617         .vidioc_reqbufs         = vidioc_reqbufs,
 618         .vidioc_querybuf        = vidioc_querybuf,
 619
 620         .vidioc_qbuf            = vidioc_qbuf,
 621         .vidioc_expbuf          = vidioc_expbuf,
 622         .vidioc_dqbuf           = vidioc_dqbuf,
 623
 624         .vidioc_streamon        = vidioc_streamon,
 625         .vidioc_streamoff       = vidioc_streamoff,
 626 };
 627
 628 /*
 629  * Mem-to-mem operations.
 630  */
 631 static void coda_device_run(void *m2m_priv)
 632 {
 633         struct coda_ctx *ctx = m2m_priv;
 634         struct coda_q_data *q_data_src, *q_data_dst;
 635         struct vb2_buffer *src_buf, *dst_buf;
 636         struct coda_dev *dev = ctx->dev;
 637         int force_ipicture;
 638         int quant_param = 0;
 639         u32 picture_y, picture_cb, picture_cr;
 640         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 641         u32 dst_fourcc;
 642
 643         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 644         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 645         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 646         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 647         dst_fourcc = q_data_dst->fmt->fourcc;
 648
 649         src_buf->v4l2_buf.sequence = ctx->isequence;
 650         dst_buf->v4l2_buf.sequence = ctx->isequence;
 651         ctx->isequence++;
 652
 653         /*
 654          * Workaround coda firmware BUG that only marks the first
 655          * frame as IDR. This is a problem for some decoders that can't
 656          * recover when a frame is lost.
 657          */
 658         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 659                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 660                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 661         } else {
 662                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 663                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 664         }
 665
 666         /*
 667          * Copy headers at the beginning of the first frame for H.264 only.
 668          * In MPEG4 they are already copied by the coda.
 669          */
 670         if (src_buf->v4l2_buf.sequence == 0) {
 671                 pic_stream_buffer_addr =
 672                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 673                         ctx->vpu_header_size[0] +
 674                         ctx->vpu_header_size[1] +
 675                         ctx->vpu_header_size[2];
 676                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 677                         ctx->vpu_header_size[0] -
 678                         ctx->vpu_header_size[1] -
 679                         ctx->vpu_header_size[2];
 680                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 681                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 682                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 683                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 684                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 685                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 686                         ctx->vpu_header_size[2]);
 687         } else {
 688                 pic_stream_buffer_addr =
 689                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 690                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 691         }
 692
 693         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 694                 force_ipicture = 1;
 695                 switch (dst_fourcc) {
 696                 case V4L2_PIX_FMT_H264:
 697                         quant_param = ctx->params.h264_intra_qp;
 698                         break;
 699                 case V4L2_PIX_FMT_MPEG4:
 700                         quant_param = ctx->params.mpeg4_intra_qp;
 701                         break;
 702                 default:
 703                         v4l2_warn(&ctx->dev->v4l2_dev,
 704                                 "cannot set intra qp, fmt not supported\n");
 705                         break;
 706                 }
 707         } else {
 708                 force_ipicture = 0;
 709                 switch (dst_fourcc) {
 710                 case V4L2_PIX_FMT_H264:
 711                         quant_param = ctx->params.h264_inter_qp;
 712                         break;
 713                 case V4L2_PIX_FMT_MPEG4:
 714                         quant_param = ctx->params.mpeg4_inter_qp;
 715                         break;
 716                 default:
 717                         v4l2_warn(&ctx->dev->v4l2_dev,
 718                                 "cannot set inter qp, fmt not supported\n");
 719                         break;
 720                 }
 721         }
 722
 723         /* submit */
 724         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
 725         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 726
 727
 728         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 729         picture_cb = picture_y + q_data_src->width * q_data_src->height;
 730         picture_cr = picture_cb + q_data_src->width / 2 *
 731                         q_data_src->height / 2;
 732
 733         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 734         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 735         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 736         coda_write(dev, force_ipicture << 1 & 0x2,
 737                    CODA_CMD_ENC_PIC_OPTION);
 738
 739         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 740         coda_write(dev, pic_stream_buffer_size / 1024,
 741                    CODA_CMD_ENC_PIC_BB_SIZE);
 742
 743         if (dev->devtype->product == CODA_7541) {
 744                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 745                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 746                                 CODA7_REG_BIT_AXI_SRAM_USE);
 747         }
 748
 749         /* 1 second timeout in case CODA locks up */
 750         schedule_delayed_work(&dev->timeout, HZ);
 751
 752         INIT_COMPLETION(dev->done);
 753         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 754 }
 755
 756 static int coda_job_ready(void *m2m_priv)
 757 {
 758         struct coda_ctx *ctx = m2m_priv;
 759
 760         /*
 761          * For both 'P' and 'key' frame cases 1 picture
 762          * and 1 frame are needed.
 763          */
 764         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 765                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 766                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 767                          "not ready: not enough video buffers.\n");
 768                 return 0;
 769         }
 770
 771         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 772                         "job ready\n");
 773         return 1;
 774 }
 775
 776 static void coda_job_abort(void *priv)
 777 {
 778         struct coda_ctx *ctx = priv;
 779         struct coda_dev *dev = ctx->dev;
 780
 781         ctx->aborting = 1;
 782
 783         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 784                  "Aborting task\n");
 785
 786         v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
 787 }
 788
 789 static void coda_lock(void *m2m_priv)
 790 {
 791         struct coda_ctx *ctx = m2m_priv;
 792         struct coda_dev *pcdev = ctx->dev;
 793         mutex_lock(&pcdev->dev_mutex);
 794 }
 795
 796 static void coda_unlock(void *m2m_priv)
 797 {
 798         struct coda_ctx *ctx = m2m_priv;
 799         struct coda_dev *pcdev = ctx->dev;
 800         mutex_unlock(&pcdev->dev_mutex);
 801 }
 802
 803 static struct v4l2_m2m_ops coda_m2m_ops = {
 804         .device_run     = coda_device_run,
 805         .job_ready      = coda_job_ready,
 806         .job_abort      = coda_job_abort,
 807         .lock           = coda_lock,
 808         .unlock         = coda_unlock,
 809 };
 810
 811 static void set_default_params(struct coda_ctx *ctx)
 812 {
 813         struct coda_dev *dev = ctx->dev;
 814
 815         ctx->params.codec_mode = CODA_MODE_INVALID;
 816         ctx->colorspace = V4L2_COLORSPACE_REC709;
 817         ctx->params.framerate = 30;
 818         ctx->aborting = 0;
 819
 820         /* Default formats for output and input queues */
 821         ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
 822         ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
 823         ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
 824         ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
 825         ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
 826         ctx->q_data[V4L2_M2M_DST].width = MAX_W;
 827         ctx->q_data[V4L2_M2M_DST].height = MAX_H;
 828         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 829 }
 830
 831 /*
 832  * Queue operations
 833  */
 834 static int coda_queue_setup(struct vb2_queue *vq,
 835                                 const struct v4l2_format *fmt,
 836                                 unsigned int *nbuffers, unsigned int *nplanes,
 837                                 unsigned int sizes[], void *alloc_ctxs[])
 838 {
 839         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 840         struct coda_q_data *q_data;
 841         unsigned int size;
 842
 843         q_data = get_q_data(ctx, vq->type);
 844         size = q_data->sizeimage;
 845
 846         *nplanes = 1;
 847         sizes[0] = size;
 848
 849         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 850
 851         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 852                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 853
 854         return 0;
 855 }
 856
 857 static int coda_buf_prepare(struct vb2_buffer *vb)
 858 {
 859         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 860         struct coda_q_data *q_data;
 861
 862         q_data = get_q_data(ctx, vb->vb2_queue->type);
 863
 864         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 865                 v4l2_warn(&ctx->dev->v4l2_dev,
 866                           "%s data will not fit into plane (%lu < %lu)\n",
 867                           __func__, vb2_plane_size(vb, 0),
 868                           (long)q_data->sizeimage);
 869                 return -EINVAL;
 870         }
 871
 872         vb2_set_plane_payload(vb, 0, q_data->sizeimage);
 873
 874         return 0;
 875 }
 876
 877 static void coda_buf_queue(struct vb2_buffer *vb)
 878 {
 879         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 880         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 881 }
 882
 883 static void coda_wait_prepare(struct vb2_queue *q)
 884 {
 885         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 886         coda_unlock(ctx);
 887 }
 888
 889 static void coda_wait_finish(struct vb2_queue *q)
 890 {
 891         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 892         coda_lock(ctx);
 893 }
 894
 895 static void coda_free_framebuffers(struct coda_ctx *ctx)
 896 {
 897         int i;
 898
 899         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 900                 if (ctx->internal_frames[i].vaddr) {
 901                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 902                                 ctx->internal_frames[i].size,
 903                                 ctx->internal_frames[i].vaddr,
 904                                 ctx->internal_frames[i].paddr);
 905                         ctx->internal_frames[i].vaddr = NULL;
 906                 }
 907         }
 908 }
 909
 910 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 911 {
 912         struct coda_dev *dev = ctx->dev;
 913
 914         int height = q_data->height;
 915         int width = q_data->width;
 916         u32 *p;
 917         int i;
 918
 919         /* Allocate frame buffers */
 920         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 921         for (i = 0; i < ctx->num_internal_frames; i++) {
 922                 ctx->internal_frames[i].size = q_data->sizeimage;
 923                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 924                         ctx->internal_frames[i].size += width / 2 * height / 2;
 925                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 926                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 927                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
 928                 if (!ctx->internal_frames[i].vaddr) {
 929                         coda_free_framebuffers(ctx);
 930                         return -ENOMEM;
 931                 }
 932         }
 933
 934         /* Register frame buffers in the parameter buffer */
 935         p = ctx->parabuf.vaddr;
 936
 937         if (dev->devtype->product == CODA_DX6) {
 938                 for (i = 0; i < ctx->num_internal_frames; i++) {
 939                         p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
 940                         p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
 941                         p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
 942                 }
 943         } else {
 944                 for (i = 0; i < ctx->num_internal_frames; i += 2) {
 945                         p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
 946                         p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
 947                         p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
 948
 949                         if (fourcc == V4L2_PIX_FMT_H264)
 950                                 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
 951
 952                         if (i + 1 < ctx->num_internal_frames) {
 953                                 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
 954                                 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
 955                                 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
 956
 957                                 if (fourcc == V4L2_PIX_FMT_H264)
 958                                         p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
 959                         }
 960                 }
 961         }
 962
 963         return 0;
 964 }
 965
 966 static int coda_h264_padding(int size, char *p)
 967 {
 968         int nal_size;
 969         int diff;
 970
 971         diff = size - (size & ~0x7);
 972         if (diff == 0)
 973                 return 0;
 974
 975         nal_size = coda_filler_size[diff];
 976         memcpy(p, coda_filler_nal, nal_size);
 977
 978         /* Add rbsp stop bit and trailing at the end */
 979         *(p + nal_size - 1) = 0x80;
 980
 981         return nal_size;
 982 }
 983
 984 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
 985 {
 986         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 987         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
 988         u32 bitstream_buf, bitstream_size;
 989         struct coda_dev *dev = ctx->dev;
 990         struct coda_q_data *q_data_src, *q_data_dst;
 991         struct vb2_buffer *buf;
 992         u32 dst_fourcc;
 993         u32 value;
 994         int ret;
 995
 996         if (count < 1)
 997                 return -EINVAL;
 998
 999         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1000                 ctx->rawstreamon = 1;
1001         else
1002                 ctx->compstreamon = 1;
1003
1004         /* Don't start the coda unless both queues are on */
1005         if (!(ctx->rawstreamon & ctx->compstreamon))
1006                 return 0;
1007
1008         if (coda_isbusy(dev))
1009                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
1010                         return -EBUSY;
1011
1012         ctx->gopcounter = ctx->params.gop_size - 1;
1013
1014         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1015         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1016         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1017         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1018         bitstream_size = q_data_dst->sizeimage;
1019         dst_fourcc = q_data_dst->fmt->fourcc;
1020
1021         /* Find out whether coda must encode or decode */
1022         if (q_data_src->fmt->type == CODA_FMT_RAW &&
1023             q_data_dst->fmt->type == CODA_FMT_ENC) {
1024                 ctx->inst_type = CODA_INST_ENCODER;
1025         } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
1026                    q_data_dst->fmt->type == CODA_FMT_RAW) {
1027                 ctx->inst_type = CODA_INST_DECODER;
1028                 v4l2_err(v4l2_dev, "decoding not supported.\n");
1029                 return -EINVAL;
1030         } else {
1031                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1032                 return -EINVAL;
1033         }
1034
1035         if (!coda_is_initialized(dev)) {
1036                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1037                 return -EFAULT;
1038         }
1039         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1040         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1041         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1042         switch (dev->devtype->product) {
1043         case CODA_DX6:
1044                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1045                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1046                 break;
1047         default:
1048                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1049                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1050         }
1051
1052         if (dev->devtype->product == CODA_DX6) {
1053                 /* Configure the coda */
1054                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1055         }
1056
1057         /* Could set rotation here if needed */
1058         switch (dev->devtype->product) {
1059         case CODA_DX6:
1060                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1061                 break;
1062         default:
1063                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1064         }
1065         value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1066         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1067         coda_write(dev, ctx->params.framerate,
1068                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1069
1070         switch (dst_fourcc) {
1071         case V4L2_PIX_FMT_MPEG4:
1072                 if (dev->devtype->product == CODA_DX6)
1073                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1074                 else
1075                         ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1076
1077                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1078                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1079                 break;
1080         case V4L2_PIX_FMT_H264:
1081                 if (dev->devtype->product == CODA_DX6)
1082                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1083                 else
1084                         ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1085
1086                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1087                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1088                 break;
1089         default:
1090                 v4l2_err(v4l2_dev,
1091                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1092                 return -EINVAL;
1093         }
1094
1095         switch (ctx->params.slice_mode) {
1096         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1097                 value = 0;
1098                 break;
1099         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1100                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1101                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1102                 value |=  1 & CODA_SLICING_MODE_MASK;
1103                 break;
1104         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1105                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1106                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1107                 value |=  1 & CODA_SLICING_MODE_MASK;
1108                 break;
1109         }
1110         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1111         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1112         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1113
1114         if (ctx->params.bitrate) {
1115                 /* Rate control enabled */
1116                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1117                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1118         } else {
1119                 value = 0;
1120         }
1121         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1122
1123         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1124         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1125
1126         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1127         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1128
1129         /* set default gamma */
1130         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1131         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1132
1133         if (CODA_DEFAULT_GAMMA > 0) {
1134                 if (dev->devtype->product == CODA_DX6)
1135                         value  = 1 << CODADX6_OPTION_GAMMA_OFFSET;
1136                 else
1137                         value  = 1 << CODA7_OPTION_GAMMA_OFFSET;
1138         } else {
1139                 value = 0;
1140         }
1141         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1142
1143         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1144                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1145                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1146                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1147                 if (dev->devtype->product == CODA_DX6) {
1148                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1149                 } else {
1150                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1151                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1152                 }
1153         }
1154
1155         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1156                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1157                 return -ETIMEDOUT;
1158         }
1159
1160         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1161                 return -EFAULT;
1162
1163         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1164         if (ret < 0)
1165                 return ret;
1166
1167         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1168         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1169         if (dev->devtype->product != CODA_DX6) {
1170                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1171                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1172                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1173                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1174                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1175                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1176         }
1177         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1178                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1179                 return -ETIMEDOUT;
1180         }
1181
1182         /* Save stream headers */
1183         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1184         switch (dst_fourcc) {
1185         case V4L2_PIX_FMT_H264:
1186                 /*
1187                  * Get SPS in the first frame and copy it to an
1188                  * intermediate buffer.
1189                  */
1190                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1191                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1192                 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1193                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1194                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1195                         return -ETIMEDOUT;
1196                 }
1197                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1198                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1199                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1200                        ctx->vpu_header_size[0]);
1201
1202                 /*
1203                  * Get PPS in the first frame and copy it to an
1204                  * intermediate buffer.
1205                  */
1206                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1207                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1208                 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1209                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1210                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1211                         return -ETIMEDOUT;
1212                 }
1213                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1214                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1215                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1216                        ctx->vpu_header_size[1]);
1217                 /*
1218                  * Length of H.264 headers is variable and thus it might not be
1219                  * aligned for the coda to append the encoded frame. In that is
1220                  * the case a filler NAL must be added to header 2.
1221                  */
1222                 ctx->vpu_header_size[2] = coda_h264_padding(
1223                                         (ctx->vpu_header_size[0] +
1224                                          ctx->vpu_header_size[1]),
1225                                          ctx->vpu_header[2]);
1226                 break;
1227         case V4L2_PIX_FMT_MPEG4:
1228                 /*
1229                  * Get VOS in the first frame and copy it to an
1230                  * intermediate buffer
1231                  */
1232                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1233                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1234                 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1235                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1236                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1237                         return -ETIMEDOUT;
1238                 }
1239                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1240                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1241                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1242                        ctx->vpu_header_size[0]);
1243
1244                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1245                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1246                 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1247                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1248                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1249                         return -ETIMEDOUT;
1250                 }
1251                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1252                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1253                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1254                        ctx->vpu_header_size[1]);
1255
1256                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1257                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1258                 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1259                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1260                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1261                         return -ETIMEDOUT;
1262                 }
1263                 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1264                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1265                 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1266                        ctx->vpu_header_size[2]);
1267                 break;
1268         default:
1269                 /* No more formats need to save headers at the moment */
1270                 break;
1271         }
1272
1273         return 0;
1274 }
1275
1276 static int coda_stop_streaming(struct vb2_queue *q)
1277 {
1278         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1279         struct coda_dev *dev = ctx->dev;
1280
1281         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1282                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1283                          "%s: output\n", __func__);
1284                 ctx->rawstreamon = 0;
1285         } else {
1286                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1287                          "%s: capture\n", __func__);
1288                 ctx->compstreamon = 0;
1289         }
1290
1291         /* Don't stop the coda unless both queues are off */
1292         if (ctx->rawstreamon || ctx->compstreamon)
1293                 return 0;
1294
1295         if (coda_isbusy(dev)) {
1296                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1297                         v4l2_warn(&dev->v4l2_dev,
1298                                   "%s: timeout, sending SEQ_END anyway\n", __func__);
1299                 }
1300         }
1301
1302         cancel_delayed_work(&dev->timeout);
1303
1304         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1305                  "%s: sent command 'SEQ_END' to coda\n", __func__);
1306         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1307                 v4l2_err(&dev->v4l2_dev,
1308                          "CODA_COMMAND_SEQ_END failed\n");
1309                 return -ETIMEDOUT;
1310         }
1311
1312         coda_free_framebuffers(ctx);
1313
1314         return 0;
1315 }
1316
1317 static struct vb2_ops coda_qops = {
1318         .queue_setup            = coda_queue_setup,
1319         .buf_prepare            = coda_buf_prepare,
1320         .buf_queue              = coda_buf_queue,
1321         .wait_prepare           = coda_wait_prepare,
1322         .wait_finish            = coda_wait_finish,
1323         .start_streaming        = coda_start_streaming,
1324         .stop_streaming         = coda_stop_streaming,
1325 };
1326
1327 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1328 {
1329         struct coda_ctx *ctx =
1330                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1331
1332         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1333                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1334
1335         switch (ctrl->id) {
1336         case V4L2_CID_HFLIP:
1337                 if (ctrl->val)
1338                         ctx->params.rot_mode |= CODA_MIR_HOR;
1339                 else
1340                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
1341                 break;
1342         case V4L2_CID_VFLIP:
1343                 if (ctrl->val)
1344                         ctx->params.rot_mode |= CODA_MIR_VER;
1345                 else
1346                         ctx->params.rot_mode &= ~CODA_MIR_VER;
1347                 break;
1348         case V4L2_CID_MPEG_VIDEO_BITRATE:
1349                 ctx->params.bitrate = ctrl->val / 1000;
1350                 break;
1351         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1352                 ctx->params.gop_size = ctrl->val;
1353                 break;
1354         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1355                 ctx->params.h264_intra_qp = ctrl->val;
1356                 break;
1357         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1358                 ctx->params.h264_inter_qp = ctrl->val;
1359                 break;
1360         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1361                 ctx->params.mpeg4_intra_qp = ctrl->val;
1362                 break;
1363         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1364                 ctx->params.mpeg4_inter_qp = ctrl->val;
1365                 break;
1366         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1367                 ctx->params.slice_mode = ctrl->val;
1368                 break;
1369         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1370                 ctx->params.slice_max_mb = ctrl->val;
1371                 break;
1372         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1373                 ctx->params.slice_max_bits = ctrl->val * 8;
1374                 break;
1375         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1376                 break;
1377         default:
1378                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1379                         "Invalid control, id=%d, val=%d\n",
1380                         ctrl->id, ctrl->val);
1381                 return -EINVAL;
1382         }
1383
1384         return 0;
1385 }
1386
1387 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1388         .s_ctrl = coda_s_ctrl,
1389 };
1390
1391 static int coda_ctrls_setup(struct coda_ctx *ctx)
1392 {
1393         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1394
1395         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1396                 V4L2_CID_HFLIP, 0, 1, 1, 0);
1397         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1398                 V4L2_CID_VFLIP, 0, 1, 1, 0);
1399         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1400                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1401         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1402                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1403         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1404                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1405         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1406                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1407         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1408                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1409         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1410                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1411         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1412                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1413                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1414                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1415         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1416                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1417         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1418                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
1419         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1420                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1421                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1422                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1423                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1424
1425         if (ctx->ctrls.error) {
1426                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1427                         ctx->ctrls.error);
1428                 return -EINVAL;
1429         }
1430
1431         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1432 }
1433
1434 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1435                       struct vb2_queue *dst_vq)
1436 {
1437         struct coda_ctx *ctx = priv;
1438         int ret;
1439
1440         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1441         src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
1442         src_vq->drv_priv = ctx;
1443         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1444         src_vq->ops = &coda_qops;
1445         src_vq->mem_ops = &vb2_dma_contig_memops;
1446         src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1447
1448         ret = vb2_queue_init(src_vq);
1449         if (ret)
1450                 return ret;
1451
1452         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1453         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
1454         dst_vq->drv_priv = ctx;
1455         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1456         dst_vq->ops = &coda_qops;
1457         dst_vq->mem_ops = &vb2_dma_contig_memops;
1458         dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1459
1460         return vb2_queue_init(dst_vq);
1461 }
1462
1463 static int coda_next_free_instance(struct coda_dev *dev)
1464 {
1465         return ffz(dev->instance_mask);
1466 }
1467
1468 static int coda_open(struct file *file)
1469 {
1470         struct coda_dev *dev = video_drvdata(file);
1471         struct coda_ctx *ctx = NULL;
1472         int ret = 0;
1473         int idx;
1474
1475         idx = coda_next_free_instance(dev);
1476         if (idx >= CODA_MAX_INSTANCES)
1477                 return -EBUSY;
1478         set_bit(idx, &dev->instance_mask);
1479
1480         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1481         if (!ctx)
1482                 return -ENOMEM;
1483
1484         v4l2_fh_init(&ctx->fh, video_devdata(file));
1485         file->private_data = &ctx->fh;
1486         v4l2_fh_add(&ctx->fh);
1487         ctx->dev = dev;
1488         ctx->idx = idx;
1489
1490         set_default_params(ctx);
1491         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1492                                          &coda_queue_init);
1493         if (IS_ERR(ctx->m2m_ctx)) {
1494                 ret = PTR_ERR(ctx->m2m_ctx);
1495
1496                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1497                          __func__, ret);
1498                 goto err;
1499         }
1500         ret = coda_ctrls_setup(ctx);
1501         if (ret) {
1502                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1503                 goto err;
1504         }
1505
1506         ctx->fh.ctrl_handler = &ctx->ctrls;
1507
1508         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1509                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1510         if (!ctx->parabuf.vaddr) {
1511                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1512                 ret = -ENOMEM;
1513                 goto err;
1514         }
1515
1516         coda_lock(ctx);
1517         list_add(&ctx->list, &dev->instances);
1518         coda_unlock(ctx);
1519
1520         clk_prepare_enable(dev->clk_per);
1521         clk_prepare_enable(dev->clk_ahb);
1522
1523         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1524                  ctx->idx, ctx);
1525
1526         return 0;
1527
1528 err:
1529         v4l2_fh_del(&ctx->fh);
1530         v4l2_fh_exit(&ctx->fh);
1531         kfree(ctx);
1532         return ret;
1533 }
1534
1535 static int coda_release(struct file *file)
1536 {
1537         struct coda_dev *dev = video_drvdata(file);
1538         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1539
1540         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1541                  ctx);
1542
1543         coda_lock(ctx);
1544         list_del(&ctx->list);
1545         coda_unlock(ctx);
1546
1547         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1548                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1549         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1550         v4l2_ctrl_handler_free(&ctx->ctrls);
1551         clk_disable_unprepare(dev->clk_per);
1552         clk_disable_unprepare(dev->clk_ahb);
1553         v4l2_fh_del(&ctx->fh);
1554         v4l2_fh_exit(&ctx->fh);
1555         clear_bit(ctx->idx, &dev->instance_mask);
1556         kfree(ctx);
1557
1558         return 0;
1559 }
1560
1561 static unsigned int coda_poll(struct file *file,
1562                                  struct poll_table_struct *wait)
1563 {
1564         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1565         int ret;
1566
1567         coda_lock(ctx);
1568         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1569         coda_unlock(ctx);
1570         return ret;
1571 }
1572
1573 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1574 {
1575         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1576
1577         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1578 }
1579
1580 static const struct v4l2_file_operations coda_fops = {
1581         .owner          = THIS_MODULE,
1582         .open           = coda_open,
1583         .release        = coda_release,
1584         .poll           = coda_poll,
1585         .unlocked_ioctl = video_ioctl2,
1586         .mmap           = coda_mmap,
1587 };
1588
1589 static irqreturn_t coda_irq_handler(int irq, void *data)
1590 {
1591         struct vb2_buffer *src_buf, *dst_buf;
1592         struct coda_dev *dev = data;
1593         u32 wr_ptr, start_ptr;
1594         struct coda_ctx *ctx;
1595
1596         cancel_delayed_work(&dev->timeout);
1597
1598         /* read status register to attend the IRQ */
1599         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1600         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1601                       CODA_REG_BIT_INT_CLEAR);
1602
1603         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1604         if (ctx == NULL) {
1605                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1606                 return IRQ_HANDLED;
1607         }
1608
1609         if (ctx->aborting) {
1610                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1611                          "task has been aborted\n");
1612                 return IRQ_HANDLED;
1613         }
1614
1615         if (coda_isbusy(ctx->dev)) {
1616                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1617                          "coda is still busy!!!!\n");
1618                 return IRQ_NONE;
1619         }
1620
1621         complete(&dev->done);
1622
1623         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1624         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1625
1626         /* Get results from the coda */
1627         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1628         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1629         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1630         /* Calculate bytesused field */
1631         if (dst_buf->v4l2_buf.sequence == 0) {
1632                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1633                                                 ctx->vpu_header_size[0] +
1634                                                 ctx->vpu_header_size[1] +
1635                                                 ctx->vpu_header_size[2];
1636         } else {
1637                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1638         }
1639
1640         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1641                  wr_ptr - start_ptr);
1642
1643         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1644         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1645
1646         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1647                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1648                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1649         } else {
1650                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1651                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1652         }
1653
1654         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1655         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1656
1657         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1658         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1659
1660         ctx->gopcounter--;
1661         if (ctx->gopcounter < 0)
1662                 ctx->gopcounter = ctx->params.gop_size - 1;
1663
1664         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1665                 "job finished: encoding frame (%d) (%s)\n",
1666                 dst_buf->v4l2_buf.sequence,
1667                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1668                 "KEYFRAME" : "PFRAME");
1669
1670         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1671
1672         return IRQ_HANDLED;
1673 }
1674
1675 static void coda_timeout(struct work_struct *work)
1676 {
1677         struct coda_ctx *ctx;
1678         struct coda_dev *dev = container_of(to_delayed_work(work),
1679                                             struct coda_dev, timeout);
1680
1681         if (completion_done(&dev->done))
1682                 return;
1683
1684         complete(&dev->done);
1685
1686         dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
1687
1688         mutex_lock(&dev->dev_mutex);
1689         list_for_each_entry(ctx, &dev->instances, list) {
1690                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1691                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1692         }
1693         mutex_unlock(&dev->dev_mutex);
1694 }
1695
1696 static u32 coda_supported_firmwares[] = {
1697         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1698         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1699 };
1700
1701 static bool coda_firmware_supported(u32 vernum)
1702 {
1703         int i;
1704
1705         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1706                 if (vernum == coda_supported_firmwares[i])
1707                         return true;
1708         return false;
1709 }
1710
1711 static char *coda_product_name(int product)
1712 {
1713         static char buf[9];
1714
1715         switch (product) {
1716         case CODA_DX6:
1717                 return "CodaDx6";
1718         case CODA_7541:
1719                 return "CODA7541";
1720         default:
1721                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1722                 return buf;
1723         }
1724 }
1725
1726 static int coda_hw_init(struct coda_dev *dev)
1727 {
1728         u16 product, major, minor, release;
1729         u32 data;
1730         u16 *p;
1731         int i;
1732
1733         clk_prepare_enable(dev->clk_per);
1734         clk_prepare_enable(dev->clk_ahb);
1735
1736         /*
1737          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1738          * The 16-bit chars in the code buffer are in memory access
1739          * order, re-sort them to CODA order for register download.
1740          * Data in this SRAM survives a reboot.
1741          */
1742         p = (u16 *)dev->codebuf.vaddr;
1743         if (dev->devtype->product == CODA_DX6) {
1744                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1745                         data = CODA_DOWN_ADDRESS_SET(i) |
1746                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1747                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1748                 }
1749         } else {
1750                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1751                         data = CODA_DOWN_ADDRESS_SET(i) |
1752                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1753                                                         3 - (i % 4)]);
1754                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1755                 }
1756         }
1757
1758         /* Tell the BIT where to find everything it needs */
1759         coda_write(dev, dev->workbuf.paddr,
1760                       CODA_REG_BIT_WORK_BUF_ADDR);
1761         coda_write(dev, dev->codebuf.paddr,
1762                       CODA_REG_BIT_CODE_BUF_ADDR);
1763         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1764
1765         /* Set default values */
1766         switch (dev->devtype->product) {
1767         case CODA_DX6:
1768                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1769                 break;
1770         default:
1771                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1772         }
1773         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1774
1775         if (dev->devtype->product != CODA_DX6)
1776                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1777
1778         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1779                       CODA_REG_BIT_INT_ENABLE);
1780
1781         /* Reset VPU and start processor */
1782         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1783         data |= CODA_REG_RESET_ENABLE;
1784         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1785         udelay(10);
1786         data &= ~CODA_REG_RESET_ENABLE;
1787         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1788         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1789
1790         /* Load firmware */
1791         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1792         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1793         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1794         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1795         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1796         if (coda_wait_timeout(dev)) {
1797                 clk_disable_unprepare(dev->clk_per);
1798                 clk_disable_unprepare(dev->clk_ahb);
1799                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1800                 return -EIO;
1801         }
1802
1803         /* Check we are compatible with the loaded firmware */
1804         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1805         product = CODA_FIRMWARE_PRODUCT(data);
1806         major = CODA_FIRMWARE_MAJOR(data);
1807         minor = CODA_FIRMWARE_MINOR(data);
1808         release = CODA_FIRMWARE_RELEASE(data);
1809
1810         clk_disable_unprepare(dev->clk_per);
1811         clk_disable_unprepare(dev->clk_ahb);
1812
1813         if (product != dev->devtype->product) {
1814                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1815                          " Version: %u.%u.%u\n",
1816                          coda_product_name(dev->devtype->product),
1817                          coda_product_name(product), major, minor, release);
1818                 return -EINVAL;
1819         }
1820
1821         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1822                   coda_product_name(product));
1823
1824         if (coda_firmware_supported(data)) {
1825                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1826                           major, minor, release);
1827         } else {
1828                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1829                           "%u.%u.%u\n", major, minor, release);
1830         }
1831
1832         return 0;
1833 }
1834
1835 static void coda_fw_callback(const struct firmware *fw, void *context)
1836 {
1837         struct coda_dev *dev = context;
1838         struct platform_device *pdev = dev->plat_dev;
1839         int ret;
1840
1841         if (!fw) {
1842                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1843                 return;
1844         }
1845
1846         /* allocate auxiliary per-device code buffer for the BIT processor */
1847         dev->codebuf.size = fw->size;
1848         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1849                                                     &dev->codebuf.paddr,
1850                                                     GFP_KERNEL);
1851         if (!dev->codebuf.vaddr) {
1852                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1853                 return;
1854         }
1855
1856         /* Copy the whole firmware image to the code buffer */
1857         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1858         release_firmware(fw);
1859
1860         ret = coda_hw_init(dev);
1861         if (ret) {
1862                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1863                 return;
1864         }
1865
1866         dev->vfd.fops   = &coda_fops,
1867         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1868         dev->vfd.release        = video_device_release_empty,
1869         dev->vfd.lock   = &dev->dev_mutex;
1870         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1871         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1872         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1873         video_set_drvdata(&dev->vfd, dev);
1874
1875         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1876         if (IS_ERR(dev->alloc_ctx)) {
1877                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1878                 return;
1879         }
1880
1881         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1882         if (IS_ERR(dev->m2m_dev)) {
1883                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1884                 goto rel_ctx;
1885         }
1886
1887         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1888         if (ret) {
1889                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1890                 goto rel_m2m;
1891         }
1892         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1893                   dev->vfd.num);
1894
1895         return;
1896
1897 rel_m2m:
1898         v4l2_m2m_release(dev->m2m_dev);
1899 rel_ctx:
1900         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1901 }
1902
1903 static int coda_firmware_request(struct coda_dev *dev)
1904 {
1905         char *fw = dev->devtype->firmware;
1906
1907         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1908                 coda_product_name(dev->devtype->product));
1909
1910         return request_firmware_nowait(THIS_MODULE, true,
1911                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1912 }
1913
1914 enum coda_platform {
1915         CODA_IMX27,
1916         CODA_IMX53,
1917 };
1918
1919 static const struct coda_devtype coda_devdata[] = {
1920         [CODA_IMX27] = {
1921                 .firmware    = "v4l-codadx6-imx27.bin",
1922                 .product     = CODA_DX6,
1923                 .formats     = codadx6_formats,
1924                 .num_formats = ARRAY_SIZE(codadx6_formats),
1925         },
1926         [CODA_IMX53] = {
1927                 .firmware    = "v4l-coda7541-imx53.bin",
1928                 .product     = CODA_7541,
1929                 .formats     = coda7_formats,
1930                 .num_formats = ARRAY_SIZE(coda7_formats),
1931         },
1932 };
1933
1934 static struct platform_device_id coda_platform_ids[] = {
1935         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1936         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
1937         { /* sentinel */ }
1938 };
1939 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1940
1941 #ifdef CONFIG_OF
1942 static const struct of_device_id coda_dt_ids[] = {
1943         { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1944         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1945         { /* sentinel */ }
1946 };
1947 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1948 #endif
1949
1950 static int coda_probe(struct platform_device *pdev)
1951 {
1952         const struct of_device_id *of_id =
1953                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1954         const struct platform_device_id *pdev_id;
1955         struct coda_platform_data *pdata = pdev->dev.platform_data;
1956         struct device_node *np = pdev->dev.of_node;
1957         struct gen_pool *pool;
1958         struct coda_dev *dev;
1959         struct resource *res;
1960         int ret, irq;
1961
1962         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1963         if (!dev) {
1964                 dev_err(&pdev->dev, "Not enough memory for %s\n",
1965                         CODA_NAME);
1966                 return -ENOMEM;
1967         }
1968
1969         spin_lock_init(&dev->irqlock);
1970         INIT_LIST_HEAD(&dev->instances);
1971         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
1972         init_completion(&dev->done);
1973         complete(&dev->done);
1974
1975         dev->plat_dev = pdev;
1976         dev->clk_per = devm_clk_get(&pdev->dev, "per");
1977         if (IS_ERR(dev->clk_per)) {
1978                 dev_err(&pdev->dev, "Could not get per clock\n");
1979                 return PTR_ERR(dev->clk_per);
1980         }
1981
1982         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1983         if (IS_ERR(dev->clk_ahb)) {
1984                 dev_err(&pdev->dev, "Could not get ahb clock\n");
1985                 return PTR_ERR(dev->clk_ahb);
1986         }
1987
1988         /* Get  memory for physical registers */
1989         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1990         if (res == NULL) {
1991                 dev_err(&pdev->dev, "failed to get memory region resource\n");
1992                 return -ENOENT;
1993         }
1994
1995         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
1996         if (IS_ERR(dev->regs_base))
1997                 return PTR_ERR(dev->regs_base);
1998
1999         /* IRQ */
2000         irq = platform_get_irq(pdev, 0);
2001         if (irq < 0) {
2002                 dev_err(&pdev->dev, "failed to get irq resource\n");
2003                 return -ENOENT;
2004         }
2005
2006         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
2007                 0, CODA_NAME, dev) < 0) {
2008                 dev_err(&pdev->dev, "failed to request irq\n");
2009                 return -ENOENT;
2010         }
2011
2012         /* Get IRAM pool from device tree or platform data */
2013         pool = of_get_named_gen_pool(np, "iram", 0);
2014         if (!pool && pdata)
2015                 pool = dev_get_gen_pool(pdata->iram_dev);
2016         if (!pool) {
2017                 dev_err(&pdev->dev, "iram pool not available\n");
2018                 return -ENOMEM;
2019         }
2020         dev->iram_pool = pool;
2021
2022         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
2023         if (ret)
2024                 return ret;
2025
2026         mutex_init(&dev->dev_mutex);
2027
2028         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
2029
2030         if (of_id) {
2031                 dev->devtype = of_id->data;
2032         } else if (pdev_id) {
2033                 dev->devtype = &coda_devdata[pdev_id->driver_data];
2034         } else {
2035                 v4l2_device_unregister(&dev->v4l2_dev);
2036                 return -EINVAL;
2037         }
2038
2039         /* allocate auxiliary per-device buffers for the BIT processor */
2040         switch (dev->devtype->product) {
2041         case CODA_DX6:
2042                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
2043                 break;
2044         default:
2045                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
2046         }
2047         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
2048                                                     &dev->workbuf.paddr,
2049                                                     GFP_KERNEL);
2050         if (!dev->workbuf.vaddr) {
2051                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
2052                 v4l2_device_unregister(&dev->v4l2_dev);
2053                 return -ENOMEM;
2054         }
2055
2056         if (dev->devtype->product == CODA_DX6)
2057                 dev->iram_size = CODADX6_IRAM_SIZE;
2058         else
2059                 dev->iram_size = CODA7_IRAM_SIZE;
2060         dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
2061         if (!dev->iram_vaddr) {
2062                 dev_err(&pdev->dev, "unable to alloc iram\n");
2063                 return -ENOMEM;
2064         }
2065         dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
2066                                                 dev->iram_vaddr);
2067
2068         platform_set_drvdata(pdev, dev);
2069
2070         return coda_firmware_request(dev);
2071 }
2072
2073 static int coda_remove(struct platform_device *pdev)
2074 {
2075         struct coda_dev *dev = platform_get_drvdata(pdev);
2076
2077         video_unregister_device(&dev->vfd);
2078         if (dev->m2m_dev)
2079                 v4l2_m2m_release(dev->m2m_dev);
2080         if (dev->alloc_ctx)
2081                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2082         v4l2_device_unregister(&dev->v4l2_dev);
2083         if (dev->iram_vaddr)
2084                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
2085         if (dev->codebuf.vaddr)
2086                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2087                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
2088         if (dev->workbuf.vaddr)
2089                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2090                           dev->workbuf.paddr);
2091         return 0;
2092 }
2093
2094 static struct platform_driver coda_driver = {
2095         .probe  = coda_probe,
2096         .remove = coda_remove,
2097         .driver = {
2098                 .name   = CODA_NAME,
2099                 .owner  = THIS_MODULE,
2100                 .of_match_table = of_match_ptr(coda_dt_ids),
2101         },
2102         .id_table = coda_platform_ids,
2103 };
2104
2105 module_platform_driver(coda_driver);
2106
2107 MODULE_LICENSE("GPL");
2108 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2109 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");