21c31bc5c380eccca47d298653298a30c1493f76
[platform/adaptation/renesas_rcar/renesas_kernel.git] / drivers / media / platform / coda.c
1 /*
2  * Coda multi-standard codec IP
3  *
4  * Copyright (C) 2012 Vista Silicon S.L.
5  *    Javier Martin, <javier.martin@vista-silicon.com>
6  *    Xavier Duret
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/firmware.h>
17 #include <linux/genalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/irq.h>
21 #include <linux/kfifo.h>
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <linux/videodev2.h>
27 #include <linux/of.h>
28 #include <linux/platform_data/coda.h>
29
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-event.h>
33 #include <media/v4l2-ioctl.h>
34 #include <media/v4l2-mem2mem.h>
35 #include <media/videobuf2-core.h>
36 #include <media/videobuf2-dma-contig.h>
37
38 #include "coda.h"
39
40 #define CODA_NAME               "coda"
41
42 #define CODADX6_MAX_INSTANCES   4
43
44 #define CODA_FMO_BUF_SIZE       32
45 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
46 #define CODA7_WORK_BUF_SIZE     (128 * 1024)
47 #define CODA7_TEMP_BUF_SIZE     (304 * 1024)
48 #define CODA_PARA_BUF_SIZE      (10 * 1024)
49 #define CODA_ISRAM_SIZE (2048 * 2)
50 #define CODADX6_IRAM_SIZE       0xb000
51 #define CODA7_IRAM_SIZE         0x14000
52
53 #define CODA7_PS_BUF_SIZE       0x28000
54
55 #define CODA_MAX_FRAMEBUFFERS   8
56
57 #define CODA_MAX_FRAME_SIZE     0x100000
58 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
59 #define CODA_DEFAULT_GAMMA              4096
60
61 #define MIN_W 176
62 #define MIN_H 144
63
64 #define S_ALIGN         1 /* multiple of 2 */
65 #define W_ALIGN         1 /* multiple of 2 */
66 #define H_ALIGN         1 /* multiple of 2 */
67
68 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
69
70 static int coda_debug;
71 module_param(coda_debug, int, 0644);
72 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
73
74 enum {
75         V4L2_M2M_SRC = 0,
76         V4L2_M2M_DST = 1,
77 };
78
79 enum coda_inst_type {
80         CODA_INST_ENCODER,
81         CODA_INST_DECODER,
82 };
83
84 enum coda_product {
85         CODA_DX6 = 0xf001,
86         CODA_7541 = 0xf012,
87 };
88
89 struct coda_fmt {
90         char *name;
91         u32 fourcc;
92 };
93
94 struct coda_codec {
95         u32 mode;
96         u32 src_fourcc;
97         u32 dst_fourcc;
98         u32 max_w;
99         u32 max_h;
100 };
101
102 struct coda_devtype {
103         char                    *firmware;
104         enum coda_product       product;
105         struct coda_codec       *codecs;
106         unsigned int            num_codecs;
107         size_t                  workbuf_size;
108 };
109
110 /* Per-queue, driver-specific private data */
111 struct coda_q_data {
112         unsigned int            width;
113         unsigned int            height;
114         unsigned int            sizeimage;
115         unsigned int            fourcc;
116 };
117
118 struct coda_aux_buf {
119         void                    *vaddr;
120         dma_addr_t              paddr;
121         u32                     size;
122 };
123
124 struct coda_dev {
125         struct v4l2_device      v4l2_dev;
126         struct video_device     vfd;
127         struct platform_device  *plat_dev;
128         const struct coda_devtype *devtype;
129
130         void __iomem            *regs_base;
131         struct clk              *clk_per;
132         struct clk              *clk_ahb;
133
134         struct coda_aux_buf     codebuf;
135         struct coda_aux_buf     tempbuf;
136         struct coda_aux_buf     workbuf;
137         struct gen_pool         *iram_pool;
138         long unsigned int       iram_vaddr;
139         long unsigned int       iram_paddr;
140         unsigned long           iram_size;
141
142         spinlock_t              irqlock;
143         struct mutex            dev_mutex;
144         struct mutex            coda_mutex;
145         struct v4l2_m2m_dev     *m2m_dev;
146         struct vb2_alloc_ctx    *alloc_ctx;
147         struct list_head        instances;
148         unsigned long           instance_mask;
149         struct delayed_work     timeout;
150 };
151
152 struct coda_params {
153         u8                      rot_mode;
154         u8                      h264_intra_qp;
155         u8                      h264_inter_qp;
156         u8                      mpeg4_intra_qp;
157         u8                      mpeg4_inter_qp;
158         u8                      gop_size;
159         int                     codec_mode;
160         int                     codec_mode_aux;
161         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
162         u32                     framerate;
163         u16                     bitrate;
164         u32                     slice_max_bits;
165         u32                     slice_max_mb;
166 };
167
168 struct coda_iram_info {
169         u32             axi_sram_use;
170         phys_addr_t     buf_bit_use;
171         phys_addr_t     buf_ip_ac_dc_use;
172         phys_addr_t     buf_dbk_y_use;
173         phys_addr_t     buf_dbk_c_use;
174         phys_addr_t     buf_ovl_use;
175         phys_addr_t     buf_btp_use;
176         phys_addr_t     search_ram_paddr;
177         int             search_ram_size;
178 };
179
180 struct coda_ctx {
181         struct coda_dev                 *dev;
182         struct mutex                    buffer_mutex;
183         struct list_head                list;
184         struct work_struct              skip_run;
185         int                             aborting;
186         int                             initialized;
187         int                             streamon_out;
188         int                             streamon_cap;
189         u32                             isequence;
190         u32                             qsequence;
191         u32                             osequence;
192         struct coda_q_data              q_data[2];
193         enum coda_inst_type             inst_type;
194         struct coda_codec               *codec;
195         enum v4l2_colorspace            colorspace;
196         struct coda_params              params;
197         struct v4l2_m2m_ctx             *m2m_ctx;
198         struct v4l2_ctrl_handler        ctrls;
199         struct v4l2_fh                  fh;
200         int                             gopcounter;
201         int                             runcounter;
202         char                            vpu_header[3][64];
203         int                             vpu_header_size[3];
204         struct kfifo                    bitstream_fifo;
205         struct mutex                    bitstream_mutex;
206         struct coda_aux_buf             bitstream;
207         bool                            prescan_failed;
208         struct coda_aux_buf             parabuf;
209         struct coda_aux_buf             psbuf;
210         struct coda_aux_buf             slicebuf;
211         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
212         struct coda_aux_buf             workbuf;
213         int                             num_internal_frames;
214         int                             idx;
215         int                             reg_idx;
216         struct coda_iram_info           iram_info;
217         u32                             bit_stream_param;
218         u32                             frm_dis_flg;
219         int                             display_idx;
220 };
221
222 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
223                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
224 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
225
226 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
227 {
228         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
229                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
230         writel(data, dev->regs_base + reg);
231 }
232
233 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
234 {
235         u32 data;
236         data = readl(dev->regs_base + reg);
237         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
238                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
239         return data;
240 }
241
242 static inline unsigned long coda_isbusy(struct coda_dev *dev)
243 {
244         return coda_read(dev, CODA_REG_BIT_BUSY);
245 }
246
247 static inline int coda_is_initialized(struct coda_dev *dev)
248 {
249         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
250 }
251
252 static int coda_wait_timeout(struct coda_dev *dev)
253 {
254         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
255
256         while (coda_isbusy(dev)) {
257                 if (time_after(jiffies, timeout))
258                         return -ETIMEDOUT;
259         }
260         return 0;
261 }
262
263 static void coda_command_async(struct coda_ctx *ctx, int cmd)
264 {
265         struct coda_dev *dev = ctx->dev;
266
267         if (dev->devtype->product == CODA_7541) {
268                 /* Restore context related registers to CODA */
269                 coda_write(dev, ctx->bit_stream_param,
270                                 CODA_REG_BIT_BIT_STREAM_PARAM);
271                 coda_write(dev, ctx->frm_dis_flg,
272                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
273                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
274         }
275
276         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
277
278         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
279         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
280         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
281
282         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
283 }
284
285 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
286 {
287         struct coda_dev *dev = ctx->dev;
288
289         coda_command_async(ctx, cmd);
290         return coda_wait_timeout(dev);
291 }
292
293 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
294                                          enum v4l2_buf_type type)
295 {
296         switch (type) {
297         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
298                 return &(ctx->q_data[V4L2_M2M_SRC]);
299         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
300                 return &(ctx->q_data[V4L2_M2M_DST]);
301         default:
302                 BUG();
303         }
304         return NULL;
305 }
306
307 /*
308  * Array of all formats supported by any version of Coda:
309  */
310 static struct coda_fmt coda_formats[] = {
311         {
312                 .name = "YUV 4:2:0 Planar, YCbCr",
313                 .fourcc = V4L2_PIX_FMT_YUV420,
314         },
315         {
316                 .name = "YUV 4:2:0 Planar, YCrCb",
317                 .fourcc = V4L2_PIX_FMT_YVU420,
318         },
319         {
320                 .name = "H264 Encoded Stream",
321                 .fourcc = V4L2_PIX_FMT_H264,
322         },
323         {
324                 .name = "MPEG4 Encoded Stream",
325                 .fourcc = V4L2_PIX_FMT_MPEG4,
326         },
327 };
328
329 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
330         { mode, src_fourcc, dst_fourcc, max_w, max_h }
331
332 /*
333  * Arrays of codecs supported by each given version of Coda:
334  *  i.MX27 -> codadx6
335  *  i.MX5x -> coda7
336  *  i.MX6  -> coda960
337  * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
338  */
339 static struct coda_codec codadx6_codecs[] = {
340         CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,  720, 576),
341         CODA_CODEC(CODADX6_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
342 };
343
344 static struct coda_codec coda7_codecs[] = {
345         CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1280, 720),
346         CODA_CODEC(CODA7_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1280, 720),
347         CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264,   V4L2_PIX_FMT_YUV420, 1920, 1080),
348         CODA_CODEC(CODA7_MODE_DECODE_MP4,  V4L2_PIX_FMT_MPEG4,  V4L2_PIX_FMT_YUV420, 1920, 1080),
349 };
350
351 static bool coda_format_is_yuv(u32 fourcc)
352 {
353         switch (fourcc) {
354         case V4L2_PIX_FMT_YUV420:
355         case V4L2_PIX_FMT_YVU420:
356                 return true;
357         default:
358                 return false;
359         }
360 }
361
362 /*
363  * Normalize all supported YUV 4:2:0 formats to the value used in the codec
364  * tables.
365  */
366 static u32 coda_format_normalize_yuv(u32 fourcc)
367 {
368         return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
369 }
370
371 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
372                                           int dst_fourcc)
373 {
374         struct coda_codec *codecs = dev->devtype->codecs;
375         int num_codecs = dev->devtype->num_codecs;
376         int k;
377
378         src_fourcc = coda_format_normalize_yuv(src_fourcc);
379         dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
380         if (src_fourcc == dst_fourcc)
381                 return NULL;
382
383         for (k = 0; k < num_codecs; k++) {
384                 if (codecs[k].src_fourcc == src_fourcc &&
385                     codecs[k].dst_fourcc == dst_fourcc)
386                         break;
387         }
388
389         if (k == num_codecs)
390                 return NULL;
391
392         return &codecs[k];
393 }
394
395 static void coda_get_max_dimensions(struct coda_dev *dev,
396                                     struct coda_codec *codec,
397                                     int *max_w, int *max_h)
398 {
399         struct coda_codec *codecs = dev->devtype->codecs;
400         int num_codecs = dev->devtype->num_codecs;
401         unsigned int w, h;
402         int k;
403
404         if (codec) {
405                 w = codec->max_w;
406                 h = codec->max_h;
407         } else {
408                 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
409                         w = max(w, codecs[k].max_w);
410                         h = max(h, codecs[k].max_h);
411                 }
412         }
413
414         if (max_w)
415                 *max_w = w;
416         if (max_h)
417                 *max_h = h;
418 }
419
420 static char *coda_product_name(int product)
421 {
422         static char buf[9];
423
424         switch (product) {
425         case CODA_DX6:
426                 return "CodaDx6";
427         case CODA_7541:
428                 return "CODA7541";
429         default:
430                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
431                 return buf;
432         }
433 }
434
435 /*
436  * V4L2 ioctl() operations.
437  */
438 static int coda_querycap(struct file *file, void *priv,
439                          struct v4l2_capability *cap)
440 {
441         struct coda_ctx *ctx = fh_to_ctx(priv);
442
443         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
444         strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
445                 sizeof(cap->card));
446         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
447         /*
448          * This is only a mem-to-mem video device. The capture and output
449          * device capability flags are left only for backward compatibility
450          * and are scheduled for removal.
451          */
452         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
453                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
454         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
455
456         return 0;
457 }
458
459 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
460                         enum v4l2_buf_type type, int src_fourcc)
461 {
462         struct coda_ctx *ctx = fh_to_ctx(priv);
463         struct coda_codec *codecs = ctx->dev->devtype->codecs;
464         struct coda_fmt *formats = coda_formats;
465         struct coda_fmt *fmt;
466         int num_codecs = ctx->dev->devtype->num_codecs;
467         int num_formats = ARRAY_SIZE(coda_formats);
468         int i, k, num = 0;
469
470         for (i = 0; i < num_formats; i++) {
471                 /* Both uncompressed formats are always supported */
472                 if (coda_format_is_yuv(formats[i].fourcc) &&
473                     !coda_format_is_yuv(src_fourcc)) {
474                         if (num == f->index)
475                                 break;
476                         ++num;
477                         continue;
478                 }
479                 /* Compressed formats may be supported, check the codec list */
480                 for (k = 0; k < num_codecs; k++) {
481                         /* if src_fourcc is set, only consider matching codecs */
482                         if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
483                             formats[i].fourcc == codecs[k].dst_fourcc &&
484                             (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
485                                 break;
486                         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
487                             formats[i].fourcc == codecs[k].src_fourcc)
488                                 break;
489                 }
490                 if (k < num_codecs) {
491                         if (num == f->index)
492                                 break;
493                         ++num;
494                 }
495         }
496
497         if (i < num_formats) {
498                 fmt = &formats[i];
499                 strlcpy(f->description, fmt->name, sizeof(f->description));
500                 f->pixelformat = fmt->fourcc;
501                 if (!coda_format_is_yuv(fmt->fourcc))
502                         f->flags |= V4L2_FMT_FLAG_COMPRESSED;
503                 return 0;
504         }
505
506         /* Format not found */
507         return -EINVAL;
508 }
509
510 static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
511                                  struct v4l2_fmtdesc *f)
512 {
513         struct coda_ctx *ctx = fh_to_ctx(priv);
514         struct vb2_queue *src_vq;
515         struct coda_q_data *q_data_src;
516
517         /* If the source format is already fixed, only list matching formats */
518         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
519         if (vb2_is_streaming(src_vq)) {
520                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
521
522                 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
523                                 q_data_src->fourcc);
524         }
525
526         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
527 }
528
529 static int coda_enum_fmt_vid_out(struct file *file, void *priv,
530                                  struct v4l2_fmtdesc *f)
531 {
532         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
533 }
534
535 static int coda_g_fmt(struct file *file, void *priv,
536                       struct v4l2_format *f)
537 {
538         struct vb2_queue *vq;
539         struct coda_q_data *q_data;
540         struct coda_ctx *ctx = fh_to_ctx(priv);
541
542         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
543         if (!vq)
544                 return -EINVAL;
545
546         q_data = get_q_data(ctx, f->type);
547
548         f->fmt.pix.field        = V4L2_FIELD_NONE;
549         f->fmt.pix.pixelformat  = q_data->fourcc;
550         f->fmt.pix.width        = q_data->width;
551         f->fmt.pix.height       = q_data->height;
552         if (coda_format_is_yuv(f->fmt.pix.pixelformat))
553                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
554         else /* encoded formats h.264/mpeg4 */
555                 f->fmt.pix.bytesperline = 0;
556
557         f->fmt.pix.sizeimage    = q_data->sizeimage;
558         f->fmt.pix.colorspace   = ctx->colorspace;
559
560         return 0;
561 }
562
563 static int coda_try_fmt(struct coda_ctx *ctx, struct coda_codec *codec,
564                         struct v4l2_format *f)
565 {
566         struct coda_dev *dev = ctx->dev;
567         struct coda_q_data *q_data;
568         unsigned int max_w, max_h;
569         enum v4l2_field field;
570
571         field = f->fmt.pix.field;
572         if (field == V4L2_FIELD_ANY)
573                 field = V4L2_FIELD_NONE;
574         else if (V4L2_FIELD_NONE != field)
575                 return -EINVAL;
576
577         /* V4L2 specification suggests the driver corrects the format struct
578          * if any of the dimensions is unsupported */
579         f->fmt.pix.field = field;
580
581         coda_get_max_dimensions(dev, codec, &max_w, &max_h);
582         v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
583                               &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
584                               S_ALIGN);
585
586         switch (f->fmt.pix.pixelformat) {
587         case V4L2_PIX_FMT_YUV420:
588         case V4L2_PIX_FMT_YVU420:
589         case V4L2_PIX_FMT_H264:
590         case V4L2_PIX_FMT_MPEG4:
591         case V4L2_PIX_FMT_JPEG:
592                 break;
593         default:
594                 q_data = get_q_data(ctx, f->type);
595                 f->fmt.pix.pixelformat = q_data->fourcc;
596         }
597
598         switch (f->fmt.pix.pixelformat) {
599         case V4L2_PIX_FMT_YUV420:
600         case V4L2_PIX_FMT_YVU420:
601                 /* Frame stride must be multiple of 8 */
602                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
603                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
604                                         f->fmt.pix.height * 3 / 2;
605                 break;
606         case V4L2_PIX_FMT_H264:
607         case V4L2_PIX_FMT_MPEG4:
608         case V4L2_PIX_FMT_JPEG:
609                 f->fmt.pix.bytesperline = 0;
610                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
611                 break;
612         default:
613                 BUG();
614         }
615
616         return 0;
617 }
618
619 static int coda_try_fmt_vid_cap(struct file *file, void *priv,
620                                 struct v4l2_format *f)
621 {
622         struct coda_ctx *ctx = fh_to_ctx(priv);
623         struct coda_codec *codec;
624         struct vb2_queue *src_vq;
625         int ret;
626
627         /*
628          * If the source format is already fixed, try to find a codec that
629          * converts to the given destination format
630          */
631         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
632         if (vb2_is_streaming(src_vq)) {
633                 struct coda_q_data *q_data_src;
634
635                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
636                 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
637                                         f->fmt.pix.pixelformat);
638                 if (!codec)
639                         return -EINVAL;
640         } else {
641                 /* Otherwise determine codec by encoded format, if possible */
642                 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
643                                         f->fmt.pix.pixelformat);
644         }
645
646         f->fmt.pix.colorspace = ctx->colorspace;
647
648         ret = coda_try_fmt(ctx, codec, f);
649         if (ret < 0)
650                 return ret;
651
652         /* The h.264 decoder only returns complete 16x16 macroblocks */
653         if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
654                 f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
655                 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
656                 f->fmt.pix.bytesperline = f->fmt.pix.width;
657                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
658                                        f->fmt.pix.height * 3 / 2;
659         }
660
661         return 0;
662 }
663
664 static int coda_try_fmt_vid_out(struct file *file, void *priv,
665                                 struct v4l2_format *f)
666 {
667         struct coda_ctx *ctx = fh_to_ctx(priv);
668         struct coda_codec *codec;
669
670         /* Determine codec by encoded format, returns NULL if raw or invalid */
671         codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
672                                 V4L2_PIX_FMT_YUV420);
673
674         if (!f->fmt.pix.colorspace)
675                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
676
677         return coda_try_fmt(ctx, codec, f);
678 }
679
680 static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
681 {
682         struct coda_q_data *q_data;
683         struct vb2_queue *vq;
684
685         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
686         if (!vq)
687                 return -EINVAL;
688
689         q_data = get_q_data(ctx, f->type);
690         if (!q_data)
691                 return -EINVAL;
692
693         if (vb2_is_busy(vq)) {
694                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
695                 return -EBUSY;
696         }
697
698         q_data->fourcc = f->fmt.pix.pixelformat;
699         q_data->width = f->fmt.pix.width;
700         q_data->height = f->fmt.pix.height;
701         q_data->sizeimage = f->fmt.pix.sizeimage;
702
703         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
704                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
705                 f->type, q_data->width, q_data->height, q_data->fourcc);
706
707         return 0;
708 }
709
710 static int coda_s_fmt_vid_cap(struct file *file, void *priv,
711                               struct v4l2_format *f)
712 {
713         struct coda_ctx *ctx = fh_to_ctx(priv);
714         int ret;
715
716         ret = coda_try_fmt_vid_cap(file, priv, f);
717         if (ret)
718                 return ret;
719
720         return coda_s_fmt(ctx, f);
721 }
722
723 static int coda_s_fmt_vid_out(struct file *file, void *priv,
724                               struct v4l2_format *f)
725 {
726         struct coda_ctx *ctx = fh_to_ctx(priv);
727         int ret;
728
729         ret = coda_try_fmt_vid_out(file, priv, f);
730         if (ret)
731                 return ret;
732
733         ret = coda_s_fmt(ctx, f);
734         if (ret)
735                 ctx->colorspace = f->fmt.pix.colorspace;
736
737         return ret;
738 }
739
740 static int coda_reqbufs(struct file *file, void *priv,
741                         struct v4l2_requestbuffers *reqbufs)
742 {
743         struct coda_ctx *ctx = fh_to_ctx(priv);
744
745         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
746 }
747
748 static int coda_querybuf(struct file *file, void *priv,
749                          struct v4l2_buffer *buf)
750 {
751         struct coda_ctx *ctx = fh_to_ctx(priv);
752
753         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
754 }
755
756 static int coda_qbuf(struct file *file, void *priv,
757                      struct v4l2_buffer *buf)
758 {
759         struct coda_ctx *ctx = fh_to_ctx(priv);
760
761         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
762 }
763
764 static int coda_expbuf(struct file *file, void *priv,
765                        struct v4l2_exportbuffer *eb)
766 {
767         struct coda_ctx *ctx = fh_to_ctx(priv);
768
769         return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
770 }
771
772 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
773                                       struct v4l2_buffer *buf)
774 {
775         struct vb2_queue *src_vq;
776
777         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
778
779         return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
780                 (buf->sequence == (ctx->qsequence - 1)));
781 }
782
783 static int coda_dqbuf(struct file *file, void *priv,
784                       struct v4l2_buffer *buf)
785 {
786         struct coda_ctx *ctx = fh_to_ctx(priv);
787         int ret;
788
789         ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
790
791         /* If this is the last capture buffer, emit an end-of-stream event */
792         if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
793             coda_buf_is_end_of_stream(ctx, buf)) {
794                 const struct v4l2_event eos_event = {
795                         .type = V4L2_EVENT_EOS
796                 };
797
798                 v4l2_event_queue_fh(&ctx->fh, &eos_event);
799         }
800
801         return ret;
802 }
803
804 static int coda_create_bufs(struct file *file, void *priv,
805                             struct v4l2_create_buffers *create)
806 {
807         struct coda_ctx *ctx = fh_to_ctx(priv);
808
809         return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
810 }
811
812 static int coda_streamon(struct file *file, void *priv,
813                          enum v4l2_buf_type type)
814 {
815         struct coda_ctx *ctx = fh_to_ctx(priv);
816
817         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
818 }
819
820 static int coda_streamoff(struct file *file, void *priv,
821                           enum v4l2_buf_type type)
822 {
823         struct coda_ctx *ctx = fh_to_ctx(priv);
824         int ret;
825
826         /*
827          * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
828          * We therefore have to lock it against running hardware in this context,
829          * which still needs the buffers.
830          */
831         mutex_lock(&ctx->buffer_mutex);
832         ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
833         mutex_unlock(&ctx->buffer_mutex);
834
835         return ret;
836 }
837
838 static int coda_try_decoder_cmd(struct file *file, void *fh,
839                                 struct v4l2_decoder_cmd *dc)
840 {
841         if (dc->cmd != V4L2_DEC_CMD_STOP)
842                 return -EINVAL;
843
844         if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
845                 return -EINVAL;
846
847         if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
848                 return -EINVAL;
849
850         return 0;
851 }
852
853 static int coda_decoder_cmd(struct file *file, void *fh,
854                             struct v4l2_decoder_cmd *dc)
855 {
856         struct coda_ctx *ctx = fh_to_ctx(fh);
857         int ret;
858
859         ret = coda_try_decoder_cmd(file, fh, dc);
860         if (ret < 0)
861                 return ret;
862
863         /* Ignore decoder stop command silently in encoder context */
864         if (ctx->inst_type != CODA_INST_DECODER)
865                 return 0;
866
867         /* Set the strem-end flag on this context */
868         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
869
870         return 0;
871 }
872
873 static int coda_subscribe_event(struct v4l2_fh *fh,
874                                 const struct v4l2_event_subscription *sub)
875 {
876         switch (sub->type) {
877         case V4L2_EVENT_EOS:
878                 return v4l2_event_subscribe(fh, sub, 0, NULL);
879         default:
880                 return v4l2_ctrl_subscribe_event(fh, sub);
881         }
882 }
883
884 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
885         .vidioc_querycap        = coda_querycap,
886
887         .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
888         .vidioc_g_fmt_vid_cap   = coda_g_fmt,
889         .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
890         .vidioc_s_fmt_vid_cap   = coda_s_fmt_vid_cap,
891
892         .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
893         .vidioc_g_fmt_vid_out   = coda_g_fmt,
894         .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
895         .vidioc_s_fmt_vid_out   = coda_s_fmt_vid_out,
896
897         .vidioc_reqbufs         = coda_reqbufs,
898         .vidioc_querybuf        = coda_querybuf,
899
900         .vidioc_qbuf            = coda_qbuf,
901         .vidioc_expbuf          = coda_expbuf,
902         .vidioc_dqbuf           = coda_dqbuf,
903         .vidioc_create_bufs     = coda_create_bufs,
904
905         .vidioc_streamon        = coda_streamon,
906         .vidioc_streamoff       = coda_streamoff,
907
908         .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
909         .vidioc_decoder_cmd     = coda_decoder_cmd,
910
911         .vidioc_subscribe_event = coda_subscribe_event,
912         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
913 };
914
915 static int coda_start_decoding(struct coda_ctx *ctx);
916
917 static void coda_skip_run(struct work_struct *work)
918 {
919         struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
920
921         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
922 }
923
924 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
925 {
926         return kfifo_len(&ctx->bitstream_fifo);
927 }
928
929 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
930 {
931         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
932         struct coda_dev *dev = ctx->dev;
933         u32 rd_ptr;
934
935         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
936         kfifo->out = (kfifo->in & ~kfifo->mask) |
937                       (rd_ptr - ctx->bitstream.paddr);
938         if (kfifo->out > kfifo->in)
939                 kfifo->out -= kfifo->mask + 1;
940 }
941
942 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
943 {
944         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
945         struct coda_dev *dev = ctx->dev;
946         u32 rd_ptr, wr_ptr;
947
948         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
949         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
950         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
951         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
952 }
953
954 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
955 {
956         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
957         struct coda_dev *dev = ctx->dev;
958         u32 wr_ptr;
959
960         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
961         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
962 }
963
964 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
965 {
966         u32 src_size = vb2_get_plane_payload(src_buf, 0);
967         u32 n;
968
969         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
970         if (n < src_size)
971                 return -ENOSPC;
972
973         dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
974                                    ctx->bitstream.size, DMA_TO_DEVICE);
975
976         ctx->qsequence++;
977
978         return 0;
979 }
980
981 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
982                                      struct vb2_buffer *src_buf)
983 {
984         int ret;
985
986         if (coda_get_bitstream_payload(ctx) +
987             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
988                 return false;
989
990         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
991                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
992                 return true;
993         }
994
995         ret = coda_bitstream_queue(ctx, src_buf);
996         if (ret < 0) {
997                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
998                 return false;
999         }
1000         /* Sync read pointer to device */
1001         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
1002                 coda_kfifo_sync_to_device_write(ctx);
1003
1004         ctx->prescan_failed = false;
1005
1006         return true;
1007 }
1008
1009 static void coda_fill_bitstream(struct coda_ctx *ctx)
1010 {
1011         struct vb2_buffer *src_buf;
1012
1013         while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
1014                 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1015
1016                 if (coda_bitstream_try_queue(ctx, src_buf)) {
1017                         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1018                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1019                 } else {
1020                         break;
1021                 }
1022         }
1023 }
1024
1025 /*
1026  * Mem-to-mem operations.
1027  */
1028 static int coda_prepare_decode(struct coda_ctx *ctx)
1029 {
1030         struct vb2_buffer *dst_buf;
1031         struct coda_dev *dev = ctx->dev;
1032         struct coda_q_data *q_data_dst;
1033         u32 stridey, height;
1034         u32 picture_y, picture_cb, picture_cr;
1035
1036         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1037         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1038
1039         if (ctx->params.rot_mode & CODA_ROT_90) {
1040                 stridey = q_data_dst->height;
1041                 height = q_data_dst->width;
1042         } else {
1043                 stridey = q_data_dst->width;
1044                 height = q_data_dst->height;
1045         }
1046
1047         /* Try to copy source buffer contents into the bitstream ringbuffer */
1048         mutex_lock(&ctx->bitstream_mutex);
1049         coda_fill_bitstream(ctx);
1050         mutex_unlock(&ctx->bitstream_mutex);
1051
1052         if (coda_get_bitstream_payload(ctx) < 512 &&
1053             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1054                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1055                          "bitstream payload: %d, skipping\n",
1056                          coda_get_bitstream_payload(ctx));
1057                 schedule_work(&ctx->skip_run);
1058                 return -EAGAIN;
1059         }
1060
1061         /* Run coda_start_decoding (again) if not yet initialized */
1062         if (!ctx->initialized) {
1063                 int ret = coda_start_decoding(ctx);
1064                 if (ret < 0) {
1065                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1066                         schedule_work(&ctx->skip_run);
1067                         return -EAGAIN;
1068                 } else {
1069                         ctx->initialized = 1;
1070                 }
1071         }
1072
1073         /* Set rotator output */
1074         picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1075         if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1076                 /* Switch Cr and Cb for YVU420 format */
1077                 picture_cr = picture_y + stridey * height;
1078                 picture_cb = picture_cr + stridey / 2 * height / 2;
1079         } else {
1080                 picture_cb = picture_y + stridey * height;
1081                 picture_cr = picture_cb + stridey / 2 * height / 2;
1082         }
1083         coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1084         coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1085         coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1086         coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1087         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1088                         CODA_CMD_DEC_PIC_ROT_MODE);
1089
1090         switch (dev->devtype->product) {
1091         case CODA_DX6:
1092                 /* TBD */
1093         case CODA_7541:
1094                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1095                 break;
1096         }
1097
1098         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1099
1100         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1101         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1102
1103         return 0;
1104 }
1105
1106 static void coda_prepare_encode(struct coda_ctx *ctx)
1107 {
1108         struct coda_q_data *q_data_src, *q_data_dst;
1109         struct vb2_buffer *src_buf, *dst_buf;
1110         struct coda_dev *dev = ctx->dev;
1111         int force_ipicture;
1112         int quant_param = 0;
1113         u32 picture_y, picture_cb, picture_cr;
1114         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1115         u32 dst_fourcc;
1116
1117         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1118         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1119         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1120         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1121         dst_fourcc = q_data_dst->fourcc;
1122
1123         src_buf->v4l2_buf.sequence = ctx->osequence;
1124         dst_buf->v4l2_buf.sequence = ctx->osequence;
1125         ctx->osequence++;
1126
1127         /*
1128          * Workaround coda firmware BUG that only marks the first
1129          * frame as IDR. This is a problem for some decoders that can't
1130          * recover when a frame is lost.
1131          */
1132         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1133                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1134                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1135         } else {
1136                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1137                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1138         }
1139
1140         /*
1141          * Copy headers at the beginning of the first frame for H.264 only.
1142          * In MPEG4 they are already copied by the coda.
1143          */
1144         if (src_buf->v4l2_buf.sequence == 0) {
1145                 pic_stream_buffer_addr =
1146                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1147                         ctx->vpu_header_size[0] +
1148                         ctx->vpu_header_size[1] +
1149                         ctx->vpu_header_size[2];
1150                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1151                         ctx->vpu_header_size[0] -
1152                         ctx->vpu_header_size[1] -
1153                         ctx->vpu_header_size[2];
1154                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1155                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1156                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1157                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1158                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1159                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1160                         ctx->vpu_header_size[2]);
1161         } else {
1162                 pic_stream_buffer_addr =
1163                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1164                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1165         }
1166
1167         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1168                 force_ipicture = 1;
1169                 switch (dst_fourcc) {
1170                 case V4L2_PIX_FMT_H264:
1171                         quant_param = ctx->params.h264_intra_qp;
1172                         break;
1173                 case V4L2_PIX_FMT_MPEG4:
1174                         quant_param = ctx->params.mpeg4_intra_qp;
1175                         break;
1176                 default:
1177                         v4l2_warn(&ctx->dev->v4l2_dev,
1178                                 "cannot set intra qp, fmt not supported\n");
1179                         break;
1180                 }
1181         } else {
1182                 force_ipicture = 0;
1183                 switch (dst_fourcc) {
1184                 case V4L2_PIX_FMT_H264:
1185                         quant_param = ctx->params.h264_inter_qp;
1186                         break;
1187                 case V4L2_PIX_FMT_MPEG4:
1188                         quant_param = ctx->params.mpeg4_inter_qp;
1189                         break;
1190                 default:
1191                         v4l2_warn(&ctx->dev->v4l2_dev,
1192                                 "cannot set inter qp, fmt not supported\n");
1193                         break;
1194                 }
1195         }
1196
1197         /* submit */
1198         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1199         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1200
1201
1202         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1203         switch (q_data_src->fourcc) {
1204         case V4L2_PIX_FMT_YVU420:
1205                 /* Switch Cb and Cr for YVU420 format */
1206                 picture_cr = picture_y + q_data_src->width * q_data_src->height;
1207                 picture_cb = picture_cr + q_data_src->width / 2 *
1208                                 q_data_src->height / 2;
1209                 break;
1210         case V4L2_PIX_FMT_YUV420:
1211         default:
1212                 picture_cb = picture_y + q_data_src->width * q_data_src->height;
1213                 picture_cr = picture_cb + q_data_src->width / 2 *
1214                                 q_data_src->height / 2;
1215                 break;
1216         }
1217
1218         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1219         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1220         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1221         coda_write(dev, force_ipicture << 1 & 0x2,
1222                    CODA_CMD_ENC_PIC_OPTION);
1223
1224         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1225         coda_write(dev, pic_stream_buffer_size / 1024,
1226                    CODA_CMD_ENC_PIC_BB_SIZE);
1227 }
1228
1229 static void coda_device_run(void *m2m_priv)
1230 {
1231         struct coda_ctx *ctx = m2m_priv;
1232         struct coda_dev *dev = ctx->dev;
1233         int ret;
1234
1235         mutex_lock(&ctx->buffer_mutex);
1236
1237         /*
1238          * If streamoff dequeued all buffers before we could get the lock,
1239          * just bail out immediately.
1240          */
1241         if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1242             ctx->inst_type != CODA_INST_DECODER) ||
1243                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1244                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1245                         "%d: device_run without buffers\n", ctx->idx);
1246                 mutex_unlock(&ctx->buffer_mutex);
1247                 schedule_work(&ctx->skip_run);
1248                 return;
1249         }
1250
1251         mutex_lock(&dev->coda_mutex);
1252
1253         if (ctx->inst_type == CODA_INST_DECODER) {
1254                 ret = coda_prepare_decode(ctx);
1255                 if (ret < 0) {
1256                         mutex_unlock(&dev->coda_mutex);
1257                         mutex_unlock(&ctx->buffer_mutex);
1258                         /* job_finish scheduled by prepare_decode */
1259                         return;
1260                 }
1261         } else {
1262                 coda_prepare_encode(ctx);
1263         }
1264
1265         if (dev->devtype->product != CODA_DX6)
1266                 coda_write(dev, ctx->iram_info.axi_sram_use,
1267                                 CODA7_REG_BIT_AXI_SRAM_USE);
1268
1269         /* 1 second timeout in case CODA locks up */
1270         schedule_delayed_work(&dev->timeout, HZ);
1271
1272         if (ctx->inst_type == CODA_INST_DECODER)
1273                 coda_kfifo_sync_to_device_full(ctx);
1274         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1275 }
1276
1277 static int coda_job_ready(void *m2m_priv)
1278 {
1279         struct coda_ctx *ctx = m2m_priv;
1280
1281         /*
1282          * For both 'P' and 'key' frame cases 1 picture
1283          * and 1 frame are needed. In the decoder case,
1284          * the compressed frame can be in the bitstream.
1285          */
1286         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1287             ctx->inst_type != CODA_INST_DECODER) {
1288                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1289                          "not ready: not enough video buffers.\n");
1290                 return 0;
1291         }
1292
1293         if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1294                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1295                          "not ready: not enough video capture buffers.\n");
1296                 return 0;
1297         }
1298
1299         if (ctx->prescan_failed ||
1300             ((ctx->inst_type == CODA_INST_DECODER) &&
1301              (coda_get_bitstream_payload(ctx) < 512) &&
1302              !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1303                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1304                          "%d: not ready: not enough bitstream data.\n",
1305                          ctx->idx);
1306                 return 0;
1307         }
1308
1309         if (ctx->aborting) {
1310                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1311                          "not ready: aborting\n");
1312                 return 0;
1313         }
1314
1315         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1316                         "job ready\n");
1317         return 1;
1318 }
1319
1320 static void coda_job_abort(void *priv)
1321 {
1322         struct coda_ctx *ctx = priv;
1323
1324         ctx->aborting = 1;
1325
1326         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1327                  "Aborting task\n");
1328 }
1329
1330 static void coda_lock(void *m2m_priv)
1331 {
1332         struct coda_ctx *ctx = m2m_priv;
1333         struct coda_dev *pcdev = ctx->dev;
1334         mutex_lock(&pcdev->dev_mutex);
1335 }
1336
1337 static void coda_unlock(void *m2m_priv)
1338 {
1339         struct coda_ctx *ctx = m2m_priv;
1340         struct coda_dev *pcdev = ctx->dev;
1341         mutex_unlock(&pcdev->dev_mutex);
1342 }
1343
1344 static struct v4l2_m2m_ops coda_m2m_ops = {
1345         .device_run     = coda_device_run,
1346         .job_ready      = coda_job_ready,
1347         .job_abort      = coda_job_abort,
1348         .lock           = coda_lock,
1349         .unlock         = coda_unlock,
1350 };
1351
1352 static void set_default_params(struct coda_ctx *ctx)
1353 {
1354         int max_w;
1355         int max_h;
1356
1357         ctx->codec = &ctx->dev->devtype->codecs[0];
1358         max_w = ctx->codec->max_w;
1359         max_h = ctx->codec->max_h;
1360
1361         ctx->params.codec_mode = CODA_MODE_INVALID;
1362         ctx->colorspace = V4L2_COLORSPACE_REC709;
1363         ctx->params.framerate = 30;
1364         ctx->aborting = 0;
1365
1366         /* Default formats for output and input queues */
1367         ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1368         ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1369         ctx->q_data[V4L2_M2M_SRC].width = max_w;
1370         ctx->q_data[V4L2_M2M_SRC].height = max_h;
1371         ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1372         ctx->q_data[V4L2_M2M_DST].width = max_w;
1373         ctx->q_data[V4L2_M2M_DST].height = max_h;
1374         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1375 }
1376
1377 /*
1378  * Queue operations
1379  */
1380 static int coda_queue_setup(struct vb2_queue *vq,
1381                                 const struct v4l2_format *fmt,
1382                                 unsigned int *nbuffers, unsigned int *nplanes,
1383                                 unsigned int sizes[], void *alloc_ctxs[])
1384 {
1385         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1386         struct coda_q_data *q_data;
1387         unsigned int size;
1388
1389         q_data = get_q_data(ctx, vq->type);
1390         size = q_data->sizeimage;
1391
1392         *nplanes = 1;
1393         sizes[0] = size;
1394
1395         alloc_ctxs[0] = ctx->dev->alloc_ctx;
1396
1397         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1398                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1399
1400         return 0;
1401 }
1402
1403 static int coda_buf_prepare(struct vb2_buffer *vb)
1404 {
1405         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1406         struct coda_q_data *q_data;
1407
1408         q_data = get_q_data(ctx, vb->vb2_queue->type);
1409
1410         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1411                 v4l2_warn(&ctx->dev->v4l2_dev,
1412                           "%s data will not fit into plane (%lu < %lu)\n",
1413                           __func__, vb2_plane_size(vb, 0),
1414                           (long)q_data->sizeimage);
1415                 return -EINVAL;
1416         }
1417
1418         return 0;
1419 }
1420
1421 static void coda_buf_queue(struct vb2_buffer *vb)
1422 {
1423         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1424         struct coda_q_data *q_data;
1425
1426         q_data = get_q_data(ctx, vb->vb2_queue->type);
1427
1428         /*
1429          * In the decoder case, immediately try to copy the buffer into the
1430          * bitstream ringbuffer and mark it as ready to be dequeued.
1431          */
1432         if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1433             vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1434                 /*
1435                  * For backwards compatibility, queuing an empty buffer marks
1436                  * the stream end
1437                  */
1438                 if (vb2_get_plane_payload(vb, 0) == 0)
1439                         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1440                 mutex_lock(&ctx->bitstream_mutex);
1441                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1442                 coda_fill_bitstream(ctx);
1443                 mutex_unlock(&ctx->bitstream_mutex);
1444         } else {
1445                 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1446         }
1447 }
1448
1449 static void coda_wait_prepare(struct vb2_queue *q)
1450 {
1451         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1452         coda_unlock(ctx);
1453 }
1454
1455 static void coda_wait_finish(struct vb2_queue *q)
1456 {
1457         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1458         coda_lock(ctx);
1459 }
1460
1461 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1462 {
1463         struct coda_dev *dev = ctx->dev;
1464         u32 *p = ctx->parabuf.vaddr;
1465
1466         if (dev->devtype->product == CODA_DX6)
1467                 p[index] = value;
1468         else
1469                 p[index ^ 1] = value;
1470 }
1471
1472 static int coda_alloc_aux_buf(struct coda_dev *dev,
1473                               struct coda_aux_buf *buf, size_t size)
1474 {
1475         buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1476                                         GFP_KERNEL);
1477         if (!buf->vaddr)
1478                 return -ENOMEM;
1479
1480         buf->size = size;
1481
1482         return 0;
1483 }
1484
1485 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1486                                          struct coda_aux_buf *buf, size_t size)
1487 {
1488         return coda_alloc_aux_buf(ctx->dev, buf, size);
1489 }
1490
1491 static void coda_free_aux_buf(struct coda_dev *dev,
1492                               struct coda_aux_buf *buf)
1493 {
1494         if (buf->vaddr) {
1495                 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1496                                   buf->vaddr, buf->paddr);
1497                 buf->vaddr = NULL;
1498                 buf->size = 0;
1499         }
1500 }
1501
1502 static void coda_free_framebuffers(struct coda_ctx *ctx)
1503 {
1504         int i;
1505
1506         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1507                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1508 }
1509
1510 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1511 {
1512         struct coda_dev *dev = ctx->dev;
1513         int height = q_data->height;
1514         dma_addr_t paddr;
1515         int ysize;
1516         int ret;
1517         int i;
1518
1519         if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
1520                 height = round_up(height, 16);
1521         ysize = round_up(q_data->width, 8) * height;
1522
1523         /* Allocate frame buffers */
1524         for (i = 0; i < ctx->num_internal_frames; i++) {
1525                 size_t size;
1526
1527                 size = q_data->sizeimage;
1528                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1529                     dev->devtype->product != CODA_DX6)
1530                         ctx->internal_frames[i].size += ysize/4;
1531                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
1532                 if (ret < 0) {
1533                         coda_free_framebuffers(ctx);
1534                         return ret;
1535                 }
1536         }
1537
1538         /* Register frame buffers in the parameter buffer */
1539         for (i = 0; i < ctx->num_internal_frames; i++) {
1540                 paddr = ctx->internal_frames[i].paddr;
1541                 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1542                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1543                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1544
1545                 /* mvcol buffer for h.264 */
1546                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1547                     dev->devtype->product != CODA_DX6)
1548                         coda_parabuf_write(ctx, 96 + i,
1549                                            ctx->internal_frames[i].paddr +
1550                                            ysize + ysize/4 + ysize/4);
1551         }
1552
1553         /* mvcol buffer for mpeg4 */
1554         if ((dev->devtype->product != CODA_DX6) &&
1555             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1556                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1557                                             ysize + ysize/4 + ysize/4);
1558
1559         return 0;
1560 }
1561
1562 static int coda_h264_padding(int size, char *p)
1563 {
1564         int nal_size;
1565         int diff;
1566
1567         diff = size - (size & ~0x7);
1568         if (diff == 0)
1569                 return 0;
1570
1571         nal_size = coda_filler_size[diff];
1572         memcpy(p, coda_filler_nal, nal_size);
1573
1574         /* Add rbsp stop bit and trailing at the end */
1575         *(p + nal_size - 1) = 0x80;
1576
1577         return nal_size;
1578 }
1579
1580 static void coda_setup_iram(struct coda_ctx *ctx)
1581 {
1582         struct coda_iram_info *iram_info = &ctx->iram_info;
1583         struct coda_dev *dev = ctx->dev;
1584         int ipacdc_size;
1585         int bitram_size;
1586         int dbk_size;
1587         int ovl_size;
1588         int mb_width;
1589         int me_size;
1590         int size;
1591
1592         memset(iram_info, 0, sizeof(*iram_info));
1593         size = dev->iram_size;
1594
1595         if (dev->devtype->product == CODA_DX6)
1596                 return;
1597
1598         if (ctx->inst_type == CODA_INST_ENCODER) {
1599                 struct coda_q_data *q_data_src;
1600
1601                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1602                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1603
1604                 /* Prioritize in case IRAM is too small for everything */
1605                 me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
1606                                    1024);
1607                 iram_info->search_ram_size = me_size;
1608                 if (size >= iram_info->search_ram_size) {
1609                         if (dev->devtype->product == CODA_7541)
1610                                 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
1611                         iram_info->search_ram_paddr = dev->iram_paddr;
1612                         size -= iram_info->search_ram_size;
1613                 } else {
1614                         pr_err("IRAM is smaller than the search ram size\n");
1615                         goto out;
1616                 }
1617
1618                 /* Only H.264BP and H.263P3 are considered */
1619                 dbk_size = round_up(128 * mb_width, 1024);
1620                 if (size >= dbk_size) {
1621                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1622                         iram_info->buf_dbk_y_use = dev->iram_paddr +
1623                                                    iram_info->search_ram_size;
1624                         iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
1625                                                    dbk_size / 2;
1626                         size -= dbk_size;
1627                 } else {
1628                         goto out;
1629                 }
1630
1631                 bitram_size = round_up(128 * mb_width, 1024);
1632                 if (size >= bitram_size) {
1633                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1634                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1635                                                  dbk_size / 2;
1636                         size -= bitram_size;
1637                 } else {
1638                         goto out;
1639                 }
1640
1641                 ipacdc_size = round_up(128 * mb_width, 1024);
1642                 if (size >= ipacdc_size) {
1643                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1644                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1645                                                       bitram_size;
1646                         size -= ipacdc_size;
1647                 }
1648
1649                 /* OVL and BTP disabled for encoder */
1650         } else if (ctx->inst_type == CODA_INST_DECODER) {
1651                 struct coda_q_data *q_data_dst;
1652                 int mb_height;
1653
1654                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1655                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1656                 mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
1657
1658                 dbk_size = round_up(256 * mb_width, 1024);
1659                 if (size >= dbk_size) {
1660                         iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1661                         iram_info->buf_dbk_y_use = dev->iram_paddr;
1662                         iram_info->buf_dbk_c_use = dev->iram_paddr +
1663                                                    dbk_size / 2;
1664                         size -= dbk_size;
1665                 } else {
1666                         goto out;
1667                 }
1668
1669                 bitram_size = round_up(128 * mb_width, 1024);
1670                 if (size >= bitram_size) {
1671                         iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1672                         iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1673                                                  dbk_size / 2;
1674                         size -= bitram_size;
1675                 } else {
1676                         goto out;
1677                 }
1678
1679                 ipacdc_size = round_up(128 * mb_width, 1024);
1680                 if (size >= ipacdc_size) {
1681                         iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1682                         iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1683                                                       bitram_size;
1684                         size -= ipacdc_size;
1685                 } else {
1686                         goto out;
1687                 }
1688
1689                 ovl_size = round_up(80 * mb_width, 1024);
1690         }
1691
1692 out:
1693         switch (dev->devtype->product) {
1694         case CODA_DX6:
1695                 break;
1696         case CODA_7541:
1697                 /* i.MX53 uses secondary AXI for IRAM access */
1698                 if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
1699                         iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
1700                 if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
1701                         iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
1702                 if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
1703                         iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
1704                 if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
1705                         iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
1706                 if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
1707                         iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
1708         }
1709
1710         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1711                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1712                          "IRAM smaller than needed\n");
1713
1714         if (dev->devtype->product == CODA_7541) {
1715                 /* TODO - Enabling these causes picture errors on CODA7541 */
1716                 if (ctx->inst_type == CODA_INST_DECODER) {
1717                         /* fw 1.4.50 */
1718                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1719                                                      CODA7_USE_IP_ENABLE);
1720                 } else {
1721                         /* fw 13.4.29 */
1722                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1723                                                      CODA7_USE_HOST_DBK_ENABLE |
1724                                                      CODA7_USE_IP_ENABLE |
1725                                                      CODA7_USE_DBK_ENABLE);
1726                 }
1727         }
1728 }
1729
1730 static void coda_free_context_buffers(struct coda_ctx *ctx)
1731 {
1732         struct coda_dev *dev = ctx->dev;
1733
1734         coda_free_aux_buf(dev, &ctx->slicebuf);
1735         coda_free_aux_buf(dev, &ctx->psbuf);
1736         if (dev->devtype->product != CODA_DX6)
1737                 coda_free_aux_buf(dev, &ctx->workbuf);
1738 }
1739
1740 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1741                                       struct coda_q_data *q_data)
1742 {
1743         struct coda_dev *dev = ctx->dev;
1744         size_t size;
1745         int ret;
1746
1747         switch (dev->devtype->product) {
1748         case CODA_7541:
1749                 size = CODA7_WORK_BUF_SIZE;
1750                 break;
1751         default:
1752                 return 0;
1753         }
1754
1755         if (ctx->psbuf.vaddr) {
1756                 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1757                 return -EBUSY;
1758         }
1759         if (ctx->slicebuf.vaddr) {
1760                 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1761                 return -EBUSY;
1762         }
1763         if (ctx->workbuf.vaddr) {
1764                 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1765                 ret = -EBUSY;
1766                 return -ENOMEM;
1767         }
1768
1769         if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1770                 /* worst case slice size */
1771                 size = (DIV_ROUND_UP(q_data->width, 16) *
1772                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1773                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
1774                 if (ret < 0) {
1775                         v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1776                                  ctx->slicebuf.size);
1777                         return ret;
1778                 }
1779         }
1780
1781         if (dev->devtype->product == CODA_7541) {
1782                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
1783                 if (ret < 0) {
1784                         v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
1785                         goto err;
1786                 }
1787         }
1788
1789         ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
1790         if (ret < 0) {
1791                 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
1792                          ctx->workbuf.size);
1793                 goto err;
1794         }
1795
1796         return 0;
1797
1798 err:
1799         coda_free_context_buffers(ctx);
1800         return ret;
1801 }
1802
1803 static int coda_start_decoding(struct coda_ctx *ctx)
1804 {
1805         struct coda_q_data *q_data_src, *q_data_dst;
1806         u32 bitstream_buf, bitstream_size;
1807         struct coda_dev *dev = ctx->dev;
1808         int width, height;
1809         u32 src_fourcc;
1810         u32 val;
1811         int ret;
1812
1813         /* Start decoding */
1814         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1815         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1816         bitstream_buf = ctx->bitstream.paddr;
1817         bitstream_size = ctx->bitstream.size;
1818         src_fourcc = q_data_src->fourcc;
1819
1820         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1821
1822         /* Update coda bitstream read and write pointers from kfifo */
1823         coda_kfifo_sync_to_device_full(ctx);
1824
1825         ctx->display_idx = -1;
1826         ctx->frm_dis_flg = 0;
1827         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1828
1829         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1830                         CODA_REG_BIT_BIT_STREAM_PARAM);
1831
1832         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1833         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1834         val = 0;
1835         if (dev->devtype->product == CODA_7541)
1836                 val |= CODA_REORDER_ENABLE;
1837         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1838
1839         ctx->params.codec_mode = ctx->codec->mode;
1840         ctx->params.codec_mode_aux = 0;
1841         if (src_fourcc == V4L2_PIX_FMT_H264) {
1842                 if (dev->devtype->product == CODA_7541) {
1843                         coda_write(dev, ctx->psbuf.paddr,
1844                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1845                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1846                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1847                 }
1848         }
1849
1850         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1851                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1852                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1853                 return -ETIMEDOUT;
1854         }
1855
1856         /* Update kfifo out pointer from coda bitstream read pointer */
1857         coda_kfifo_sync_from_device(ctx);
1858
1859         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1860
1861         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1862                 v4l2_err(&dev->v4l2_dev,
1863                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1864                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1865                 return -EAGAIN;
1866         }
1867
1868         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1869         if (dev->devtype->product == CODA_DX6) {
1870                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1871                 height = val & CODADX6_PICHEIGHT_MASK;
1872         } else {
1873                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1874                 height = val & CODA7_PICHEIGHT_MASK;
1875         }
1876
1877         if (width > q_data_dst->width || height > q_data_dst->height) {
1878                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1879                          width, height, q_data_dst->width, q_data_dst->height);
1880                 return -EINVAL;
1881         }
1882
1883         width = round_up(width, 16);
1884         height = round_up(height, 16);
1885
1886         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1887                  __func__, ctx->idx, width, height);
1888
1889         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
1890         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1891                 v4l2_err(&dev->v4l2_dev,
1892                          "not enough framebuffers to decode (%d < %d)\n",
1893                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1894                 return -EINVAL;
1895         }
1896
1897         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1898         if (ret < 0)
1899                 return ret;
1900
1901         /* Tell the decoder how many frame buffers we allocated. */
1902         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1903         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1904
1905         if (dev->devtype->product != CODA_DX6) {
1906                 /* Set secondary AXI IRAM */
1907                 coda_setup_iram(ctx);
1908
1909                 coda_write(dev, ctx->iram_info.buf_bit_use,
1910                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1911                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1912                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1913                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1914                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1915                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1916                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1917                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1918                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1919         }
1920
1921         if (src_fourcc == V4L2_PIX_FMT_H264) {
1922                 coda_write(dev, ctx->slicebuf.paddr,
1923                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1924                 coda_write(dev, ctx->slicebuf.size / 1024,
1925                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1926         }
1927
1928         if (dev->devtype->product == CODA_7541) {
1929                 int max_mb_x = 1920 / 16;
1930                 int max_mb_y = 1088 / 16;
1931                 int max_mb_num = max_mb_x * max_mb_y;
1932                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1933                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1934         }
1935
1936         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1937                 v4l2_err(&ctx->dev->v4l2_dev,
1938                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1939                 return -ETIMEDOUT;
1940         }
1941
1942         return 0;
1943 }
1944
1945 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
1946                               int header_code, u8 *header, int *size)
1947 {
1948         struct coda_dev *dev = ctx->dev;
1949         int ret;
1950
1951         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
1952                    CODA_CMD_ENC_HEADER_BB_START);
1953         coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
1954         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
1955         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
1956         if (ret < 0) {
1957                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1958                 return ret;
1959         }
1960         *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
1961                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1962         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
1963
1964         return 0;
1965 }
1966
1967 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1968 {
1969         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1970         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1971         u32 bitstream_buf, bitstream_size;
1972         struct coda_dev *dev = ctx->dev;
1973         struct coda_q_data *q_data_src, *q_data_dst;
1974         struct vb2_buffer *buf;
1975         u32 dst_fourcc;
1976         u32 value;
1977         int ret = 0;
1978
1979         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1980         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1981                 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
1982                         if (coda_get_bitstream_payload(ctx) < 512)
1983                                 return -EINVAL;
1984                 } else {
1985                         if (count < 1)
1986                                 return -EINVAL;
1987                 }
1988
1989                 ctx->streamon_out = 1;
1990
1991                 if (coda_format_is_yuv(q_data_src->fourcc))
1992                         ctx->inst_type = CODA_INST_ENCODER;
1993                 else
1994                         ctx->inst_type = CODA_INST_DECODER;
1995         } else {
1996                 if (count < 1)
1997                         return -EINVAL;
1998
1999                 ctx->streamon_cap = 1;
2000         }
2001
2002         /* Don't start the coda unless both queues are on */
2003         if (!(ctx->streamon_out & ctx->streamon_cap))
2004                 return 0;
2005
2006         /* Allow decoder device_run with no new buffers queued */
2007         if (ctx->inst_type == CODA_INST_DECODER)
2008                 v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
2009
2010         ctx->gopcounter = ctx->params.gop_size - 1;
2011         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2012         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
2013         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2014         bitstream_size = q_data_dst->sizeimage;
2015         dst_fourcc = q_data_dst->fourcc;
2016
2017         ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
2018                                      q_data_dst->fourcc);
2019         if (!ctx->codec) {
2020                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
2021                 return -EINVAL;
2022         }
2023
2024         /* Allocate per-instance buffers */
2025         ret = coda_alloc_context_buffers(ctx, q_data_src);
2026         if (ret < 0)
2027                 return ret;
2028
2029         if (ctx->inst_type == CODA_INST_DECODER) {
2030                 mutex_lock(&dev->coda_mutex);
2031                 ret = coda_start_decoding(ctx);
2032                 mutex_unlock(&dev->coda_mutex);
2033                 if (ret == -EAGAIN) {
2034                         return 0;
2035                 } else if (ret < 0) {
2036                         return ret;
2037                 } else {
2038                         ctx->initialized = 1;
2039                         return 0;
2040                 }
2041         }
2042
2043         if (!coda_is_initialized(dev)) {
2044                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
2045                 return -EFAULT;
2046         }
2047
2048         mutex_lock(&dev->coda_mutex);
2049
2050         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2051         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
2052         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2053         switch (dev->devtype->product) {
2054         case CODA_DX6:
2055                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
2056                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2057                 break;
2058         default:
2059                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
2060                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2061         }
2062
2063         if (dev->devtype->product == CODA_DX6) {
2064                 /* Configure the coda */
2065                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
2066         }
2067
2068         /* Could set rotation here if needed */
2069         switch (dev->devtype->product) {
2070         case CODA_DX6:
2071                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
2072                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2073                 break;
2074         default:
2075                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2076                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2077         }
2078         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2079         coda_write(dev, ctx->params.framerate,
2080                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
2081
2082         ctx->params.codec_mode = ctx->codec->mode;
2083         switch (dst_fourcc) {
2084         case V4L2_PIX_FMT_MPEG4:
2085                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2086                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2087                 break;
2088         case V4L2_PIX_FMT_H264:
2089                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2090                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
2091                 break;
2092         default:
2093                 v4l2_err(v4l2_dev,
2094                          "dst format (0x%08x) invalid.\n", dst_fourcc);
2095                 ret = -EINVAL;
2096                 goto out;
2097         }
2098
2099         switch (ctx->params.slice_mode) {
2100         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2101                 value = 0;
2102                 break;
2103         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2104                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2105                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2106                 value |=  1 & CODA_SLICING_MODE_MASK;
2107                 break;
2108         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2109                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2110                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2111                 value |=  1 & CODA_SLICING_MODE_MASK;
2112                 break;
2113         }
2114         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2115         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2116         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2117
2118         if (ctx->params.bitrate) {
2119                 /* Rate control enabled */
2120                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2121                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
2122         } else {
2123                 value = 0;
2124         }
2125         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2126
2127         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2128         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2129
2130         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2131         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2132
2133         /* set default gamma */
2134         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
2135         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
2136
2137         if (CODA_DEFAULT_GAMMA > 0) {
2138                 if (dev->devtype->product == CODA_DX6)
2139                         value  = 1 << CODADX6_OPTION_GAMMA_OFFSET;
2140                 else
2141                         value  = 1 << CODA7_OPTION_GAMMA_OFFSET;
2142         } else {
2143                 value = 0;
2144         }
2145         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2146
2147         coda_setup_iram(ctx);
2148
2149         if (dst_fourcc == V4L2_PIX_FMT_H264) {
2150                 if (dev->devtype->product == CODA_DX6) {
2151                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
2152                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2153                 } else {
2154                         coda_write(dev, ctx->iram_info.search_ram_paddr,
2155                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2156                         coda_write(dev, ctx->iram_info.search_ram_size,
2157                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2158                 }
2159         }
2160
2161         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2162         if (ret < 0) {
2163                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2164                 goto out;
2165         }
2166
2167         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2168                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2169                 ret = -EFAULT;
2170                 goto out;
2171         }
2172
2173         ctx->num_internal_frames = 2;
2174         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2175         if (ret < 0) {
2176                 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2177                 goto out;
2178         }
2179
2180         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2181         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
2182         if (dev->devtype->product == CODA_7541)
2183                 coda_write(dev, round_up(q_data_src->width, 8),
2184                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2185         if (dev->devtype->product != CODA_DX6) {
2186                 coda_write(dev, ctx->iram_info.buf_bit_use,
2187                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2188                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2189                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2190                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2191                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2192                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2193                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2194                 coda_write(dev, ctx->iram_info.buf_ovl_use,
2195                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2196         }
2197         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2198         if (ret < 0) {
2199                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2200                 goto out;
2201         }
2202
2203         /* Save stream headers */
2204         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2205         switch (dst_fourcc) {
2206         case V4L2_PIX_FMT_H264:
2207                 /*
2208                  * Get SPS in the first frame and copy it to an
2209                  * intermediate buffer.
2210                  */
2211                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2212                                          &ctx->vpu_header[0][0],
2213                                          &ctx->vpu_header_size[0]);
2214                 if (ret < 0)
2215                         goto out;
2216
2217                 /*
2218                  * Get PPS in the first frame and copy it to an
2219                  * intermediate buffer.
2220                  */
2221                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2222                                          &ctx->vpu_header[1][0],
2223                                          &ctx->vpu_header_size[1]);
2224                 if (ret < 0)
2225                         goto out;
2226
2227                 /*
2228                  * Length of H.264 headers is variable and thus it might not be
2229                  * aligned for the coda to append the encoded frame. In that is
2230                  * the case a filler NAL must be added to header 2.
2231                  */
2232                 ctx->vpu_header_size[2] = coda_h264_padding(
2233                                         (ctx->vpu_header_size[0] +
2234                                          ctx->vpu_header_size[1]),
2235                                          ctx->vpu_header[2]);
2236                 break;
2237         case V4L2_PIX_FMT_MPEG4:
2238                 /*
2239                  * Get VOS in the first frame and copy it to an
2240                  * intermediate buffer
2241                  */
2242                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2243                                          &ctx->vpu_header[0][0],
2244                                          &ctx->vpu_header_size[0]);
2245                 if (ret < 0)
2246                         goto out;
2247
2248                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2249                                          &ctx->vpu_header[1][0],
2250                                          &ctx->vpu_header_size[1]);
2251                 if (ret < 0)
2252                         goto out;
2253
2254                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2255                                          &ctx->vpu_header[2][0],
2256                                          &ctx->vpu_header_size[2]);
2257                 if (ret < 0)
2258                         goto out;
2259                 break;
2260         default:
2261                 /* No more formats need to save headers at the moment */
2262                 break;
2263         }
2264
2265 out:
2266         mutex_unlock(&dev->coda_mutex);
2267         return ret;
2268 }
2269
2270 static int coda_stop_streaming(struct vb2_queue *q)
2271 {
2272         struct coda_ctx *ctx = vb2_get_drv_priv(q);
2273         struct coda_dev *dev = ctx->dev;
2274
2275         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2276                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2277                          "%s: output\n", __func__);
2278                 ctx->streamon_out = 0;
2279
2280                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2281
2282                 ctx->isequence = 0;
2283         } else {
2284                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2285                          "%s: capture\n", __func__);
2286                 ctx->streamon_cap = 0;
2287
2288                 ctx->osequence = 0;
2289         }
2290
2291         if (!ctx->streamon_out && !ctx->streamon_cap) {
2292                 kfifo_init(&ctx->bitstream_fifo,
2293                         ctx->bitstream.vaddr, ctx->bitstream.size);
2294                 ctx->runcounter = 0;
2295         }
2296
2297         return 0;
2298 }
2299
2300 static struct vb2_ops coda_qops = {
2301         .queue_setup            = coda_queue_setup,
2302         .buf_prepare            = coda_buf_prepare,
2303         .buf_queue              = coda_buf_queue,
2304         .wait_prepare           = coda_wait_prepare,
2305         .wait_finish            = coda_wait_finish,
2306         .start_streaming        = coda_start_streaming,
2307         .stop_streaming         = coda_stop_streaming,
2308 };
2309
2310 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2311 {
2312         struct coda_ctx *ctx =
2313                         container_of(ctrl->handler, struct coda_ctx, ctrls);
2314
2315         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2316                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2317
2318         switch (ctrl->id) {
2319         case V4L2_CID_HFLIP:
2320                 if (ctrl->val)
2321                         ctx->params.rot_mode |= CODA_MIR_HOR;
2322                 else
2323                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
2324                 break;
2325         case V4L2_CID_VFLIP:
2326                 if (ctrl->val)
2327                         ctx->params.rot_mode |= CODA_MIR_VER;
2328                 else
2329                         ctx->params.rot_mode &= ~CODA_MIR_VER;
2330                 break;
2331         case V4L2_CID_MPEG_VIDEO_BITRATE:
2332                 ctx->params.bitrate = ctrl->val / 1000;
2333                 break;
2334         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2335                 ctx->params.gop_size = ctrl->val;
2336                 break;
2337         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2338                 ctx->params.h264_intra_qp = ctrl->val;
2339                 break;
2340         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2341                 ctx->params.h264_inter_qp = ctrl->val;
2342                 break;
2343         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2344                 ctx->params.mpeg4_intra_qp = ctrl->val;
2345                 break;
2346         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2347                 ctx->params.mpeg4_inter_qp = ctrl->val;
2348                 break;
2349         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2350                 ctx->params.slice_mode = ctrl->val;
2351                 break;
2352         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2353                 ctx->params.slice_max_mb = ctrl->val;
2354                 break;
2355         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2356                 ctx->params.slice_max_bits = ctrl->val * 8;
2357                 break;
2358         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2359                 break;
2360         default:
2361                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2362                         "Invalid control, id=%d, val=%d\n",
2363                         ctrl->id, ctrl->val);
2364                 return -EINVAL;
2365         }
2366
2367         return 0;
2368 }
2369
2370 static struct v4l2_ctrl_ops coda_ctrl_ops = {
2371         .s_ctrl = coda_s_ctrl,
2372 };
2373
2374 static int coda_ctrls_setup(struct coda_ctx *ctx)
2375 {
2376         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2377
2378         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2379                 V4L2_CID_HFLIP, 0, 1, 1, 0);
2380         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2381                 V4L2_CID_VFLIP, 0, 1, 1, 0);
2382         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2383                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2384         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2385                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2386         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2387                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
2388         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2389                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
2390         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2391                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2392         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2393                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2394         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2395                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2396                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2397                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2398         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2399                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2400         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2401                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2402         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2403                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2404                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2405                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2406                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2407
2408         if (ctx->ctrls.error) {
2409                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2410                         ctx->ctrls.error);
2411                 return -EINVAL;
2412         }
2413
2414         return v4l2_ctrl_handler_setup(&ctx->ctrls);
2415 }
2416
2417 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2418                       struct vb2_queue *dst_vq)
2419 {
2420         struct coda_ctx *ctx = priv;
2421         int ret;
2422
2423         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2424         src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2425         src_vq->drv_priv = ctx;
2426         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2427         src_vq->ops = &coda_qops;
2428         src_vq->mem_ops = &vb2_dma_contig_memops;
2429         src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2430
2431         ret = vb2_queue_init(src_vq);
2432         if (ret)
2433                 return ret;
2434
2435         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2436         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2437         dst_vq->drv_priv = ctx;
2438         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2439         dst_vq->ops = &coda_qops;
2440         dst_vq->mem_ops = &vb2_dma_contig_memops;
2441         dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2442
2443         return vb2_queue_init(dst_vq);
2444 }
2445
2446 static int coda_next_free_instance(struct coda_dev *dev)
2447 {
2448         int idx = ffz(dev->instance_mask);
2449
2450         if ((idx < 0) ||
2451             (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2452                 return -EBUSY;
2453
2454         return idx;
2455 }
2456
2457 static int coda_open(struct file *file)
2458 {
2459         struct coda_dev *dev = video_drvdata(file);
2460         struct coda_ctx *ctx = NULL;
2461         int ret;
2462         int idx;
2463
2464         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2465         if (!ctx)
2466                 return -ENOMEM;
2467
2468         idx = coda_next_free_instance(dev);
2469         if (idx < 0) {
2470                 ret = idx;
2471                 goto err_coda_max;
2472         }
2473         set_bit(idx, &dev->instance_mask);
2474
2475         INIT_WORK(&ctx->skip_run, coda_skip_run);
2476         v4l2_fh_init(&ctx->fh, video_devdata(file));
2477         file->private_data = &ctx->fh;
2478         v4l2_fh_add(&ctx->fh);
2479         ctx->dev = dev;
2480         ctx->idx = idx;
2481         switch (dev->devtype->product) {
2482         case CODA_7541:
2483                 ctx->reg_idx = 0;
2484                 break;
2485         default:
2486                 ctx->reg_idx = idx;
2487         }
2488
2489         ret = clk_prepare_enable(dev->clk_per);
2490         if (ret)
2491                 goto err_clk_per;
2492
2493         ret = clk_prepare_enable(dev->clk_ahb);
2494         if (ret)
2495                 goto err_clk_ahb;
2496
2497         set_default_params(ctx);
2498         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2499                                          &coda_queue_init);
2500         if (IS_ERR(ctx->m2m_ctx)) {
2501                 ret = PTR_ERR(ctx->m2m_ctx);
2502
2503                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2504                          __func__, ret);
2505                 goto err_ctx_init;
2506         }
2507         ret = coda_ctrls_setup(ctx);
2508         if (ret) {
2509                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2510                 goto err_ctrls_setup;
2511         }
2512
2513         ctx->fh.ctrl_handler = &ctx->ctrls;
2514
2515         ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
2516         if (ret < 0) {
2517                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2518                 goto err_dma_alloc;
2519         }
2520
2521         ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2522         ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2523                         ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2524         if (!ctx->bitstream.vaddr) {
2525                 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2526                 ret = -ENOMEM;
2527                 goto err_dma_writecombine;
2528         }
2529         kfifo_init(&ctx->bitstream_fifo,
2530                 ctx->bitstream.vaddr, ctx->bitstream.size);
2531         mutex_init(&ctx->bitstream_mutex);
2532         mutex_init(&ctx->buffer_mutex);
2533
2534         coda_lock(ctx);
2535         list_add(&ctx->list, &dev->instances);
2536         coda_unlock(ctx);
2537
2538         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
2539                  ctx->idx, ctx);
2540
2541         return 0;
2542
2543 err_dma_writecombine:
2544         coda_free_context_buffers(ctx);
2545         if (ctx->dev->devtype->product == CODA_DX6)
2546                 coda_free_aux_buf(dev, &ctx->workbuf);
2547         coda_free_aux_buf(dev, &ctx->parabuf);
2548 err_dma_alloc:
2549         v4l2_ctrl_handler_free(&ctx->ctrls);
2550 err_ctrls_setup:
2551         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2552 err_ctx_init:
2553         clk_disable_unprepare(dev->clk_ahb);
2554 err_clk_ahb:
2555         clk_disable_unprepare(dev->clk_per);
2556 err_clk_per:
2557         v4l2_fh_del(&ctx->fh);
2558         v4l2_fh_exit(&ctx->fh);
2559         clear_bit(ctx->idx, &dev->instance_mask);
2560 err_coda_max:
2561         kfree(ctx);
2562         return ret;
2563 }
2564
2565 static int coda_release(struct file *file)
2566 {
2567         struct coda_dev *dev = video_drvdata(file);
2568         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2569
2570         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
2571                  ctx);
2572
2573         /* If this instance is running, call .job_abort and wait for it to end */
2574         v4l2_m2m_ctx_release(ctx->m2m_ctx);
2575
2576         /* In case the instance was not running, we still need to call SEQ_END */
2577         mutex_lock(&dev->coda_mutex);
2578         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2579                  "%s: sent command 'SEQ_END' to coda\n", __func__);
2580         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2581                 v4l2_err(&dev->v4l2_dev,
2582                          "CODA_COMMAND_SEQ_END failed\n");
2583                 mutex_unlock(&dev->coda_mutex);
2584                 return -ETIMEDOUT;
2585         }
2586         mutex_unlock(&dev->coda_mutex);
2587
2588         coda_free_framebuffers(ctx);
2589
2590         coda_lock(ctx);
2591         list_del(&ctx->list);
2592         coda_unlock(ctx);
2593
2594         dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
2595                 ctx->bitstream.vaddr, ctx->bitstream.paddr);
2596         coda_free_context_buffers(ctx);
2597         if (ctx->dev->devtype->product == CODA_DX6)
2598                 coda_free_aux_buf(dev, &ctx->workbuf);
2599
2600         coda_free_aux_buf(dev, &ctx->parabuf);
2601         v4l2_ctrl_handler_free(&ctx->ctrls);
2602         clk_disable_unprepare(dev->clk_ahb);
2603         clk_disable_unprepare(dev->clk_per);
2604         v4l2_fh_del(&ctx->fh);
2605         v4l2_fh_exit(&ctx->fh);
2606         clear_bit(ctx->idx, &dev->instance_mask);
2607         kfree(ctx);
2608
2609         return 0;
2610 }
2611
2612 static unsigned int coda_poll(struct file *file,
2613                                  struct poll_table_struct *wait)
2614 {
2615         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2616         int ret;
2617
2618         coda_lock(ctx);
2619         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
2620         coda_unlock(ctx);
2621         return ret;
2622 }
2623
2624 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
2625 {
2626         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2627
2628         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
2629 }
2630
2631 static const struct v4l2_file_operations coda_fops = {
2632         .owner          = THIS_MODULE,
2633         .open           = coda_open,
2634         .release        = coda_release,
2635         .poll           = coda_poll,
2636         .unlocked_ioctl = video_ioctl2,
2637         .mmap           = coda_mmap,
2638 };
2639
2640 static void coda_finish_decode(struct coda_ctx *ctx)
2641 {
2642         struct coda_dev *dev = ctx->dev;
2643         struct coda_q_data *q_data_src;
2644         struct coda_q_data *q_data_dst;
2645         struct vb2_buffer *dst_buf;
2646         int width, height;
2647         int decoded_idx;
2648         int display_idx;
2649         u32 src_fourcc;
2650         int success;
2651         u32 val;
2652
2653         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2654
2655         /* Update kfifo out pointer from coda bitstream read pointer */
2656         coda_kfifo_sync_from_device(ctx);
2657
2658         /*
2659          * in stream-end mode, the read pointer can overshoot the write pointer
2660          * by up to 512 bytes
2661          */
2662         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2663                 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
2664                         kfifo_init(&ctx->bitstream_fifo,
2665                                 ctx->bitstream.vaddr, ctx->bitstream.size);
2666         }
2667
2668         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2669         src_fourcc = q_data_src->fourcc;
2670
2671         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2672         if (val != 1)
2673                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
2674
2675         success = val & 0x1;
2676         if (!success)
2677                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
2678
2679         if (src_fourcc == V4L2_PIX_FMT_H264) {
2680                 if (val & (1 << 3))
2681                         v4l2_err(&dev->v4l2_dev,
2682                                  "insufficient PS buffer space (%d bytes)\n",
2683                                  ctx->psbuf.size);
2684                 if (val & (1 << 2))
2685                         v4l2_err(&dev->v4l2_dev,
2686                                  "insufficient slice buffer space (%d bytes)\n",
2687                                  ctx->slicebuf.size);
2688         }
2689
2690         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2691         width = (val >> 16) & 0xffff;
2692         height = val & 0xffff;
2693
2694         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2695
2696         val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
2697         if ((val & 0x7) == 0) {
2698                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2699                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2700         } else {
2701                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2702                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2703         }
2704
2705         val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2706         if (val > 0)
2707                 v4l2_err(&dev->v4l2_dev,
2708                          "errors in %d macroblocks\n", val);
2709
2710         if (dev->devtype->product == CODA_7541) {
2711                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2712                 if (val == 0) {
2713                         /* not enough bitstream data */
2714                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2715                                  "prescan failed: %d\n", val);
2716                         ctx->prescan_failed = true;
2717                         return;
2718                 }
2719         }
2720
2721         ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2722
2723         /*
2724          * The previous display frame was copied out by the rotator,
2725          * now it can be overwritten again
2726          */
2727         if (ctx->display_idx >= 0 &&
2728             ctx->display_idx < ctx->num_internal_frames) {
2729                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2730                 coda_write(dev, ctx->frm_dis_flg,
2731                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2732         }
2733
2734         /*
2735          * The index of the last decoded frame, not necessarily in
2736          * display order, and the index of the next display frame.
2737          * The latter could have been decoded in a previous run.
2738          */
2739         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2740         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2741
2742         if (decoded_idx == -1) {
2743                 /* no frame was decoded, but we might have a display frame */
2744                 if (display_idx < 0 && ctx->display_idx < 0)
2745                         ctx->prescan_failed = true;
2746         } else if (decoded_idx == -2) {
2747                 /* no frame was decoded, we still return the remaining buffers */
2748         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2749                 v4l2_err(&dev->v4l2_dev,
2750                          "decoded frame index out of range: %d\n", decoded_idx);
2751         }
2752
2753         if (display_idx == -1) {
2754                 /*
2755                  * no more frames to be decoded, but there could still
2756                  * be rotator output to dequeue
2757                  */
2758                 ctx->prescan_failed = true;
2759         } else if (display_idx == -3) {
2760                 /* possibly prescan failure */
2761         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2762                 v4l2_err(&dev->v4l2_dev,
2763                          "presentation frame index out of range: %d\n",
2764                          display_idx);
2765         }
2766
2767         /* If a frame was copied out, return it */
2768         if (ctx->display_idx >= 0 &&
2769             ctx->display_idx < ctx->num_internal_frames) {
2770                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2771                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
2772
2773                 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
2774
2775                 v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
2776                                                      VB2_BUF_STATE_ERROR);
2777
2778                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2779                         "job finished: decoding frame (%d) (%s)\n",
2780                         dst_buf->v4l2_buf.sequence,
2781                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2782                         "KEYFRAME" : "PFRAME");
2783         } else {
2784                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2785                         "job finished: no frame decoded\n");
2786         }
2787
2788         /* The rotator will copy the current display frame next time */
2789         ctx->display_idx = display_idx;
2790 }
2791
2792 static void coda_finish_encode(struct coda_ctx *ctx)
2793 {
2794         struct vb2_buffer *src_buf, *dst_buf;
2795         struct coda_dev *dev = ctx->dev;
2796         u32 wr_ptr, start_ptr;
2797
2798         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
2799         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2800
2801         /* Get results from the coda */
2802         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
2803         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2804
2805         /* Calculate bytesused field */
2806         if (dst_buf->v4l2_buf.sequence == 0) {
2807                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
2808                                         ctx->vpu_header_size[0] +
2809                                         ctx->vpu_header_size[1] +
2810                                         ctx->vpu_header_size[2]);
2811         } else {
2812                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
2813         }
2814
2815         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
2816                  wr_ptr - start_ptr);
2817
2818         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
2819         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
2820
2821         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
2822                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2823                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2824         } else {
2825                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2826                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2827         }
2828
2829         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
2830         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
2831
2832         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
2833         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
2834
2835         ctx->gopcounter--;
2836         if (ctx->gopcounter < 0)
2837                 ctx->gopcounter = ctx->params.gop_size - 1;
2838
2839         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2840                 "job finished: encoding frame (%d) (%s)\n",
2841                 dst_buf->v4l2_buf.sequence,
2842                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2843                 "KEYFRAME" : "PFRAME");
2844 }
2845
2846 static irqreturn_t coda_irq_handler(int irq, void *data)
2847 {
2848         struct coda_dev *dev = data;
2849         struct coda_ctx *ctx;
2850
2851         cancel_delayed_work(&dev->timeout);
2852
2853         /* read status register to attend the IRQ */
2854         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2855         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2856                       CODA_REG_BIT_INT_CLEAR);
2857
2858         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2859         if (ctx == NULL) {
2860                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
2861                 mutex_unlock(&dev->coda_mutex);
2862                 return IRQ_HANDLED;
2863         }
2864
2865         if (ctx->aborting) {
2866                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2867                          "task has been aborted\n");
2868                 goto out;
2869         }
2870
2871         if (coda_isbusy(ctx->dev)) {
2872                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2873                          "coda is still busy!!!!\n");
2874                 return IRQ_NONE;
2875         }
2876
2877         if (ctx->inst_type == CODA_INST_DECODER)
2878                 coda_finish_decode(ctx);
2879         else
2880                 coda_finish_encode(ctx);
2881
2882 out:
2883         if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
2884                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2885                          "%s: sent command 'SEQ_END' to coda\n", __func__);
2886                 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2887                         v4l2_err(&dev->v4l2_dev,
2888                                  "CODA_COMMAND_SEQ_END failed\n");
2889                 }
2890
2891                 kfifo_init(&ctx->bitstream_fifo,
2892                         ctx->bitstream.vaddr, ctx->bitstream.size);
2893
2894                 coda_free_framebuffers(ctx);
2895                 coda_free_context_buffers(ctx);
2896         }
2897
2898         mutex_unlock(&dev->coda_mutex);
2899         mutex_unlock(&ctx->buffer_mutex);
2900
2901         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2902
2903         return IRQ_HANDLED;
2904 }
2905
2906 static void coda_timeout(struct work_struct *work)
2907 {
2908         struct coda_ctx *ctx;
2909         struct coda_dev *dev = container_of(to_delayed_work(work),
2910                                             struct coda_dev, timeout);
2911
2912         dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
2913
2914         mutex_lock(&dev->dev_mutex);
2915         list_for_each_entry(ctx, &dev->instances, list) {
2916                 if (mutex_is_locked(&ctx->buffer_mutex))
2917                         mutex_unlock(&ctx->buffer_mutex);
2918                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2919                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2920         }
2921         mutex_unlock(&dev->dev_mutex);
2922
2923         mutex_unlock(&dev->coda_mutex);
2924         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2925         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2926 }
2927
2928 static u32 coda_supported_firmwares[] = {
2929         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
2930         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
2931 };
2932
2933 static bool coda_firmware_supported(u32 vernum)
2934 {
2935         int i;
2936
2937         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
2938                 if (vernum == coda_supported_firmwares[i])
2939                         return true;
2940         return false;
2941 }
2942
2943 static int coda_hw_init(struct coda_dev *dev)
2944 {
2945         u16 product, major, minor, release;
2946         u32 data;
2947         u16 *p;
2948         int i, ret;
2949
2950         ret = clk_prepare_enable(dev->clk_per);
2951         if (ret)
2952                 return ret;
2953
2954         ret = clk_prepare_enable(dev->clk_ahb);
2955         if (ret)
2956                 goto err_clk_ahb;
2957
2958         /*
2959          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
2960          * The 16-bit chars in the code buffer are in memory access
2961          * order, re-sort them to CODA order for register download.
2962          * Data in this SRAM survives a reboot.
2963          */
2964         p = (u16 *)dev->codebuf.vaddr;
2965         if (dev->devtype->product == CODA_DX6) {
2966                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
2967                         data = CODA_DOWN_ADDRESS_SET(i) |
2968                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
2969                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2970                 }
2971         } else {
2972                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
2973                         data = CODA_DOWN_ADDRESS_SET(i) |
2974                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
2975                                                         3 - (i % 4)]);
2976                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2977                 }
2978         }
2979
2980         /* Clear registers */
2981         for (i = 0; i < 64; i++)
2982                 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
2983
2984         /* Tell the BIT where to find everything it needs */
2985         if (dev->devtype->product == CODA_7541) {
2986                 coda_write(dev, dev->tempbuf.paddr,
2987                                 CODA_REG_BIT_TEMP_BUF_ADDR);
2988                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2989         } else {
2990                 coda_write(dev, dev->workbuf.paddr,
2991                               CODA_REG_BIT_WORK_BUF_ADDR);
2992         }
2993         coda_write(dev, dev->codebuf.paddr,
2994                       CODA_REG_BIT_CODE_BUF_ADDR);
2995         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
2996
2997         /* Set default values */
2998         switch (dev->devtype->product) {
2999         case CODA_DX6:
3000                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3001                 break;
3002         default:
3003                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3004         }
3005         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
3006
3007         if (dev->devtype->product != CODA_DX6)
3008                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
3009
3010         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
3011                       CODA_REG_BIT_INT_ENABLE);
3012
3013         /* Reset VPU and start processor */
3014         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
3015         data |= CODA_REG_RESET_ENABLE;
3016         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3017         udelay(10);
3018         data &= ~CODA_REG_RESET_ENABLE;
3019         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3020         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
3021
3022         /* Load firmware */
3023         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
3024         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
3025         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
3026         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
3027         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
3028         if (coda_wait_timeout(dev)) {
3029                 clk_disable_unprepare(dev->clk_per);
3030                 clk_disable_unprepare(dev->clk_ahb);
3031                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
3032                 return -EIO;
3033         }
3034
3035         /* Check we are compatible with the loaded firmware */
3036         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
3037         product = CODA_FIRMWARE_PRODUCT(data);
3038         major = CODA_FIRMWARE_MAJOR(data);
3039         minor = CODA_FIRMWARE_MINOR(data);
3040         release = CODA_FIRMWARE_RELEASE(data);
3041
3042         clk_disable_unprepare(dev->clk_per);
3043         clk_disable_unprepare(dev->clk_ahb);
3044
3045         if (product != dev->devtype->product) {
3046                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
3047                          " Version: %u.%u.%u\n",
3048                          coda_product_name(dev->devtype->product),
3049                          coda_product_name(product), major, minor, release);
3050                 return -EINVAL;
3051         }
3052
3053         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
3054                   coda_product_name(product));
3055
3056         if (coda_firmware_supported(data)) {
3057                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3058                           major, minor, release);
3059         } else {
3060                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3061                           "%u.%u.%u\n", major, minor, release);
3062         }
3063
3064         return 0;
3065
3066 err_clk_ahb:
3067         clk_disable_unprepare(dev->clk_per);
3068         return ret;
3069 }
3070
3071 static void coda_fw_callback(const struct firmware *fw, void *context)
3072 {
3073         struct coda_dev *dev = context;
3074         struct platform_device *pdev = dev->plat_dev;
3075         int ret;
3076
3077         if (!fw) {
3078                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3079                 return;
3080         }
3081
3082         /* allocate auxiliary per-device code buffer for the BIT processor */
3083         ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
3084         if (ret < 0) {
3085                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3086                 return;
3087         }
3088
3089         /* Copy the whole firmware image to the code buffer */
3090         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3091         release_firmware(fw);
3092
3093         ret = coda_hw_init(dev);
3094         if (ret) {
3095                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3096                 return;
3097         }
3098
3099         dev->vfd.fops   = &coda_fops,
3100         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
3101         dev->vfd.release        = video_device_release_empty,
3102         dev->vfd.lock   = &dev->dev_mutex;
3103         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
3104         dev->vfd.vfl_dir        = VFL_DIR_M2M;
3105         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3106         video_set_drvdata(&dev->vfd, dev);
3107
3108         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3109         if (IS_ERR(dev->alloc_ctx)) {
3110                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3111                 return;
3112         }
3113
3114         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3115         if (IS_ERR(dev->m2m_dev)) {
3116                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3117                 goto rel_ctx;
3118         }
3119
3120         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3121         if (ret) {
3122                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3123                 goto rel_m2m;
3124         }
3125         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3126                   dev->vfd.num);
3127
3128         return;
3129
3130 rel_m2m:
3131         v4l2_m2m_release(dev->m2m_dev);
3132 rel_ctx:
3133         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3134 }
3135
3136 static int coda_firmware_request(struct coda_dev *dev)
3137 {
3138         char *fw = dev->devtype->firmware;
3139
3140         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3141                 coda_product_name(dev->devtype->product));
3142
3143         return request_firmware_nowait(THIS_MODULE, true,
3144                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3145 }
3146
3147 enum coda_platform {
3148         CODA_IMX27,
3149         CODA_IMX53,
3150 };
3151
3152 static const struct coda_devtype coda_devdata[] = {
3153         [CODA_IMX27] = {
3154                 .firmware   = "v4l-codadx6-imx27.bin",
3155                 .product    = CODA_DX6,
3156                 .codecs     = codadx6_codecs,
3157                 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3158         },
3159         [CODA_IMX53] = {
3160                 .firmware   = "v4l-coda7541-imx53.bin",
3161                 .product    = CODA_7541,
3162                 .codecs     = coda7_codecs,
3163                 .num_codecs = ARRAY_SIZE(coda7_codecs),
3164         },
3165 };
3166
3167 static struct platform_device_id coda_platform_ids[] = {
3168         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3169         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3170         { /* sentinel */ }
3171 };
3172 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3173
3174 #ifdef CONFIG_OF
3175 static const struct of_device_id coda_dt_ids[] = {
3176         { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3177         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3178         { /* sentinel */ }
3179 };
3180 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3181 #endif
3182
3183 static int coda_probe(struct platform_device *pdev)
3184 {
3185         const struct of_device_id *of_id =
3186                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3187         const struct platform_device_id *pdev_id;
3188         struct coda_platform_data *pdata = pdev->dev.platform_data;
3189         struct device_node *np = pdev->dev.of_node;
3190         struct gen_pool *pool;
3191         struct coda_dev *dev;
3192         struct resource *res;
3193         int ret, irq;
3194
3195         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3196         if (!dev) {
3197                 dev_err(&pdev->dev, "Not enough memory for %s\n",
3198                         CODA_NAME);
3199                 return -ENOMEM;
3200         }
3201
3202         spin_lock_init(&dev->irqlock);
3203         INIT_LIST_HEAD(&dev->instances);
3204         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
3205
3206         dev->plat_dev = pdev;
3207         dev->clk_per = devm_clk_get(&pdev->dev, "per");
3208         if (IS_ERR(dev->clk_per)) {
3209                 dev_err(&pdev->dev, "Could not get per clock\n");
3210                 return PTR_ERR(dev->clk_per);
3211         }
3212
3213         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3214         if (IS_ERR(dev->clk_ahb)) {
3215                 dev_err(&pdev->dev, "Could not get ahb clock\n");
3216                 return PTR_ERR(dev->clk_ahb);
3217         }
3218
3219         /* Get  memory for physical registers */
3220         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3221         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3222         if (IS_ERR(dev->regs_base))
3223                 return PTR_ERR(dev->regs_base);
3224
3225         /* IRQ */
3226         irq = platform_get_irq(pdev, 0);
3227         if (irq < 0) {
3228                 dev_err(&pdev->dev, "failed to get irq resource\n");
3229                 return -ENOENT;
3230         }
3231
3232         if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3233                 IRQF_ONESHOT, CODA_NAME, dev) < 0) {
3234                 dev_err(&pdev->dev, "failed to request irq\n");
3235                 return -ENOENT;
3236         }
3237
3238         /* Get IRAM pool from device tree or platform data */
3239         pool = of_get_named_gen_pool(np, "iram", 0);
3240         if (!pool && pdata)
3241                 pool = dev_get_gen_pool(pdata->iram_dev);
3242         if (!pool) {
3243                 dev_err(&pdev->dev, "iram pool not available\n");
3244                 return -ENOMEM;
3245         }
3246         dev->iram_pool = pool;
3247
3248         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3249         if (ret)
3250                 return ret;
3251
3252         mutex_init(&dev->dev_mutex);
3253         mutex_init(&dev->coda_mutex);
3254
3255         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3256
3257         if (of_id) {
3258                 dev->devtype = of_id->data;
3259         } else if (pdev_id) {
3260                 dev->devtype = &coda_devdata[pdev_id->driver_data];
3261         } else {
3262                 v4l2_device_unregister(&dev->v4l2_dev);
3263                 return -EINVAL;
3264         }
3265
3266         /* allocate auxiliary per-device buffers for the BIT processor */
3267         switch (dev->devtype->product) {
3268         case CODA_DX6:
3269                 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3270                                          CODADX6_WORK_BUF_SIZE);
3271                 if (ret < 0) {
3272                         dev_err(&pdev->dev, "failed to allocate work buffer\n");
3273                         v4l2_device_unregister(&dev->v4l2_dev);
3274                         return ret;
3275                 }
3276                 break;
3277         case CODA_7541:
3278                 dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
3279                 break;
3280         }
3281         if (dev->tempbuf.size) {
3282                 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3283                                          dev->tempbuf.size);
3284                 if (ret < 0) {
3285                         dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3286                         v4l2_device_unregister(&dev->v4l2_dev);
3287                         return ret;
3288                 }
3289         }
3290
3291         switch (dev->devtype->product) {
3292         case CODA_DX6:
3293                 dev->iram_size = CODADX6_IRAM_SIZE;
3294                 break;
3295         case CODA_7541:
3296                 dev->iram_size = CODA7_IRAM_SIZE;
3297                 break;
3298         }
3299         dev->iram_vaddr = (unsigned long)gen_pool_dma_alloc(dev->iram_pool,
3300                         dev->iram_size, (dma_addr_t *)&dev->iram_paddr);
3301         if (!dev->iram_vaddr) {
3302                 dev_err(&pdev->dev, "unable to alloc iram\n");
3303                 return -ENOMEM;
3304         }
3305
3306         platform_set_drvdata(pdev, dev);
3307
3308         return coda_firmware_request(dev);
3309 }
3310
3311 static int coda_remove(struct platform_device *pdev)
3312 {
3313         struct coda_dev *dev = platform_get_drvdata(pdev);
3314
3315         video_unregister_device(&dev->vfd);
3316         if (dev->m2m_dev)
3317                 v4l2_m2m_release(dev->m2m_dev);
3318         if (dev->alloc_ctx)
3319                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3320         v4l2_device_unregister(&dev->v4l2_dev);
3321         if (dev->iram_vaddr)
3322                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
3323         coda_free_aux_buf(dev, &dev->codebuf);
3324         coda_free_aux_buf(dev, &dev->tempbuf);
3325         coda_free_aux_buf(dev, &dev->workbuf);
3326         return 0;
3327 }
3328
3329 static struct platform_driver coda_driver = {
3330         .probe  = coda_probe,
3331         .remove = coda_remove,
3332         .driver = {
3333                 .name   = CODA_NAME,
3334                 .owner  = THIS_MODULE,
3335                 .of_match_table = of_match_ptr(coda_dt_ids),
3336         },
3337         .id_table = coda_platform_ids,
3338 };
3339
3340 module_platform_driver(coda_driver);
3341
3342 MODULE_LICENSE("GPL");
3343 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3344 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");