2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
31 #include <linux/ratelimit.h>
34 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
39 #include "va1j5jf8007t.h"
40 #include "va1j5jf8007s.h"
42 #define DRIVER_NAME "earth-pt1"
44 #define PT1_PAGE_SHIFT 12
45 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
46 #define PT1_NR_UPACKETS 1024
47 #define PT1_NR_BUFS 511
49 struct pt1_buffer_page {
50 __le32 upackets[PT1_NR_UPACKETS];
53 struct pt1_table_page {
55 __le32 buf_pfns[PT1_NR_BUFS];
59 struct pt1_buffer_page *page;
64 struct pt1_table_page *page;
66 struct pt1_buffer bufs[PT1_NR_BUFS];
69 #define PT1_NR_ADAPS 4
76 struct i2c_adapter i2c_adap;
78 struct pt1_adapter *adaps[PT1_NR_ADAPS];
79 struct pt1_table *tables;
80 struct task_struct *kthread;
98 struct dvb_adapter adap;
99 struct dvb_demux demux;
101 struct dmxdev dmxdev;
102 struct dvb_frontend *fe;
103 int (*orig_set_voltage)(struct dvb_frontend *fe,
104 fe_sec_voltage_t voltage);
105 int (*orig_sleep)(struct dvb_frontend *fe);
106 int (*orig_init)(struct dvb_frontend *fe);
108 fe_sec_voltage_t voltage;
112 #define pt1_printk(level, pt1, format, arg...) \
113 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
115 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
117 writel(data, pt1->regs + reg * 4);
120 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
122 return readl(pt1->regs + reg * 4);
125 static int pt1_nr_tables = 8;
126 module_param_named(nr_tables, pt1_nr_tables, int, 0);
128 static void pt1_increment_table_count(struct pt1 *pt1)
130 pt1_write_reg(pt1, 0, 0x00000020);
133 static void pt1_init_table_count(struct pt1 *pt1)
135 pt1_write_reg(pt1, 0, 0x00000010);
138 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
140 pt1_write_reg(pt1, 5, first_pfn);
141 pt1_write_reg(pt1, 0, 0x0c000040);
144 static void pt1_unregister_tables(struct pt1 *pt1)
146 pt1_write_reg(pt1, 0, 0x08080000);
149 static int pt1_sync(struct pt1 *pt1)
152 for (i = 0; i < 57; i++) {
153 if (pt1_read_reg(pt1, 0) & 0x20000000)
155 pt1_write_reg(pt1, 0, 0x00000008);
157 pt1_printk(KERN_ERR, pt1, "could not sync\n");
161 static u64 pt1_identify(struct pt1 *pt1)
166 for (i = 0; i < 57; i++) {
167 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
168 pt1_write_reg(pt1, 0, 0x00000008);
173 static int pt1_unlock(struct pt1 *pt1)
176 pt1_write_reg(pt1, 0, 0x00000008);
177 for (i = 0; i < 3; i++) {
178 if (pt1_read_reg(pt1, 0) & 0x80000000)
180 schedule_timeout_uninterruptible((HZ + 999) / 1000);
182 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
186 static int pt1_reset_pci(struct pt1 *pt1)
189 pt1_write_reg(pt1, 0, 0x01010000);
190 pt1_write_reg(pt1, 0, 0x01000000);
191 for (i = 0; i < 10; i++) {
192 if (pt1_read_reg(pt1, 0) & 0x00000001)
194 schedule_timeout_uninterruptible((HZ + 999) / 1000);
196 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
200 static int pt1_reset_ram(struct pt1 *pt1)
203 pt1_write_reg(pt1, 0, 0x02020000);
204 pt1_write_reg(pt1, 0, 0x02000000);
205 for (i = 0; i < 10; i++) {
206 if (pt1_read_reg(pt1, 0) & 0x00000002)
208 schedule_timeout_uninterruptible((HZ + 999) / 1000);
210 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
214 static int pt1_do_enable_ram(struct pt1 *pt1)
218 status = pt1_read_reg(pt1, 0) & 0x00000004;
219 pt1_write_reg(pt1, 0, 0x00000002);
220 for (i = 0; i < 10; i++) {
221 for (j = 0; j < 1024; j++) {
222 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
225 schedule_timeout_uninterruptible((HZ + 999) / 1000);
227 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
231 static int pt1_enable_ram(struct pt1 *pt1)
235 schedule_timeout_uninterruptible((HZ + 999) / 1000);
236 phase = pt1->pdev->device == 0x211a ? 128 : 166;
237 for (i = 0; i < phase; i++) {
238 ret = pt1_do_enable_ram(pt1);
245 static void pt1_disable_ram(struct pt1 *pt1)
247 pt1_write_reg(pt1, 0, 0x0b0b0000);
250 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
252 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
255 static void pt1_init_streams(struct pt1 *pt1)
258 for (i = 0; i < PT1_NR_ADAPS; i++)
259 pt1_set_stream(pt1, i, 0);
262 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
267 struct pt1_adapter *adap;
272 if (!page->upackets[PT1_NR_UPACKETS - 1])
275 for (i = 0; i < PT1_NR_UPACKETS; i++) {
276 upacket = le32_to_cpu(page->upackets[i]);
277 index = (upacket >> 29) - 1;
278 if (index < 0 || index >= PT1_NR_ADAPS)
281 adap = pt1->adaps[index];
282 if (upacket >> 25 & 1)
283 adap->upacket_count = 0;
284 else if (!adap->upacket_count)
287 if (upacket >> 24 & 1)
288 printk_ratelimited(KERN_INFO "earth-pt1: device "
289 "buffer overflowing. table[%d] buf[%d]\n",
290 pt1->table_index, pt1->buf_index);
291 sc = upacket >> 26 & 0x7;
292 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
293 printk_ratelimited(KERN_INFO "earth-pt1: data loss"
294 " in streamID(adapter)[%d]\n", index);
298 offset = adap->packet_count * 188 + adap->upacket_count * 3;
299 buf[offset] = upacket >> 16;
300 buf[offset + 1] = upacket >> 8;
301 if (adap->upacket_count != 62)
302 buf[offset + 2] = upacket;
304 if (++adap->upacket_count >= 63) {
305 adap->upacket_count = 0;
306 if (++adap->packet_count >= 21) {
307 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
308 adap->packet_count = 0;
313 page->upackets[PT1_NR_UPACKETS - 1] = 0;
317 static int pt1_thread(void *data)
320 struct pt1_buffer_page *page;
325 while (!kthread_should_stop()) {
328 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
329 if (!pt1_filter(pt1, page)) {
330 schedule_timeout_interruptible((HZ + 999) / 1000);
334 if (++pt1->buf_index >= PT1_NR_BUFS) {
335 pt1_increment_table_count(pt1);
337 if (++pt1->table_index >= pt1_nr_tables)
338 pt1->table_index = 0;
345 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
347 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
350 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
355 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
360 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
361 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
364 *pfnp = addr >> PT1_PAGE_SHIFT;
368 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
370 pt1_free_page(pt1, buf->page, buf->addr);
374 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
376 struct pt1_buffer_page *page;
379 page = pt1_alloc_page(pt1, &addr, pfnp);
383 page->upackets[PT1_NR_UPACKETS - 1] = 0;
390 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
394 for (i = 0; i < PT1_NR_BUFS; i++)
395 pt1_cleanup_buffer(pt1, &table->bufs[i]);
397 pt1_free_page(pt1, table->page, table->addr);
401 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
403 struct pt1_table_page *page;
408 page = pt1_alloc_page(pt1, &addr, pfnp);
412 for (i = 0; i < PT1_NR_BUFS; i++) {
413 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
417 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
420 pt1_increment_table_count(pt1);
427 pt1_cleanup_buffer(pt1, &table->bufs[i]);
429 pt1_free_page(pt1, page, addr);
433 static void pt1_cleanup_tables(struct pt1 *pt1)
435 struct pt1_table *tables;
438 tables = pt1->tables;
439 pt1_unregister_tables(pt1);
441 for (i = 0; i < pt1_nr_tables; i++)
442 pt1_cleanup_table(pt1, &tables[i]);
447 static int pt1_init_tables(struct pt1 *pt1)
449 struct pt1_table *tables;
453 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
457 pt1_init_table_count(pt1);
461 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
467 while (i < pt1_nr_tables) {
468 ret = pt1_init_table(pt1, &tables[i], &pfn);
471 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
475 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
477 pt1_register_tables(pt1, first_pfn);
478 pt1->tables = tables;
483 pt1_cleanup_table(pt1, &tables[i]);
489 static int pt1_start_polling(struct pt1 *pt1)
493 mutex_lock(&pt1->lock);
495 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
496 if (IS_ERR(pt1->kthread)) {
497 ret = PTR_ERR(pt1->kthread);
501 mutex_unlock(&pt1->lock);
505 static int pt1_start_feed(struct dvb_demux_feed *feed)
507 struct pt1_adapter *adap;
508 adap = container_of(feed->demux, struct pt1_adapter, demux);
509 if (!adap->users++) {
512 ret = pt1_start_polling(adap->pt1);
515 pt1_set_stream(adap->pt1, adap->index, 1);
520 static void pt1_stop_polling(struct pt1 *pt1)
524 mutex_lock(&pt1->lock);
525 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
526 count += pt1->adaps[i]->users;
528 if (count == 0 && pt1->kthread) {
529 kthread_stop(pt1->kthread);
532 mutex_unlock(&pt1->lock);
535 static int pt1_stop_feed(struct dvb_demux_feed *feed)
537 struct pt1_adapter *adap;
538 adap = container_of(feed->demux, struct pt1_adapter, demux);
539 if (!--adap->users) {
540 pt1_set_stream(adap->pt1, adap->index, 0);
541 pt1_stop_polling(adap->pt1);
547 pt1_update_power(struct pt1 *pt1)
551 struct pt1_adapter *adap;
552 static const int sleep_bits[] = {
559 bits = pt1->power | !pt1->reset << 3;
560 mutex_lock(&pt1->lock);
561 for (i = 0; i < PT1_NR_ADAPS; i++) {
562 adap = pt1->adaps[i];
563 switch (adap->voltage) {
564 case SEC_VOLTAGE_13: /* actually 11V */
567 case SEC_VOLTAGE_18: /* actually 15V */
568 bits |= 1 << 1 | 1 << 2;
574 /* XXX: The bits should be changed depending on adap->sleep. */
575 bits |= sleep_bits[i];
577 pt1_write_reg(pt1, 1, bits);
578 mutex_unlock(&pt1->lock);
581 static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
583 struct pt1_adapter *adap;
585 adap = container_of(fe->dvb, struct pt1_adapter, adap);
586 adap->voltage = voltage;
587 pt1_update_power(adap->pt1);
589 if (adap->orig_set_voltage)
590 return adap->orig_set_voltage(fe, voltage);
595 static int pt1_sleep(struct dvb_frontend *fe)
597 struct pt1_adapter *adap;
599 adap = container_of(fe->dvb, struct pt1_adapter, adap);
601 pt1_update_power(adap->pt1);
603 if (adap->orig_sleep)
604 return adap->orig_sleep(fe);
609 static int pt1_wakeup(struct dvb_frontend *fe)
611 struct pt1_adapter *adap;
613 adap = container_of(fe->dvb, struct pt1_adapter, adap);
615 pt1_update_power(adap->pt1);
616 schedule_timeout_uninterruptible((HZ + 999) / 1000);
619 return adap->orig_init(fe);
624 static void pt1_free_adapter(struct pt1_adapter *adap)
626 adap->demux.dmx.close(&adap->demux.dmx);
627 dvb_dmxdev_release(&adap->dmxdev);
628 dvb_dmx_release(&adap->demux);
629 dvb_unregister_adapter(&adap->adap);
630 free_page((unsigned long)adap->buf);
634 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
636 static struct pt1_adapter *
637 pt1_alloc_adapter(struct pt1 *pt1)
639 struct pt1_adapter *adap;
641 struct dvb_adapter *dvb_adap;
642 struct dvb_demux *demux;
643 struct dmxdev *dmxdev;
646 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
654 adap->voltage = SEC_VOLTAGE_OFF;
657 buf = (u8 *)__get_free_page(GFP_KERNEL);
664 adap->upacket_count = 0;
665 adap->packet_count = 0;
668 dvb_adap = &adap->adap;
669 dvb_adap->priv = adap;
670 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
671 &pt1->pdev->dev, adapter_nr);
675 demux = &adap->demux;
676 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
678 demux->feednum = 256;
679 demux->filternum = 256;
680 demux->start_feed = pt1_start_feed;
681 demux->stop_feed = pt1_stop_feed;
682 demux->write_to_decoder = NULL;
683 ret = dvb_dmx_init(demux);
685 goto err_unregister_adapter;
687 dmxdev = &adap->dmxdev;
688 dmxdev->filternum = 256;
689 dmxdev->demux = &demux->dmx;
690 dmxdev->capabilities = 0;
691 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
693 goto err_dmx_release;
698 dvb_dmx_release(demux);
699 err_unregister_adapter:
700 dvb_unregister_adapter(dvb_adap);
702 free_page((unsigned long)buf);
709 static void pt1_cleanup_adapters(struct pt1 *pt1)
712 for (i = 0; i < PT1_NR_ADAPS; i++)
713 pt1_free_adapter(pt1->adaps[i]);
716 static int pt1_init_adapters(struct pt1 *pt1)
719 struct pt1_adapter *adap;
722 for (i = 0; i < PT1_NR_ADAPS; i++) {
723 adap = pt1_alloc_adapter(pt1);
730 pt1->adaps[i] = adap;
736 pt1_free_adapter(pt1->adaps[i]);
741 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
743 dvb_unregister_frontend(adap->fe);
746 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
750 adap->orig_set_voltage = fe->ops.set_voltage;
751 adap->orig_sleep = fe->ops.sleep;
752 adap->orig_init = fe->ops.init;
753 fe->ops.set_voltage = pt1_set_voltage;
754 fe->ops.sleep = pt1_sleep;
755 fe->ops.init = pt1_wakeup;
757 ret = dvb_register_frontend(&adap->adap, fe);
765 static void pt1_cleanup_frontends(struct pt1 *pt1)
768 for (i = 0; i < PT1_NR_ADAPS; i++)
769 pt1_cleanup_frontend(pt1->adaps[i]);
773 struct va1j5jf8007s_config va1j5jf8007s_config;
774 struct va1j5jf8007t_config va1j5jf8007t_config;
777 static const struct pt1_config pt1_configs[2] = {
780 .demod_address = 0x1b,
781 .frequency = VA1J5JF8007S_20MHZ,
784 .demod_address = 0x1a,
785 .frequency = VA1J5JF8007T_20MHZ,
789 .demod_address = 0x19,
790 .frequency = VA1J5JF8007S_20MHZ,
793 .demod_address = 0x18,
794 .frequency = VA1J5JF8007T_20MHZ,
799 static const struct pt1_config pt2_configs[2] = {
802 .demod_address = 0x1b,
803 .frequency = VA1J5JF8007S_25MHZ,
806 .demod_address = 0x1a,
807 .frequency = VA1J5JF8007T_25MHZ,
811 .demod_address = 0x19,
812 .frequency = VA1J5JF8007S_25MHZ,
815 .demod_address = 0x18,
816 .frequency = VA1J5JF8007T_25MHZ,
821 static int pt1_init_frontends(struct pt1 *pt1)
824 struct i2c_adapter *i2c_adap;
825 const struct pt1_config *configs, *config;
826 struct dvb_frontend *fe[4];
832 i2c_adap = &pt1->i2c_adap;
833 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
835 config = &configs[i / 2];
837 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
840 ret = -ENODEV; /* This does not sound nice... */
845 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
853 ret = va1j5jf8007s_prepare(fe[i - 2]);
857 ret = va1j5jf8007t_prepare(fe[i - 1]);
864 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
873 fe[i]->ops.release(fe[i]);
876 dvb_unregister_frontend(fe[j]);
881 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
882 int clock, int data, int next_addr)
884 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
885 !clock << 11 | !data << 10 | next_addr);
888 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
890 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
891 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
892 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
896 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
898 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
899 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
900 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
901 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
905 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
908 for (i = 0; i < 8; i++)
909 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
910 pt1_i2c_write_bit(pt1, addr, &addr, 1);
914 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
917 for (i = 0; i < 8; i++)
918 pt1_i2c_read_bit(pt1, addr, &addr);
919 pt1_i2c_write_bit(pt1, addr, &addr, last);
923 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
925 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
926 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
927 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
932 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
935 pt1_i2c_prepare(pt1, addr, &addr);
936 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
937 for (i = 0; i < msg->len; i++)
938 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
943 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
946 pt1_i2c_prepare(pt1, addr, &addr);
947 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
948 for (i = 0; i < msg->len; i++)
949 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
953 static int pt1_i2c_end(struct pt1 *pt1, int addr)
955 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
956 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
957 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
959 pt1_write_reg(pt1, 0, 0x00000004);
961 if (signal_pending(current))
963 schedule_timeout_interruptible((HZ + 999) / 1000);
964 } while (pt1_read_reg(pt1, 0) & 0x00000080);
968 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
973 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
976 if (!pt1->i2c_running) {
977 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
978 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
980 pt1->i2c_running = 1;
985 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
989 struct i2c_msg *msg, *next_msg;
994 pt1 = i2c_get_adapdata(adap);
996 for (i = 0; i < num; i++) {
998 if (msg->flags & I2C_M_RD)
1002 next_msg = &msgs[i + 1];
1006 if (next_msg && next_msg->flags & I2C_M_RD) {
1009 len = next_msg->len;
1013 pt1_i2c_begin(pt1, &addr);
1014 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1015 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1016 ret = pt1_i2c_end(pt1, addr);
1020 word = pt1_read_reg(pt1, 2);
1022 next_msg->buf[len] = word;
1026 pt1_i2c_begin(pt1, &addr);
1027 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1028 ret = pt1_i2c_end(pt1, addr);
1037 static u32 pt1_i2c_func(struct i2c_adapter *adap)
1039 return I2C_FUNC_I2C;
1042 static const struct i2c_algorithm pt1_i2c_algo = {
1043 .master_xfer = pt1_i2c_xfer,
1044 .functionality = pt1_i2c_func,
1047 static void pt1_i2c_wait(struct pt1 *pt1)
1050 for (i = 0; i < 128; i++)
1051 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1054 static void pt1_i2c_init(struct pt1 *pt1)
1057 for (i = 0; i < 1024; i++)
1058 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1061 static void pt1_remove(struct pci_dev *pdev)
1066 pt1 = pci_get_drvdata(pdev);
1070 kthread_stop(pt1->kthread);
1071 pt1_cleanup_tables(pt1);
1072 pt1_cleanup_frontends(pt1);
1073 pt1_disable_ram(pt1);
1076 pt1_update_power(pt1);
1077 pt1_cleanup_adapters(pt1);
1078 i2c_del_adapter(&pt1->i2c_adap);
1079 pci_set_drvdata(pdev, NULL);
1081 pci_iounmap(pdev, regs);
1082 pci_release_regions(pdev);
1083 pci_disable_device(pdev);
1086 static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1091 struct i2c_adapter *i2c_adap;
1093 ret = pci_enable_device(pdev);
1097 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1099 goto err_pci_disable_device;
1101 pci_set_master(pdev);
1103 ret = pci_request_regions(pdev, DRIVER_NAME);
1105 goto err_pci_disable_device;
1107 regs = pci_iomap(pdev, 0, 0);
1110 goto err_pci_release_regions;
1113 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1116 goto err_pci_iounmap;
1119 mutex_init(&pt1->lock);
1122 pci_set_drvdata(pdev, pt1);
1124 ret = pt1_init_adapters(pt1);
1128 mutex_init(&pt1->lock);
1132 pt1_update_power(pt1);
1134 i2c_adap = &pt1->i2c_adap;
1135 i2c_adap->algo = &pt1_i2c_algo;
1136 i2c_adap->algo_data = NULL;
1137 i2c_adap->dev.parent = &pdev->dev;
1138 strcpy(i2c_adap->name, DRIVER_NAME);
1139 i2c_set_adapdata(i2c_adap, pt1);
1140 ret = i2c_add_adapter(i2c_adap);
1142 goto err_pt1_cleanup_adapters;
1147 ret = pt1_sync(pt1);
1149 goto err_i2c_del_adapter;
1153 ret = pt1_unlock(pt1);
1155 goto err_i2c_del_adapter;
1157 ret = pt1_reset_pci(pt1);
1159 goto err_i2c_del_adapter;
1161 ret = pt1_reset_ram(pt1);
1163 goto err_i2c_del_adapter;
1165 ret = pt1_enable_ram(pt1);
1167 goto err_i2c_del_adapter;
1169 pt1_init_streams(pt1);
1172 pt1_update_power(pt1);
1173 schedule_timeout_uninterruptible((HZ + 49) / 50);
1176 pt1_update_power(pt1);
1177 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1179 ret = pt1_init_frontends(pt1);
1181 goto err_pt1_disable_ram;
1183 ret = pt1_init_tables(pt1);
1185 goto err_pt1_cleanup_frontends;
1189 err_pt1_cleanup_frontends:
1190 pt1_cleanup_frontends(pt1);
1191 err_pt1_disable_ram:
1192 pt1_disable_ram(pt1);
1195 pt1_update_power(pt1);
1196 err_i2c_del_adapter:
1197 i2c_del_adapter(i2c_adap);
1198 err_pt1_cleanup_adapters:
1199 pt1_cleanup_adapters(pt1);
1201 pci_set_drvdata(pdev, NULL);
1204 pci_iounmap(pdev, regs);
1205 err_pci_release_regions:
1206 pci_release_regions(pdev);
1207 err_pci_disable_device:
1208 pci_disable_device(pdev);
1214 static struct pci_device_id pt1_id_table[] = {
1215 { PCI_DEVICE(0x10ee, 0x211a) },
1216 { PCI_DEVICE(0x10ee, 0x222a) },
1219 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1221 static struct pci_driver pt1_driver = {
1222 .name = DRIVER_NAME,
1224 .remove = pt1_remove,
1225 .id_table = pt1_id_table,
1229 static int __init pt1_init(void)
1231 return pci_register_driver(&pt1_driver);
1235 static void __exit pt1_cleanup(void)
1237 pci_unregister_driver(&pt1_driver);
1240 module_init(pt1_init);
1241 module_exit(pt1_cleanup);
1243 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1244 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1245 MODULE_LICENSE("GPL");