1 // SPDX-License-Identifier: GPL-2.0+
3 * IMI RDACM21 GMSL Camera Driver
5 * Copyright (C) 2017-2020 Jacopo Mondi
6 * Copyright (C) 2017-2019 Kieran Bingham
7 * Copyright (C) 2017-2019 Laurent Pinchart
8 * Copyright (C) 2017-2019 Niklas Söderlund
9 * Copyright (C) 2016 Renesas Electronics Corporation
10 * Copyright (C) 2015 Cogent Embedded, Inc.
13 #include <linux/delay.h>
14 #include <linux/fwnode.h>
15 #include <linux/init.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/videodev2.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-subdev.h>
26 #define MAX9271_RESET_CYCLES 10
28 #define OV490_I2C_ADDRESS 0x24
30 #define OV490_PAGE_HIGH_REG 0xfffd
31 #define OV490_PAGE_LOW_REG 0xfffe
34 * The SCCB slave handling is undocumented; the registers naming scheme is
37 #define OV490_SCCB_SLAVE_WRITE 0x00
38 #define OV490_SCCB_SLAVE_READ 0x01
39 #define OV490_SCCB_SLAVE0_DIR 0x80195000
40 #define OV490_SCCB_SLAVE0_ADDR_HIGH 0x80195001
41 #define OV490_SCCB_SLAVE0_ADDR_LOW 0x80195002
43 #define OV490_DVP_CTRL3 0x80286009
45 #define OV490_ODS_CTRL_FRAME_OUTPUT_EN 0x0c
46 #define OV490_ODS_CTRL 0x8029d000
48 #define OV490_HOST_CMD 0x808000c0
49 #define OV490_HOST_CMD_TRIGGER 0xc1
51 #define OV490_ID_VAL 0x0490
52 #define OV490_ID(_p, _v) ((((_p) & 0xff) << 8) | ((_v) & 0xff))
53 #define OV490_PID 0x8080300a
54 #define OV490_VER 0x8080300b
55 #define OV490_PID_TIMEOUT 20
56 #define OV490_OUTPUT_EN_TIMEOUT 300
58 #define OV490_GPIO0 BIT(0)
59 #define OV490_SPWDN0 BIT(0)
60 #define OV490_GPIO_SEL0 0x80800050
61 #define OV490_GPIO_SEL1 0x80800051
62 #define OV490_GPIO_DIRECTION0 0x80800054
63 #define OV490_GPIO_DIRECTION1 0x80800055
64 #define OV490_GPIO_OUTPUT_VALUE0 0x80800058
65 #define OV490_GPIO_OUTPUT_VALUE1 0x80800059
67 #define OV490_ISP_HSIZE_LOW 0x80820060
68 #define OV490_ISP_HSIZE_HIGH 0x80820061
69 #define OV490_ISP_VSIZE_LOW 0x80820062
70 #define OV490_ISP_VSIZE_HIGH 0x80820063
72 #define OV10640_ID_HIGH 0xa6
73 #define OV10640_CHIP_ID 0x300a
74 #define OV10640_PIXEL_RATE 55000000
76 struct rdacm21_device {
78 struct max9271_device serializer;
79 struct i2c_client *isp;
80 struct v4l2_subdev sd;
82 struct v4l2_mbus_framefmt fmt;
83 struct v4l2_ctrl_handler ctrls;
88 static inline struct rdacm21_device *sd_to_rdacm21(struct v4l2_subdev *sd)
90 return container_of(sd, struct rdacm21_device, sd);
93 static const struct ov490_reg {
96 } ov490_regs_wizard[] = {
104 * OV490 EMB line disable in YUV and RAW data,
105 * NOTE: EMB line is still used in ISP and sensor
112 * PCLK polarity - useless due to silicon bug.
113 * Use 0x808000bb register instead.
118 /* bit[3]=0 - PCLK polarity workaround. */
120 /* Ov490 FSIN: app_fsin_from_fsync */
152 * Load fsin0,load fsin1,load other,
153 * It will be cleared automatically.
162 /* ov10640 FSIN enable */
170 /* ov10640 HFLIP=1 by default */
178 static int ov490_read(struct rdacm21_device *dev, u16 reg, u8 *val)
180 u8 buf[2] = { reg >> 8, reg };
183 ret = i2c_master_send(dev->isp, buf, 2);
185 ret = i2c_master_recv(dev->isp, val, 1);
188 dev_dbg(dev->dev, "%s: register 0x%04x read failed (%d)\n",
196 static int ov490_write(struct rdacm21_device *dev, u16 reg, u8 val)
198 u8 buf[3] = { reg >> 8, reg, val };
201 ret = i2c_master_send(dev->isp, buf, 3);
203 dev_err(dev->dev, "%s: register 0x%04x write failed (%d)\n",
211 static int ov490_set_page(struct rdacm21_device *dev, u16 page)
213 u8 page_high = page >> 8;
217 if (page == dev->last_page)
220 if (page_high != (dev->last_page >> 8)) {
221 ret = ov490_write(dev, OV490_PAGE_HIGH_REG, page_high);
226 if (page_low != (u8)dev->last_page) {
227 ret = ov490_write(dev, OV490_PAGE_LOW_REG, page_low);
232 dev->last_page = page;
233 usleep_range(100, 150);
238 static int ov490_read_reg(struct rdacm21_device *dev, u32 reg, u8 *val)
242 ret = ov490_set_page(dev, reg >> 16);
246 ret = ov490_read(dev, (u16)reg, val);
250 dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, *val);
255 static int ov490_write_reg(struct rdacm21_device *dev, u32 reg, u8 val)
259 ret = ov490_set_page(dev, reg >> 16);
263 ret = ov490_write(dev, (u16)reg, val);
267 dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, val);
272 static int rdacm21_s_stream(struct v4l2_subdev *sd, int enable)
274 struct rdacm21_device *dev = sd_to_rdacm21(sd);
277 * Enable serial link now that the ISP provides a valid pixel clock
278 * to start serializing video data on the GMSL link.
280 return max9271_set_serial_link(&dev->serializer, enable);
283 static int rdacm21_enum_mbus_code(struct v4l2_subdev *sd,
284 struct v4l2_subdev_state *sd_state,
285 struct v4l2_subdev_mbus_code_enum *code)
287 if (code->pad || code->index > 0)
290 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
295 static int rdacm21_get_fmt(struct v4l2_subdev *sd,
296 struct v4l2_subdev_state *sd_state,
297 struct v4l2_subdev_format *format)
299 struct v4l2_mbus_framefmt *mf = &format->format;
300 struct rdacm21_device *dev = sd_to_rdacm21(sd);
305 mf->width = dev->fmt.width;
306 mf->height = dev->fmt.height;
307 mf->code = MEDIA_BUS_FMT_YUYV8_1X16;
308 mf->colorspace = V4L2_COLORSPACE_SRGB;
309 mf->field = V4L2_FIELD_NONE;
310 mf->ycbcr_enc = V4L2_YCBCR_ENC_601;
311 mf->quantization = V4L2_QUANTIZATION_FULL_RANGE;
312 mf->xfer_func = V4L2_XFER_FUNC_NONE;
317 static const struct v4l2_subdev_video_ops rdacm21_video_ops = {
318 .s_stream = rdacm21_s_stream,
321 static const struct v4l2_subdev_pad_ops rdacm21_subdev_pad_ops = {
322 .enum_mbus_code = rdacm21_enum_mbus_code,
323 .get_fmt = rdacm21_get_fmt,
324 .set_fmt = rdacm21_get_fmt,
327 static const struct v4l2_subdev_ops rdacm21_subdev_ops = {
328 .video = &rdacm21_video_ops,
329 .pad = &rdacm21_subdev_pad_ops,
332 static int ov10640_initialize(struct rdacm21_device *dev)
336 /* Power-up OV10640 by setting RESETB and PWDNB pins high. */
337 ov490_write_reg(dev, OV490_GPIO_SEL0, OV490_GPIO0);
338 ov490_write_reg(dev, OV490_GPIO_SEL1, OV490_SPWDN0);
339 ov490_write_reg(dev, OV490_GPIO_DIRECTION0, OV490_GPIO0);
340 ov490_write_reg(dev, OV490_GPIO_DIRECTION1, OV490_SPWDN0);
341 ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, OV490_GPIO0);
342 ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, OV490_SPWDN0);
343 usleep_range(3000, 5000);
345 /* Read OV10640 ID to test communications. */
346 ov490_write_reg(dev, OV490_SCCB_SLAVE0_DIR, OV490_SCCB_SLAVE_READ);
347 ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_HIGH, OV10640_CHIP_ID >> 8);
348 ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_LOW, OV10640_CHIP_ID & 0xff);
350 /* Trigger SCCB slave transaction and give it some time to complete. */
351 ov490_write_reg(dev, OV490_HOST_CMD, OV490_HOST_CMD_TRIGGER);
352 usleep_range(1000, 1500);
354 ov490_read_reg(dev, OV490_SCCB_SLAVE0_DIR, &val);
355 if (val != OV10640_ID_HIGH) {
356 dev_err(dev->dev, "OV10640 ID mismatch: (0x%02x)\n", val);
360 dev_dbg(dev->dev, "OV10640 ID = 0x%2x\n", val);
365 static int ov490_initialize(struct rdacm21_device *dev)
372 * Read OV490 Id to test communications. Give it up to 40msec to
375 for (i = 0; i < OV490_PID_TIMEOUT; ++i) {
376 ret = ov490_read_reg(dev, OV490_PID, &pid);
379 usleep_range(1000, 2000);
381 if (i == OV490_PID_TIMEOUT) {
382 dev_err(dev->dev, "OV490 PID read failed (%d)\n", ret);
386 ret = ov490_read_reg(dev, OV490_VER, &ver);
390 if (OV490_ID(pid, ver) != OV490_ID_VAL) {
391 dev_err(dev->dev, "OV490 ID mismatch (0x%04x)\n",
396 /* Wait for firmware boot by reading streamon status. */
397 for (i = 0; i < OV490_OUTPUT_EN_TIMEOUT; ++i) {
398 ov490_read_reg(dev, OV490_ODS_CTRL, &val);
399 if (val == OV490_ODS_CTRL_FRAME_OUTPUT_EN)
401 usleep_range(1000, 2000);
403 if (i == OV490_OUTPUT_EN_TIMEOUT) {
404 dev_err(dev->dev, "Timeout waiting for firmware boot\n");
408 ret = ov10640_initialize(dev);
412 /* Program OV490 with register-value table. */
413 for (i = 0; i < ARRAY_SIZE(ov490_regs_wizard); ++i) {
414 ret = ov490_write(dev, ov490_regs_wizard[i].reg,
415 ov490_regs_wizard[i].val);
418 "%s: register %u (0x%04x) write failed (%d)\n",
419 __func__, i, ov490_regs_wizard[i].reg, ret);
424 usleep_range(100, 150);
428 * The ISP is programmed with the content of a serial flash memory.
429 * Read the firmware configuration to reflect it through the V4L2 APIs.
431 ov490_read_reg(dev, OV490_ISP_HSIZE_HIGH, &val);
432 dev->fmt.width = (val & 0xf) << 8;
433 ov490_read_reg(dev, OV490_ISP_HSIZE_LOW, &val);
434 dev->fmt.width |= (val & 0xff);
436 ov490_read_reg(dev, OV490_ISP_VSIZE_HIGH, &val);
437 dev->fmt.height = (val & 0xf) << 8;
438 ov490_read_reg(dev, OV490_ISP_VSIZE_LOW, &val);
439 dev->fmt.height |= val & 0xff;
441 /* Set bus width to 12 bits with [0:11] ordering. */
442 ov490_write_reg(dev, OV490_DVP_CTRL3, 0x10);
444 dev_info(dev->dev, "Identified RDACM21 camera module\n");
449 static int rdacm21_initialize(struct rdacm21_device *dev)
453 max9271_wake_up(&dev->serializer);
455 /* Enable reverse channel and disable the serial link. */
456 ret = max9271_set_serial_link(&dev->serializer, false);
460 /* Configure I2C bus at 105Kbps speed and configure GMSL. */
461 ret = max9271_configure_i2c(&dev->serializer,
462 MAX9271_I2CSLVSH_469NS_234NS |
463 MAX9271_I2CSLVTO_1024US |
464 MAX9271_I2CMSTBT_105KBPS);
468 ret = max9271_verify_id(&dev->serializer);
473 * Enable GPIO1 and hold OV490 in reset during max9271 configuration.
474 * The reset signal has to be asserted for at least 250 useconds.
476 ret = max9271_enable_gpios(&dev->serializer, MAX9271_GPIO1OUT);
480 ret = max9271_clear_gpios(&dev->serializer, MAX9271_GPIO1OUT);
483 usleep_range(250, 500);
485 ret = max9271_configure_gmsl_link(&dev->serializer);
489 ret = max9271_set_address(&dev->serializer, dev->addrs[0]);
492 dev->serializer.client->addr = dev->addrs[0];
494 ret = max9271_set_translation(&dev->serializer, dev->addrs[1],
498 dev->isp->addr = dev->addrs[1];
500 /* Release OV490 from reset and initialize it. */
501 ret = max9271_set_gpios(&dev->serializer, MAX9271_GPIO1OUT);
504 usleep_range(3000, 5000);
506 ret = ov490_initialize(dev);
511 * Set reverse channel high threshold to increase noise immunity.
513 * This should be compensated by increasing the reverse channel
514 * amplitude on the remote deserializer side.
516 return max9271_set_high_threshold(&dev->serializer, true);
519 static int rdacm21_probe(struct i2c_client *client)
521 struct rdacm21_device *dev;
522 struct fwnode_handle *ep;
525 dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
528 dev->dev = &client->dev;
529 dev->serializer.client = client;
531 ret = of_property_read_u32_array(client->dev.of_node, "reg",
534 dev_err(dev->dev, "Invalid DT reg property: %d\n", ret);
538 /* Create the dummy I2C client for the sensor. */
539 dev->isp = i2c_new_dummy_device(client->adapter, OV490_I2C_ADDRESS);
540 if (IS_ERR(dev->isp))
541 return PTR_ERR(dev->isp);
543 ret = rdacm21_initialize(dev);
547 /* Initialize and register the subdevice. */
548 v4l2_i2c_subdev_init(&dev->sd, client, &rdacm21_subdev_ops);
549 dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
551 v4l2_ctrl_handler_init(&dev->ctrls, 1);
552 v4l2_ctrl_new_std(&dev->ctrls, NULL, V4L2_CID_PIXEL_RATE,
553 OV10640_PIXEL_RATE, OV10640_PIXEL_RATE, 1,
555 dev->sd.ctrl_handler = &dev->ctrls;
557 ret = dev->ctrls.error;
559 goto error_free_ctrls;
561 dev->pad.flags = MEDIA_PAD_FL_SOURCE;
562 dev->sd.entity.flags |= MEDIA_ENT_F_CAM_SENSOR;
563 ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad);
565 goto error_free_ctrls;
567 ep = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
569 dev_err(&client->dev,
570 "Unable to get endpoint in node %pOF\n",
571 client->dev.of_node);
573 goto error_free_ctrls;
577 ret = v4l2_async_register_subdev(&dev->sd);
584 fwnode_handle_put(dev->sd.fwnode);
586 v4l2_ctrl_handler_free(&dev->ctrls);
588 i2c_unregister_device(dev->isp);
593 static int rdacm21_remove(struct i2c_client *client)
595 struct rdacm21_device *dev = sd_to_rdacm21(i2c_get_clientdata(client));
597 v4l2_async_unregister_subdev(&dev->sd);
598 v4l2_ctrl_handler_free(&dev->ctrls);
599 i2c_unregister_device(dev->isp);
600 fwnode_handle_put(dev->sd.fwnode);
605 static const struct of_device_id rdacm21_of_ids[] = {
606 { .compatible = "imi,rdacm21" },
609 MODULE_DEVICE_TABLE(of, rdacm21_of_ids);
611 static struct i2c_driver rdacm21_i2c_driver = {
614 .of_match_table = rdacm21_of_ids,
616 .probe_new = rdacm21_probe,
617 .remove = rdacm21_remove,
620 module_i2c_driver(rdacm21_i2c_driver);
622 MODULE_DESCRIPTION("GMSL Camera driver for RDACM21");
623 MODULE_AUTHOR("Jacopo Mondi");
624 MODULE_LICENSE("GPL v2");