drivers/media/i2c/ov7251.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Driver for the OV7251 camera sensor.
   4  *
   5  * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
   6  * Copyright (c) 2017-2018, Linaro Ltd.
   7  */
   8
   9 #include <linux/bitops.h>
  10 #include <linux/clk.h>
  11 #include <linux/delay.h>
  12 #include <linux/device.h>
  13 #include <linux/gpio/consumer.h>
  14 #include <linux/i2c.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/mod_devicetable.h>
  18 #include <linux/pm_runtime.h>
  19 #include <linux/regulator/consumer.h>
  20 #include <linux/slab.h>
  21 #include <linux/types.h>
  22 #include <media/v4l2-ctrls.h>
  23 #include <media/v4l2-fwnode.h>
  24 #include <media/v4l2-subdev.h>
  25
  26 #define OV7251_SC_MODE_SELECT           0x0100
  27 #define OV7251_SC_MODE_SELECT_SW_STANDBY        0x0
  28 #define OV7251_SC_MODE_SELECT_STREAMING         0x1
  29
  30 #define OV7251_CHIP_ID_HIGH             0x300a
  31 #define OV7251_CHIP_ID_HIGH_BYTE        0x77
  32 #define OV7251_CHIP_ID_LOW              0x300b
  33 #define OV7251_CHIP_ID_LOW_BYTE         0x50
  34 #define OV7251_SC_GP_IO_IN1             0x3029
  35 #define OV7251_AEC_EXPO_0               0x3500
  36 #define OV7251_AEC_EXPO_1               0x3501
  37 #define OV7251_AEC_EXPO_2               0x3502
  38 #define OV7251_AEC_AGC_ADJ_0            0x350a
  39 #define OV7251_AEC_AGC_ADJ_1            0x350b
  40 /* Exposure must be at least 20 lines shorter than VTS */
  41 #define OV7251_EXPOSURE_OFFSET          20
  42  /* HTS is registers 0x380c and 0x380d */
  43 #define OV7251_HTS                      0x3a0
  44 #define OV7251_VTS_HIGH                 0x380e
  45 #define OV7251_VTS_LOW                  0x380f
  46 #define OV7251_VTS_MIN_OFFSET           92
  47 #define OV7251_VTS_MAX                  0x7fff
  48 #define OV7251_TIMING_FORMAT1           0x3820
  49 #define OV7251_TIMING_FORMAT1_VFLIP     BIT(2)
  50 #define OV7251_TIMING_FORMAT2           0x3821
  51 #define OV7251_TIMING_FORMAT2_MIRROR    BIT(2)
  52 #define OV7251_PRE_ISP_00               0x5e00
  53 #define OV7251_PRE_ISP_00_TEST_PATTERN  BIT(7)
  54 #define OV7251_PLL1_PRE_DIV_REG         0x30b4
  55 #define OV7251_PLL1_MULT_REG            0x30b3
  56 #define OV7251_PLL1_DIVIDER_REG         0x30b1
  57 #define OV7251_PLL1_PIX_DIV_REG         0x30b0
  58 #define OV7251_PLL1_MIPI_DIV_REG        0x30b5
  59 #define OV7251_PLL2_PRE_DIV_REG         0x3098
  60 #define OV7251_PLL2_MULT_REG            0x3099
  61 #define OV7251_PLL2_DIVIDER_REG         0x309d
  62 #define OV7251_PLL2_SYS_DIV_REG         0x309a
  63 #define OV7251_PLL2_ADC_DIV_REG         0x309b
  64
  65 /*
  66  * OV7251 native and active pixel array size.
  67  * Datasheet not available to confirm these values, so assume there are no
  68  * border pixels.
  69  */
  70 #define OV7251_NATIVE_WIDTH             640U
  71 #define OV7251_NATIVE_HEIGHT            480U
  72 #define OV7251_PIXEL_ARRAY_LEFT         0U
  73 #define OV7251_PIXEL_ARRAY_TOP          0U
  74 #define OV7251_PIXEL_ARRAY_WIDTH        640U
  75 #define OV7251_PIXEL_ARRAY_HEIGHT       480U
  76
  77 #define OV7251_PIXEL_CLOCK 48000000
  78
  79 struct reg_value {
  80         u16 reg;
  81         u8 val;
  82 };
  83
  84 struct ov7251_frame_ival_info {
  85         u16 vts;
  86         struct v4l2_fract timeperframe;
  87 };
  88
  89 struct ov7251_mode_info {
  90         u32 width;
  91         u32 height;
  92         const struct reg_value *data;
  93         u32 data_size;
  94         u16 exposure_def;
  95 };
  96
  97 struct ov7251_pll1_config {
  98         unsigned int pre_div;
  99         unsigned int mult;
 100         unsigned int div;
 101         unsigned int pix_div;
 102         unsigned int mipi_div;
 103 };
 104
 105 struct ov7251_pll2_config {
 106         unsigned int pre_div;
 107         unsigned int mult;
 108         unsigned int div;
 109         unsigned int sys_div;
 110         unsigned int adc_div;
 111 };
 112
 113 struct ov7251_pll_configs {
 114         const struct ov7251_pll1_config *pll1;
 115         const struct ov7251_pll2_config *pll2;
 116 };
 117
 118 struct ov7251 {
 119         struct i2c_client *i2c_client;
 120         struct device *dev;
 121         struct v4l2_subdev sd;
 122         struct media_pad pad;
 123         struct v4l2_fwnode_endpoint ep;
 124         struct v4l2_mbus_framefmt fmt;
 125         struct v4l2_rect crop;
 126         struct clk *xclk;
 127         u32 xclk_freq;
 128
 129         const struct ov7251_pll_configs *pll_configs;
 130
 131         struct regulator *io_regulator;
 132         struct regulator *core_regulator;
 133         struct regulator *analog_regulator;
 134
 135         const struct ov7251_mode_info *current_mode;
 136         const struct ov7251_frame_ival_info *current_ival;
 137
 138         struct v4l2_ctrl_handler ctrls;
 139         struct v4l2_ctrl *exposure;
 140         struct v4l2_ctrl *hblank;
 141         struct v4l2_ctrl *vblank;
 142
 143         /* Cached register values */
 144         u8 aec_pk_manual;
 145         u8 pre_isp_00;
 146         u8 timing_format1;
 147         u8 timing_format2;
 148
 149         struct mutex lock; /* lock to protect power state, ctrls and mode */
 150         bool power_on;
 151
 152         struct gpio_desc *enable_gpio;
 153 };
 154
 155 static inline struct ov7251 *to_ov7251(struct v4l2_subdev *sd)
 156 {
 157         return container_of(sd, struct ov7251, sd);
 158 }
 159
 160 enum xclk_rate {
 161         OV7251_19_2_MHZ,
 162         OV7251_24_MHZ,
 163         OV7251_NUM_SUPPORTED_RATES
 164 };
 165
 166 static const struct ov7251_pll1_config ov7251_pll1_config_19_2_mhz = {
 167         .pre_div = 0x03,
 168         .mult = 0x4b,
 169         .div = 0x01,
 170         .pix_div = 0x0a,
 171         .mipi_div = 0x05
 172 };
 173
 174 static const struct ov7251_pll1_config ov7251_pll1_config_24_mhz = {
 175         .pre_div = 0x03,
 176         .mult = 0x64,
 177         .div = 0x01,
 178         .pix_div = 0x0a,
 179         .mipi_div = 0x05
 180 };
 181
 182 static const struct ov7251_pll2_config ov7251_pll2_config_19_2_mhz = {
 183         .pre_div = 0x04,
 184         .mult = 0x32,
 185         .div = 0x00,
 186         .sys_div = 0x05,
 187         .adc_div = 0x04
 188 };
 189
 190 static const struct ov7251_pll2_config ov7251_pll2_config_24_mhz = {
 191         .pre_div = 0x04,
 192         .mult = 0x28,
 193         .div = 0x00,
 194         .sys_div = 0x05,
 195         .adc_div = 0x04
 196 };
 197
 198 static const struct ov7251_pll_configs ov7251_pll_configs_19_2_mhz = {
 199         .pll1 = &ov7251_pll1_config_19_2_mhz,
 200         .pll2 = &ov7251_pll2_config_19_2_mhz
 201 };
 202
 203 static const struct ov7251_pll_configs ov7251_pll_configs_24_mhz = {
 204         .pll1 = &ov7251_pll1_config_24_mhz,
 205         .pll2 = &ov7251_pll2_config_24_mhz
 206 };
 207
 208 static const struct ov7251_pll_configs *ov7251_pll_configs[] = {
 209         [OV7251_19_2_MHZ] = &ov7251_pll_configs_19_2_mhz,
 210         [OV7251_24_MHZ] = &ov7251_pll_configs_24_mhz
 211 };
 212
 213 static const struct reg_value ov7251_global_init_setting[] = {
 214         { 0x0103, 0x01 },
 215         { 0x303b, 0x02 },
 216 };
 217
 218 static const struct reg_value ov7251_setting_vga[] = {
 219         { 0x3005, 0x00 },
 220         { 0x3012, 0xc0 },
 221         { 0x3013, 0xd2 },
 222         { 0x3014, 0x04 },
 223         { 0x3016, 0x10 },
 224         { 0x3017, 0x00 },
 225         { 0x3018, 0x00 },
 226         { 0x301a, 0x00 },
 227         { 0x301b, 0x00 },
 228         { 0x301c, 0x00 },
 229         { 0x3023, 0x05 },
 230         { 0x3037, 0xf0 },
 231         { 0x3106, 0xda },
 232         { 0x3503, 0x07 },
 233         { 0x3509, 0x10 },
 234         { 0x3600, 0x1c },
 235         { 0x3602, 0x62 },
 236         { 0x3620, 0xb7 },
 237         { 0x3622, 0x04 },
 238         { 0x3626, 0x21 },
 239         { 0x3627, 0x30 },
 240         { 0x3630, 0x44 },
 241         { 0x3631, 0x35 },
 242         { 0x3634, 0x60 },
 243         { 0x3636, 0x00 },
 244         { 0x3662, 0x01 },
 245         { 0x3663, 0x70 },
 246         { 0x3664, 0x50 },
 247         { 0x3666, 0x0a },
 248         { 0x3669, 0x1a },
 249         { 0x366a, 0x00 },
 250         { 0x366b, 0x50 },
 251         { 0x3673, 0x01 },
 252         { 0x3674, 0xff },
 253         { 0x3675, 0x03 },
 254         { 0x3705, 0xc1 },
 255         { 0x3709, 0x40 },
 256         { 0x373c, 0x08 },
 257         { 0x3742, 0x00 },
 258         { 0x3757, 0xb3 },
 259         { 0x3788, 0x00 },
 260         { 0x37a8, 0x01 },
 261         { 0x37a9, 0xc0 },
 262         { 0x3800, 0x00 },
 263         { 0x3801, 0x04 },
 264         { 0x3802, 0x00 },
 265         { 0x3803, 0x04 },
 266         { 0x3804, 0x02 },
 267         { 0x3805, 0x8b },
 268         { 0x3806, 0x01 },
 269         { 0x3807, 0xeb },
 270         { 0x3808, 0x02 }, /* width high */
 271         { 0x3809, 0x80 }, /* width low */
 272         { 0x380a, 0x01 }, /* height high */
 273         { 0x380b, 0xe0 }, /* height low */
 274         { 0x380c, 0x03 }, /* total horiz timing high */
 275         { 0x380d, 0xa0 }, /* total horiz timing low */
 276         { 0x3810, 0x00 },
 277         { 0x3811, 0x04 },
 278         { 0x3812, 0x00 },
 279         { 0x3813, 0x05 },
 280         { 0x3814, 0x11 },
 281         { 0x3815, 0x11 },
 282         { 0x3820, 0x40 },
 283         { 0x3821, 0x00 },
 284         { 0x382f, 0x0e },
 285         { 0x3832, 0x00 },
 286         { 0x3833, 0x05 },
 287         { 0x3834, 0x00 },
 288         { 0x3835, 0x0c },
 289         { 0x3837, 0x00 },
 290         { 0x3b80, 0x00 },
 291         { 0x3b81, 0xa5 },
 292         { 0x3b82, 0x10 },
 293         { 0x3b83, 0x00 },
 294         { 0x3b84, 0x08 },
 295         { 0x3b85, 0x00 },
 296         { 0x3b86, 0x01 },
 297         { 0x3b87, 0x00 },
 298         { 0x3b88, 0x00 },
 299         { 0x3b89, 0x00 },
 300         { 0x3b8a, 0x00 },
 301         { 0x3b8b, 0x05 },
 302         { 0x3b8c, 0x00 },
 303         { 0x3b8d, 0x00 },
 304         { 0x3b8e, 0x00 },
 305         { 0x3b8f, 0x1a },
 306         { 0x3b94, 0x05 },
 307         { 0x3b95, 0xf2 },
 308         { 0x3b96, 0x40 },
 309         { 0x3c00, 0x89 },
 310         { 0x3c01, 0x63 },
 311         { 0x3c02, 0x01 },
 312         { 0x3c03, 0x00 },
 313         { 0x3c04, 0x00 },
 314         { 0x3c05, 0x03 },
 315         { 0x3c06, 0x00 },
 316         { 0x3c07, 0x06 },
 317         { 0x3c0c, 0x01 },
 318         { 0x3c0d, 0xd0 },
 319         { 0x3c0e, 0x02 },
 320         { 0x3c0f, 0x0a },
 321         { 0x4001, 0x42 },
 322         { 0x4004, 0x04 },
 323         { 0x4005, 0x00 },
 324         { 0x404e, 0x01 },
 325         { 0x4300, 0xff },
 326         { 0x4301, 0x00 },
 327         { 0x4315, 0x00 },
 328         { 0x4501, 0x48 },
 329         { 0x4600, 0x00 },
 330         { 0x4601, 0x4e },
 331         { 0x4801, 0x0f },
 332         { 0x4806, 0x0f },
 333         { 0x4819, 0xaa },
 334         { 0x4823, 0x3e },
 335         { 0x4837, 0x19 },
 336         { 0x4a0d, 0x00 },
 337         { 0x4a47, 0x7f },
 338         { 0x4a49, 0xf0 },
 339         { 0x4a4b, 0x30 },
 340         { 0x5000, 0x85 },
 341         { 0x5001, 0x80 },
 342 };
 343
 344 static const unsigned long supported_xclk_rates[] = {
 345         [OV7251_19_2_MHZ] = 19200000,
 346         [OV7251_24_MHZ] = 24000000,
 347 };
 348
 349 static const s64 link_freq[] = {
 350         240000000,
 351 };
 352
 353 static const struct ov7251_frame_ival_info ov7251_frame_ival_info_data[] = {
 354         {
 355                 .vts = 0x6bc,
 356                 .timeperframe = {
 357                         .numerator = 100,
 358                         .denominator = 3000
 359                 }
 360         },
 361         {
 362                 .vts = 0x35c,
 363                 .timeperframe = {
 364                         .numerator = 100,
 365                         .denominator = 6014
 366                 }
 367         },
 368         {
 369                 .vts = 0x23c,
 370                 .timeperframe = {
 371                         .numerator = 100,
 372                         .denominator = 9043
 373                 }
 374         },
 375 };
 376
 377 static const struct ov7251_mode_info ov7251_mode_info_data[] = {
 378         {
 379                 .width = 640,
 380                 .height = 480,
 381                 .data = ov7251_setting_vga,
 382                 .data_size = ARRAY_SIZE(ov7251_setting_vga),
 383                 .exposure_def = 504,
 384         },
 385 };
 386
 387 static int ov7251_regulators_enable(struct ov7251 *ov7251)
 388 {
 389         int ret;
 390
 391         /* OV7251 power up sequence requires core regulator
 392          * to be enabled not earlier than io regulator
 393          */
 394
 395         ret = regulator_enable(ov7251->io_regulator);
 396         if (ret < 0) {
 397                 dev_err(ov7251->dev, "set io voltage failed\n");
 398                 return ret;
 399         }
 400
 401         ret = regulator_enable(ov7251->analog_regulator);
 402         if (ret) {
 403                 dev_err(ov7251->dev, "set analog voltage failed\n");
 404                 goto err_disable_io;
 405         }
 406
 407         ret = regulator_enable(ov7251->core_regulator);
 408         if (ret) {
 409                 dev_err(ov7251->dev, "set core voltage failed\n");
 410                 goto err_disable_analog;
 411         }
 412
 413         return 0;
 414
 415 err_disable_analog:
 416         regulator_disable(ov7251->analog_regulator);
 417
 418 err_disable_io:
 419         regulator_disable(ov7251->io_regulator);
 420
 421         return ret;
 422 }
 423
 424 static void ov7251_regulators_disable(struct ov7251 *ov7251)
 425 {
 426         int ret;
 427
 428         ret = regulator_disable(ov7251->core_regulator);
 429         if (ret < 0)
 430                 dev_err(ov7251->dev, "core regulator disable failed\n");
 431
 432         ret = regulator_disable(ov7251->analog_regulator);
 433         if (ret < 0)
 434                 dev_err(ov7251->dev, "analog regulator disable failed\n");
 435
 436         ret = regulator_disable(ov7251->io_regulator);
 437         if (ret < 0)
 438                 dev_err(ov7251->dev, "io regulator disable failed\n");
 439 }
 440
 441 static int ov7251_write_reg(struct ov7251 *ov7251, u16 reg, u8 val)
 442 {
 443         u8 regbuf[3];
 444         int ret;
 445
 446         regbuf[0] = reg >> 8;
 447         regbuf[1] = reg & 0xff;
 448         regbuf[2] = val;
 449
 450         ret = i2c_master_send(ov7251->i2c_client, regbuf, 3);
 451         if (ret < 0) {
 452                 dev_err(ov7251->dev, "%s: write reg error %d: reg=%x, val=%x\n",
 453                         __func__, ret, reg, val);
 454                 return ret;
 455         }
 456
 457         return 0;
 458 }
 459
 460 static int ov7251_write_seq_regs(struct ov7251 *ov7251, u16 reg, u8 *val,
 461                                  u8 num)
 462 {
 463         u8 regbuf[5];
 464         u8 nregbuf = sizeof(reg) + num * sizeof(*val);
 465         int ret = 0;
 466
 467         if (nregbuf > sizeof(regbuf))
 468                 return -EINVAL;
 469
 470         regbuf[0] = reg >> 8;
 471         regbuf[1] = reg & 0xff;
 472
 473         memcpy(regbuf + 2, val, num);
 474
 475         ret = i2c_master_send(ov7251->i2c_client, regbuf, nregbuf);
 476         if (ret < 0) {
 477                 dev_err(ov7251->dev,
 478                         "%s: write seq regs error %d: first reg=%x\n",
 479                         __func__, ret, reg);
 480                 return ret;
 481         }
 482
 483         return 0;
 484 }
 485
 486 static int ov7251_read_reg(struct ov7251 *ov7251, u16 reg, u8 *val)
 487 {
 488         u8 regbuf[2];
 489         int ret;
 490
 491         regbuf[0] = reg >> 8;
 492         regbuf[1] = reg & 0xff;
 493
 494         ret = i2c_master_send(ov7251->i2c_client, regbuf, 2);
 495         if (ret < 0) {
 496                 dev_err(ov7251->dev, "%s: write reg error %d: reg=%x\n",
 497                         __func__, ret, reg);
 498                 return ret;
 499         }
 500
 501         ret = i2c_master_recv(ov7251->i2c_client, val, 1);
 502         if (ret < 0) {
 503                 dev_err(ov7251->dev, "%s: read reg error %d: reg=%x\n",
 504                         __func__, ret, reg);
 505                 return ret;
 506         }
 507
 508         return 0;
 509 }
 510
 511 static int ov7251_pll_configure(struct ov7251 *ov7251)
 512 {
 513         const struct ov7251_pll_configs *configs;
 514         int ret;
 515
 516         configs = ov7251->pll_configs;
 517
 518         ret = ov7251_write_reg(ov7251, OV7251_PLL1_PRE_DIV_REG,
 519                                configs->pll1->pre_div);
 520         if (ret < 0)
 521                 return ret;
 522
 523         ret = ov7251_write_reg(ov7251, OV7251_PLL1_MULT_REG,
 524                                configs->pll1->mult);
 525         if (ret < 0)
 526                 return ret;
 527         ret = ov7251_write_reg(ov7251, OV7251_PLL1_DIVIDER_REG,
 528                                configs->pll1->div);
 529         if (ret < 0)
 530                 return ret;
 531
 532         ret = ov7251_write_reg(ov7251, OV7251_PLL1_PIX_DIV_REG,
 533                                configs->pll1->pix_div);
 534         if (ret < 0)
 535                 return ret;
 536
 537         ret = ov7251_write_reg(ov7251, OV7251_PLL1_MIPI_DIV_REG,
 538                                configs->pll1->mipi_div);
 539         if (ret < 0)
 540                 return ret;
 541
 542         ret = ov7251_write_reg(ov7251, OV7251_PLL2_PRE_DIV_REG,
 543                                configs->pll2->pre_div);
 544         if (ret < 0)
 545                 return ret;
 546
 547         ret = ov7251_write_reg(ov7251, OV7251_PLL2_MULT_REG,
 548                                configs->pll2->mult);
 549         if (ret < 0)
 550                 return ret;
 551
 552         ret = ov7251_write_reg(ov7251, OV7251_PLL2_DIVIDER_REG,
 553                                configs->pll2->div);
 554         if (ret < 0)
 555                 return ret;
 556
 557         ret = ov7251_write_reg(ov7251, OV7251_PLL2_SYS_DIV_REG,
 558                                configs->pll2->sys_div);
 559         if (ret < 0)
 560                 return ret;
 561
 562         ret = ov7251_write_reg(ov7251, OV7251_PLL2_ADC_DIV_REG,
 563                                configs->pll2->adc_div);
 564
 565         return ret;
 566 }
 567
 568 static int ov7251_set_exposure(struct ov7251 *ov7251, s32 exposure)
 569 {
 570         u16 reg;
 571         u8 val[3];
 572
 573         reg = OV7251_AEC_EXPO_0;
 574         val[0] = (exposure & 0xf000) >> 12; /* goes to OV7251_AEC_EXPO_0 */
 575         val[1] = (exposure & 0x0ff0) >> 4;  /* goes to OV7251_AEC_EXPO_1 */
 576         val[2] = (exposure & 0x000f) << 4;  /* goes to OV7251_AEC_EXPO_2 */
 577
 578         return ov7251_write_seq_regs(ov7251, reg, val, 3);
 579 }
 580
 581 static int ov7251_set_gain(struct ov7251 *ov7251, s32 gain)
 582 {
 583         u16 reg;
 584         u8 val[2];
 585
 586         reg = OV7251_AEC_AGC_ADJ_0;
 587         val[0] = (gain & 0x0300) >> 8; /* goes to OV7251_AEC_AGC_ADJ_0 */
 588         val[1] = gain & 0xff;          /* goes to OV7251_AEC_AGC_ADJ_1 */
 589
 590         return ov7251_write_seq_regs(ov7251, reg, val, 2);
 591 }
 592
 593 static int ov7251_set_register_array(struct ov7251 *ov7251,
 594                                      const struct reg_value *settings,
 595                                      unsigned int num_settings)
 596 {
 597         unsigned int i;
 598         int ret;
 599
 600         for (i = 0; i < num_settings; ++i, ++settings) {
 601                 ret = ov7251_write_reg(ov7251, settings->reg, settings->val);
 602                 if (ret < 0)
 603                         return ret;
 604         }
 605
 606         return 0;
 607 }
 608
 609 static int ov7251_set_power_on(struct ov7251 *ov7251)
 610 {
 611         int ret;
 612         u32 wait_us;
 613
 614         ret = ov7251_regulators_enable(ov7251);
 615         if (ret < 0)
 616                 return ret;
 617
 618         ret = clk_prepare_enable(ov7251->xclk);
 619         if (ret < 0) {
 620                 dev_err(ov7251->dev, "clk prepare enable failed\n");
 621                 ov7251_regulators_disable(ov7251);
 622                 return ret;
 623         }
 624
 625         gpiod_set_value_cansleep(ov7251->enable_gpio, 1);
 626
 627         /* wait at least 65536 external clock cycles */
 628         wait_us = DIV_ROUND_UP(65536 * 1000,
 629                                DIV_ROUND_UP(ov7251->xclk_freq, 1000));
 630         usleep_range(wait_us, wait_us + 1000);
 631
 632         return 0;
 633 }
 634
 635 static void ov7251_set_power_off(struct ov7251 *ov7251)
 636 {
 637         clk_disable_unprepare(ov7251->xclk);
 638         gpiod_set_value_cansleep(ov7251->enable_gpio, 0);
 639         ov7251_regulators_disable(ov7251);
 640 }
 641
 642 static int __maybe_unused ov7251_sensor_suspend(struct device *dev)
 643 {
 644         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 645         struct ov7251 *ov7251 = to_ov7251(sd);
 646
 647         ov7251_set_power_off(ov7251);
 648
 649         return 0;
 650 }
 651
 652 static int __maybe_unused ov7251_sensor_resume(struct device *dev)
 653 {
 654         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 655         struct ov7251 *ov7251 = to_ov7251(sd);
 656
 657         return ov7251_set_power_on(ov7251);
 658 }
 659
 660 static int ov7251_set_hflip(struct ov7251 *ov7251, s32 value)
 661 {
 662         u8 val = ov7251->timing_format2;
 663         int ret;
 664
 665         if (value)
 666                 val |= OV7251_TIMING_FORMAT2_MIRROR;
 667         else
 668                 val &= ~OV7251_TIMING_FORMAT2_MIRROR;
 669
 670         ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT2, val);
 671         if (!ret)
 672                 ov7251->timing_format2 = val;
 673
 674         return ret;
 675 }
 676
 677 static int ov7251_set_vflip(struct ov7251 *ov7251, s32 value)
 678 {
 679         u8 val = ov7251->timing_format1;
 680         int ret;
 681
 682         if (value)
 683                 val |= OV7251_TIMING_FORMAT1_VFLIP;
 684         else
 685                 val &= ~OV7251_TIMING_FORMAT1_VFLIP;
 686
 687         ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT1, val);
 688         if (!ret)
 689                 ov7251->timing_format1 = val;
 690
 691         return ret;
 692 }
 693
 694 static int ov7251_set_vblank(struct ov7251 *ov7251, s32 value)
 695 {
 696         u16 reg;
 697         u8 val[2];
 698
 699         reg = OV7251_VTS_HIGH;
 700         value += ov7251->current_mode->height;
 701         val[0] = (value & 0xff00) >> 8; /* goes to OV7251_VTS_HIGH */
 702         val[1] = value & 0xff;          /* goes to OV7251_VTS_LOW */
 703
 704         return ov7251_write_seq_regs(ov7251, reg, val, 2);
 705 }
 706
 707 static int ov7251_set_test_pattern(struct ov7251 *ov7251, s32 value)
 708 {
 709         u8 val = ov7251->pre_isp_00;
 710         int ret;
 711
 712         if (value)
 713                 val |= OV7251_PRE_ISP_00_TEST_PATTERN;
 714         else
 715                 val &= ~OV7251_PRE_ISP_00_TEST_PATTERN;
 716
 717         ret = ov7251_write_reg(ov7251, OV7251_PRE_ISP_00, val);
 718         if (!ret)
 719                 ov7251->pre_isp_00 = val;
 720
 721         return ret;
 722 }
 723
 724 static const char * const ov7251_test_pattern_menu[] = {
 725         "Disabled",
 726         "Vertical Pattern Bars",
 727 };
 728
 729 static int ov7251_s_ctrl(struct v4l2_ctrl *ctrl)
 730 {
 731         struct ov7251 *ov7251 = container_of(ctrl->handler,
 732                                              struct ov7251, ctrls);
 733         s64 max;
 734         int ret;
 735
 736         /* v4l2_ctrl_lock() locks our mutex */
 737         switch (ctrl->id) {
 738         case V4L2_CID_VBLANK:
 739                 /* Update max exposure while meeting expected vblanking */
 740                 max = ov7251->current_mode->height + ctrl->val - OV7251_EXPOSURE_OFFSET;
 741                 __v4l2_ctrl_modify_range(ov7251->exposure,
 742                                          ov7251->exposure->minimum, max,
 743                                          ov7251->exposure->step,
 744                                          ov7251->exposure->default_value);
 745                 break;
 746         }
 747
 748         if (!pm_runtime_get_if_in_use(ov7251->dev))
 749                 return 0;
 750
 751         switch (ctrl->id) {
 752         case V4L2_CID_EXPOSURE:
 753                 ret = ov7251_set_exposure(ov7251, ctrl->val);
 754                 break;
 755         case V4L2_CID_ANALOGUE_GAIN:
 756                 ret = ov7251_set_gain(ov7251, ctrl->val);
 757                 break;
 758         case V4L2_CID_TEST_PATTERN:
 759                 ret = ov7251_set_test_pattern(ov7251, ctrl->val);
 760                 break;
 761         case V4L2_CID_HFLIP:
 762                 ret = ov7251_set_hflip(ov7251, ctrl->val);
 763                 break;
 764         case V4L2_CID_VFLIP:
 765                 ret = ov7251_set_vflip(ov7251, ctrl->val);
 766                 break;
 767         case V4L2_CID_VBLANK:
 768                 ret = ov7251_set_vblank(ov7251, ctrl->val);
 769                 break;
 770         default:
 771                 ret = -EINVAL;
 772                 break;
 773         }
 774
 775         pm_runtime_put(ov7251->dev);
 776
 777         return ret;
 778 }
 779
 780 static const struct v4l2_ctrl_ops ov7251_ctrl_ops = {
 781         .s_ctrl = ov7251_s_ctrl,
 782 };
 783
 784 static int ov7251_enum_mbus_code(struct v4l2_subdev *sd,
 785                                  struct v4l2_subdev_state *sd_state,
 786                                  struct v4l2_subdev_mbus_code_enum *code)
 787 {
 788         if (code->index > 0)
 789                 return -EINVAL;
 790
 791         code->code = MEDIA_BUS_FMT_Y10_1X10;
 792
 793         return 0;
 794 }
 795
 796 static int ov7251_enum_frame_size(struct v4l2_subdev *subdev,
 797                                   struct v4l2_subdev_state *sd_state,
 798                                   struct v4l2_subdev_frame_size_enum *fse)
 799 {
 800         if (fse->code != MEDIA_BUS_FMT_Y10_1X10)
 801                 return -EINVAL;
 802
 803         if (fse->index >= ARRAY_SIZE(ov7251_mode_info_data))
 804                 return -EINVAL;
 805
 806         fse->min_width = ov7251_mode_info_data[fse->index].width;
 807         fse->max_width = ov7251_mode_info_data[fse->index].width;
 808         fse->min_height = ov7251_mode_info_data[fse->index].height;
 809         fse->max_height = ov7251_mode_info_data[fse->index].height;
 810
 811         return 0;
 812 }
 813
 814 static int ov7251_enum_frame_ival(struct v4l2_subdev *subdev,
 815                                   struct v4l2_subdev_state *sd_state,
 816                                   struct v4l2_subdev_frame_interval_enum *fie)
 817 {
 818         unsigned int index = fie->index;
 819         unsigned int i;
 820
 821         for (i = 0; i < ARRAY_SIZE(ov7251_frame_ival_info_data); i++) {
 822                 if (fie->width != ov7251_mode_info_data[0].width ||
 823                     fie->height != ov7251_mode_info_data[0].height)
 824                         continue;
 825
 826                 if (index-- == 0) {
 827                         fie->interval = ov7251_frame_ival_info_data[i].timeperframe;
 828                         return 0;
 829                 }
 830         }
 831
 832         return -EINVAL;
 833 }
 834
 835 static struct v4l2_mbus_framefmt *
 836 __ov7251_get_pad_format(struct ov7251 *ov7251,
 837                         struct v4l2_subdev_state *sd_state,
 838                         unsigned int pad,
 839                         enum v4l2_subdev_format_whence which)
 840 {
 841         switch (which) {
 842         case V4L2_SUBDEV_FORMAT_TRY:
 843                 return v4l2_subdev_get_try_format(&ov7251->sd, sd_state, pad);
 844         case V4L2_SUBDEV_FORMAT_ACTIVE:
 845                 return &ov7251->fmt;
 846         default:
 847                 return NULL;
 848         }
 849 }
 850
 851 static int ov7251_get_format(struct v4l2_subdev *sd,
 852                              struct v4l2_subdev_state *sd_state,
 853                              struct v4l2_subdev_format *format)
 854 {
 855         struct ov7251 *ov7251 = to_ov7251(sd);
 856
 857         mutex_lock(&ov7251->lock);
 858         format->format = *__ov7251_get_pad_format(ov7251, sd_state,
 859                                                   format->pad,
 860                                                   format->which);
 861         mutex_unlock(&ov7251->lock);
 862
 863         return 0;
 864 }
 865
 866 static struct v4l2_rect *
 867 __ov7251_get_pad_crop(struct ov7251 *ov7251,
 868                       struct v4l2_subdev_state *sd_state,
 869                       unsigned int pad, enum v4l2_subdev_format_whence which)
 870 {
 871         switch (which) {
 872         case V4L2_SUBDEV_FORMAT_TRY:
 873                 return v4l2_subdev_get_try_crop(&ov7251->sd, sd_state, pad);
 874         case V4L2_SUBDEV_FORMAT_ACTIVE:
 875                 return &ov7251->crop;
 876         default:
 877                 return NULL;
 878         }
 879 }
 880
 881 static inline u32 avg_fps(const struct v4l2_fract *t)
 882 {
 883         return (t->denominator + (t->numerator >> 1)) / t->numerator;
 884 }
 885
 886 static const struct ov7251_frame_ival_info *
 887 ov7251_find_frame_ival_by_ival(struct ov7251 *ov7251, struct v4l2_fract *timeperframe)
 888 {
 889         unsigned int fps_req = avg_fps(timeperframe);
 890         unsigned int max_dist_match = (unsigned int) -1;
 891         unsigned int i, n = 0;
 892
 893         for (i = 0; i < ARRAY_SIZE(ov7251_frame_ival_info_data); i++) {
 894                 unsigned int dist;
 895                 unsigned int fps_tmp;
 896
 897                 fps_tmp = avg_fps(&ov7251_frame_ival_info_data[i].timeperframe);
 898
 899                 dist = abs(fps_req - fps_tmp);
 900
 901                 if (dist < max_dist_match) {
 902                         n = i;
 903                         max_dist_match = dist;
 904                 }
 905         }
 906
 907         return &ov7251_frame_ival_info_data[n];
 908 }
 909
 910 static int ov7251_set_format(struct v4l2_subdev *sd,
 911                              struct v4l2_subdev_state *sd_state,
 912                              struct v4l2_subdev_format *format)
 913 {
 914         struct ov7251 *ov7251 = to_ov7251(sd);
 915         struct v4l2_mbus_framefmt *__format;
 916         struct v4l2_rect *__crop;
 917         const struct ov7251_mode_info *new_mode;
 918         s64 h_blank;
 919         int ret = 0;
 920
 921         mutex_lock(&ov7251->lock);
 922
 923         __crop = __ov7251_get_pad_crop(ov7251, sd_state, format->pad,
 924                                        format->which);
 925
 926         new_mode = v4l2_find_nearest_size(ov7251_mode_info_data,
 927                                 ARRAY_SIZE(ov7251_mode_info_data),
 928                                 width, height,
 929                                 format->format.width, format->format.height);
 930
 931         __crop->width = new_mode->width;
 932         __crop->height = new_mode->height;
 933
 934         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 935                 h_blank = OV7251_HTS - new_mode->width;
 936                 __v4l2_ctrl_modify_range(ov7251->hblank, h_blank,
 937                                          h_blank, 1, h_blank);
 938                 __v4l2_ctrl_s_ctrl(ov7251->hblank, h_blank);
 939
 940                 ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1,
 941                                                ov7251->current_ival->vts -
 942                                                         OV7251_EXPOSURE_OFFSET,
 943                                                1, new_mode->exposure_def);
 944                 if (ret < 0)
 945                         goto exit;
 946
 947                 ret = __v4l2_ctrl_s_ctrl(ov7251->exposure,
 948                                          new_mode->exposure_def);
 949                 if (ret < 0)
 950                         goto exit;
 951
 952                 ov7251->current_mode = new_mode;
 953         }
 954
 955         __format = __ov7251_get_pad_format(ov7251, sd_state, format->pad,
 956                                            format->which);
 957         __format->width = __crop->width;
 958         __format->height = __crop->height;
 959         __format->code = MEDIA_BUS_FMT_Y10_1X10;
 960         __format->field = V4L2_FIELD_NONE;
 961         __format->colorspace = V4L2_COLORSPACE_SRGB;
 962         __format->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(__format->colorspace);
 963         __format->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
 964                                 __format->colorspace, __format->ycbcr_enc);
 965         __format->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(__format->colorspace);
 966
 967         format->format = *__format;
 968
 969 exit:
 970         mutex_unlock(&ov7251->lock);
 971
 972         return ret;
 973 }
 974
 975 static int ov7251_entity_init_cfg(struct v4l2_subdev *subdev,
 976                                   struct v4l2_subdev_state *sd_state)
 977 {
 978         struct v4l2_subdev_format fmt = {
 979                 .which = sd_state ? V4L2_SUBDEV_FORMAT_TRY
 980                 : V4L2_SUBDEV_FORMAT_ACTIVE,
 981                 .format = {
 982                         .width = 640,
 983                         .height = 480
 984                 }
 985         };
 986
 987         ov7251_set_format(subdev, sd_state, &fmt);
 988
 989         return 0;
 990 }
 991
 992 static int ov7251_get_selection(struct v4l2_subdev *sd,
 993                                 struct v4l2_subdev_state *sd_state,
 994                                 struct v4l2_subdev_selection *sel)
 995 {
 996         struct ov7251 *ov7251 = to_ov7251(sd);
 997
 998         switch (sel->target) {
 999         case V4L2_SEL_TGT_CROP:
1000                 mutex_lock(&ov7251->lock);
1001                 sel->r = *__ov7251_get_pad_crop(ov7251, sd_state, sel->pad,
1002                                                 sel->which);
1003                 mutex_unlock(&ov7251->lock);
1004
1005                 return 0;
1006
1007         case V4L2_SEL_TGT_NATIVE_SIZE:
1008                 sel->r.top = 0;
1009                 sel->r.left = 0;
1010                 sel->r.width = OV7251_NATIVE_WIDTH;
1011                 sel->r.height = OV7251_NATIVE_HEIGHT;
1012
1013                 return 0;
1014
1015         case V4L2_SEL_TGT_CROP_DEFAULT:
1016         case V4L2_SEL_TGT_CROP_BOUNDS:
1017                 sel->r.top = OV7251_PIXEL_ARRAY_TOP;
1018                 sel->r.left = OV7251_PIXEL_ARRAY_LEFT;
1019                 sel->r.width = OV7251_PIXEL_ARRAY_WIDTH;
1020                 sel->r.height = OV7251_PIXEL_ARRAY_HEIGHT;
1021
1022                 return 0;
1023         }
1024
1025         return -EINVAL;
1026 }
1027
1028 static int ov7251_s_stream(struct v4l2_subdev *subdev, int enable)
1029 {
1030         struct ov7251 *ov7251 = to_ov7251(subdev);
1031         int ret;
1032
1033         mutex_lock(&ov7251->lock);
1034
1035         if (enable) {
1036                 ret = pm_runtime_get_sync(ov7251->dev);
1037                 if (ret < 0)
1038                         return ret;
1039
1040                 ret = ov7251_set_register_array(ov7251,
1041                                         ov7251_global_init_setting,
1042                                         ARRAY_SIZE(ov7251_global_init_setting));
1043                 if (ret < 0) {
1044                         dev_err(ov7251->dev, "could not set global_init_setting\n");
1045                         goto err_power_down;
1046                 }
1047
1048                 ret = ov7251_pll_configure(ov7251);
1049                 if (ret) {
1050                         dev_err(ov7251->dev, "error configuring PLLs\n");
1051                         goto err_power_down;
1052                 }
1053
1054                 ret = ov7251_set_register_array(ov7251,
1055                                         ov7251->current_mode->data,
1056                                         ov7251->current_mode->data_size);
1057                 if (ret < 0) {
1058                         dev_err(ov7251->dev, "could not set mode %dx%d\n",
1059                                 ov7251->current_mode->width,
1060                                 ov7251->current_mode->height);
1061                         goto err_power_down;
1062                 }
1063                 ret = __v4l2_ctrl_handler_setup(&ov7251->ctrls);
1064                 if (ret < 0) {
1065                         dev_err(ov7251->dev, "could not sync v4l2 controls\n");
1066                         goto err_power_down;
1067                 }
1068                 ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT,
1069                                        OV7251_SC_MODE_SELECT_STREAMING);
1070                 if (ret)
1071                         goto err_power_down;
1072         } else {
1073                 ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT,
1074                                        OV7251_SC_MODE_SELECT_SW_STANDBY);
1075                 pm_runtime_put(ov7251->dev);
1076         }
1077
1078         mutex_unlock(&ov7251->lock);
1079         return ret;
1080
1081 err_power_down:
1082         pm_runtime_put_noidle(ov7251->dev);
1083         mutex_unlock(&ov7251->lock);
1084         return ret;
1085 }
1086
1087 static int ov7251_get_frame_interval(struct v4l2_subdev *subdev,
1088                                      struct v4l2_subdev_frame_interval *fi)
1089 {
1090         struct ov7251 *ov7251 = to_ov7251(subdev);
1091
1092         mutex_lock(&ov7251->lock);
1093         fi->interval = ov7251->current_ival->timeperframe;
1094         mutex_unlock(&ov7251->lock);
1095
1096         return 0;
1097 }
1098
1099 static int ov7251_set_frame_interval(struct v4l2_subdev *subdev,
1100                                      struct v4l2_subdev_frame_interval *fi)
1101 {
1102         struct ov7251 *ov7251 = to_ov7251(subdev);
1103         const struct ov7251_frame_ival_info *new_ival;
1104         int ret = 0;
1105
1106         mutex_lock(&ov7251->lock);
1107         new_ival = ov7251_find_frame_ival_by_ival(ov7251, &fi->interval);
1108
1109         if (new_ival != ov7251->current_ival) {
1110                 ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1,
1111                                                new_ival->vts -
1112                                                         OV7251_EXPOSURE_OFFSET,
1113                                                1, ov7251->exposure->val);
1114                 if (ret < 0)
1115                         goto exit;
1116
1117                 ret = __v4l2_ctrl_s_ctrl(ov7251->vblank,
1118                                          new_ival->vts -
1119                                                 ov7251->current_mode->height);
1120                 if (ret < 0)
1121                         goto exit;
1122
1123                 ov7251->current_ival = new_ival;
1124         }
1125
1126         fi->interval = ov7251->current_ival->timeperframe;
1127
1128 exit:
1129         mutex_unlock(&ov7251->lock);
1130
1131         return ret;
1132 }
1133
1134 static const struct v4l2_subdev_video_ops ov7251_video_ops = {
1135         .s_stream = ov7251_s_stream,
1136         .g_frame_interval = ov7251_get_frame_interval,
1137         .s_frame_interval = ov7251_set_frame_interval,
1138 };
1139
1140 static const struct v4l2_subdev_pad_ops ov7251_subdev_pad_ops = {
1141         .init_cfg = ov7251_entity_init_cfg,
1142         .enum_mbus_code = ov7251_enum_mbus_code,
1143         .enum_frame_size = ov7251_enum_frame_size,
1144         .enum_frame_interval = ov7251_enum_frame_ival,
1145         .get_fmt = ov7251_get_format,
1146         .set_fmt = ov7251_set_format,
1147         .get_selection = ov7251_get_selection,
1148 };
1149
1150 static const struct v4l2_subdev_ops ov7251_subdev_ops = {
1151         .video = &ov7251_video_ops,
1152         .pad = &ov7251_subdev_pad_ops,
1153 };
1154
1155 static int ov7251_check_hwcfg(struct ov7251 *ov7251)
1156 {
1157         struct fwnode_handle *fwnode = dev_fwnode(ov7251->dev);
1158         struct v4l2_fwnode_endpoint bus_cfg = {
1159                 .bus_type = V4L2_MBUS_CSI2_DPHY,
1160         };
1161         struct fwnode_handle *endpoint;
1162         bool freq_found;
1163         int i, j;
1164         int ret;
1165
1166         endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
1167         if (!endpoint)
1168                 return -EPROBE_DEFER; /* could be provided by cio2-bridge */
1169
1170         ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
1171         fwnode_handle_put(endpoint);
1172         if (ret)
1173                 return dev_err_probe(ov7251->dev, ret,
1174                                      "parsing endpoint node failed\n");
1175
1176         if (bus_cfg.bus_type != V4L2_MBUS_CSI2_DPHY) {
1177                 ret = -EINVAL;
1178                 dev_err(ov7251->dev, "invalid bus type (%u), must be (%u)\n",
1179                         bus_cfg.bus_type, V4L2_MBUS_CSI2_DPHY);
1180                 goto out_free_bus_cfg;
1181         }
1182
1183         if (bus_cfg.bus.mipi_csi2.num_data_lanes != 1) {
1184                 dev_err(ov7251->dev, "only a 1-lane CSI2 config is supported");
1185                 ret = -EINVAL;
1186                 goto out_free_bus_cfg;
1187         }
1188
1189         if (!bus_cfg.nr_of_link_frequencies) {
1190                 dev_err(ov7251->dev, "no link frequencies defined\n");
1191                 ret = -EINVAL;
1192                 goto out_free_bus_cfg;
1193         }
1194
1195         freq_found = false;
1196         for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) {
1197                 for (j = 0; j < ARRAY_SIZE(link_freq); j++)
1198                         if (bus_cfg.link_frequencies[i] == link_freq[j]) {
1199                                 freq_found = true;
1200                                 break;
1201                         }
1202
1203                 if (freq_found)
1204                         break;
1205         }
1206
1207         if (i == bus_cfg.nr_of_link_frequencies) {
1208                 dev_err(ov7251->dev, "no supported link freq found\n");
1209                 ret = -EINVAL;
1210                 goto out_free_bus_cfg;
1211         }
1212
1213 out_free_bus_cfg:
1214         v4l2_fwnode_endpoint_free(&bus_cfg);
1215
1216         return ret;
1217 }
1218
1219 static int ov7251_detect_chip(struct ov7251 *ov7251)
1220 {
1221         u8 chip_id_high, chip_id_low, chip_rev;
1222         int ret;
1223
1224         ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_HIGH, &chip_id_high);
1225         if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE)
1226                 return dev_err_probe(ov7251->dev, -ENODEV,
1227                                      "could not read ID high\n");
1228
1229         ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_LOW, &chip_id_low);
1230         if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE)
1231                 return dev_err_probe(ov7251->dev, -ENODEV,
1232                                      "could not read ID low\n");
1233
1234         ret = ov7251_read_reg(ov7251, OV7251_SC_GP_IO_IN1, &chip_rev);
1235         if (ret < 0)
1236                 return dev_err_probe(ov7251->dev, -ENODEV,
1237                                      "could not read revision\n");
1238         chip_rev >>= 4;
1239
1240         dev_info(ov7251->dev,
1241                  "OV7251 revision %x (%s) detected at address 0x%02x\n",
1242                  chip_rev,
1243                  chip_rev == 0x4 ? "1A / 1B" :
1244                  chip_rev == 0x5 ? "1C / 1D" :
1245                  chip_rev == 0x6 ? "1E" :
1246                  chip_rev == 0x7 ? "1F" : "unknown",
1247                  ov7251->i2c_client->addr);
1248
1249         return 0;
1250 }
1251
1252 static int ov7251_probe(struct i2c_client *client)
1253 {
1254         struct v4l2_fwnode_device_properties props;
1255         struct device *dev = &client->dev;
1256         struct v4l2_ctrl *ctrl;
1257         struct ov7251 *ov7251;
1258         unsigned int rate = 0;
1259         u32 h_blank, v_blank, v_blank_max;
1260         int ret;
1261         int i;
1262
1263         ov7251 = devm_kzalloc(dev, sizeof(struct ov7251), GFP_KERNEL);
1264         if (!ov7251)
1265                 return -ENOMEM;
1266
1267         ov7251->i2c_client = client;
1268         ov7251->dev = dev;
1269
1270         ret = ov7251_check_hwcfg(ov7251);
1271         if (ret)
1272                 return ret;
1273
1274         /* get system clock (xclk) */
1275         ov7251->xclk = devm_clk_get(dev, NULL);
1276         if (IS_ERR(ov7251->xclk)) {
1277                 dev_err(dev, "could not get xclk");
1278                 return PTR_ERR(ov7251->xclk);
1279         }
1280
1281         /*
1282          * We could have either a 24MHz or 19.2MHz clock rate from either dt or
1283          * ACPI. We also need to support the IPU3 case which will have both an
1284          * external clock AND a clock-frequency property.
1285          */
1286         ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
1287                                        &rate);
1288         if (!ret && ov7251->xclk) {
1289                 ret = clk_set_rate(ov7251->xclk, rate);
1290                 if (ret)
1291                         return dev_err_probe(dev, ret,
1292                                              "failed to set clock rate\n");
1293         } else if (ret && !ov7251->xclk) {
1294                 return dev_err_probe(dev, ret, "invalid clock config\n");
1295         }
1296
1297         ov7251->xclk_freq = rate ? rate : clk_get_rate(ov7251->xclk);
1298
1299         for (i = 0; i < ARRAY_SIZE(supported_xclk_rates); i++)
1300                 if (ov7251->xclk_freq == supported_xclk_rates[i])
1301                         break;
1302
1303         if (i == ARRAY_SIZE(supported_xclk_rates))
1304                 return dev_err_probe(dev, -EINVAL,
1305                                      "clock rate %u Hz is unsupported\n",
1306                                      ov7251->xclk_freq);
1307
1308         ov7251->pll_configs = ov7251_pll_configs[i];
1309
1310         ov7251->io_regulator = devm_regulator_get(dev, "vdddo");
1311         if (IS_ERR(ov7251->io_regulator)) {
1312                 dev_err(dev, "cannot get io regulator\n");
1313                 return PTR_ERR(ov7251->io_regulator);
1314         }
1315
1316         ov7251->core_regulator = devm_regulator_get(dev, "vddd");
1317         if (IS_ERR(ov7251->core_regulator)) {
1318                 dev_err(dev, "cannot get core regulator\n");
1319                 return PTR_ERR(ov7251->core_regulator);
1320         }
1321
1322         ov7251->analog_regulator = devm_regulator_get(dev, "vdda");
1323         if (IS_ERR(ov7251->analog_regulator)) {
1324                 dev_err(dev, "cannot get analog regulator\n");
1325                 return PTR_ERR(ov7251->analog_regulator);
1326         }
1327
1328         ov7251->enable_gpio = devm_gpiod_get_optional(dev, "enable",
1329                                                       GPIOD_OUT_HIGH);
1330         if (IS_ERR(ov7251->enable_gpio)) {
1331                 dev_err(dev, "cannot get enable gpio\n");
1332                 return PTR_ERR(ov7251->enable_gpio);
1333         }
1334
1335         mutex_init(&ov7251->lock);
1336
1337         ov7251->current_mode = &ov7251_mode_info_data[0];
1338         ov7251->current_ival = &ov7251_frame_ival_info_data[0];
1339
1340         v4l2_ctrl_handler_init(&ov7251->ctrls, 11);
1341         ov7251->ctrls.lock = &ov7251->lock;
1342
1343         v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1344                           V4L2_CID_HFLIP, 0, 1, 1, 0);
1345         v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1346                           V4L2_CID_VFLIP, 0, 1, 1, 0);
1347         ov7251->exposure = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1348                                              V4L2_CID_EXPOSURE, 1, 32, 1, 32);
1349         v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1350                           V4L2_CID_ANALOGUE_GAIN, 16, 1023, 1, 16);
1351         v4l2_ctrl_new_std_menu_items(&ov7251->ctrls, &ov7251_ctrl_ops,
1352                                      V4L2_CID_TEST_PATTERN,
1353                                      ARRAY_SIZE(ov7251_test_pattern_menu) - 1,
1354                                      0, 0, ov7251_test_pattern_menu);
1355         v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1356                           V4L2_CID_PIXEL_RATE, OV7251_PIXEL_CLOCK,
1357                           OV7251_PIXEL_CLOCK, 1, OV7251_PIXEL_CLOCK);
1358         ctrl = v4l2_ctrl_new_int_menu(&ov7251->ctrls, &ov7251_ctrl_ops,
1359                                       V4L2_CID_LINK_FREQ,
1360                                       ARRAY_SIZE(link_freq) - 1,
1361                                       0, link_freq);
1362         if (ctrl)
1363                 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1364         h_blank = OV7251_HTS - ov7251->current_mode->width;
1365         ov7251->hblank = v4l2_ctrl_new_std(&ov7251->ctrls, NULL,
1366                                            V4L2_CID_HBLANK, h_blank,
1367                                            h_blank, 1, h_blank);
1368         if (ov7251->hblank)
1369                 ov7251->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1370
1371         v_blank = ov7251->current_ival->vts - ov7251->current_mode->height;
1372         v_blank_max = OV7251_VTS_MAX - ov7251->current_mode->width;
1373         ov7251->vblank = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1374                                            V4L2_CID_VBLANK,
1375                                            OV7251_VTS_MIN_OFFSET,
1376                                            v_blank_max, 1, v_blank);
1377
1378         ov7251->sd.ctrl_handler = &ov7251->ctrls;
1379
1380         if (ov7251->ctrls.error) {
1381                 dev_err(dev, "%s: control initialization error %d\n",
1382                         __func__, ov7251->ctrls.error);
1383                 ret = ov7251->ctrls.error;
1384                 goto free_ctrl;
1385         }
1386
1387         ret = v4l2_fwnode_device_parse(&client->dev, &props);
1388         if (ret)
1389                 goto free_ctrl;
1390
1391         ret = v4l2_ctrl_new_fwnode_properties(&ov7251->ctrls, &ov7251_ctrl_ops,
1392                                               &props);
1393         if (ret)
1394                 goto free_ctrl;
1395
1396         v4l2_i2c_subdev_init(&ov7251->sd, client, &ov7251_subdev_ops);
1397         ov7251->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1398         ov7251->pad.flags = MEDIA_PAD_FL_SOURCE;
1399         ov7251->sd.dev = &client->dev;
1400         ov7251->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1401
1402         ret = media_entity_pads_init(&ov7251->sd.entity, 1, &ov7251->pad);
1403         if (ret < 0) {
1404                 dev_err(dev, "could not register media entity\n");
1405                 goto free_ctrl;
1406         }
1407
1408         ret = ov7251_set_power_on(ov7251);
1409         if (ret)
1410                 goto free_entity;
1411
1412         ret = ov7251_detect_chip(ov7251);
1413         if (ret)
1414                 goto power_down;
1415
1416         pm_runtime_set_active(&client->dev);
1417         pm_runtime_get_noresume(&client->dev);
1418         pm_runtime_enable(&client->dev);
1419
1420         ret = ov7251_read_reg(ov7251, OV7251_PRE_ISP_00,
1421                               &ov7251->pre_isp_00);
1422         if (ret < 0) {
1423                 dev_err(dev, "could not read test pattern value\n");
1424                 ret = -ENODEV;
1425                 goto err_pm_runtime;
1426         }
1427
1428         ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT1,
1429                               &ov7251->timing_format1);
1430         if (ret < 0) {
1431                 dev_err(dev, "could not read vflip value\n");
1432                 ret = -ENODEV;
1433                 goto err_pm_runtime;
1434         }
1435
1436         ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT2,
1437                               &ov7251->timing_format2);
1438         if (ret < 0) {
1439                 dev_err(dev, "could not read hflip value\n");
1440                 ret = -ENODEV;
1441                 goto err_pm_runtime;
1442         }
1443
1444         pm_runtime_set_autosuspend_delay(&client->dev, 1000);
1445         pm_runtime_use_autosuspend(&client->dev);
1446         pm_runtime_put_autosuspend(&client->dev);
1447
1448         ret = v4l2_async_register_subdev(&ov7251->sd);
1449         if (ret < 0) {
1450                 dev_err(dev, "could not register v4l2 device\n");
1451                 goto free_entity;
1452         }
1453
1454         ov7251_entity_init_cfg(&ov7251->sd, NULL);
1455
1456         return 0;
1457
1458 err_pm_runtime:
1459         pm_runtime_disable(ov7251->dev);
1460         pm_runtime_put_noidle(ov7251->dev);
1461 power_down:
1462         ov7251_set_power_off(ov7251);
1463 free_entity:
1464         media_entity_cleanup(&ov7251->sd.entity);
1465 free_ctrl:
1466         v4l2_ctrl_handler_free(&ov7251->ctrls);
1467         mutex_destroy(&ov7251->lock);
1468
1469         return ret;
1470 }
1471
1472 static int ov7251_remove(struct i2c_client *client)
1473 {
1474         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1475         struct ov7251 *ov7251 = to_ov7251(sd);
1476
1477         v4l2_async_unregister_subdev(&ov7251->sd);
1478         media_entity_cleanup(&ov7251->sd.entity);
1479         v4l2_ctrl_handler_free(&ov7251->ctrls);
1480         mutex_destroy(&ov7251->lock);
1481
1482         pm_runtime_disable(ov7251->dev);
1483         if (!pm_runtime_status_suspended(ov7251->dev))
1484                 ov7251_set_power_off(ov7251);
1485         pm_runtime_set_suspended(ov7251->dev);
1486
1487         return 0;
1488 }
1489
1490 static const struct dev_pm_ops ov7251_pm_ops = {
1491         SET_RUNTIME_PM_OPS(ov7251_sensor_suspend, ov7251_sensor_resume, NULL)
1492 };
1493
1494 static const struct of_device_id ov7251_of_match[] = {
1495         { .compatible = "ovti,ov7251" },
1496         { /* sentinel */ }
1497 };
1498 MODULE_DEVICE_TABLE(of, ov7251_of_match);
1499
1500 static const struct acpi_device_id ov7251_acpi_match[] = {
1501         { "INT347E" },
1502         { }
1503 };
1504 MODULE_DEVICE_TABLE(acpi, ov7251_acpi_match);
1505
1506 static struct i2c_driver ov7251_i2c_driver = {
1507         .driver = {
1508                 .of_match_table = ov7251_of_match,
1509                 .acpi_match_table = ov7251_acpi_match,
1510                 .name  = "ov7251",
1511                 .pm = &ov7251_pm_ops,
1512         },
1513         .probe_new  = ov7251_probe,
1514         .remove = ov7251_remove,
1515 };
1516
1517 module_i2c_driver(ov7251_i2c_driver);
1518
1519 MODULE_DESCRIPTION("Omnivision OV7251 Camera Driver");
1520 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1521 MODULE_LICENSE("GPL v2");