1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN 6000000
30 #define OV5640_XCLK_MAX 54000000
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_LINK_RATE_MAX 490000000U
36 #define OV5640_REG_SYS_RESET02 0x3002
37 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
38 #define OV5640_REG_SYS_CTRL0 0x3008
39 #define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
40 #define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
41 #define OV5640_REG_CHIP_ID 0x300a
42 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
43 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
44 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
45 #define OV5640_REG_PAD_OUTPUT00 0x3019
46 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
47 #define OV5640_REG_SC_PLL_CTRL0 0x3034
48 #define OV5640_REG_SC_PLL_CTRL1 0x3035
49 #define OV5640_REG_SC_PLL_CTRL2 0x3036
50 #define OV5640_REG_SC_PLL_CTRL3 0x3037
51 #define OV5640_REG_SLAVE_ID 0x3100
52 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
53 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
54 #define OV5640_REG_AWB_R_GAIN 0x3400
55 #define OV5640_REG_AWB_G_GAIN 0x3402
56 #define OV5640_REG_AWB_B_GAIN 0x3404
57 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
58 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
59 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
60 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
61 #define OV5640_REG_AEC_PK_MANUAL 0x3503
62 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
63 #define OV5640_REG_AEC_PK_VTS 0x350c
64 #define OV5640_REG_TIMING_DVPHO 0x3808
65 #define OV5640_REG_TIMING_DVPVO 0x380a
66 #define OV5640_REG_TIMING_HTS 0x380c
67 #define OV5640_REG_TIMING_VTS 0x380e
68 #define OV5640_REG_TIMING_TC_REG20 0x3820
69 #define OV5640_REG_TIMING_TC_REG21 0x3821
70 #define OV5640_REG_AEC_CTRL00 0x3a00
71 #define OV5640_REG_AEC_B50_STEP 0x3a08
72 #define OV5640_REG_AEC_B60_STEP 0x3a0a
73 #define OV5640_REG_AEC_CTRL0D 0x3a0d
74 #define OV5640_REG_AEC_CTRL0E 0x3a0e
75 #define OV5640_REG_AEC_CTRL0F 0x3a0f
76 #define OV5640_REG_AEC_CTRL10 0x3a10
77 #define OV5640_REG_AEC_CTRL11 0x3a11
78 #define OV5640_REG_AEC_CTRL1B 0x3a1b
79 #define OV5640_REG_AEC_CTRL1E 0x3a1e
80 #define OV5640_REG_AEC_CTRL1F 0x3a1f
81 #define OV5640_REG_HZ5060_CTRL00 0x3c00
82 #define OV5640_REG_HZ5060_CTRL01 0x3c01
83 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
84 #define OV5640_REG_FRAME_CTRL01 0x4202
85 #define OV5640_REG_FORMAT_CONTROL00 0x4300
86 #define OV5640_REG_VFIFO_HSIZE 0x4602
87 #define OV5640_REG_VFIFO_VSIZE 0x4604
88 #define OV5640_REG_JPG_MODE_SELECT 0x4713
89 #define OV5640_REG_CCIR656_CTRL00 0x4730
90 #define OV5640_REG_POLARITY_CTRL00 0x4740
91 #define OV5640_REG_MIPI_CTRL00 0x4800
92 #define OV5640_REG_DEBUG_MODE 0x4814
93 #define OV5640_REG_PCLK_PERIOD 0x4837
94 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
95 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
96 #define OV5640_REG_SDE_CTRL0 0x5580
97 #define OV5640_REG_SDE_CTRL1 0x5581
98 #define OV5640_REG_SDE_CTRL3 0x5583
99 #define OV5640_REG_SDE_CTRL4 0x5584
100 #define OV5640_REG_SDE_CTRL5 0x5585
101 #define OV5640_REG_AVG_READOUT 0x56a1
103 enum ov5640_mode_id {
104 OV5640_MODE_QQVGA_160_120 = 0,
105 OV5640_MODE_QCIF_176_144,
106 OV5640_MODE_QVGA_320_240,
107 OV5640_MODE_VGA_640_480,
108 OV5640_MODE_NTSC_720_480,
109 OV5640_MODE_PAL_720_576,
110 OV5640_MODE_XGA_1024_768,
111 OV5640_MODE_720P_1280_720,
112 OV5640_MODE_1080P_1920_1080,
113 OV5640_MODE_QSXGA_2592_1944,
117 enum ov5640_frame_rate {
121 OV5640_NUM_FRAMERATES,
124 enum ov5640_pixel_rate_id {
125 OV5640_PIXEL_RATE_168M,
126 OV5640_PIXEL_RATE_148M,
127 OV5640_PIXEL_RATE_124M,
128 OV5640_PIXEL_RATE_96M,
129 OV5640_PIXEL_RATE_48M,
130 OV5640_NUM_PIXEL_RATES,
134 * The chip manual suggests 24/48/96/192 MHz pixel clocks.
136 * 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for
137 * full resolution mode @15 FPS.
139 static const u32 ov5640_pixel_rates[] = {
140 [OV5640_PIXEL_RATE_168M] = 168000000,
141 [OV5640_PIXEL_RATE_148M] = 148000000,
142 [OV5640_PIXEL_RATE_124M] = 124000000,
143 [OV5640_PIXEL_RATE_96M] = 96000000,
144 [OV5640_PIXEL_RATE_48M] = 48000000,
148 * MIPI CSI-2 link frequencies.
150 * Derived from the above defined pixel rate for bpp = (8, 16, 24) and
151 * data_lanes = (1, 2)
153 * link_freq = (pixel_rate * bpp) / (2 * data_lanes)
155 static const s64 ov5640_csi2_link_freqs[] = {
156 992000000, 888000000, 768000000, 744000000, 672000000, 672000000,
157 592000000, 592000000, 576000000, 576000000, 496000000, 496000000,
158 384000000, 384000000, 384000000, 336000000, 296000000, 288000000,
159 248000000, 192000000, 192000000, 192000000, 96000000,
162 /* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */
163 #define OV5640_DEFAULT_LINK_FREQ 13
165 enum ov5640_format_mux {
166 OV5640_FMT_MUX_YUV422 = 0,
168 OV5640_FMT_MUX_DITHER,
169 OV5640_FMT_MUX_RAW_DPC,
170 OV5640_FMT_MUX_SNR_RAW,
171 OV5640_FMT_MUX_RAW_CIP,
174 static const struct ov5640_pixfmt {
178 } ov5640_formats[] = {
180 .code = MEDIA_BUS_FMT_JPEG_1X8,
181 .colorspace = V4L2_COLORSPACE_JPEG,
184 .code = MEDIA_BUS_FMT_UYVY8_2X8,
185 .colorspace = V4L2_COLORSPACE_SRGB,
188 .code = MEDIA_BUS_FMT_UYVY8_1X16,
189 .colorspace = V4L2_COLORSPACE_SRGB,
192 .code = MEDIA_BUS_FMT_YUYV8_2X8,
193 .colorspace = V4L2_COLORSPACE_SRGB,
196 .code = MEDIA_BUS_FMT_YUYV8_1X16,
197 .colorspace = V4L2_COLORSPACE_SRGB,
200 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
201 .colorspace = V4L2_COLORSPACE_SRGB,
204 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
205 .colorspace = V4L2_COLORSPACE_SRGB,
208 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
209 .colorspace = V4L2_COLORSPACE_SRGB,
212 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
213 .colorspace = V4L2_COLORSPACE_SRGB,
216 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
217 .colorspace = V4L2_COLORSPACE_SRGB,
220 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
221 .colorspace = V4L2_COLORSPACE_SRGB,
226 static u32 ov5640_code_to_bpp(u32 code)
230 for (i = 0; i < ARRAY_SIZE(ov5640_formats); ++i) {
231 if (ov5640_formats[i].code == code)
232 return ov5640_formats[i].bpp;
239 * FIXME: remove this when a subdev API becomes available
240 * to set the MIPI CSI-2 virtual channel.
242 static unsigned int virtual_channel;
243 module_param(virtual_channel, uint, 0444);
244 MODULE_PARM_DESC(virtual_channel,
245 "MIPI CSI-2 virtual channel (0..3), default 0");
247 static const int ov5640_framerates[] = {
248 [OV5640_15_FPS] = 15,
249 [OV5640_30_FPS] = 30,
250 [OV5640_60_FPS] = 60,
253 /* regulator supplies */
254 static const char * const ov5640_supply_name[] = {
255 "DOVDD", /* Digital I/O (1.8V) supply */
256 "AVDD", /* Analog (2.8V) supply */
257 "DVDD", /* Digital Core (1.5V) supply */
260 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
263 * Image size under 1280 * 960 are SUBSAMPLING
264 * Image size upper 1280 * 960 are SCALING
266 enum ov5640_downsize_mode {
278 struct ov5640_mode_info {
279 enum ov5640_mode_id id;
280 enum ov5640_downsize_mode dn_mode;
281 enum ov5640_pixel_rate_id pixel_rate;
286 const struct reg_value *reg_data;
291 struct ov5640_ctrls {
292 struct v4l2_ctrl_handler handler;
293 struct v4l2_ctrl *pixel_rate;
294 struct v4l2_ctrl *link_freq;
296 struct v4l2_ctrl *auto_exp;
297 struct v4l2_ctrl *exposure;
300 struct v4l2_ctrl *auto_wb;
301 struct v4l2_ctrl *blue_balance;
302 struct v4l2_ctrl *red_balance;
305 struct v4l2_ctrl *auto_gain;
306 struct v4l2_ctrl *gain;
308 struct v4l2_ctrl *brightness;
309 struct v4l2_ctrl *light_freq;
310 struct v4l2_ctrl *saturation;
311 struct v4l2_ctrl *contrast;
312 struct v4l2_ctrl *hue;
313 struct v4l2_ctrl *test_pattern;
314 struct v4l2_ctrl *hflip;
315 struct v4l2_ctrl *vflip;
319 struct i2c_client *i2c_client;
320 struct v4l2_subdev sd;
321 struct media_pad pad;
322 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
323 struct clk *xclk; /* system clock to OV5640 */
326 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
327 struct gpio_desc *reset_gpio;
328 struct gpio_desc *pwdn_gpio;
331 /* lock to protect all members below */
336 struct v4l2_mbus_framefmt fmt;
337 bool pending_fmt_change;
339 const struct ov5640_mode_info *current_mode;
340 const struct ov5640_mode_info *last_mode;
341 enum ov5640_frame_rate current_fr;
342 struct v4l2_fract frame_interval;
343 s64 current_link_freq;
345 struct ov5640_ctrls ctrls;
347 u32 prev_sysclk, prev_hts;
348 u32 ae_low, ae_high, ae_target;
350 bool pending_mode_change;
354 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
356 return container_of(sd, struct ov5640_dev, sd);
359 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
361 return &container_of(ctrl->handler, struct ov5640_dev,
365 static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)
367 return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;
371 * FIXME: all of these register tables are likely filled with
372 * entries that set the register to their power-on default values,
373 * and which are otherwise not touched by this driver. Those entries
374 * should be identified and removed to speed register load time
377 /* YUV422 UYVY VGA@30fps */
378 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
379 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
380 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
381 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
382 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
383 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
384 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
385 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
386 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
387 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
388 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
389 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
390 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
391 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
392 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
393 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
394 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
395 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
396 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
397 {0x3810, 0x00, 0, 0},
398 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
399 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
400 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
401 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
402 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
403 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
404 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
405 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
406 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
407 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
408 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
409 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
410 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
411 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
412 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
413 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
414 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
415 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
416 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
417 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
418 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
419 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
420 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
421 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
422 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
423 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
424 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
425 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
426 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
427 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
428 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
429 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
430 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
431 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
432 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
433 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
434 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
435 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
436 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
437 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
438 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
439 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
440 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
441 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
442 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
443 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
444 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
445 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
446 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
447 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
448 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
449 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
450 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
451 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
452 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
453 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
454 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
455 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
456 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
457 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
458 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
459 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
462 static const struct reg_value ov5640_setting_VGA_640_480[] = {
463 {0x3c07, 0x08, 0, 0},
464 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
465 {0x3814, 0x31, 0, 0},
466 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
467 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
468 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
469 {0x3810, 0x00, 0, 0},
470 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
471 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
472 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
473 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
474 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
475 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
476 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
477 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
478 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
481 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
482 {0x3c07, 0x08, 0, 0},
483 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
484 {0x3814, 0x31, 0, 0},
485 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
486 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
487 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
488 {0x3810, 0x00, 0, 0},
489 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
490 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
491 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
492 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
493 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
494 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
495 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
496 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
497 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
500 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
501 {0x3c07, 0x08, 0, 0},
502 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
503 {0x3814, 0x31, 0, 0},
504 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
505 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
506 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
507 {0x3810, 0x00, 0, 0},
508 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
509 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
510 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
511 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
512 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
513 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
514 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
515 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
516 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
519 static const struct reg_value ov5640_setting_QQVGA_160_120[] = {
520 {0x3c07, 0x08, 0, 0},
521 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
522 {0x3814, 0x31, 0, 0},
523 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
524 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
525 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
526 {0x3810, 0x00, 0, 0},
527 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
528 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
529 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
530 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
531 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
532 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
533 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
534 {0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},
537 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
538 {0x3c07, 0x08, 0, 0},
539 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
540 {0x3814, 0x31, 0, 0},
541 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
542 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
543 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
544 {0x3810, 0x00, 0, 0},
545 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
546 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
547 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
548 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
549 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
550 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
551 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
552 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
553 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
556 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
557 {0x3c07, 0x08, 0, 0},
558 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
559 {0x3814, 0x31, 0, 0},
560 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
561 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
562 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
563 {0x3810, 0x00, 0, 0},
564 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
565 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
566 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
567 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
568 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
569 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
570 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
571 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
572 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
575 static const struct reg_value ov5640_setting_PAL_720_576[] = {
576 {0x3c07, 0x08, 0, 0},
577 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
578 {0x3814, 0x31, 0, 0},
579 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
580 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
581 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
582 {0x3810, 0x00, 0, 0},
583 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
584 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
585 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
586 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
587 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
588 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
589 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
590 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
591 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
594 static const struct reg_value ov5640_setting_720P_1280_720[] = {
595 {0x3c07, 0x07, 0, 0},
596 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
597 {0x3814, 0x31, 0, 0},
598 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
599 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
600 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
601 {0x3810, 0x00, 0, 0},
602 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
603 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
604 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
605 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
606 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
607 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
608 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
609 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
610 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
613 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
614 {0x3c07, 0x08, 0, 0},
615 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
616 {0x3814, 0x11, 0, 0},
617 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
618 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
619 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
620 {0x3810, 0x00, 0, 0},
621 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
622 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
623 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
624 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
625 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
626 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
627 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
628 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
629 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
630 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
631 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
632 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
633 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
634 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
635 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
636 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
637 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
638 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
639 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
640 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
641 {0x4005, 0x1a, 0, 0},
644 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
645 {0x3c07, 0x08, 0, 0},
646 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
647 {0x3814, 0x11, 0, 0},
648 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
649 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
650 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
651 {0x3810, 0x00, 0, 0},
652 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
653 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
654 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
655 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
656 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
657 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
658 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
659 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
660 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
663 /* power-on sensor init reg table */
664 static const struct ov5640_mode_info ov5640_mode_init_data = {
666 OV5640_PIXEL_RATE_96M,
668 ov5640_init_setting_30fps_VGA,
669 ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
673 static const struct ov5640_mode_info
674 ov5640_mode_data[OV5640_NUM_MODES] = {
677 OV5640_MODE_QQVGA_160_120, SUBSAMPLING,
678 OV5640_PIXEL_RATE_48M,
680 ov5640_setting_QQVGA_160_120,
681 ARRAY_SIZE(ov5640_setting_QQVGA_160_120),
685 OV5640_MODE_QCIF_176_144, SUBSAMPLING,
686 OV5640_PIXEL_RATE_48M,
688 ov5640_setting_QCIF_176_144,
689 ARRAY_SIZE(ov5640_setting_QCIF_176_144),
693 OV5640_MODE_QVGA_320_240, SUBSAMPLING,
694 OV5640_PIXEL_RATE_48M,
696 ov5640_setting_QVGA_320_240,
697 ARRAY_SIZE(ov5640_setting_QVGA_320_240),
701 OV5640_MODE_VGA_640_480, SUBSAMPLING,
702 OV5640_PIXEL_RATE_48M,
703 640, 1896, 480, 1080,
704 ov5640_setting_VGA_640_480,
705 ARRAY_SIZE(ov5640_setting_VGA_640_480),
709 OV5640_MODE_NTSC_720_480, SUBSAMPLING,
710 OV5640_PIXEL_RATE_96M,
712 ov5640_setting_NTSC_720_480,
713 ARRAY_SIZE(ov5640_setting_NTSC_720_480),
717 OV5640_MODE_PAL_720_576, SUBSAMPLING,
718 OV5640_PIXEL_RATE_96M,
720 ov5640_setting_PAL_720_576,
721 ARRAY_SIZE(ov5640_setting_PAL_720_576),
725 OV5640_MODE_XGA_1024_768, SUBSAMPLING,
726 OV5640_PIXEL_RATE_96M,
727 1024, 1896, 768, 1080,
728 ov5640_setting_XGA_1024_768,
729 ARRAY_SIZE(ov5640_setting_XGA_1024_768),
733 OV5640_MODE_720P_1280_720, SUBSAMPLING,
734 OV5640_PIXEL_RATE_124M,
735 1280, 1892, 720, 740,
736 ov5640_setting_720P_1280_720,
737 ARRAY_SIZE(ov5640_setting_720P_1280_720),
741 OV5640_MODE_1080P_1920_1080, SCALING,
742 OV5640_PIXEL_RATE_148M,
743 1920, 2500, 1080, 1120,
744 ov5640_setting_1080P_1920_1080,
745 ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
749 OV5640_MODE_QSXGA_2592_1944, SCALING,
750 OV5640_PIXEL_RATE_168M,
751 2592, 2844, 1944, 1968,
752 ov5640_setting_QSXGA_2592_1944,
753 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
758 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
760 struct i2c_client *client = sensor->i2c_client;
765 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
768 buf[0] = OV5640_REG_SLAVE_ID >> 8;
769 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
770 buf[2] = client->addr << 1;
772 msg.addr = OV5640_DEFAULT_SLAVE_ID;
775 msg.len = sizeof(buf);
777 ret = i2c_transfer(client->adapter, &msg, 1);
779 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
786 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
788 struct i2c_client *client = sensor->i2c_client;
797 msg.addr = client->addr;
798 msg.flags = client->flags;
800 msg.len = sizeof(buf);
802 ret = i2c_transfer(client->adapter, &msg, 1);
804 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
812 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
814 struct i2c_client *client = sensor->i2c_client;
815 struct i2c_msg msg[2];
822 msg[0].addr = client->addr;
823 msg[0].flags = client->flags;
825 msg[0].len = sizeof(buf);
827 msg[1].addr = client->addr;
828 msg[1].flags = client->flags | I2C_M_RD;
832 ret = i2c_transfer(client->adapter, msg, 2);
834 dev_err(&client->dev, "%s: error: reg=%x\n",
843 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
848 ret = ov5640_read_reg(sensor, reg, &hi);
851 ret = ov5640_read_reg(sensor, reg + 1, &lo);
855 *val = ((u16)hi << 8) | (u16)lo;
859 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
863 ret = ov5640_write_reg(sensor, reg, val >> 8);
867 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
870 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
876 ret = ov5640_read_reg(sensor, reg, &readval);
884 return ov5640_write_reg(sensor, reg, val);
888 * After trying the various combinations, reading various
889 * documentations spread around the net, and from the various
890 * feedback, the clock tree is probably as follows:
896 * +->| PLL1 | - reg 0x3036, for the multiplier
897 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
899 * +->| System Clock | - reg 0x3035, bits 4-7
902 * +->| MIPI Divider | - reg 0x3035, bits 0-3
904 * | +----------------> MIPI SCLK
906 * | +->| / 2 |-------> MIPI BIT CLK
909 * +->| PLL Root Div | - reg 0x3037, bit 4
912 * +->| Bit Div | - reg 0x3034, bits 0-3
915 * +->| SCLK Div | - reg 0x3108, bits 0-1
917 * | +---------------> SCLK
919 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
921 * | +---------------> SCLK 2X
923 * +->| PCLK Div | - reg 0x3108, bits 4-5
926 * +->| P_DIV | - reg 0x3035, bits 0-3
928 * +------------> PCLK
930 * There seems to be also constraints:
931 * - the PLL pre-divider output rate should be in the 4-27MHz range
932 * - the PLL multiplier output rate should be in the 500-1000MHz range
933 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
937 * This is supposed to be ranging from 1 to 8, but the value is always
938 * set to 3 in the vendor kernels.
940 #define OV5640_PLL_PREDIV 3
942 #define OV5640_PLL_MULT_MIN 4
943 #define OV5640_PLL_MULT_MAX 252
946 * This is supposed to be ranging from 1 to 16, but the value is
947 * always set to either 1 or 2 in the vendor kernels.
949 #define OV5640_SYSDIV_MIN 1
950 #define OV5640_SYSDIV_MAX 16
953 * This is supposed to be ranging from 1 to 2, but the value is always
954 * set to 2 in the vendor kernels.
956 #define OV5640_PLL_ROOT_DIV 2
957 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
960 * We only supports 8-bit formats at the moment
962 #define OV5640_BIT_DIV 2
963 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
966 * This is supposed to be ranging from 1 to 8, but the value is always
967 * set to 2 in the vendor kernels.
969 #define OV5640_SCLK_ROOT_DIV 2
972 * This is hardcoded so that the consistency is maintained between SCLK and
975 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
978 * This is supposed to be ranging from 1 to 8, but the value is always
979 * set to 1 in the vendor kernels.
981 #define OV5640_PCLK_ROOT_DIV 1
982 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
984 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
985 u8 pll_prediv, u8 pll_mult,
988 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
990 /* PLL1 output cannot exceed 1GHz. */
991 if (sysclk / 1000000 > 1000)
994 return sysclk / sysdiv;
997 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
999 u8 *pll_prediv, u8 *pll_mult,
1002 unsigned long best = ~0;
1003 u8 best_sysdiv = 1, best_mult = 1;
1004 u8 _sysdiv, _pll_mult;
1006 for (_sysdiv = OV5640_SYSDIV_MIN;
1007 _sysdiv <= OV5640_SYSDIV_MAX;
1009 for (_pll_mult = OV5640_PLL_MULT_MIN;
1010 _pll_mult <= OV5640_PLL_MULT_MAX;
1012 unsigned long _rate;
1015 * The PLL multiplier cannot be odd if above
1018 if (_pll_mult > 127 && (_pll_mult % 2))
1021 _rate = ov5640_compute_sys_clk(sensor,
1023 _pll_mult, _sysdiv);
1026 * We have reached the maximum allowed PLL1 output,
1033 * Prefer rates above the expected clock rate than
1034 * below, even if that means being less precise.
1039 if (abs(rate - _rate) < abs(rate - best)) {
1041 best_sysdiv = _sysdiv;
1042 best_mult = _pll_mult;
1051 *sysdiv = best_sysdiv;
1052 *pll_prediv = OV5640_PLL_PREDIV;
1053 *pll_mult = best_mult;
1059 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
1060 * for the MIPI CSI-2 output.
1062 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)
1064 u8 bit_div, mipi_div, pclk_div, sclk_div, sclk2x_div, root_div;
1065 u8 prediv, mult, sysdiv;
1066 unsigned long link_freq;
1067 unsigned long sysclk;
1073 /* Use the link freq computed at ov5640_update_pixel_rate() time. */
1074 link_freq = sensor->current_link_freq;
1077 * - mipi_div - Additional divider for the MIPI lane clock.
1079 * Higher link frequencies would make sysclk > 1GHz.
1080 * Keep the sysclk low and do not divide in the MIPI domain.
1082 if (link_freq > OV5640_LINK_RATE_MAX)
1087 sysclk = link_freq * mipi_div;
1088 ov5640_calc_sys_clk(sensor, sysclk, &prediv, &mult, &sysdiv);
1091 * Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio.
1093 * - root_div = 2 (fixed)
1094 * - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5
1095 * - pclk_div = 1 (fixed)
1096 * - p_div = (2 lanes ? mipi_div : 2 * mipi_div)
1098 * This results in the following MIPI_SCLK depending on the number
1101 * - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK
1102 * - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK
1104 root_div = OV5640_PLL_CTRL3_PLL_ROOT_DIV_2;
1105 bit_div = OV5640_PLL_CTRL0_MIPI_MODE_8BIT;
1106 pclk_div = ilog2(OV5640_PCLK_ROOT_DIV);
1110 * - YUV: PCLK >= 2 * SCLK
1111 * - RAW or JPEG: PCLK >= SCLK
1112 * - sclk2x_div = sclk_div / 2
1114 sclk_div = ilog2(OV5640_SCLK_ROOT_DIV);
1115 sclk2x_div = ilog2(OV5640_SCLK2X_ROOT_DIV);
1118 * Set the pixel clock period expressed in ns with 1-bit decimal
1121 * The register is very briefly documented. In the OV5645 datasheet it
1122 * is described as (2 * pclk period), and from testing it seems the
1123 * actual definition is 2 * 8-bit sample period.
1125 * 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2
1127 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
1128 sample_rate = (link_freq * mipi_div * num_lanes * 2) / 16;
1129 pclk_period = 2000000000UL / sample_rate;
1131 /* Program the clock tree registers. */
1132 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 0x0f, bit_div);
1136 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0xff,
1137 (sysdiv << 4) | mipi_div);
1141 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
1145 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 0x1f,
1150 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1151 (pclk_div << 4) | (sclk2x_div << 2) | sclk_div);
1155 return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);
1158 static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1162 rate = sensor->current_mode->vtot * sensor->current_mode->htot;
1163 rate *= ov5640_framerates[sensor->current_fr];
1168 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1170 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1171 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1173 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1174 OV5640_PCLK_ROOT_DIV;
1176 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1178 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1179 *bit_div = OV5640_BIT_DIV;
1180 *pclk_div = OV5640_PCLK_ROOT_DIV;
1182 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1185 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)
1187 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1191 rate = ov5640_calc_pixel_rate(sensor);
1192 rate *= ov5640_code_to_bpp(sensor->fmt.code);
1193 rate /= sensor->ep.bus.parallel.bus_width;
1195 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1196 &bit_div, &pclk_div);
1201 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1207 * We need to set sysdiv according to the clock, and to clear
1210 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1215 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1220 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1221 0x1f, prediv | ((pll_rdiv - 1) << 4));
1225 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1226 (ilog2(pclk_div) << 4));
1229 /* set JPEG framing sizes */
1230 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1231 const struct ov5640_mode_info *mode)
1236 * compression mode 3 timing
1238 * Data is transmitted with programmable width (VFIFO_HSIZE).
1239 * No padding done. Last line may have less data. Varying
1240 * number of lines per frame, depending on amount of data.
1242 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1246 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1250 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1253 /* download ov5640 settings to sensor through i2c */
1254 static int ov5640_set_timings(struct ov5640_dev *sensor,
1255 const struct ov5640_mode_info *mode)
1259 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1260 ret = ov5640_set_jpeg_timings(sensor, mode);
1265 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1269 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1273 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1277 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1280 static int ov5640_load_regs(struct ov5640_dev *sensor,
1281 const struct ov5640_mode_info *mode)
1283 const struct reg_value *regs = mode->reg_data;
1290 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1291 delay_ms = regs->delay_ms;
1292 reg_addr = regs->reg_addr;
1296 /* remain in power down mode for DVP */
1297 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1298 val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
1299 !ov5640_is_csi2(sensor))
1303 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1305 ret = ov5640_write_reg(sensor, reg_addr, val);
1310 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1313 return ov5640_set_timings(sensor, mode);
1316 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1318 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1319 BIT(0), on ? 0 : BIT(0));
1322 /* read exposure, in number of line periods */
1323 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1328 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1331 exp = ((int)temp & 0x0f) << 16;
1332 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1335 exp |= ((int)temp << 8);
1336 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1344 /* write exposure, given number of line periods */
1345 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1351 ret = ov5640_write_reg(sensor,
1352 OV5640_REG_AEC_PK_EXPOSURE_LO,
1356 ret = ov5640_write_reg(sensor,
1357 OV5640_REG_AEC_PK_EXPOSURE_MED,
1358 (exposure >> 8) & 0xff);
1361 return ov5640_write_reg(sensor,
1362 OV5640_REG_AEC_PK_EXPOSURE_HI,
1363 (exposure >> 16) & 0x0f);
1366 static int ov5640_get_gain(struct ov5640_dev *sensor)
1371 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1375 return gain & 0x3ff;
1378 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1380 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1384 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1386 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1387 BIT(1), on ? 0 : BIT(1));
1390 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1392 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1393 OV5640_REG_SYS_CTRL0_SW_PWUP :
1394 OV5640_REG_SYS_CTRL0_SW_PWDN);
1397 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1402 * Enable/disable the MIPI interface
1404 * 0x300e = on ? 0x45 : 0x40
1406 * FIXME: the sensor manual (version 2.03) reports
1407 * [7:5] = 000 : 1 data lane mode
1408 * [7:5] = 001 : 2 data lanes mode
1409 * But this settings do not work, while the following ones
1410 * have been validated for 2 data lanes mode.
1412 * [7:5] = 010 : 2 data lanes mode
1413 * [4] = 0 : Power up MIPI HS Tx
1414 * [3] = 0 : Power up MIPI LS Rx
1415 * [2] = 1/0 : MIPI interface enable/disable
1416 * [1:0] = 01/00: FIXME: 'debug'
1418 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1423 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1427 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1429 /* calculate sysclk */
1430 u32 xvclk = sensor->xclk_freq / 10000;
1431 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1432 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1433 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1437 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1440 temp2 = temp1 & 0x0f;
1441 if (temp2 == 8 || temp2 == 10)
1442 bit_div2x = temp2 / 2;
1444 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1447 sysdiv = temp1 >> 4;
1451 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1456 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1459 prediv = temp1 & 0x0f;
1460 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1462 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1465 temp2 = temp1 & 0x03;
1466 sclk_rdiv = sclk_rdiv_map[temp2];
1468 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1471 VCO = xvclk * multiplier / prediv;
1473 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1478 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1480 /* read HTS from register settings */
1484 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1488 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1491 static int ov5640_get_hts(struct ov5640_dev *sensor)
1493 /* read HTS from register settings */
1497 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1503 static int ov5640_get_vts(struct ov5640_dev *sensor)
1508 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1514 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1516 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1519 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1521 /* get banding filter value */
1522 int ret, light_freq = 0;
1525 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1531 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1544 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1560 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1562 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1565 /* read preview PCLK */
1566 ret = ov5640_get_sysclk(sensor);
1571 sensor->prev_sysclk = ret;
1572 /* read preview HTS */
1573 ret = ov5640_get_hts(sensor);
1578 sensor->prev_hts = ret;
1580 /* read preview VTS */
1581 ret = ov5640_get_vts(sensor);
1586 /* calculate banding filter */
1588 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1589 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1594 max_band60 = (int)((prev_vts - 4) / band_step60);
1595 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1600 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1601 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1606 max_band50 = (int)((prev_vts - 4) / band_step50);
1607 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1610 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1612 /* stable in high */
1613 u32 fast_high, fast_low;
1616 sensor->ae_low = target * 23 / 25; /* 0.92 */
1617 sensor->ae_high = target * 27 / 25; /* 1.08 */
1619 fast_high = sensor->ae_high << 1;
1620 if (fast_high > 255)
1623 fast_low = sensor->ae_low >> 1;
1625 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1628 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1631 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1634 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1637 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1640 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1643 static int ov5640_get_binning(struct ov5640_dev *sensor)
1648 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1652 return temp & BIT(0);
1655 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1661 * - [0]: Horizontal binning enable
1663 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1664 BIT(0), enable ? BIT(0) : 0);
1669 * - [0]: Undocumented, but hardcoded init sequences
1670 * are always setting REG21/REG20 bit 0 to same value...
1672 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1673 BIT(0), enable ? BIT(0) : 0);
1676 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1678 struct i2c_client *client = sensor->i2c_client;
1679 u8 temp, channel = virtual_channel;
1683 dev_err(&client->dev,
1684 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1689 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1693 temp |= (channel << 6);
1694 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1697 static const struct ov5640_mode_info *
1698 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1699 int width, int height, bool nearest)
1701 const struct ov5640_mode_info *mode;
1703 mode = v4l2_find_nearest_size(ov5640_mode_data,
1704 ARRAY_SIZE(ov5640_mode_data),
1709 (!nearest && (mode->hact != width || mode->vact != height)))
1712 /* Check to see if the current mode exceeds the max frame rate */
1713 if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1720 * sensor changes between scaling and subsampling, go through
1721 * exposure calculation
1723 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1724 const struct ov5640_mode_info *mode)
1726 u32 prev_shutter, prev_gain16;
1727 u32 cap_shutter, cap_gain16;
1728 u32 cap_sysclk, cap_hts, cap_vts;
1729 u32 light_freq, cap_bandfilt, cap_maxband;
1730 u32 cap_gain16_shutter;
1734 if (!mode->reg_data)
1737 /* read preview shutter */
1738 ret = ov5640_get_exposure(sensor);
1742 ret = ov5640_get_binning(sensor);
1745 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1746 mode->id != OV5640_MODE_1080P_1920_1080)
1749 /* read preview gain */
1750 ret = ov5640_get_gain(sensor);
1756 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1760 /* turn off night mode for capture */
1761 ret = ov5640_set_night_mode(sensor);
1765 /* Write capture setting */
1766 ret = ov5640_load_regs(sensor, mode);
1770 /* read capture VTS */
1771 ret = ov5640_get_vts(sensor);
1775 ret = ov5640_get_hts(sensor);
1782 ret = ov5640_get_sysclk(sensor);
1789 /* calculate capture banding filter */
1790 ret = ov5640_get_light_freq(sensor);
1795 if (light_freq == 60) {
1797 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1800 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1803 if (!sensor->prev_sysclk) {
1804 ret = ov5640_get_sysclk(sensor);
1809 sensor->prev_sysclk = ret;
1815 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1817 /* calculate capture shutter/gain16 */
1818 if (average > sensor->ae_low && average < sensor->ae_high) {
1819 /* in stable range */
1820 cap_gain16_shutter =
1821 prev_gain16 * prev_shutter *
1822 cap_sysclk / sensor->prev_sysclk *
1823 sensor->prev_hts / cap_hts *
1824 sensor->ae_target / average;
1826 cap_gain16_shutter =
1827 prev_gain16 * prev_shutter *
1828 cap_sysclk / sensor->prev_sysclk *
1829 sensor->prev_hts / cap_hts;
1832 /* gain to shutter */
1833 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1834 /* shutter < 1/100 */
1835 cap_shutter = cap_gain16_shutter / 16;
1836 if (cap_shutter < 1)
1839 cap_gain16 = cap_gain16_shutter / cap_shutter;
1840 if (cap_gain16 < 16)
1843 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1844 /* exposure reach max */
1845 cap_shutter = cap_bandfilt * cap_maxband;
1849 cap_gain16 = cap_gain16_shutter / cap_shutter;
1851 /* 1/100 < (cap_shutter = n/100) =< max */
1853 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1858 cap_gain16 = cap_gain16_shutter / cap_shutter;
1862 /* set capture gain */
1863 ret = ov5640_set_gain(sensor, cap_gain16);
1867 /* write capture shutter */
1868 if (cap_shutter > (cap_vts - 4)) {
1869 cap_vts = cap_shutter + 4;
1870 ret = ov5640_set_vts(sensor, cap_vts);
1876 return ov5640_set_exposure(sensor, cap_shutter);
1880 * if sensor changes inside scaling or subsampling
1881 * change mode directly
1883 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1884 const struct ov5640_mode_info *mode)
1886 if (!mode->reg_data)
1889 /* Write capture setting */
1890 return ov5640_load_regs(sensor, mode);
1893 static int ov5640_set_mode(struct ov5640_dev *sensor)
1895 const struct ov5640_mode_info *mode = sensor->current_mode;
1896 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1897 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1898 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1899 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1902 dn_mode = mode->dn_mode;
1903 orig_dn_mode = orig_mode->dn_mode;
1905 /* auto gain and exposure must be turned off when changing modes */
1907 ret = ov5640_set_autogain(sensor, false);
1913 ret = ov5640_set_autoexposure(sensor, false);
1915 goto restore_auto_gain;
1918 if (ov5640_is_csi2(sensor))
1919 ret = ov5640_set_mipi_pclk(sensor);
1921 ret = ov5640_set_dvp_pclk(sensor);
1925 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1926 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1928 * change between subsampling and scaling
1929 * go through exposure calculation
1931 ret = ov5640_set_mode_exposure_calc(sensor, mode);
1934 * change inside subsampling or scaling
1935 * download firmware directly
1937 ret = ov5640_set_mode_direct(sensor, mode);
1940 goto restore_auto_exp_gain;
1942 /* restore auto gain and exposure */
1944 ov5640_set_autogain(sensor, true);
1946 ov5640_set_autoexposure(sensor, true);
1948 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1951 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1954 ret = ov5640_get_light_freq(sensor);
1957 ret = ov5640_set_bandingfilter(sensor);
1960 ret = ov5640_set_virtual_channel(sensor);
1964 sensor->pending_mode_change = false;
1965 sensor->last_mode = mode;
1969 restore_auto_exp_gain:
1971 ov5640_set_autoexposure(sensor, true);
1974 ov5640_set_autogain(sensor, true);
1979 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1980 struct v4l2_mbus_framefmt *format);
1982 /* restore the last set video mode after chip power-on */
1983 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1987 /* first load the initial register values */
1988 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1991 sensor->last_mode = &ov5640_mode_init_data;
1993 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1994 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1995 ilog2(OV5640_SCLK_ROOT_DIV));
1999 /* now restore the last capture mode */
2000 ret = ov5640_set_mode(sensor);
2004 return ov5640_set_framefmt(sensor, &sensor->fmt);
2007 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
2009 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
2012 static void ov5640_reset(struct ov5640_dev *sensor)
2014 if (!sensor->reset_gpio)
2017 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2019 /* camera power cycle */
2020 ov5640_power(sensor, false);
2021 usleep_range(5000, 10000);
2022 ov5640_power(sensor, true);
2023 usleep_range(5000, 10000);
2025 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
2026 usleep_range(1000, 2000);
2028 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2029 usleep_range(20000, 25000);
2032 static int ov5640_set_power_on(struct ov5640_dev *sensor)
2034 struct i2c_client *client = sensor->i2c_client;
2037 ret = clk_prepare_enable(sensor->xclk);
2039 dev_err(&client->dev, "%s: failed to enable clock\n",
2044 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
2047 dev_err(&client->dev, "%s: failed to enable regulators\n",
2052 ov5640_reset(sensor);
2053 ov5640_power(sensor, true);
2055 ret = ov5640_init_slave_id(sensor);
2062 ov5640_power(sensor, false);
2063 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2065 clk_disable_unprepare(sensor->xclk);
2069 static void ov5640_set_power_off(struct ov5640_dev *sensor)
2071 ov5640_power(sensor, false);
2072 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2073 clk_disable_unprepare(sensor->xclk);
2076 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
2081 /* Reset MIPI bus settings to their default values. */
2082 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2083 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
2084 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
2089 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2092 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2093 * "ov5640_set_stream_mipi()")
2094 * [4] = 0 : Power up MIPI HS Tx
2095 * [3] = 0 : Power up MIPI LS Rx
2096 * [2] = 0 : MIPI interface disabled
2098 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
2103 * Gate clock and set LP11 in 'no packets mode' (idle)
2106 * [5] = 1 : Gate clock when 'no packets'
2107 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2109 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
2114 * Set data lanes and clock in LP11 when 'sleeping'
2117 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2118 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2119 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2121 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
2125 /* Give lanes some time to coax into LP11 state. */
2126 usleep_range(500, 1000);
2131 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
2133 unsigned int flags = sensor->ep.bus.parallel.flags;
2134 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
2139 /* Reset settings to their default values. */
2140 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
2141 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2142 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
2143 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2144 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2149 * Note about parallel port configuration.
2151 * When configured in parallel mode, the OV5640 will
2152 * output 10 bits data on DVP data lines [9:0].
2153 * If only 8 bits data are wanted, the 8 bits data lines
2154 * of the camera interface must be physically connected
2155 * on the DVP data lines [9:2].
2157 * Control lines polarity can be configured through
2158 * devicetree endpoint control lines properties.
2159 * If no endpoint control lines properties are set,
2160 * polarity will be as below:
2161 * - VSYNC: active high
2162 * - HREF: active low
2163 * - PCLK: active low
2165 * VSYNC & HREF are not configured if BT656 bus mode is selected
2169 * BT656 embedded synchronization configuration
2172 * - [7]: SYNC code selection (0: auto generate sync code,
2173 * 1: sync code from regs 0x4732-0x4735)
2174 * - [6]: f value in CCIR656 SYNC code when fixed f value
2175 * - [5]: Fixed f value
2176 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
2177 * 01: data from regs 0x4736-0x4738, 10: always keep 0)
2178 * - [1]: Clip data disable
2179 * - [0]: CCIR656 mode enable
2181 * Default CCIR656 SAV/EAV mode with default codes
2182 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2183 * - CCIR656 mode enable
2184 * - auto generation of sync codes
2185 * - blank toggle data 1'h040/1'h200
2186 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2188 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2189 bt656 ? 0x01 : 0x00);
2194 * configure parallel port control lines polarity
2197 * - [5]: PCLK polarity (0: active low, 1: active high)
2198 * - [1]: HREF polarity (0: active low, 1: active high)
2199 * - [0]: VSYNC polarity (mismatch here between
2200 * datasheet and hardware, 0 is active high
2201 * and 1 is active low...)
2204 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2205 polarities |= BIT(1);
2206 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
2207 polarities |= BIT(0);
2209 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2210 polarities |= BIT(5);
2212 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2217 * powerdown MIPI TX/RX PHY & enable DVP
2220 * [4] = 1 : Power down MIPI HS Tx
2221 * [3] = 1 : Power down MIPI LS Rx
2222 * [2] = 0 : DVP enable (MIPI disable)
2224 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2229 * enable VSYNC/HREF/PCLK DVP control lines
2230 * & D[9:6] DVP data lines
2232 * PAD OUTPUT ENABLE 01
2233 * - 6: VSYNC output enable
2234 * - 5: HREF output enable
2235 * - 4: PCLK output enable
2236 * - [3:0]: D[9:6] output enable
2238 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
2239 bt656 ? 0x1f : 0x7f);
2244 * enable D[5:0] DVP data lines
2246 * PAD OUTPUT ENABLE 02
2247 * - [7:2]: D[5:0] output enable
2249 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2252 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2257 ret = ov5640_set_power_on(sensor);
2261 ret = ov5640_restore_mode(sensor);
2266 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2267 ret = ov5640_set_power_mipi(sensor, on);
2269 ret = ov5640_set_power_dvp(sensor, on);
2274 ov5640_set_power_off(sensor);
2279 ov5640_set_power_off(sensor);
2283 /* --------------- Subdev Operations --------------- */
2285 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2287 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2290 mutex_lock(&sensor->lock);
2293 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2294 * update the power state.
2296 if (sensor->power_count == !on) {
2297 ret = ov5640_set_power(sensor, !!on);
2302 /* Update the power count. */
2303 sensor->power_count += on ? 1 : -1;
2304 WARN_ON(sensor->power_count < 0);
2306 mutex_unlock(&sensor->lock);
2308 if (on && !ret && sensor->power_count == 1) {
2309 /* restore controls */
2310 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2316 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2317 struct v4l2_fract *fi,
2318 u32 width, u32 height)
2320 const struct ov5640_mode_info *mode;
2321 enum ov5640_frame_rate rate = OV5640_15_FPS;
2322 int minfps, maxfps, best_fps, fps;
2325 minfps = ov5640_framerates[OV5640_15_FPS];
2326 maxfps = ov5640_framerates[OV5640_60_FPS];
2328 if (fi->numerator == 0) {
2329 fi->denominator = maxfps;
2331 rate = OV5640_60_FPS;
2335 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2339 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2340 int curr_fps = ov5640_framerates[i];
2342 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2343 best_fps = curr_fps;
2349 fi->denominator = best_fps;
2352 mode = ov5640_find_mode(sensor, rate, width, height, false);
2353 return mode ? rate : -EINVAL;
2356 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2357 struct v4l2_subdev_state *sd_state,
2358 struct v4l2_subdev_format *format)
2360 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2361 struct v4l2_mbus_framefmt *fmt;
2363 if (format->pad != 0)
2366 mutex_lock(&sensor->lock);
2368 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2369 fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
2374 format->format = *fmt;
2376 mutex_unlock(&sensor->lock);
2381 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2382 struct v4l2_mbus_framefmt *fmt,
2383 enum ov5640_frame_rate fr,
2384 const struct ov5640_mode_info **new_mode)
2386 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2387 const struct ov5640_mode_info *mode;
2390 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2393 fmt->width = mode->hact;
2394 fmt->height = mode->vact;
2399 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2400 if (ov5640_formats[i].code == fmt->code)
2402 if (i >= ARRAY_SIZE(ov5640_formats))
2405 fmt->code = ov5640_formats[i].code;
2406 fmt->colorspace = ov5640_formats[i].colorspace;
2407 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2408 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2409 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2414 static int ov5640_update_pixel_rate(struct ov5640_dev *sensor)
2416 const struct ov5640_mode_info *mode = sensor->current_mode;
2417 enum ov5640_pixel_rate_id pixel_rate_id = mode->pixel_rate;
2418 struct v4l2_mbus_framefmt *fmt = &sensor->fmt;
2426 * Update the pixel rate control value.
2428 * For DVP mode, maintain the pixel rate calculation using fixed FPS.
2430 if (!ov5640_is_csi2(sensor)) {
2431 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2432 ov5640_calc_pixel_rate(sensor));
2438 * The MIPI CSI-2 link frequency should comply with the CSI-2
2439 * specification and be lower than 1GHz.
2441 * Start from the suggested pixel_rate for the current mode and
2442 * progressively slow it down if it exceeds 1GHz.
2444 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
2445 bpp = ov5640_code_to_bpp(fmt->code);
2447 pixel_rate = ov5640_pixel_rates[pixel_rate_id];
2448 link_freq = pixel_rate * bpp / (2 * num_lanes);
2449 } while (link_freq >= 1000000000U &&
2450 ++pixel_rate_id < OV5640_NUM_PIXEL_RATES);
2452 sensor->current_link_freq = link_freq;
2455 * Higher link rates require the clock tree to be programmed with
2456 * 'mipi_div' = 1; this has the effect of halving the actual output
2457 * pixel rate in the MIPI domain.
2459 * Adjust the pixel rate and link frequency control value to report it
2460 * correctly to userspace.
2462 if (link_freq > OV5640_LINK_RATE_MAX) {
2467 for (i = 0; i < ARRAY_SIZE(ov5640_csi2_link_freqs); ++i) {
2468 if (ov5640_csi2_link_freqs[i] == link_freq)
2471 WARN_ON(i == ARRAY_SIZE(ov5640_csi2_link_freqs));
2473 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, pixel_rate);
2474 __v4l2_ctrl_s_ctrl(sensor->ctrls.link_freq, i);
2479 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2480 struct v4l2_subdev_state *sd_state,
2481 struct v4l2_subdev_format *format)
2483 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2484 const struct ov5640_mode_info *new_mode;
2485 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2488 if (format->pad != 0)
2491 mutex_lock(&sensor->lock);
2493 if (sensor->streaming) {
2498 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2499 sensor->current_fr, &new_mode);
2503 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
2504 *v4l2_subdev_get_try_format(sd, sd_state, 0) = *mbus_fmt;
2508 if (new_mode != sensor->current_mode) {
2509 sensor->current_mode = new_mode;
2510 sensor->pending_mode_change = true;
2512 if (mbus_fmt->code != sensor->fmt.code)
2513 sensor->pending_fmt_change = true;
2515 /* update format even if code is unchanged, resolution might change */
2516 sensor->fmt = *mbus_fmt;
2518 ov5640_update_pixel_rate(sensor);
2521 mutex_unlock(&sensor->lock);
2525 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2526 struct v4l2_mbus_framefmt *format)
2529 bool is_jpeg = false;
2532 switch (format->code) {
2533 case MEDIA_BUS_FMT_UYVY8_1X16:
2534 case MEDIA_BUS_FMT_UYVY8_2X8:
2537 mux = OV5640_FMT_MUX_YUV422;
2539 case MEDIA_BUS_FMT_YUYV8_1X16:
2540 case MEDIA_BUS_FMT_YUYV8_2X8:
2543 mux = OV5640_FMT_MUX_YUV422;
2545 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2546 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2548 mux = OV5640_FMT_MUX_RGB;
2550 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2551 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2553 mux = OV5640_FMT_MUX_RGB;
2555 case MEDIA_BUS_FMT_JPEG_1X8:
2558 mux = OV5640_FMT_MUX_YUV422;
2561 case MEDIA_BUS_FMT_SBGGR8_1X8:
2562 /* Raw, BGBG... / GRGR... */
2564 mux = OV5640_FMT_MUX_RAW_DPC;
2566 case MEDIA_BUS_FMT_SGBRG8_1X8:
2567 /* Raw bayer, GBGB... / RGRG... */
2569 mux = OV5640_FMT_MUX_RAW_DPC;
2571 case MEDIA_BUS_FMT_SGRBG8_1X8:
2572 /* Raw bayer, GRGR... / BGBG... */
2574 mux = OV5640_FMT_MUX_RAW_DPC;
2576 case MEDIA_BUS_FMT_SRGGB8_1X8:
2577 /* Raw bayer, RGRG... / GBGB... */
2579 mux = OV5640_FMT_MUX_RAW_DPC;
2585 /* FORMAT CONTROL00: YUV and RGB formatting */
2586 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2590 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2591 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2597 * - [5]: JPEG enable
2599 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2600 BIT(5), is_jpeg ? BIT(5) : 0);
2606 * - [4]: Reset JFIFO
2607 * - [3]: Reset SFIFO
2610 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2611 BIT(4) | BIT(3) | BIT(2),
2612 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2618 * - [5]: Enable JPEG 2x clock
2619 * - [3]: Enable JPEG clock
2621 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2623 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2630 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2635 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2639 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2641 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2647 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2652 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2656 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2659 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2665 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2670 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2674 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2678 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2681 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2687 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2691 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2692 BIT(0), awb ? 0 : 1);
2697 u16 red = (u16)sensor->ctrls.red_balance->val;
2698 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2700 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2703 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2709 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2710 enum v4l2_exposure_auto_type auto_exposure)
2712 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2713 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2716 if (ctrls->auto_exp->is_new) {
2717 ret = ov5640_set_autoexposure(sensor, auto_exp);
2722 if (!auto_exp && ctrls->exposure->is_new) {
2725 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2729 ret = ov5640_get_vts(sensor);
2735 if (ctrls->exposure->val < max_exp)
2736 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2742 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2744 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2747 if (ctrls->auto_gain->is_new) {
2748 ret = ov5640_set_autogain(sensor, auto_gain);
2753 if (!auto_gain && ctrls->gain->is_new)
2754 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2759 static const char * const test_pattern_menu[] = {
2762 "Color bars w/ rolling bar",
2764 "Color squares w/ rolling bar",
2767 #define OV5640_TEST_ENABLE BIT(7)
2768 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2769 #define OV5640_TEST_TRANSPARENT BIT(5)
2770 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2771 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2772 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2773 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2774 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2775 #define OV5640_TEST_BAR (0 << 0)
2776 #define OV5640_TEST_RANDOM (1 << 0)
2777 #define OV5640_TEST_SQUARE (2 << 0)
2778 #define OV5640_TEST_BLACK (3 << 0)
2780 static const u8 test_pattern_val[] = {
2782 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2784 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2785 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2786 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2787 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2790 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2792 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2793 test_pattern_val[value]);
2796 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2800 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2801 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2806 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2807 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2811 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2814 * If sensor is mounted upside down, mirror logic is inversed.
2816 * Sensor is a BSI (Back Side Illuminated) one,
2817 * so image captured is physically mirrored.
2818 * This is why mirror logic is inversed in
2819 * order to cancel this mirror effect.
2825 * - [1]: Sensor mirror
2827 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2829 (!(value ^ sensor->upside_down)) ?
2830 (BIT(2) | BIT(1)) : 0);
2833 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2835 /* If sensor is mounted upside down, flip logic is inversed */
2840 * - [1]: Sensor vflip
2842 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2844 (value ^ sensor->upside_down) ?
2845 (BIT(2) | BIT(1)) : 0);
2848 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2850 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2851 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2854 /* v4l2_ctrl_lock() locks our own mutex */
2857 case V4L2_CID_AUTOGAIN:
2858 val = ov5640_get_gain(sensor);
2861 sensor->ctrls.gain->val = val;
2863 case V4L2_CID_EXPOSURE_AUTO:
2864 val = ov5640_get_exposure(sensor);
2867 sensor->ctrls.exposure->val = val;
2874 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2876 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2877 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2880 /* v4l2_ctrl_lock() locks our own mutex */
2883 * If the device is not powered up by the host driver do
2884 * not apply any controls to H/W at this time. Instead
2885 * the controls will be restored right after power-up.
2887 if (sensor->power_count == 0)
2891 case V4L2_CID_AUTOGAIN:
2892 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2894 case V4L2_CID_EXPOSURE_AUTO:
2895 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2897 case V4L2_CID_AUTO_WHITE_BALANCE:
2898 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2901 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2903 case V4L2_CID_CONTRAST:
2904 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2906 case V4L2_CID_SATURATION:
2907 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2909 case V4L2_CID_TEST_PATTERN:
2910 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2912 case V4L2_CID_POWER_LINE_FREQUENCY:
2913 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2915 case V4L2_CID_HFLIP:
2916 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2918 case V4L2_CID_VFLIP:
2919 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2929 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2930 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
2931 .s_ctrl = ov5640_s_ctrl,
2934 static int ov5640_init_controls(struct ov5640_dev *sensor)
2936 const struct ov5640_mode_info *mode = sensor->current_mode;
2937 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2938 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2939 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2942 v4l2_ctrl_handler_init(hdl, 32);
2944 /* we can use our own mutex for the ctrl lock */
2945 hdl->lock = &sensor->lock;
2947 /* Clock related controls */
2948 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
2949 ov5640_pixel_rates[OV5640_NUM_PIXEL_RATES - 1],
2950 ov5640_pixel_rates[0], 1,
2951 ov5640_pixel_rates[mode->pixel_rate]);
2953 ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, ops,
2955 ARRAY_SIZE(ov5640_csi2_link_freqs) - 1,
2956 OV5640_DEFAULT_LINK_FREQ,
2957 ov5640_csi2_link_freqs);
2959 /* Auto/manual white balance */
2960 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2961 V4L2_CID_AUTO_WHITE_BALANCE,
2963 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2965 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2967 /* Auto/manual exposure */
2968 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2969 V4L2_CID_EXPOSURE_AUTO,
2970 V4L2_EXPOSURE_MANUAL, 0,
2971 V4L2_EXPOSURE_AUTO);
2972 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2974 /* Auto/manual gain */
2975 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2977 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2980 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2982 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2984 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2986 ctrls->test_pattern =
2987 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2988 ARRAY_SIZE(test_pattern_menu) - 1,
2989 0, 0, test_pattern_menu);
2990 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2992 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2996 v4l2_ctrl_new_std_menu(hdl, ops,
2997 V4L2_CID_POWER_LINE_FREQUENCY,
2998 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2999 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
3006 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
3007 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
3008 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
3009 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
3011 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
3012 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
3013 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
3015 sensor->sd.ctrl_handler = hdl;
3019 v4l2_ctrl_handler_free(hdl);
3023 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
3024 struct v4l2_subdev_state *sd_state,
3025 struct v4l2_subdev_frame_size_enum *fse)
3029 if (fse->index >= OV5640_NUM_MODES)
3033 ov5640_mode_data[fse->index].hact;
3034 fse->max_width = fse->min_width;
3036 ov5640_mode_data[fse->index].vact;
3037 fse->max_height = fse->min_height;
3042 static int ov5640_enum_frame_interval(
3043 struct v4l2_subdev *sd,
3044 struct v4l2_subdev_state *sd_state,
3045 struct v4l2_subdev_frame_interval_enum *fie)
3047 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3048 struct v4l2_fract tpf;
3053 if (fie->index >= OV5640_NUM_FRAMERATES)
3057 tpf.denominator = ov5640_framerates[fie->index];
3059 ret = ov5640_try_frame_interval(sensor, &tpf,
3060 fie->width, fie->height);
3064 fie->interval = tpf;
3068 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
3069 struct v4l2_subdev_frame_interval *fi)
3071 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3073 mutex_lock(&sensor->lock);
3074 fi->interval = sensor->frame_interval;
3075 mutex_unlock(&sensor->lock);
3080 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
3081 struct v4l2_subdev_frame_interval *fi)
3083 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3084 const struct ov5640_mode_info *mode;
3085 int frame_rate, ret = 0;
3090 mutex_lock(&sensor->lock);
3092 if (sensor->streaming) {
3097 mode = sensor->current_mode;
3099 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
3100 mode->hact, mode->vact);
3101 if (frame_rate < 0) {
3102 /* Always return a valid frame interval value */
3103 fi->interval = sensor->frame_interval;
3107 mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
3114 if (mode != sensor->current_mode ||
3115 frame_rate != sensor->current_fr) {
3116 sensor->current_fr = frame_rate;
3117 sensor->frame_interval = fi->interval;
3118 sensor->current_mode = mode;
3119 sensor->pending_mode_change = true;
3121 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
3122 ov5640_calc_pixel_rate(sensor));
3125 mutex_unlock(&sensor->lock);
3129 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
3130 struct v4l2_subdev_state *sd_state,
3131 struct v4l2_subdev_mbus_code_enum *code)
3135 if (code->index >= ARRAY_SIZE(ov5640_formats))
3138 code->code = ov5640_formats[code->index].code;
3142 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
3144 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3147 mutex_lock(&sensor->lock);
3149 if (sensor->streaming == !enable) {
3150 if (enable && sensor->pending_mode_change) {
3151 ret = ov5640_set_mode(sensor);
3156 if (enable && sensor->pending_fmt_change) {
3157 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
3160 sensor->pending_fmt_change = false;
3163 if (ov5640_is_csi2(sensor))
3164 ret = ov5640_set_stream_mipi(sensor, enable);
3166 ret = ov5640_set_stream_dvp(sensor, enable);
3169 sensor->streaming = enable;
3172 mutex_unlock(&sensor->lock);
3176 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
3177 .s_power = ov5640_s_power,
3178 .log_status = v4l2_ctrl_subdev_log_status,
3179 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
3180 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
3183 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
3184 .g_frame_interval = ov5640_g_frame_interval,
3185 .s_frame_interval = ov5640_s_frame_interval,
3186 .s_stream = ov5640_s_stream,
3189 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
3190 .enum_mbus_code = ov5640_enum_mbus_code,
3191 .get_fmt = ov5640_get_fmt,
3192 .set_fmt = ov5640_set_fmt,
3193 .enum_frame_size = ov5640_enum_frame_size,
3194 .enum_frame_interval = ov5640_enum_frame_interval,
3197 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
3198 .core = &ov5640_core_ops,
3199 .video = &ov5640_video_ops,
3200 .pad = &ov5640_pad_ops,
3203 static int ov5640_get_regulators(struct ov5640_dev *sensor)
3207 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
3208 sensor->supplies[i].supply = ov5640_supply_name[i];
3210 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
3211 OV5640_NUM_SUPPLIES,
3215 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
3217 struct i2c_client *client = sensor->i2c_client;
3221 ret = ov5640_set_power_on(sensor);
3225 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3227 dev_err(&client->dev, "%s: failed to read chip identifier\n",
3232 if (chip_id != 0x5640) {
3233 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3239 ov5640_set_power_off(sensor);
3243 static int ov5640_probe(struct i2c_client *client)
3245 struct device *dev = &client->dev;
3246 struct fwnode_handle *endpoint;
3247 struct ov5640_dev *sensor;
3248 struct v4l2_mbus_framefmt *fmt;
3252 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3256 sensor->i2c_client = client;
3259 * default init sequence initialize sensor to
3260 * YUV422 UYVY VGA@30fps
3263 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
3264 fmt->colorspace = V4L2_COLORSPACE_SRGB;
3265 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
3266 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
3267 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
3270 fmt->field = V4L2_FIELD_NONE;
3271 sensor->frame_interval.numerator = 1;
3272 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3273 sensor->current_fr = OV5640_30_FPS;
3274 sensor->current_mode =
3275 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
3276 sensor->last_mode = sensor->current_mode;
3277 sensor->current_link_freq = OV5640_DEFAULT_LINK_FREQ;
3279 sensor->ae_target = 52;
3281 /* optional indication of physical rotation of sensor */
3282 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3287 sensor->upside_down = true;
3292 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3297 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3300 dev_err(dev, "endpoint node not found\n");
3304 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3305 fwnode_handle_put(endpoint);
3307 dev_err(dev, "Could not parse endpoint\n");
3311 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3312 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3313 sensor->ep.bus_type != V4L2_MBUS_BT656) {
3314 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3318 /* get system clock (xclk) */
3319 sensor->xclk = devm_clk_get(dev, "xclk");
3320 if (IS_ERR(sensor->xclk)) {
3321 dev_err(dev, "failed to get xclk\n");
3322 return PTR_ERR(sensor->xclk);
3325 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3326 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3327 sensor->xclk_freq > OV5640_XCLK_MAX) {
3328 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3333 /* request optional power down pin */
3334 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3336 if (IS_ERR(sensor->pwdn_gpio))
3337 return PTR_ERR(sensor->pwdn_gpio);
3339 /* request optional reset pin */
3340 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3342 if (IS_ERR(sensor->reset_gpio))
3343 return PTR_ERR(sensor->reset_gpio);
3345 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3347 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3348 V4L2_SUBDEV_FL_HAS_EVENTS;
3349 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3350 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3351 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3355 ret = ov5640_get_regulators(sensor);
3359 mutex_init(&sensor->lock);
3361 ret = ov5640_check_chip_id(sensor);
3363 goto entity_cleanup;
3365 ret = ov5640_init_controls(sensor);
3367 goto entity_cleanup;
3369 ret = v4l2_async_register_subdev_sensor(&sensor->sd);
3376 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3378 media_entity_cleanup(&sensor->sd.entity);
3379 mutex_destroy(&sensor->lock);
3383 static int ov5640_remove(struct i2c_client *client)
3385 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3386 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3388 v4l2_async_unregister_subdev(&sensor->sd);
3389 media_entity_cleanup(&sensor->sd.entity);
3390 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3391 mutex_destroy(&sensor->lock);
3396 static const struct i2c_device_id ov5640_id[] = {
3400 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3402 static const struct of_device_id ov5640_dt_ids[] = {
3403 { .compatible = "ovti,ov5640" },
3406 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3408 static struct i2c_driver ov5640_i2c_driver = {
3411 .of_match_table = ov5640_dt_ids,
3413 .id_table = ov5640_id,
3414 .probe_new = ov5640_probe,
3415 .remove = ov5640_remove,
3418 module_i2c_driver(ov5640_i2c_driver);
3420 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3421 MODULE_LICENSE("GPL");