1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN 6000000
30 #define OV5640_XCLK_MAX 54000000
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_LINK_RATE_MAX 490000000U
36 #define OV5640_REG_SYS_RESET02 0x3002
37 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
38 #define OV5640_REG_SYS_CTRL0 0x3008
39 #define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
40 #define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
41 #define OV5640_REG_CHIP_ID 0x300a
42 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
43 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
44 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
45 #define OV5640_REG_PAD_OUTPUT00 0x3019
46 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
47 #define OV5640_REG_SC_PLL_CTRL0 0x3034
48 #define OV5640_REG_SC_PLL_CTRL1 0x3035
49 #define OV5640_REG_SC_PLL_CTRL2 0x3036
50 #define OV5640_REG_SC_PLL_CTRL3 0x3037
51 #define OV5640_REG_SLAVE_ID 0x3100
52 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
53 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
54 #define OV5640_REG_AWB_R_GAIN 0x3400
55 #define OV5640_REG_AWB_G_GAIN 0x3402
56 #define OV5640_REG_AWB_B_GAIN 0x3404
57 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
58 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
59 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
60 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
61 #define OV5640_REG_AEC_PK_MANUAL 0x3503
62 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
63 #define OV5640_REG_AEC_PK_VTS 0x350c
64 #define OV5640_REG_TIMING_HS 0x3800
65 #define OV5640_REG_TIMING_VS 0x3802
66 #define OV5640_REG_TIMING_HW 0x3804
67 #define OV5640_REG_TIMING_VH 0x3806
68 #define OV5640_REG_TIMING_DVPHO 0x3808
69 #define OV5640_REG_TIMING_DVPVO 0x380a
70 #define OV5640_REG_TIMING_HTS 0x380c
71 #define OV5640_REG_TIMING_VTS 0x380e
72 #define OV5640_REG_TIMING_HOFFS 0x3810
73 #define OV5640_REG_TIMING_VOFFS 0x3812
74 #define OV5640_REG_TIMING_TC_REG20 0x3820
75 #define OV5640_REG_TIMING_TC_REG21 0x3821
76 #define OV5640_REG_AEC_CTRL00 0x3a00
77 #define OV5640_REG_AEC_B50_STEP 0x3a08
78 #define OV5640_REG_AEC_B60_STEP 0x3a0a
79 #define OV5640_REG_AEC_CTRL0D 0x3a0d
80 #define OV5640_REG_AEC_CTRL0E 0x3a0e
81 #define OV5640_REG_AEC_CTRL0F 0x3a0f
82 #define OV5640_REG_AEC_CTRL10 0x3a10
83 #define OV5640_REG_AEC_CTRL11 0x3a11
84 #define OV5640_REG_AEC_CTRL1B 0x3a1b
85 #define OV5640_REG_AEC_CTRL1E 0x3a1e
86 #define OV5640_REG_AEC_CTRL1F 0x3a1f
87 #define OV5640_REG_HZ5060_CTRL00 0x3c00
88 #define OV5640_REG_HZ5060_CTRL01 0x3c01
89 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
90 #define OV5640_REG_FRAME_CTRL01 0x4202
91 #define OV5640_REG_FORMAT_CONTROL00 0x4300
92 #define OV5640_REG_VFIFO_HSIZE 0x4602
93 #define OV5640_REG_VFIFO_VSIZE 0x4604
94 #define OV5640_REG_JPG_MODE_SELECT 0x4713
95 #define OV5640_REG_CCIR656_CTRL00 0x4730
96 #define OV5640_REG_POLARITY_CTRL00 0x4740
97 #define OV5640_REG_MIPI_CTRL00 0x4800
98 #define OV5640_REG_DEBUG_MODE 0x4814
99 #define OV5640_REG_PCLK_PERIOD 0x4837
100 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
101 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
102 #define OV5640_REG_SDE_CTRL0 0x5580
103 #define OV5640_REG_SDE_CTRL1 0x5581
104 #define OV5640_REG_SDE_CTRL3 0x5583
105 #define OV5640_REG_SDE_CTRL4 0x5584
106 #define OV5640_REG_SDE_CTRL5 0x5585
107 #define OV5640_REG_AVG_READOUT 0x56a1
109 enum ov5640_mode_id {
110 OV5640_MODE_QQVGA_160_120 = 0,
111 OV5640_MODE_QCIF_176_144,
112 OV5640_MODE_QVGA_320_240,
113 OV5640_MODE_VGA_640_480,
114 OV5640_MODE_NTSC_720_480,
115 OV5640_MODE_PAL_720_576,
116 OV5640_MODE_XGA_1024_768,
117 OV5640_MODE_720P_1280_720,
118 OV5640_MODE_1080P_1920_1080,
119 OV5640_MODE_QSXGA_2592_1944,
123 enum ov5640_frame_rate {
127 OV5640_NUM_FRAMERATES,
130 enum ov5640_pixel_rate_id {
131 OV5640_PIXEL_RATE_168M,
132 OV5640_PIXEL_RATE_148M,
133 OV5640_PIXEL_RATE_124M,
134 OV5640_PIXEL_RATE_96M,
135 OV5640_PIXEL_RATE_48M,
136 OV5640_NUM_PIXEL_RATES,
140 * The chip manual suggests 24/48/96/192 MHz pixel clocks.
142 * 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for
143 * full resolution mode @15 FPS.
145 static const u32 ov5640_pixel_rates[] = {
146 [OV5640_PIXEL_RATE_168M] = 168000000,
147 [OV5640_PIXEL_RATE_148M] = 148000000,
148 [OV5640_PIXEL_RATE_124M] = 124000000,
149 [OV5640_PIXEL_RATE_96M] = 96000000,
150 [OV5640_PIXEL_RATE_48M] = 48000000,
154 * MIPI CSI-2 link frequencies.
156 * Derived from the above defined pixel rate for bpp = (8, 16, 24) and
157 * data_lanes = (1, 2)
159 * link_freq = (pixel_rate * bpp) / (2 * data_lanes)
161 static const s64 ov5640_csi2_link_freqs[] = {
162 992000000, 888000000, 768000000, 744000000, 672000000, 672000000,
163 592000000, 592000000, 576000000, 576000000, 496000000, 496000000,
164 384000000, 384000000, 384000000, 336000000, 296000000, 288000000,
165 248000000, 192000000, 192000000, 192000000, 96000000,
168 /* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */
169 #define OV5640_DEFAULT_LINK_FREQ 13
171 enum ov5640_format_mux {
172 OV5640_FMT_MUX_YUV422 = 0,
174 OV5640_FMT_MUX_DITHER,
175 OV5640_FMT_MUX_RAW_DPC,
176 OV5640_FMT_MUX_SNR_RAW,
177 OV5640_FMT_MUX_RAW_CIP,
180 static const struct ov5640_pixfmt {
184 } ov5640_formats[] = {
186 .code = MEDIA_BUS_FMT_JPEG_1X8,
187 .colorspace = V4L2_COLORSPACE_JPEG,
190 .code = MEDIA_BUS_FMT_UYVY8_2X8,
191 .colorspace = V4L2_COLORSPACE_SRGB,
194 .code = MEDIA_BUS_FMT_UYVY8_1X16,
195 .colorspace = V4L2_COLORSPACE_SRGB,
198 .code = MEDIA_BUS_FMT_YUYV8_2X8,
199 .colorspace = V4L2_COLORSPACE_SRGB,
202 .code = MEDIA_BUS_FMT_YUYV8_1X16,
203 .colorspace = V4L2_COLORSPACE_SRGB,
206 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
207 .colorspace = V4L2_COLORSPACE_SRGB,
210 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
211 .colorspace = V4L2_COLORSPACE_SRGB,
214 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
215 .colorspace = V4L2_COLORSPACE_SRGB,
218 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
219 .colorspace = V4L2_COLORSPACE_SRGB,
222 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
223 .colorspace = V4L2_COLORSPACE_SRGB,
226 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
227 .colorspace = V4L2_COLORSPACE_SRGB,
232 static u32 ov5640_code_to_bpp(u32 code)
236 for (i = 0; i < ARRAY_SIZE(ov5640_formats); ++i) {
237 if (ov5640_formats[i].code == code)
238 return ov5640_formats[i].bpp;
245 * FIXME: remove this when a subdev API becomes available
246 * to set the MIPI CSI-2 virtual channel.
248 static unsigned int virtual_channel;
249 module_param(virtual_channel, uint, 0444);
250 MODULE_PARM_DESC(virtual_channel,
251 "MIPI CSI-2 virtual channel (0..3), default 0");
253 static const int ov5640_framerates[] = {
254 [OV5640_15_FPS] = 15,
255 [OV5640_30_FPS] = 30,
256 [OV5640_60_FPS] = 60,
259 /* regulator supplies */
260 static const char * const ov5640_supply_name[] = {
261 "DOVDD", /* Digital I/O (1.8V) supply */
262 "AVDD", /* Analog (2.8V) supply */
263 "DVDD", /* Digital Core (1.5V) supply */
266 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
269 * Image size under 1280 * 960 are SUBSAMPLING
270 * Image size upper 1280 * 960 are SCALING
272 enum ov5640_downsize_mode {
284 struct ov5640_mode_info {
285 enum ov5640_mode_id id;
286 enum ov5640_downsize_mode dn_mode;
287 enum ov5640_pixel_rate_id pixel_rate;
288 /* Analog crop rectangle. */
289 struct v4l2_rect analog_crop;
290 /* Visibile crop: from analog crop top-left corner. */
291 struct v4l2_rect crop;
292 /* Total pixels per line: crop.width + fixed hblank. */
294 /* Default vertical blanking: frame height = crop.height + vblank. */
296 const struct reg_value *reg_data;
298 /* DVP only; ignored in MIPI mode. */
302 struct ov5640_ctrls {
303 struct v4l2_ctrl_handler handler;
304 struct v4l2_ctrl *pixel_rate;
305 struct v4l2_ctrl *link_freq;
307 struct v4l2_ctrl *auto_exp;
308 struct v4l2_ctrl *exposure;
311 struct v4l2_ctrl *auto_wb;
312 struct v4l2_ctrl *blue_balance;
313 struct v4l2_ctrl *red_balance;
316 struct v4l2_ctrl *auto_gain;
317 struct v4l2_ctrl *gain;
319 struct v4l2_ctrl *brightness;
320 struct v4l2_ctrl *light_freq;
321 struct v4l2_ctrl *saturation;
322 struct v4l2_ctrl *contrast;
323 struct v4l2_ctrl *hue;
324 struct v4l2_ctrl *test_pattern;
325 struct v4l2_ctrl *hflip;
326 struct v4l2_ctrl *vflip;
330 struct i2c_client *i2c_client;
331 struct v4l2_subdev sd;
332 struct media_pad pad;
333 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
334 struct clk *xclk; /* system clock to OV5640 */
337 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
338 struct gpio_desc *reset_gpio;
339 struct gpio_desc *pwdn_gpio;
342 /* lock to protect all members below */
347 struct v4l2_mbus_framefmt fmt;
348 bool pending_fmt_change;
350 const struct ov5640_mode_info *current_mode;
351 const struct ov5640_mode_info *last_mode;
352 enum ov5640_frame_rate current_fr;
353 struct v4l2_fract frame_interval;
354 s64 current_link_freq;
356 struct ov5640_ctrls ctrls;
358 u32 prev_sysclk, prev_hts;
359 u32 ae_low, ae_high, ae_target;
361 bool pending_mode_change;
365 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
367 return container_of(sd, struct ov5640_dev, sd);
370 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
372 return &container_of(ctrl->handler, struct ov5640_dev,
376 static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)
378 return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;
382 * FIXME: all of these register tables are likely filled with
383 * entries that set the register to their power-on default values,
384 * and which are otherwise not touched by this driver. Those entries
385 * should be identified and removed to speed register load time
388 /* YUV422 UYVY VGA@30fps */
389 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
390 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
391 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
392 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
393 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
394 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
395 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
396 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
397 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
398 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
399 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
400 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
401 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
402 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
403 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
404 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
405 {0x3815, 0x31, 0, 0},
406 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
407 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
408 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
409 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
410 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
411 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
412 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
413 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
414 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
415 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
416 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
417 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
418 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
419 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
420 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
421 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
422 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
423 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
424 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
425 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
426 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
427 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
428 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
429 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
430 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
431 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
432 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
433 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
434 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
435 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
436 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
437 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
438 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
439 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
440 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
441 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
442 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
443 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
444 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
445 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
446 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
447 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
448 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
449 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
450 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
451 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
452 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
453 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
454 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
455 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
456 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
457 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
458 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
459 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
460 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
461 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
462 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
463 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
464 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
465 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
466 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
469 static const struct reg_value ov5640_setting_VGA_640_480[] = {
470 {0x3c07, 0x08, 0, 0},
471 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
472 {0x3814, 0x31, 0, 0},
473 {0x3815, 0x31, 0, 0},
474 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
475 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
476 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
477 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
478 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
479 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
480 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
481 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
484 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
485 {0x3c07, 0x08, 0, 0},
486 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
487 {0x3814, 0x31, 0, 0},
488 {0x3815, 0x31, 0, 0},
489 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
490 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
491 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
492 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
493 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
494 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
495 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
496 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
499 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
500 {0x3c07, 0x08, 0, 0},
501 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
502 {0x3814, 0x31, 0, 0},
503 {0x3815, 0x31, 0, 0},
504 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
505 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
506 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
507 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
508 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
509 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
510 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
511 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
514 static const struct reg_value ov5640_setting_QQVGA_160_120[] = {
515 {0x3c07, 0x08, 0, 0},
516 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
517 {0x3814, 0x31, 0, 0},
518 {0x3815, 0x31, 0, 0},
519 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
520 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
521 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
522 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
523 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
524 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
525 {0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},
528 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
529 {0x3c07, 0x08, 0, 0},
530 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
531 {0x3814, 0x31, 0, 0},
532 {0x3815, 0x31, 0, 0},
533 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
534 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
535 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
536 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
537 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
538 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
539 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
540 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
543 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
544 {0x3c07, 0x08, 0, 0},
545 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
546 {0x3814, 0x31, 0, 0},
547 {0x3815, 0x31, 0, 0},
548 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
549 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
550 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
551 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
552 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
553 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
554 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
555 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
558 static const struct reg_value ov5640_setting_PAL_720_576[] = {
559 {0x3c07, 0x08, 0, 0},
560 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
561 {0x3814, 0x31, 0, 0},
562 {0x3815, 0x31, 0, 0},
563 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
564 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
565 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
566 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
567 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
568 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
569 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
570 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
573 static const struct reg_value ov5640_setting_720P_1280_720[] = {
574 {0x3c07, 0x07, 0, 0},
575 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
576 {0x3814, 0x31, 0, 0},
577 {0x3815, 0x31, 0, 0},
578 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
579 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
580 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
581 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
582 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
583 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
584 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
585 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
588 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
589 {0x3c07, 0x08, 0, 0},
590 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
591 {0x3814, 0x11, 0, 0},
592 {0x3815, 0x11, 0, 0},
593 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
594 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
595 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
596 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
597 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
598 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
599 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
600 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
601 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
602 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
603 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
604 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
605 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
606 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
607 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
608 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
609 {0x4005, 0x1a, 0, 0},
612 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
613 {0x3c07, 0x08, 0, 0},
614 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
615 {0x3814, 0x11, 0, 0},
616 {0x3815, 0x11, 0, 0},
617 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
618 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
619 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
620 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
621 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
622 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
623 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
624 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
627 /* power-on sensor init reg table */
628 static const struct ov5640_mode_info ov5640_mode_init_data = {
630 .dn_mode = SUBSAMPLING,
631 .pixel_rate = OV5640_PIXEL_RATE_96M,
646 .reg_data = ov5640_init_setting_30fps_VGA,
647 .reg_data_size = ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
648 .max_fps = OV5640_30_FPS
651 static const struct ov5640_mode_info
652 ov5640_mode_data[OV5640_NUM_MODES] = {
655 .id = OV5640_MODE_QQVGA_160_120,
656 .dn_mode = SUBSAMPLING,
657 .pixel_rate = OV5640_PIXEL_RATE_48M,
672 .reg_data = ov5640_setting_QQVGA_160_120,
673 .reg_data_size = ARRAY_SIZE(ov5640_setting_QQVGA_160_120),
674 .max_fps = OV5640_30_FPS
677 .id = OV5640_MODE_QCIF_176_144,
678 .dn_mode = SUBSAMPLING,
679 .pixel_rate = OV5640_PIXEL_RATE_48M,
694 .reg_data = ov5640_setting_QCIF_176_144,
695 .reg_data_size = ARRAY_SIZE(ov5640_setting_QCIF_176_144),
696 .max_fps = OV5640_30_FPS
699 .id = OV5640_MODE_QVGA_320_240,
700 .dn_mode = SUBSAMPLING,
701 .pixel_rate = OV5640_PIXEL_RATE_48M,
716 .reg_data = ov5640_setting_QVGA_320_240,
717 .reg_data_size = ARRAY_SIZE(ov5640_setting_QVGA_320_240),
718 .max_fps = OV5640_30_FPS
721 .id = OV5640_MODE_VGA_640_480,
722 .dn_mode = SUBSAMPLING,
723 .pixel_rate = OV5640_PIXEL_RATE_48M,
738 .reg_data = ov5640_setting_VGA_640_480,
739 .reg_data_size = ARRAY_SIZE(ov5640_setting_VGA_640_480),
740 .max_fps = OV5640_60_FPS
743 .id = OV5640_MODE_NTSC_720_480,
744 .dn_mode = SUBSAMPLING,
745 .pixel_rate = OV5640_PIXEL_RATE_96M,
760 .reg_data = ov5640_setting_NTSC_720_480,
761 .reg_data_size = ARRAY_SIZE(ov5640_setting_NTSC_720_480),
762 .max_fps = OV5640_30_FPS
765 .id = OV5640_MODE_PAL_720_576,
766 .dn_mode = SUBSAMPLING,
767 .pixel_rate = OV5640_PIXEL_RATE_96M,
782 .reg_data = ov5640_setting_PAL_720_576,
783 .reg_data_size = ARRAY_SIZE(ov5640_setting_PAL_720_576),
784 .max_fps = OV5640_30_FPS
787 .id = OV5640_MODE_XGA_1024_768,
788 .dn_mode = SUBSAMPLING,
789 .pixel_rate = OV5640_PIXEL_RATE_96M,
804 .reg_data = ov5640_setting_XGA_1024_768,
805 .reg_data_size = ARRAY_SIZE(ov5640_setting_XGA_1024_768),
806 .max_fps = OV5640_30_FPS
809 .id = OV5640_MODE_720P_1280_720,
810 .dn_mode = SUBSAMPLING,
811 .pixel_rate = OV5640_PIXEL_RATE_124M,
826 .reg_data = ov5640_setting_720P_1280_720,
827 .reg_data_size = ARRAY_SIZE(ov5640_setting_720P_1280_720),
828 .max_fps = OV5640_30_FPS
831 .id = OV5640_MODE_1080P_1920_1080,
833 .pixel_rate = OV5640_PIXEL_RATE_148M,
848 .reg_data = ov5640_setting_1080P_1920_1080,
849 .reg_data_size = ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
850 .max_fps = OV5640_30_FPS
853 .id = OV5640_MODE_QSXGA_2592_1944,
855 .pixel_rate = OV5640_PIXEL_RATE_168M,
870 .reg_data = ov5640_setting_QSXGA_2592_1944,
871 .reg_data_size = ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
872 .max_fps = OV5640_15_FPS
876 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
878 struct i2c_client *client = sensor->i2c_client;
883 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
886 buf[0] = OV5640_REG_SLAVE_ID >> 8;
887 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
888 buf[2] = client->addr << 1;
890 msg.addr = OV5640_DEFAULT_SLAVE_ID;
893 msg.len = sizeof(buf);
895 ret = i2c_transfer(client->adapter, &msg, 1);
897 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
904 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
906 struct i2c_client *client = sensor->i2c_client;
915 msg.addr = client->addr;
916 msg.flags = client->flags;
918 msg.len = sizeof(buf);
920 ret = i2c_transfer(client->adapter, &msg, 1);
922 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
930 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
932 struct i2c_client *client = sensor->i2c_client;
933 struct i2c_msg msg[2];
940 msg[0].addr = client->addr;
941 msg[0].flags = client->flags;
943 msg[0].len = sizeof(buf);
945 msg[1].addr = client->addr;
946 msg[1].flags = client->flags | I2C_M_RD;
950 ret = i2c_transfer(client->adapter, msg, 2);
952 dev_err(&client->dev, "%s: error: reg=%x\n",
961 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
966 ret = ov5640_read_reg(sensor, reg, &hi);
969 ret = ov5640_read_reg(sensor, reg + 1, &lo);
973 *val = ((u16)hi << 8) | (u16)lo;
977 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
981 ret = ov5640_write_reg(sensor, reg, val >> 8);
985 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
988 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
994 ret = ov5640_read_reg(sensor, reg, &readval);
1002 return ov5640_write_reg(sensor, reg, val);
1006 * After trying the various combinations, reading various
1007 * documentations spread around the net, and from the various
1008 * feedback, the clock tree is probably as follows:
1014 * +->| PLL1 | - reg 0x3036, for the multiplier
1015 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
1016 * | +--------------+
1017 * +->| System Clock | - reg 0x3035, bits 4-7
1019 * | +--------------+
1020 * +->| MIPI Divider | - reg 0x3035, bits 0-3
1021 * | +-+------------+
1022 * | +----------------> MIPI SCLK
1024 * | +->| / 2 |-------> MIPI BIT CLK
1026 * | +--------------+
1027 * +->| PLL Root Div | - reg 0x3037, bit 4
1030 * +->| Bit Div | - reg 0x3034, bits 0-3
1033 * +->| SCLK Div | - reg 0x3108, bits 0-1
1035 * | +---------------> SCLK
1037 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
1039 * | +---------------> SCLK 2X
1041 * +->| PCLK Div | - reg 0x3108, bits 4-5
1044 * +->| P_DIV | - reg 0x3035, bits 0-3
1046 * +------------> PCLK
1048 * There seems to be also constraints:
1049 * - the PLL pre-divider output rate should be in the 4-27MHz range
1050 * - the PLL multiplier output rate should be in the 500-1000MHz range
1051 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
1055 * This is supposed to be ranging from 1 to 8, but the value is always
1056 * set to 3 in the vendor kernels.
1058 #define OV5640_PLL_PREDIV 3
1060 #define OV5640_PLL_MULT_MIN 4
1061 #define OV5640_PLL_MULT_MAX 252
1064 * This is supposed to be ranging from 1 to 16, but the value is
1065 * always set to either 1 or 2 in the vendor kernels.
1067 #define OV5640_SYSDIV_MIN 1
1068 #define OV5640_SYSDIV_MAX 16
1071 * This is supposed to be ranging from 1 to 2, but the value is always
1072 * set to 2 in the vendor kernels.
1074 #define OV5640_PLL_ROOT_DIV 2
1075 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
1078 * We only supports 8-bit formats at the moment
1080 #define OV5640_BIT_DIV 2
1081 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
1084 * This is supposed to be ranging from 1 to 8, but the value is always
1085 * set to 2 in the vendor kernels.
1087 #define OV5640_SCLK_ROOT_DIV 2
1090 * This is hardcoded so that the consistency is maintained between SCLK and
1093 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
1096 * This is supposed to be ranging from 1 to 8, but the value is always
1097 * set to 1 in the vendor kernels.
1099 #define OV5640_PCLK_ROOT_DIV 1
1100 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
1102 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
1103 u8 pll_prediv, u8 pll_mult,
1106 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
1108 /* PLL1 output cannot exceed 1GHz. */
1109 if (sysclk / 1000000 > 1000)
1112 return sysclk / sysdiv;
1115 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
1117 u8 *pll_prediv, u8 *pll_mult,
1120 unsigned long best = ~0;
1121 u8 best_sysdiv = 1, best_mult = 1;
1122 u8 _sysdiv, _pll_mult;
1124 for (_sysdiv = OV5640_SYSDIV_MIN;
1125 _sysdiv <= OV5640_SYSDIV_MAX;
1127 for (_pll_mult = OV5640_PLL_MULT_MIN;
1128 _pll_mult <= OV5640_PLL_MULT_MAX;
1130 unsigned long _rate;
1133 * The PLL multiplier cannot be odd if above
1136 if (_pll_mult > 127 && (_pll_mult % 2))
1139 _rate = ov5640_compute_sys_clk(sensor,
1141 _pll_mult, _sysdiv);
1144 * We have reached the maximum allowed PLL1 output,
1151 * Prefer rates above the expected clock rate than
1152 * below, even if that means being less precise.
1157 if (abs(rate - _rate) < abs(rate - best)) {
1159 best_sysdiv = _sysdiv;
1160 best_mult = _pll_mult;
1169 *sysdiv = best_sysdiv;
1170 *pll_prediv = OV5640_PLL_PREDIV;
1171 *pll_mult = best_mult;
1177 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
1178 * for the MIPI CSI-2 output.
1180 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)
1182 u8 bit_div, mipi_div, pclk_div, sclk_div, sclk2x_div, root_div;
1183 u8 prediv, mult, sysdiv;
1184 unsigned long link_freq;
1185 unsigned long sysclk;
1191 /* Use the link freq computed at ov5640_update_pixel_rate() time. */
1192 link_freq = sensor->current_link_freq;
1195 * - mipi_div - Additional divider for the MIPI lane clock.
1197 * Higher link frequencies would make sysclk > 1GHz.
1198 * Keep the sysclk low and do not divide in the MIPI domain.
1200 if (link_freq > OV5640_LINK_RATE_MAX)
1205 sysclk = link_freq * mipi_div;
1206 ov5640_calc_sys_clk(sensor, sysclk, &prediv, &mult, &sysdiv);
1209 * Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio.
1211 * - root_div = 2 (fixed)
1212 * - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5
1213 * - pclk_div = 1 (fixed)
1214 * - p_div = (2 lanes ? mipi_div : 2 * mipi_div)
1216 * This results in the following MIPI_SCLK depending on the number
1219 * - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK
1220 * - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK
1222 root_div = OV5640_PLL_CTRL3_PLL_ROOT_DIV_2;
1223 bit_div = OV5640_PLL_CTRL0_MIPI_MODE_8BIT;
1224 pclk_div = ilog2(OV5640_PCLK_ROOT_DIV);
1228 * - YUV: PCLK >= 2 * SCLK
1229 * - RAW or JPEG: PCLK >= SCLK
1230 * - sclk2x_div = sclk_div / 2
1232 sclk_div = ilog2(OV5640_SCLK_ROOT_DIV);
1233 sclk2x_div = ilog2(OV5640_SCLK2X_ROOT_DIV);
1236 * Set the pixel clock period expressed in ns with 1-bit decimal
1239 * The register is very briefly documented. In the OV5645 datasheet it
1240 * is described as (2 * pclk period), and from testing it seems the
1241 * actual definition is 2 * 8-bit sample period.
1243 * 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2
1245 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
1246 sample_rate = (link_freq * mipi_div * num_lanes * 2) / 16;
1247 pclk_period = 2000000000UL / sample_rate;
1249 /* Program the clock tree registers. */
1250 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 0x0f, bit_div);
1254 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0xff,
1255 (sysdiv << 4) | mipi_div);
1259 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
1263 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 0x1f,
1268 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1269 (pclk_div << 4) | (sclk2x_div << 2) | sclk_div);
1273 return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);
1276 static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1278 const struct ov5640_mode_info *mode = sensor->current_mode;
1281 rate = mode->htot * (mode->crop.height + mode->vblank_def);
1282 rate *= ov5640_framerates[sensor->current_fr];
1287 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1289 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1290 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1292 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1293 OV5640_PCLK_ROOT_DIV;
1295 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1297 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1298 *bit_div = OV5640_BIT_DIV;
1299 *pclk_div = OV5640_PCLK_ROOT_DIV;
1301 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1304 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)
1306 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1310 rate = ov5640_calc_pixel_rate(sensor);
1311 rate *= ov5640_code_to_bpp(sensor->fmt.code);
1312 rate /= sensor->ep.bus.parallel.bus_width;
1314 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1315 &bit_div, &pclk_div);
1320 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1326 * We need to set sysdiv according to the clock, and to clear
1329 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1334 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1339 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1340 0x1f, prediv | ((pll_rdiv - 1) << 4));
1344 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1345 (ilog2(pclk_div) << 4));
1348 /* set JPEG framing sizes */
1349 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1350 const struct ov5640_mode_info *mode)
1355 * compression mode 3 timing
1357 * Data is transmitted with programmable width (VFIFO_HSIZE).
1358 * No padding done. Last line may have less data. Varying
1359 * number of lines per frame, depending on amount of data.
1361 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1365 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE,
1370 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE,
1374 /* download ov5640 settings to sensor through i2c */
1375 static int ov5640_set_timings(struct ov5640_dev *sensor,
1376 const struct ov5640_mode_info *mode)
1378 const struct v4l2_rect *analog_crop = &mode->analog_crop;
1379 const struct v4l2_rect *crop = &mode->crop;
1382 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1383 ret = ov5640_set_jpeg_timings(sensor, mode);
1388 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HS,
1393 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VS,
1398 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HW,
1399 analog_crop->left + analog_crop->width - 1);
1403 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VH,
1404 analog_crop->top + analog_crop->height - 1);
1408 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HOFFS, crop->left);
1412 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VOFFS, crop->top);
1416 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, crop->width);
1420 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, crop->height);
1424 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1428 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
1429 crop->height + mode->vblank_def);
1436 static int ov5640_load_regs(struct ov5640_dev *sensor,
1437 const struct ov5640_mode_info *mode)
1439 const struct reg_value *regs = mode->reg_data;
1446 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1447 delay_ms = regs->delay_ms;
1448 reg_addr = regs->reg_addr;
1452 /* remain in power down mode for DVP */
1453 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1454 val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
1455 !ov5640_is_csi2(sensor))
1459 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1461 ret = ov5640_write_reg(sensor, reg_addr, val);
1466 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1469 return ov5640_set_timings(sensor, mode);
1472 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1474 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1475 BIT(0), on ? 0 : BIT(0));
1478 /* read exposure, in number of line periods */
1479 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1484 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1487 exp = ((int)temp & 0x0f) << 16;
1488 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1491 exp |= ((int)temp << 8);
1492 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1500 /* write exposure, given number of line periods */
1501 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1507 ret = ov5640_write_reg(sensor,
1508 OV5640_REG_AEC_PK_EXPOSURE_LO,
1512 ret = ov5640_write_reg(sensor,
1513 OV5640_REG_AEC_PK_EXPOSURE_MED,
1514 (exposure >> 8) & 0xff);
1517 return ov5640_write_reg(sensor,
1518 OV5640_REG_AEC_PK_EXPOSURE_HI,
1519 (exposure >> 16) & 0x0f);
1522 static int ov5640_get_gain(struct ov5640_dev *sensor)
1527 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1531 return gain & 0x3ff;
1534 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1536 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1540 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1542 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1543 BIT(1), on ? 0 : BIT(1));
1546 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1548 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1549 OV5640_REG_SYS_CTRL0_SW_PWUP :
1550 OV5640_REG_SYS_CTRL0_SW_PWDN);
1553 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1558 * Enable/disable the MIPI interface
1560 * 0x300e = on ? 0x45 : 0x40
1562 * FIXME: the sensor manual (version 2.03) reports
1563 * [7:5] = 000 : 1 data lane mode
1564 * [7:5] = 001 : 2 data lanes mode
1565 * But this settings do not work, while the following ones
1566 * have been validated for 2 data lanes mode.
1568 * [7:5] = 010 : 2 data lanes mode
1569 * [4] = 0 : Power up MIPI HS Tx
1570 * [3] = 0 : Power up MIPI LS Rx
1571 * [2] = 1/0 : MIPI interface enable/disable
1572 * [1:0] = 01/00: FIXME: 'debug'
1574 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1579 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1583 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1585 /* calculate sysclk */
1586 u32 xvclk = sensor->xclk_freq / 10000;
1587 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1588 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1589 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1593 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1596 temp2 = temp1 & 0x0f;
1597 if (temp2 == 8 || temp2 == 10)
1598 bit_div2x = temp2 / 2;
1600 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1603 sysdiv = temp1 >> 4;
1607 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1612 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1615 prediv = temp1 & 0x0f;
1616 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1618 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1621 temp2 = temp1 & 0x03;
1622 sclk_rdiv = sclk_rdiv_map[temp2];
1624 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1627 VCO = xvclk * multiplier / prediv;
1629 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1634 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1636 /* read HTS from register settings */
1640 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1644 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1647 static int ov5640_get_hts(struct ov5640_dev *sensor)
1649 /* read HTS from register settings */
1653 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1659 static int ov5640_get_vts(struct ov5640_dev *sensor)
1664 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1670 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1672 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1675 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1677 /* get banding filter value */
1678 int ret, light_freq = 0;
1681 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1687 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1700 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1716 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1718 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1721 /* read preview PCLK */
1722 ret = ov5640_get_sysclk(sensor);
1727 sensor->prev_sysclk = ret;
1728 /* read preview HTS */
1729 ret = ov5640_get_hts(sensor);
1734 sensor->prev_hts = ret;
1736 /* read preview VTS */
1737 ret = ov5640_get_vts(sensor);
1742 /* calculate banding filter */
1744 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1745 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1750 max_band60 = (int)((prev_vts - 4) / band_step60);
1751 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1756 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1757 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1762 max_band50 = (int)((prev_vts - 4) / band_step50);
1763 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1766 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1768 /* stable in high */
1769 u32 fast_high, fast_low;
1772 sensor->ae_low = target * 23 / 25; /* 0.92 */
1773 sensor->ae_high = target * 27 / 25; /* 1.08 */
1775 fast_high = sensor->ae_high << 1;
1776 if (fast_high > 255)
1779 fast_low = sensor->ae_low >> 1;
1781 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1784 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1787 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1790 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1793 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1796 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1799 static int ov5640_get_binning(struct ov5640_dev *sensor)
1804 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1808 return temp & BIT(0);
1811 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1817 * - [0]: Horizontal binning enable
1819 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1820 BIT(0), enable ? BIT(0) : 0);
1825 * - [0]: Undocumented, but hardcoded init sequences
1826 * are always setting REG21/REG20 bit 0 to same value...
1828 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1829 BIT(0), enable ? BIT(0) : 0);
1832 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1834 struct i2c_client *client = sensor->i2c_client;
1835 u8 temp, channel = virtual_channel;
1839 dev_err(&client->dev,
1840 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1845 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1849 temp |= (channel << 6);
1850 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1853 static const struct ov5640_mode_info *
1854 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1855 int width, int height, bool nearest)
1857 const struct ov5640_mode_info *mode;
1859 mode = v4l2_find_nearest_size(ov5640_mode_data,
1860 ARRAY_SIZE(ov5640_mode_data),
1861 crop.width, crop.height, width, height);
1865 (mode->crop.width != width || mode->crop.height != height)))
1868 /* Check to see if the current mode exceeds the max frame rate */
1869 if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1876 * sensor changes between scaling and subsampling, go through
1877 * exposure calculation
1879 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1880 const struct ov5640_mode_info *mode)
1882 u32 prev_shutter, prev_gain16;
1883 u32 cap_shutter, cap_gain16;
1884 u32 cap_sysclk, cap_hts, cap_vts;
1885 u32 light_freq, cap_bandfilt, cap_maxband;
1886 u32 cap_gain16_shutter;
1890 if (!mode->reg_data)
1893 /* read preview shutter */
1894 ret = ov5640_get_exposure(sensor);
1898 ret = ov5640_get_binning(sensor);
1901 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1902 mode->id != OV5640_MODE_1080P_1920_1080)
1905 /* read preview gain */
1906 ret = ov5640_get_gain(sensor);
1912 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1916 /* turn off night mode for capture */
1917 ret = ov5640_set_night_mode(sensor);
1921 /* Write capture setting */
1922 ret = ov5640_load_regs(sensor, mode);
1926 /* read capture VTS */
1927 ret = ov5640_get_vts(sensor);
1931 ret = ov5640_get_hts(sensor);
1938 ret = ov5640_get_sysclk(sensor);
1945 /* calculate capture banding filter */
1946 ret = ov5640_get_light_freq(sensor);
1951 if (light_freq == 60) {
1953 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1956 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1959 if (!sensor->prev_sysclk) {
1960 ret = ov5640_get_sysclk(sensor);
1965 sensor->prev_sysclk = ret;
1971 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1973 /* calculate capture shutter/gain16 */
1974 if (average > sensor->ae_low && average < sensor->ae_high) {
1975 /* in stable range */
1976 cap_gain16_shutter =
1977 prev_gain16 * prev_shutter *
1978 cap_sysclk / sensor->prev_sysclk *
1979 sensor->prev_hts / cap_hts *
1980 sensor->ae_target / average;
1982 cap_gain16_shutter =
1983 prev_gain16 * prev_shutter *
1984 cap_sysclk / sensor->prev_sysclk *
1985 sensor->prev_hts / cap_hts;
1988 /* gain to shutter */
1989 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1990 /* shutter < 1/100 */
1991 cap_shutter = cap_gain16_shutter / 16;
1992 if (cap_shutter < 1)
1995 cap_gain16 = cap_gain16_shutter / cap_shutter;
1996 if (cap_gain16 < 16)
1999 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
2000 /* exposure reach max */
2001 cap_shutter = cap_bandfilt * cap_maxband;
2005 cap_gain16 = cap_gain16_shutter / cap_shutter;
2007 /* 1/100 < (cap_shutter = n/100) =< max */
2009 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
2014 cap_gain16 = cap_gain16_shutter / cap_shutter;
2018 /* set capture gain */
2019 ret = ov5640_set_gain(sensor, cap_gain16);
2023 /* write capture shutter */
2024 if (cap_shutter > (cap_vts - 4)) {
2025 cap_vts = cap_shutter + 4;
2026 ret = ov5640_set_vts(sensor, cap_vts);
2032 return ov5640_set_exposure(sensor, cap_shutter);
2036 * if sensor changes inside scaling or subsampling
2037 * change mode directly
2039 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
2040 const struct ov5640_mode_info *mode)
2042 if (!mode->reg_data)
2045 /* Write capture setting */
2046 return ov5640_load_regs(sensor, mode);
2049 static int ov5640_set_mode(struct ov5640_dev *sensor)
2051 const struct ov5640_mode_info *mode = sensor->current_mode;
2052 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
2053 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
2054 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
2055 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
2058 dn_mode = mode->dn_mode;
2059 orig_dn_mode = orig_mode->dn_mode;
2061 /* auto gain and exposure must be turned off when changing modes */
2063 ret = ov5640_set_autogain(sensor, false);
2069 ret = ov5640_set_autoexposure(sensor, false);
2071 goto restore_auto_gain;
2074 if (ov5640_is_csi2(sensor))
2075 ret = ov5640_set_mipi_pclk(sensor);
2077 ret = ov5640_set_dvp_pclk(sensor);
2081 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
2082 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
2084 * change between subsampling and scaling
2085 * go through exposure calculation
2087 ret = ov5640_set_mode_exposure_calc(sensor, mode);
2090 * change inside subsampling or scaling
2091 * download firmware directly
2093 ret = ov5640_set_mode_direct(sensor, mode);
2096 goto restore_auto_exp_gain;
2098 /* restore auto gain and exposure */
2100 ov5640_set_autogain(sensor, true);
2102 ov5640_set_autoexposure(sensor, true);
2104 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
2107 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
2110 ret = ov5640_get_light_freq(sensor);
2113 ret = ov5640_set_bandingfilter(sensor);
2116 ret = ov5640_set_virtual_channel(sensor);
2120 sensor->pending_mode_change = false;
2121 sensor->last_mode = mode;
2125 restore_auto_exp_gain:
2127 ov5640_set_autoexposure(sensor, true);
2130 ov5640_set_autogain(sensor, true);
2135 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2136 struct v4l2_mbus_framefmt *format);
2138 /* restore the last set video mode after chip power-on */
2139 static int ov5640_restore_mode(struct ov5640_dev *sensor)
2143 /* first load the initial register values */
2144 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
2147 sensor->last_mode = &ov5640_mode_init_data;
2149 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
2150 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
2151 ilog2(OV5640_SCLK_ROOT_DIV));
2155 /* now restore the last capture mode */
2156 ret = ov5640_set_mode(sensor);
2160 return ov5640_set_framefmt(sensor, &sensor->fmt);
2163 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
2165 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
2168 static void ov5640_reset(struct ov5640_dev *sensor)
2170 if (!sensor->reset_gpio)
2173 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2175 /* camera power cycle */
2176 ov5640_power(sensor, false);
2177 usleep_range(5000, 10000);
2178 ov5640_power(sensor, true);
2179 usleep_range(5000, 10000);
2181 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
2182 usleep_range(1000, 2000);
2184 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2185 usleep_range(20000, 25000);
2188 static int ov5640_set_power_on(struct ov5640_dev *sensor)
2190 struct i2c_client *client = sensor->i2c_client;
2193 ret = clk_prepare_enable(sensor->xclk);
2195 dev_err(&client->dev, "%s: failed to enable clock\n",
2200 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
2203 dev_err(&client->dev, "%s: failed to enable regulators\n",
2208 ov5640_reset(sensor);
2209 ov5640_power(sensor, true);
2211 ret = ov5640_init_slave_id(sensor);
2218 ov5640_power(sensor, false);
2219 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2221 clk_disable_unprepare(sensor->xclk);
2225 static void ov5640_set_power_off(struct ov5640_dev *sensor)
2227 ov5640_power(sensor, false);
2228 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2229 clk_disable_unprepare(sensor->xclk);
2232 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
2237 /* Reset MIPI bus settings to their default values. */
2238 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2239 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
2240 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
2245 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2248 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2249 * "ov5640_set_stream_mipi()")
2250 * [4] = 0 : Power up MIPI HS Tx
2251 * [3] = 0 : Power up MIPI LS Rx
2252 * [2] = 0 : MIPI interface disabled
2254 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
2259 * Gate clock and set LP11 in 'no packets mode' (idle)
2262 * [5] = 1 : Gate clock when 'no packets'
2263 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2265 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
2270 * Set data lanes and clock in LP11 when 'sleeping'
2273 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2274 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2275 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2277 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
2281 /* Give lanes some time to coax into LP11 state. */
2282 usleep_range(500, 1000);
2287 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
2289 unsigned int flags = sensor->ep.bus.parallel.flags;
2290 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
2295 /* Reset settings to their default values. */
2296 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
2297 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2298 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
2299 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2300 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2305 * Note about parallel port configuration.
2307 * When configured in parallel mode, the OV5640 will
2308 * output 10 bits data on DVP data lines [9:0].
2309 * If only 8 bits data are wanted, the 8 bits data lines
2310 * of the camera interface must be physically connected
2311 * on the DVP data lines [9:2].
2313 * Control lines polarity can be configured through
2314 * devicetree endpoint control lines properties.
2315 * If no endpoint control lines properties are set,
2316 * polarity will be as below:
2317 * - VSYNC: active high
2318 * - HREF: active low
2319 * - PCLK: active low
2321 * VSYNC & HREF are not configured if BT656 bus mode is selected
2325 * BT656 embedded synchronization configuration
2328 * - [7]: SYNC code selection (0: auto generate sync code,
2329 * 1: sync code from regs 0x4732-0x4735)
2330 * - [6]: f value in CCIR656 SYNC code when fixed f value
2331 * - [5]: Fixed f value
2332 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
2333 * 01: data from regs 0x4736-0x4738, 10: always keep 0)
2334 * - [1]: Clip data disable
2335 * - [0]: CCIR656 mode enable
2337 * Default CCIR656 SAV/EAV mode with default codes
2338 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2339 * - CCIR656 mode enable
2340 * - auto generation of sync codes
2341 * - blank toggle data 1'h040/1'h200
2342 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2344 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2345 bt656 ? 0x01 : 0x00);
2350 * configure parallel port control lines polarity
2353 * - [5]: PCLK polarity (0: active low, 1: active high)
2354 * - [1]: HREF polarity (0: active low, 1: active high)
2355 * - [0]: VSYNC polarity (mismatch here between
2356 * datasheet and hardware, 0 is active high
2357 * and 1 is active low...)
2360 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2361 polarities |= BIT(1);
2362 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
2363 polarities |= BIT(0);
2365 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2366 polarities |= BIT(5);
2368 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2373 * powerdown MIPI TX/RX PHY & enable DVP
2376 * [4] = 1 : Power down MIPI HS Tx
2377 * [3] = 1 : Power down MIPI LS Rx
2378 * [2] = 0 : DVP enable (MIPI disable)
2380 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2385 * enable VSYNC/HREF/PCLK DVP control lines
2386 * & D[9:6] DVP data lines
2388 * PAD OUTPUT ENABLE 01
2389 * - 6: VSYNC output enable
2390 * - 5: HREF output enable
2391 * - 4: PCLK output enable
2392 * - [3:0]: D[9:6] output enable
2394 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
2395 bt656 ? 0x1f : 0x7f);
2400 * enable D[5:0] DVP data lines
2402 * PAD OUTPUT ENABLE 02
2403 * - [7:2]: D[5:0] output enable
2405 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2408 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2413 ret = ov5640_set_power_on(sensor);
2417 ret = ov5640_restore_mode(sensor);
2422 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2423 ret = ov5640_set_power_mipi(sensor, on);
2425 ret = ov5640_set_power_dvp(sensor, on);
2430 ov5640_set_power_off(sensor);
2435 ov5640_set_power_off(sensor);
2439 /* --------------- Subdev Operations --------------- */
2441 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2443 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2446 mutex_lock(&sensor->lock);
2449 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2450 * update the power state.
2452 if (sensor->power_count == !on) {
2453 ret = ov5640_set_power(sensor, !!on);
2458 /* Update the power count. */
2459 sensor->power_count += on ? 1 : -1;
2460 WARN_ON(sensor->power_count < 0);
2462 mutex_unlock(&sensor->lock);
2464 if (on && !ret && sensor->power_count == 1) {
2465 /* restore controls */
2466 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2472 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2473 struct v4l2_fract *fi,
2474 u32 width, u32 height)
2476 const struct ov5640_mode_info *mode;
2477 enum ov5640_frame_rate rate = OV5640_15_FPS;
2478 int minfps, maxfps, best_fps, fps;
2481 minfps = ov5640_framerates[OV5640_15_FPS];
2482 maxfps = ov5640_framerates[OV5640_60_FPS];
2484 if (fi->numerator == 0) {
2485 fi->denominator = maxfps;
2487 rate = OV5640_60_FPS;
2491 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2495 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2496 int curr_fps = ov5640_framerates[i];
2498 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2499 best_fps = curr_fps;
2505 fi->denominator = best_fps;
2508 mode = ov5640_find_mode(sensor, rate, width, height, false);
2509 return mode ? rate : -EINVAL;
2512 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2513 struct v4l2_subdev_state *sd_state,
2514 struct v4l2_subdev_format *format)
2516 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2517 struct v4l2_mbus_framefmt *fmt;
2519 if (format->pad != 0)
2522 mutex_lock(&sensor->lock);
2524 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2525 fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
2530 format->format = *fmt;
2532 mutex_unlock(&sensor->lock);
2537 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2538 struct v4l2_mbus_framefmt *fmt,
2539 enum ov5640_frame_rate fr,
2540 const struct ov5640_mode_info **new_mode)
2542 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2543 const struct ov5640_mode_info *mode;
2546 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2549 fmt->width = mode->crop.width;
2550 fmt->height = mode->crop.height;
2555 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2556 if (ov5640_formats[i].code == fmt->code)
2558 if (i >= ARRAY_SIZE(ov5640_formats))
2561 fmt->code = ov5640_formats[i].code;
2562 fmt->colorspace = ov5640_formats[i].colorspace;
2563 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2564 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2565 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2570 static int ov5640_update_pixel_rate(struct ov5640_dev *sensor)
2572 const struct ov5640_mode_info *mode = sensor->current_mode;
2573 enum ov5640_pixel_rate_id pixel_rate_id = mode->pixel_rate;
2574 struct v4l2_mbus_framefmt *fmt = &sensor->fmt;
2582 * Update the pixel rate control value.
2584 * For DVP mode, maintain the pixel rate calculation using fixed FPS.
2586 if (!ov5640_is_csi2(sensor)) {
2587 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2588 ov5640_calc_pixel_rate(sensor));
2594 * The MIPI CSI-2 link frequency should comply with the CSI-2
2595 * specification and be lower than 1GHz.
2597 * Start from the suggested pixel_rate for the current mode and
2598 * progressively slow it down if it exceeds 1GHz.
2600 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
2601 bpp = ov5640_code_to_bpp(fmt->code);
2603 pixel_rate = ov5640_pixel_rates[pixel_rate_id];
2604 link_freq = pixel_rate * bpp / (2 * num_lanes);
2605 } while (link_freq >= 1000000000U &&
2606 ++pixel_rate_id < OV5640_NUM_PIXEL_RATES);
2608 sensor->current_link_freq = link_freq;
2611 * Higher link rates require the clock tree to be programmed with
2612 * 'mipi_div' = 1; this has the effect of halving the actual output
2613 * pixel rate in the MIPI domain.
2615 * Adjust the pixel rate and link frequency control value to report it
2616 * correctly to userspace.
2618 if (link_freq > OV5640_LINK_RATE_MAX) {
2623 for (i = 0; i < ARRAY_SIZE(ov5640_csi2_link_freqs); ++i) {
2624 if (ov5640_csi2_link_freqs[i] == link_freq)
2627 WARN_ON(i == ARRAY_SIZE(ov5640_csi2_link_freqs));
2629 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, pixel_rate);
2630 __v4l2_ctrl_s_ctrl(sensor->ctrls.link_freq, i);
2635 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2636 struct v4l2_subdev_state *sd_state,
2637 struct v4l2_subdev_format *format)
2639 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2640 const struct ov5640_mode_info *new_mode;
2641 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2644 if (format->pad != 0)
2647 mutex_lock(&sensor->lock);
2649 if (sensor->streaming) {
2654 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2655 sensor->current_fr, &new_mode);
2659 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
2660 *v4l2_subdev_get_try_format(sd, sd_state, 0) = *mbus_fmt;
2664 if (new_mode != sensor->current_mode) {
2665 sensor->current_mode = new_mode;
2666 sensor->pending_mode_change = true;
2668 if (mbus_fmt->code != sensor->fmt.code)
2669 sensor->pending_fmt_change = true;
2671 /* update format even if code is unchanged, resolution might change */
2672 sensor->fmt = *mbus_fmt;
2674 ov5640_update_pixel_rate(sensor);
2677 mutex_unlock(&sensor->lock);
2681 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2682 struct v4l2_mbus_framefmt *format)
2685 bool is_jpeg = false;
2688 switch (format->code) {
2689 case MEDIA_BUS_FMT_UYVY8_1X16:
2690 case MEDIA_BUS_FMT_UYVY8_2X8:
2693 mux = OV5640_FMT_MUX_YUV422;
2695 case MEDIA_BUS_FMT_YUYV8_1X16:
2696 case MEDIA_BUS_FMT_YUYV8_2X8:
2699 mux = OV5640_FMT_MUX_YUV422;
2701 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2702 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2704 mux = OV5640_FMT_MUX_RGB;
2706 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2707 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2709 mux = OV5640_FMT_MUX_RGB;
2711 case MEDIA_BUS_FMT_JPEG_1X8:
2714 mux = OV5640_FMT_MUX_YUV422;
2717 case MEDIA_BUS_FMT_SBGGR8_1X8:
2718 /* Raw, BGBG... / GRGR... */
2720 mux = OV5640_FMT_MUX_RAW_DPC;
2722 case MEDIA_BUS_FMT_SGBRG8_1X8:
2723 /* Raw bayer, GBGB... / RGRG... */
2725 mux = OV5640_FMT_MUX_RAW_DPC;
2727 case MEDIA_BUS_FMT_SGRBG8_1X8:
2728 /* Raw bayer, GRGR... / BGBG... */
2730 mux = OV5640_FMT_MUX_RAW_DPC;
2732 case MEDIA_BUS_FMT_SRGGB8_1X8:
2733 /* Raw bayer, RGRG... / GBGB... */
2735 mux = OV5640_FMT_MUX_RAW_DPC;
2741 /* FORMAT CONTROL00: YUV and RGB formatting */
2742 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2746 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2747 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2753 * - [5]: JPEG enable
2755 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2756 BIT(5), is_jpeg ? BIT(5) : 0);
2762 * - [4]: Reset JFIFO
2763 * - [3]: Reset SFIFO
2766 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2767 BIT(4) | BIT(3) | BIT(2),
2768 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2774 * - [5]: Enable JPEG 2x clock
2775 * - [3]: Enable JPEG clock
2777 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2779 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2786 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2791 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2795 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2797 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2803 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2808 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2812 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2815 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2821 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2826 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2830 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2834 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2837 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2843 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2847 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2848 BIT(0), awb ? 0 : 1);
2853 u16 red = (u16)sensor->ctrls.red_balance->val;
2854 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2856 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2859 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2865 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2866 enum v4l2_exposure_auto_type auto_exposure)
2868 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2869 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2872 if (ctrls->auto_exp->is_new) {
2873 ret = ov5640_set_autoexposure(sensor, auto_exp);
2878 if (!auto_exp && ctrls->exposure->is_new) {
2881 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2885 ret = ov5640_get_vts(sensor);
2891 if (ctrls->exposure->val < max_exp)
2892 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2898 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2900 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2903 if (ctrls->auto_gain->is_new) {
2904 ret = ov5640_set_autogain(sensor, auto_gain);
2909 if (!auto_gain && ctrls->gain->is_new)
2910 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2915 static const char * const test_pattern_menu[] = {
2918 "Color bars w/ rolling bar",
2920 "Color squares w/ rolling bar",
2923 #define OV5640_TEST_ENABLE BIT(7)
2924 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2925 #define OV5640_TEST_TRANSPARENT BIT(5)
2926 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2927 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2928 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2929 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2930 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2931 #define OV5640_TEST_BAR (0 << 0)
2932 #define OV5640_TEST_RANDOM (1 << 0)
2933 #define OV5640_TEST_SQUARE (2 << 0)
2934 #define OV5640_TEST_BLACK (3 << 0)
2936 static const u8 test_pattern_val[] = {
2938 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2940 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2941 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2942 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2943 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2946 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2948 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2949 test_pattern_val[value]);
2952 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2956 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2957 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2962 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2963 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2967 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2970 * If sensor is mounted upside down, mirror logic is inversed.
2972 * Sensor is a BSI (Back Side Illuminated) one,
2973 * so image captured is physically mirrored.
2974 * This is why mirror logic is inversed in
2975 * order to cancel this mirror effect.
2981 * - [1]: Sensor mirror
2983 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2985 (!(value ^ sensor->upside_down)) ?
2986 (BIT(2) | BIT(1)) : 0);
2989 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2991 /* If sensor is mounted upside down, flip logic is inversed */
2996 * - [1]: Sensor vflip
2998 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
3000 (value ^ sensor->upside_down) ?
3001 (BIT(2) | BIT(1)) : 0);
3004 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
3006 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3007 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3010 /* v4l2_ctrl_lock() locks our own mutex */
3013 case V4L2_CID_AUTOGAIN:
3014 val = ov5640_get_gain(sensor);
3017 sensor->ctrls.gain->val = val;
3019 case V4L2_CID_EXPOSURE_AUTO:
3020 val = ov5640_get_exposure(sensor);
3023 sensor->ctrls.exposure->val = val;
3030 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
3032 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3033 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3036 /* v4l2_ctrl_lock() locks our own mutex */
3039 * If the device is not powered up by the host driver do
3040 * not apply any controls to H/W at this time. Instead
3041 * the controls will be restored right after power-up.
3043 if (sensor->power_count == 0)
3047 case V4L2_CID_AUTOGAIN:
3048 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
3050 case V4L2_CID_EXPOSURE_AUTO:
3051 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
3053 case V4L2_CID_AUTO_WHITE_BALANCE:
3054 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
3057 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
3059 case V4L2_CID_CONTRAST:
3060 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
3062 case V4L2_CID_SATURATION:
3063 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
3065 case V4L2_CID_TEST_PATTERN:
3066 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
3068 case V4L2_CID_POWER_LINE_FREQUENCY:
3069 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
3071 case V4L2_CID_HFLIP:
3072 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
3074 case V4L2_CID_VFLIP:
3075 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
3085 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
3086 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
3087 .s_ctrl = ov5640_s_ctrl,
3090 static int ov5640_init_controls(struct ov5640_dev *sensor)
3092 const struct ov5640_mode_info *mode = sensor->current_mode;
3093 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
3094 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3095 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
3098 v4l2_ctrl_handler_init(hdl, 32);
3100 /* we can use our own mutex for the ctrl lock */
3101 hdl->lock = &sensor->lock;
3103 /* Clock related controls */
3104 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
3105 ov5640_pixel_rates[OV5640_NUM_PIXEL_RATES - 1],
3106 ov5640_pixel_rates[0], 1,
3107 ov5640_pixel_rates[mode->pixel_rate]);
3109 ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, ops,
3111 ARRAY_SIZE(ov5640_csi2_link_freqs) - 1,
3112 OV5640_DEFAULT_LINK_FREQ,
3113 ov5640_csi2_link_freqs);
3115 /* Auto/manual white balance */
3116 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
3117 V4L2_CID_AUTO_WHITE_BALANCE,
3119 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
3121 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
3123 /* Auto/manual exposure */
3124 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
3125 V4L2_CID_EXPOSURE_AUTO,
3126 V4L2_EXPOSURE_MANUAL, 0,
3127 V4L2_EXPOSURE_AUTO);
3128 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
3130 /* Auto/manual gain */
3131 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
3133 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
3136 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
3138 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
3140 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
3142 ctrls->test_pattern =
3143 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
3144 ARRAY_SIZE(test_pattern_menu) - 1,
3145 0, 0, test_pattern_menu);
3146 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
3148 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
3152 v4l2_ctrl_new_std_menu(hdl, ops,
3153 V4L2_CID_POWER_LINE_FREQUENCY,
3154 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
3155 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
3162 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
3163 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
3164 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
3165 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
3167 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
3168 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
3169 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
3171 sensor->sd.ctrl_handler = hdl;
3175 v4l2_ctrl_handler_free(hdl);
3179 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
3180 struct v4l2_subdev_state *sd_state,
3181 struct v4l2_subdev_frame_size_enum *fse)
3185 if (fse->index >= OV5640_NUM_MODES)
3188 fse->min_width = ov5640_mode_data[fse->index].crop.width;
3189 fse->max_width = fse->min_width;
3190 fse->min_height = ov5640_mode_data[fse->index].crop.height;
3191 fse->max_height = fse->min_height;
3196 static int ov5640_enum_frame_interval(
3197 struct v4l2_subdev *sd,
3198 struct v4l2_subdev_state *sd_state,
3199 struct v4l2_subdev_frame_interval_enum *fie)
3201 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3202 struct v4l2_fract tpf;
3207 if (fie->index >= OV5640_NUM_FRAMERATES)
3211 tpf.denominator = ov5640_framerates[fie->index];
3213 ret = ov5640_try_frame_interval(sensor, &tpf,
3214 fie->width, fie->height);
3218 fie->interval = tpf;
3222 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
3223 struct v4l2_subdev_frame_interval *fi)
3225 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3227 mutex_lock(&sensor->lock);
3228 fi->interval = sensor->frame_interval;
3229 mutex_unlock(&sensor->lock);
3234 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
3235 struct v4l2_subdev_frame_interval *fi)
3237 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3238 const struct ov5640_mode_info *mode;
3239 int frame_rate, ret = 0;
3244 mutex_lock(&sensor->lock);
3246 if (sensor->streaming) {
3251 mode = sensor->current_mode;
3253 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
3256 if (frame_rate < 0) {
3257 /* Always return a valid frame interval value */
3258 fi->interval = sensor->frame_interval;
3262 mode = ov5640_find_mode(sensor, frame_rate, mode->crop.width,
3263 mode->crop.height, true);
3269 if (mode != sensor->current_mode ||
3270 frame_rate != sensor->current_fr) {
3271 sensor->current_fr = frame_rate;
3272 sensor->frame_interval = fi->interval;
3273 sensor->current_mode = mode;
3274 sensor->pending_mode_change = true;
3276 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
3277 ov5640_calc_pixel_rate(sensor));
3280 mutex_unlock(&sensor->lock);
3284 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
3285 struct v4l2_subdev_state *sd_state,
3286 struct v4l2_subdev_mbus_code_enum *code)
3290 if (code->index >= ARRAY_SIZE(ov5640_formats))
3293 code->code = ov5640_formats[code->index].code;
3297 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
3299 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3302 mutex_lock(&sensor->lock);
3304 if (sensor->streaming == !enable) {
3305 if (enable && sensor->pending_mode_change) {
3306 ret = ov5640_set_mode(sensor);
3311 if (enable && sensor->pending_fmt_change) {
3312 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
3315 sensor->pending_fmt_change = false;
3318 if (ov5640_is_csi2(sensor))
3319 ret = ov5640_set_stream_mipi(sensor, enable);
3321 ret = ov5640_set_stream_dvp(sensor, enable);
3324 sensor->streaming = enable;
3327 mutex_unlock(&sensor->lock);
3331 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
3332 .s_power = ov5640_s_power,
3333 .log_status = v4l2_ctrl_subdev_log_status,
3334 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
3335 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
3338 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
3339 .g_frame_interval = ov5640_g_frame_interval,
3340 .s_frame_interval = ov5640_s_frame_interval,
3341 .s_stream = ov5640_s_stream,
3344 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
3345 .enum_mbus_code = ov5640_enum_mbus_code,
3346 .get_fmt = ov5640_get_fmt,
3347 .set_fmt = ov5640_set_fmt,
3348 .enum_frame_size = ov5640_enum_frame_size,
3349 .enum_frame_interval = ov5640_enum_frame_interval,
3352 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
3353 .core = &ov5640_core_ops,
3354 .video = &ov5640_video_ops,
3355 .pad = &ov5640_pad_ops,
3358 static int ov5640_get_regulators(struct ov5640_dev *sensor)
3362 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
3363 sensor->supplies[i].supply = ov5640_supply_name[i];
3365 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
3366 OV5640_NUM_SUPPLIES,
3370 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
3372 struct i2c_client *client = sensor->i2c_client;
3376 ret = ov5640_set_power_on(sensor);
3380 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3382 dev_err(&client->dev, "%s: failed to read chip identifier\n",
3387 if (chip_id != 0x5640) {
3388 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3394 ov5640_set_power_off(sensor);
3398 static int ov5640_probe(struct i2c_client *client)
3400 struct device *dev = &client->dev;
3401 struct fwnode_handle *endpoint;
3402 struct ov5640_dev *sensor;
3403 struct v4l2_mbus_framefmt *fmt;
3407 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3411 sensor->i2c_client = client;
3414 * default init sequence initialize sensor to
3415 * YUV422 UYVY VGA@30fps
3418 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
3419 fmt->colorspace = V4L2_COLORSPACE_SRGB;
3420 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
3421 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
3422 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
3425 fmt->field = V4L2_FIELD_NONE;
3426 sensor->frame_interval.numerator = 1;
3427 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3428 sensor->current_fr = OV5640_30_FPS;
3429 sensor->current_mode =
3430 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
3431 sensor->last_mode = sensor->current_mode;
3432 sensor->current_link_freq = OV5640_DEFAULT_LINK_FREQ;
3434 sensor->ae_target = 52;
3436 /* optional indication of physical rotation of sensor */
3437 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3442 sensor->upside_down = true;
3447 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3452 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3455 dev_err(dev, "endpoint node not found\n");
3459 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3460 fwnode_handle_put(endpoint);
3462 dev_err(dev, "Could not parse endpoint\n");
3466 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3467 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3468 sensor->ep.bus_type != V4L2_MBUS_BT656) {
3469 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3473 /* get system clock (xclk) */
3474 sensor->xclk = devm_clk_get(dev, "xclk");
3475 if (IS_ERR(sensor->xclk)) {
3476 dev_err(dev, "failed to get xclk\n");
3477 return PTR_ERR(sensor->xclk);
3480 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3481 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3482 sensor->xclk_freq > OV5640_XCLK_MAX) {
3483 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3488 /* request optional power down pin */
3489 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3491 if (IS_ERR(sensor->pwdn_gpio))
3492 return PTR_ERR(sensor->pwdn_gpio);
3494 /* request optional reset pin */
3495 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3497 if (IS_ERR(sensor->reset_gpio))
3498 return PTR_ERR(sensor->reset_gpio);
3500 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3502 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3503 V4L2_SUBDEV_FL_HAS_EVENTS;
3504 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3505 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3506 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3510 ret = ov5640_get_regulators(sensor);
3514 mutex_init(&sensor->lock);
3516 ret = ov5640_check_chip_id(sensor);
3518 goto entity_cleanup;
3520 ret = ov5640_init_controls(sensor);
3522 goto entity_cleanup;
3524 ret = v4l2_async_register_subdev_sensor(&sensor->sd);
3531 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3533 media_entity_cleanup(&sensor->sd.entity);
3534 mutex_destroy(&sensor->lock);
3538 static int ov5640_remove(struct i2c_client *client)
3540 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3541 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3543 v4l2_async_unregister_subdev(&sensor->sd);
3544 media_entity_cleanup(&sensor->sd.entity);
3545 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3546 mutex_destroy(&sensor->lock);
3551 static const struct i2c_device_id ov5640_id[] = {
3555 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3557 static const struct of_device_id ov5640_dt_ids[] = {
3558 { .compatible = "ovti,ov5640" },
3561 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3563 static struct i2c_driver ov5640_i2c_driver = {
3566 .of_match_table = ov5640_dt_ids,
3568 .id_table = ov5640_id,
3569 .probe_new = ov5640_probe,
3570 .remove = ov5640_remove,
3573 module_i2c_driver(ov5640_i2c_driver);
3575 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3576 MODULE_LICENSE("GPL");