1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for IMX296 CMOS Image Sensor from Sony
5 * Copyright 2019 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/slab.h>
17 #include <linux/videodev2.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
23 static int trigger_mode;
24 module_param(trigger_mode, int, 0644);
25 MODULE_PARM_DESC(trigger_mode, "Set trigger mode: 0=default, 1=XTRIG");
27 #define IMX296_PIXEL_ARRAY_WIDTH 1456
28 #define IMX296_PIXEL_ARRAY_HEIGHT 1088
30 #define IMX296_REG_8BIT(n) ((1 << 16) | (n))
31 #define IMX296_REG_16BIT(n) ((2 << 16) | (n))
32 #define IMX296_REG_24BIT(n) ((3 << 16) | (n))
33 #define IMX296_REG_SIZE_SHIFT 16
34 #define IMX296_REG_ADDR_MASK 0xffff
36 #define IMX296_CTRL00 IMX296_REG_8BIT(0x3000)
37 #define IMX296_CTRL00_STANDBY BIT(0)
38 #define IMX296_CTRL08 IMX296_REG_8BIT(0x3008)
39 #define IMX296_CTRL08_REGHOLD BIT(0)
40 #define IMX296_CTRL0A IMX296_REG_8BIT(0x300a)
41 #define IMX296_CTRL0A_XMSTA BIT(0)
42 #define IMX296_CTRL0B IMX296_REG_8BIT(0x300b)
43 #define IMX296_CTRL0B_TRIGEN BIT(0)
44 #define IMX296_CTRL0D IMX296_REG_8BIT(0x300d)
45 #define IMX296_CTRL0D_WINMODE_ALL (0 << 0)
46 #define IMX296_CTRL0D_WINMODE_FD_BINNING (2 << 0)
47 #define IMX296_CTRL0D_HADD_ON_BINNING BIT(5)
48 #define IMX296_CTRL0D_SAT_CNT BIT(6)
49 #define IMX296_CTRL0E IMX296_REG_8BIT(0x300e)
50 #define IMX296_CTRL0E_VREVERSE BIT(0)
51 #define IMX296_CTRL0E_HREVERSE BIT(1)
52 #define IMX296_VMAX IMX296_REG_24BIT(0x3010)
53 #define IMX296_HMAX IMX296_REG_16BIT(0x3014)
54 #define IMX296_TMDCTRL IMX296_REG_8BIT(0x301d)
55 #define IMX296_TMDCTRL_LATCH BIT(0)
56 #define IMX296_TMDOUT IMX296_REG_16BIT(0x301e)
57 #define IMX296_TMDOUT_MASK 0x3ff
58 #define IMX296_WDSEL IMX296_REG_8BIT(0x3021)
59 #define IMX296_WDSEL_NORMAL (0 << 0)
60 #define IMX296_WDSEL_MULTI_2 (1 << 0)
61 #define IMX296_WDSEL_MULTI_4 (3 << 0)
62 #define IMX296_BLKLEVELAUTO IMX296_REG_8BIT(0x3022)
63 #define IMX296_BLKLEVELAUTO_ON 0x01
64 #define IMX296_BLKLEVELAUTO_OFF 0xf0
65 #define IMX296_SST IMX296_REG_8BIT(0x3024)
66 #define IMX296_SST_EN BIT(0)
67 #define IMX296_CTRLTOUT IMX296_REG_8BIT(0x3026)
68 #define IMX296_CTRLTOUT_TOUT1SEL_LOW (0 << 0)
69 #define IMX296_CTRLTOUT_TOUT1SEL_PULSE (3 << 0)
70 #define IMX296_CTRLTOUT_TOUT2SEL_LOW (0 << 2)
71 #define IMX296_CTRLTOUT_TOUT2SEL_PULSE (3 << 2)
72 #define IMX296_CTRLTRIG IMX296_REG_8BIT(0x3029)
73 #define IMX296_CTRLTRIG_TOUT1_SEL_LOW (0 << 0)
74 #define IMX296_CTRLTRIG_TOUT1_SEL_PULSE1 (1 << 0)
75 #define IMX296_CTRLTRIG_TOUT2_SEL_LOW (0 << 4)
76 #define IMX296_CTRLTRIG_TOUT2_SEL_PULSE2 (2 << 4)
77 #define IMX296_SYNCSEL IMX296_REG_8BIT(0x3036)
78 #define IMX296_SYNCSEL_NORMAL 0xc0
79 #define IMX296_SYNCSEL_HIZ 0xf0
80 #define IMX296_PULSE1 IMX296_REG_8BIT(0x306d)
81 #define IMX296_PULSE1_EN_NOR BIT(0)
82 #define IMX296_PULSE1_EN_TRIG BIT(1)
83 #define IMX296_PULSE1_POL_HIGH (0 << 2)
84 #define IMX296_PULSE1_POL_LOW (1 << 2)
85 #define IMX296_PULSE1_UP IMX296_REG_24BIT(0x3070)
86 #define IMX296_PULSE1_DN IMX296_REG_24BIT(0x3074)
87 #define IMX296_PULSE2 IMX296_REG_8BIT(0x3079)
88 #define IMX296_PULSE2_EN_NOR BIT(0)
89 #define IMX296_PULSE2_EN_TRIG BIT(1)
90 #define IMX296_PULSE2_POL_HIGH (0 << 2)
91 #define IMX296_PULSE2_POL_LOW (1 << 2)
92 #define IMX296_PULSE2_UP IMX296_REG_24BIT(0x307c)
93 #define IMX296_PULSE2_DN IMX296_REG_24BIT(0x3080)
94 #define IMX296_INCKSEL(n) IMX296_REG_8BIT(0x3089 + (n))
95 #define IMX296_SHS1 IMX296_REG_24BIT(0x308d)
96 #define IMX296_SHS2 IMX296_REG_24BIT(0x3090)
97 #define IMX296_SHS3 IMX296_REG_24BIT(0x3094)
98 #define IMX296_SHS4 IMX296_REG_24BIT(0x3098)
99 #define IMX296_VBLANKLP IMX296_REG_8BIT(0x309c)
100 #define IMX296_VBLANKLP_NORMAL 0x04
101 #define IMX296_VBLANKLP_LOW_POWER 0x2c
102 #define IMX296_EXP_CNT IMX296_REG_8BIT(0x30a3)
103 #define IMX296_EXP_CNT_RESET BIT(0)
104 #define IMX296_EXP_MAX IMX296_REG_16BIT(0x30a6)
105 #define IMX296_VINT IMX296_REG_8BIT(0x30aa)
106 #define IMX296_VINT_EN BIT(0)
107 #define IMX296_LOWLAGTRG IMX296_REG_8BIT(0x30ae)
108 #define IMX296_LOWLAGTRG_FAST BIT(0)
109 #define IMX296_I2CCTRL IMX296_REG_8BIT(0x30ef)
110 #define IMX296_I2CCTRL_I2CACKEN BIT(0)
112 #define IMX296_SENSOR_INFO IMX296_REG_16BIT(0x3148)
113 #define IMX296_SENSOR_INFO_MONO BIT(15)
114 #define IMX296_SENSOR_INFO_IMX296LQ 0x4a00
115 #define IMX296_SENSOR_INFO_IMX296LL 0xca00
116 #define IMX296_S_SHSA IMX296_REG_16BIT(0x31ca)
117 #define IMX296_S_SHSB IMX296_REG_16BIT(0x31d2)
119 * Registers 0x31c8 to 0x31cd, 0x31d0 to 0x31d5, 0x31e2, 0x31e3, 0x31ea and
120 * 0x31eb are related to exposure mode but otherwise not documented.
123 #define IMX296_GAINCTRL IMX296_REG_8BIT(0x3200)
124 #define IMX296_GAINCTRL_WD_GAIN_MODE_NORMAL 0x01
125 #define IMX296_GAINCTRL_WD_GAIN_MODE_MULTI 0x41
126 #define IMX296_GAIN IMX296_REG_16BIT(0x3204)
127 #define IMX296_GAIN_MIN 0
128 #define IMX296_GAIN_MAX 480
129 #define IMX296_GAIN1 IMX296_REG_16BIT(0x3208)
130 #define IMX296_GAIN2 IMX296_REG_16BIT(0x320c)
131 #define IMX296_GAIN3 IMX296_REG_16BIT(0x3210)
132 #define IMX296_GAINDLY IMX296_REG_8BIT(0x3212)
133 #define IMX296_GAINDLY_NONE 0x08
134 #define IMX296_GAINDLY_1FRAME 0x09
135 #define IMX296_PGCTRL IMX296_REG_8BIT(0x3238)
136 #define IMX296_PGCTRL_REGEN BIT(0)
137 #define IMX296_PGCTRL_THRU BIT(1)
138 #define IMX296_PGCTRL_CLKEN BIT(2)
139 #define IMX296_PGCTRL_MODE(n) ((n) << 3)
140 #define IMX296_PGHPOS IMX296_REG_16BIT(0x3239)
141 #define IMX296_PGVPOS IMX296_REG_16BIT(0x323c)
142 #define IMX296_PGHPSTEP IMX296_REG_8BIT(0x323e)
143 #define IMX296_PGVPSTEP IMX296_REG_8BIT(0x323f)
144 #define IMX296_PGHPNUM IMX296_REG_8BIT(0x3240)
145 #define IMX296_PGVPNUM IMX296_REG_8BIT(0x3241)
146 #define IMX296_PGDATA1 IMX296_REG_16BIT(0x3244)
147 #define IMX296_PGDATA2 IMX296_REG_16BIT(0x3246)
148 #define IMX296_PGHGSTEP IMX296_REG_8BIT(0x3249)
149 #define IMX296_BLKLEVEL IMX296_REG_16BIT(0x3254)
151 #define IMX296_FID0_ROI IMX296_REG_8BIT(0x3300)
152 #define IMX296_FID0_ROIH1ON BIT(0)
153 #define IMX296_FID0_ROIV1ON BIT(1)
154 #define IMX296_FID0_ROIPH1 IMX296_REG_16BIT(0x3310)
155 #define IMX296_FID0_ROIPV1 IMX296_REG_16BIT(0x3312)
156 #define IMX296_FID0_ROIWH1 IMX296_REG_16BIT(0x3314)
157 #define IMX296_FID0_ROIWH1_MIN 80
158 #define IMX296_FID0_ROIWV1 IMX296_REG_16BIT(0x3316)
159 #define IMX296_FID0_ROIWV1_MIN 4
161 #define IMX296_CM_HSST_STARTTMG IMX296_REG_16BIT(0x4018)
162 #define IMX296_CM_HSST_ENDTMG IMX296_REG_16BIT(0x401a)
163 #define IMX296_DA_HSST_STARTTMG IMX296_REG_16BIT(0x404d)
164 #define IMX296_DA_HSST_ENDTMG IMX296_REG_16BIT(0x4050)
165 #define IMX296_LM_HSST_STARTTMG IMX296_REG_16BIT(0x4094)
166 #define IMX296_LM_HSST_ENDTMG IMX296_REG_16BIT(0x4096)
167 #define IMX296_SST_SIEASTA1_SET IMX296_REG_8BIT(0x40c9)
168 #define IMX296_SST_SIEASTA1PRE_1U IMX296_REG_16BIT(0x40cc)
169 #define IMX296_SST_SIEASTA1PRE_1D IMX296_REG_16BIT(0x40ce)
170 #define IMX296_SST_SIEASTA1PRE_2U IMX296_REG_16BIT(0x40d0)
171 #define IMX296_SST_SIEASTA1PRE_2D IMX296_REG_16BIT(0x40d2)
172 #define IMX296_HSST IMX296_REG_8BIT(0x40dc)
173 #define IMX296_HSST_EN BIT(2)
175 #define IMX296_CKREQSEL IMX296_REG_8BIT(0x4101)
176 #define IMX296_CKREQSEL_HS BIT(2)
177 #define IMX296_GTTABLENUM IMX296_REG_8BIT(0x4114)
178 #define IMX296_CTRL418C IMX296_REG_8BIT(0x418c)
180 struct imx296_clk_params {
186 static const struct imx296_clk_params imx296_clk_params[] = {
187 { 37125000, { 0x80, 0x0b, 0x80, 0x08 }, 116 },
188 { 54000000, { 0xb0, 0x0f, 0xb0, 0x0c }, 168 },
189 { 74250000, { 0x80, 0x0f, 0x80, 0x0c }, 232 },
192 static const char * const imx296_supply_names[] = {
201 struct regulator_bulk_data supplies[ARRAY_SIZE(imx296_supply_names)];
202 struct gpio_desc *reset;
203 struct regmap *regmap;
205 const struct imx296_clk_params *clk_params;
210 struct v4l2_subdev subdev;
211 struct media_pad pad;
213 struct v4l2_ctrl_handler ctrls;
214 struct v4l2_ctrl *hblank;
215 struct v4l2_ctrl *vblank;
218 static inline struct imx296 *to_imx296(struct v4l2_subdev *sd)
220 return container_of(sd, struct imx296, subdev);
223 static int imx296_read(struct imx296 *sensor, u32 addr)
225 u8 data[3] = { 0, 0, 0 };
228 ret = regmap_raw_read(sensor->regmap, addr & IMX296_REG_ADDR_MASK, data,
229 (addr >> IMX296_REG_SIZE_SHIFT) & 3);
233 return (data[2] << 16) | (data[1] << 8) | data[0];
236 static int imx296_write(struct imx296 *sensor, u32 addr, u32 value, int *err)
238 u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 };
244 ret = regmap_raw_write(sensor->regmap, addr & IMX296_REG_ADDR_MASK,
245 data, (addr >> IMX296_REG_SIZE_SHIFT) & 3);
247 dev_err(sensor->dev, "%u-bit write to 0x%04x failed: %d\n",
248 ((addr >> IMX296_REG_SIZE_SHIFT) & 3) * 8,
249 addr & IMX296_REG_ADDR_MASK, ret);
257 static int imx296_power_on(struct imx296 *sensor)
261 ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies),
268 ret = gpiod_direction_output(sensor->reset, 0);
274 ret = clk_prepare_enable(sensor->clk);
279 * The documentation doesn't explicitly say how much time is required
280 * after providing a clock and before starting I2C communication. It
281 * mentions a delay of 20µs in 4-wire mode, but tests showed that a
282 * delay of 100µs resulted in I2C communication failures, while 500µs
283 * seems to be enough. Be conservative.
285 usleep_range(1000, 2000);
290 gpiod_direction_output(sensor->reset, 1);
292 regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
296 static void imx296_power_off(struct imx296 *sensor)
298 clk_disable_unprepare(sensor->clk);
299 gpiod_direction_output(sensor->reset, 1);
300 regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
303 /* -----------------------------------------------------------------------------
307 static const char * const imx296_test_pattern_menu[] = {
320 static int imx296_s_ctrl(struct v4l2_ctrl *ctrl)
322 struct imx296 *sensor = container_of(ctrl->handler, struct imx296, ctrls);
323 const struct v4l2_mbus_framefmt *format;
324 struct v4l2_subdev_state *state;
328 if (!sensor->streaming)
331 state = v4l2_subdev_get_locked_active_state(&sensor->subdev);
332 format = v4l2_subdev_get_pad_format(&sensor->subdev, state, 0);
335 case V4L2_CID_EXPOSURE:
336 /* Clamp the exposure value to VMAX. */
337 vmax = format->height + sensor->vblank->cur.val;
338 ctrl->val = min_t(int, ctrl->val, vmax);
339 imx296_write(sensor, IMX296_SHS1, vmax - ctrl->val, &ret);
342 case V4L2_CID_ANALOGUE_GAIN:
343 imx296_write(sensor, IMX296_GAIN, ctrl->val, &ret);
346 case V4L2_CID_VBLANK:
347 imx296_write(sensor, IMX296_VMAX, format->height + ctrl->val,
351 case V4L2_CID_TEST_PATTERN:
353 imx296_write(sensor, IMX296_PGHPOS, 8, &ret);
354 imx296_write(sensor, IMX296_PGVPOS, 8, &ret);
355 imx296_write(sensor, IMX296_PGHPSTEP, 8, &ret);
356 imx296_write(sensor, IMX296_PGVPSTEP, 8, &ret);
357 imx296_write(sensor, IMX296_PGHPNUM, 100, &ret);
358 imx296_write(sensor, IMX296_PGVPNUM, 100, &ret);
359 imx296_write(sensor, IMX296_PGDATA1, 0x300, &ret);
360 imx296_write(sensor, IMX296_PGDATA2, 0x100, &ret);
361 imx296_write(sensor, IMX296_PGHGSTEP, 0, &ret);
362 imx296_write(sensor, IMX296_BLKLEVEL, 0, &ret);
363 imx296_write(sensor, IMX296_BLKLEVELAUTO,
364 IMX296_BLKLEVELAUTO_OFF, &ret);
365 imx296_write(sensor, IMX296_PGCTRL,
366 IMX296_PGCTRL_REGEN |
367 IMX296_PGCTRL_CLKEN |
368 IMX296_PGCTRL_MODE(ctrl->val - 1), &ret);
370 imx296_write(sensor, IMX296_PGCTRL,
371 IMX296_PGCTRL_CLKEN, &ret);
372 imx296_write(sensor, IMX296_BLKLEVEL, 0x3c, &ret);
373 imx296_write(sensor, IMX296_BLKLEVELAUTO,
374 IMX296_BLKLEVELAUTO_ON, &ret);
386 static const struct v4l2_ctrl_ops imx296_ctrl_ops = {
387 .s_ctrl = imx296_s_ctrl,
390 static int imx296_ctrls_init(struct imx296 *sensor)
392 struct v4l2_fwnode_device_properties props;
396 ret = v4l2_fwnode_device_parse(sensor->dev, &props);
400 v4l2_ctrl_handler_init(&sensor->ctrls, 9);
402 v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
403 V4L2_CID_EXPOSURE, 1, 1048575, 1, 1104);
404 v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
405 V4L2_CID_ANALOGUE_GAIN, IMX296_GAIN_MIN,
406 IMX296_GAIN_MAX, 1, IMX296_GAIN_MIN);
409 * Horizontal blanking is controlled through the HMAX register, which
410 * contains a line length in INCK clock units. The INCK frequency is
411 * fixed to 74.25 MHz. The HMAX value is currently fixed to 1100,
412 * convert it to a number of pixels based on the nominal pixel rate.
414 hblank = 1100 * 1188000000ULL / 10 / 74250000
415 - IMX296_PIXEL_ARRAY_WIDTH;
416 sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
417 V4L2_CID_HBLANK, hblank, hblank, 1,
420 sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
422 sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
424 1048575 - IMX296_PIXEL_ARRAY_HEIGHT,
427 * The sensor calculates the MIPI timings internally to achieve a bit
428 * rate between 1122 and 1198 Mbps. The exact value is unfortunately not
429 * reported, at least according to the documentation. Report a nominal
430 * rate of 1188 Mbps as that is used by the datasheet in multiple
433 v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE,
434 1122000000 / 10, 1198000000 / 10, 1, 1188000000 / 10);
435 v4l2_ctrl_new_std_menu_items(&sensor->ctrls, &imx296_ctrl_ops,
436 V4L2_CID_TEST_PATTERN,
437 ARRAY_SIZE(imx296_test_pattern_menu) - 1,
438 0, 0, imx296_test_pattern_menu);
440 v4l2_ctrl_new_fwnode_properties(&sensor->ctrls, &imx296_ctrl_ops,
443 if (sensor->ctrls.error) {
444 dev_err(sensor->dev, "failed to add controls (%d)\n",
445 sensor->ctrls.error);
446 v4l2_ctrl_handler_free(&sensor->ctrls);
447 return sensor->ctrls.error;
450 sensor->subdev.ctrl_handler = &sensor->ctrls;
455 /* -----------------------------------------------------------------------------
456 * V4L2 Subdev Operations
460 * This table is extracted from vendor data that is entirely undocumented. The
461 * first register write is required to activate the CSI-2 output. The other
462 * entries may or may not be optional?
464 static const struct {
467 } imx296_init_table[] = {
468 { IMX296_REG_8BIT(0x3005), 0xf0 },
469 { IMX296_REG_8BIT(0x309e), 0x04 },
470 { IMX296_REG_8BIT(0x30a0), 0x04 },
471 { IMX296_REG_8BIT(0x30a1), 0x3c },
472 { IMX296_REG_8BIT(0x30a4), 0x5f },
473 { IMX296_REG_8BIT(0x30a8), 0x91 },
474 { IMX296_REG_8BIT(0x30ac), 0x28 },
475 { IMX296_REG_8BIT(0x30af), 0x09 },
476 { IMX296_REG_8BIT(0x30df), 0x00 },
477 { IMX296_REG_8BIT(0x3165), 0x00 },
478 { IMX296_REG_8BIT(0x3169), 0x10 },
479 { IMX296_REG_8BIT(0x316a), 0x02 },
480 { IMX296_REG_8BIT(0x31c8), 0xf3 }, /* Exposure-related */
481 { IMX296_REG_8BIT(0x31d0), 0xf4 }, /* Exposure-related */
482 { IMX296_REG_8BIT(0x321a), 0x00 },
483 { IMX296_REG_8BIT(0x3226), 0x02 },
484 { IMX296_REG_8BIT(0x3256), 0x01 },
485 { IMX296_REG_8BIT(0x3541), 0x72 },
486 { IMX296_REG_8BIT(0x3516), 0x77 },
487 { IMX296_REG_8BIT(0x350b), 0x7f },
488 { IMX296_REG_8BIT(0x3758), 0xa3 },
489 { IMX296_REG_8BIT(0x3759), 0x00 },
490 { IMX296_REG_8BIT(0x375a), 0x85 },
491 { IMX296_REG_8BIT(0x375b), 0x00 },
492 { IMX296_REG_8BIT(0x3832), 0xf5 },
493 { IMX296_REG_8BIT(0x3833), 0x00 },
494 { IMX296_REG_8BIT(0x38a2), 0xf6 },
495 { IMX296_REG_8BIT(0x38a3), 0x00 },
496 { IMX296_REG_8BIT(0x3a00), 0x80 },
497 { IMX296_REG_8BIT(0x3d48), 0xa3 },
498 { IMX296_REG_8BIT(0x3d49), 0x00 },
499 { IMX296_REG_8BIT(0x3d4a), 0x85 },
500 { IMX296_REG_8BIT(0x3d4b), 0x00 },
501 { IMX296_REG_8BIT(0x400e), 0x58 },
502 { IMX296_REG_8BIT(0x4014), 0x1c },
503 { IMX296_REG_8BIT(0x4041), 0x2a },
504 { IMX296_REG_8BIT(0x40a2), 0x06 },
505 { IMX296_REG_8BIT(0x40c1), 0xf6 },
506 { IMX296_REG_8BIT(0x40c7), 0x0f },
507 { IMX296_REG_8BIT(0x40c8), 0x00 },
508 { IMX296_REG_8BIT(0x4174), 0x00 },
511 static int imx296_setup(struct imx296 *sensor, struct v4l2_subdev_state *state)
513 const struct v4l2_mbus_framefmt *format;
514 const struct v4l2_rect *crop;
518 format = v4l2_subdev_get_pad_format(&sensor->subdev, state, 0);
519 crop = v4l2_subdev_get_pad_crop(&sensor->subdev, state, 0);
521 for (i = 0; i < ARRAY_SIZE(imx296_init_table); ++i)
522 imx296_write(sensor, imx296_init_table[i].reg,
523 imx296_init_table[i].value, &ret);
525 if (crop->width != IMX296_PIXEL_ARRAY_WIDTH ||
526 crop->height != IMX296_PIXEL_ARRAY_HEIGHT) {
527 imx296_write(sensor, IMX296_FID0_ROI,
528 IMX296_FID0_ROIH1ON | IMX296_FID0_ROIV1ON, &ret);
529 imx296_write(sensor, IMX296_FID0_ROIPH1, crop->left, &ret);
530 imx296_write(sensor, IMX296_FID0_ROIPV1, crop->top, &ret);
531 imx296_write(sensor, IMX296_FID0_ROIWH1, crop->width, &ret);
532 imx296_write(sensor, IMX296_FID0_ROIWV1, crop->height, &ret);
534 imx296_write(sensor, IMX296_FID0_ROI, 0, &ret);
537 imx296_write(sensor, IMX296_CTRL0D,
538 (crop->width != format->width ?
539 IMX296_CTRL0D_HADD_ON_BINNING : 0) |
540 (crop->height != format->height ?
541 IMX296_CTRL0D_WINMODE_FD_BINNING : 0),
545 * HMAX and VMAX configure horizontal and vertical blanking by
546 * specifying the total line time and frame time respectively. The line
547 * time is specified in operational clock units (which appears to be the
548 * output of an internal PLL, fixed at 74.25 MHz regardless of the
549 * exernal clock frequency), while the frame time is specified as a
552 * In the vertical direction the sensor outputs the following:
554 * - one line for the FS packet
555 * - two lines of embedded data (DT 0x12)
556 * - six null lines (DT 0x10)
557 * - four lines of vertical effective optical black (DT 0x37)
558 * - 8 to 1088 lines of active image data (RAW10, DT 0x2b)
559 * - one line for the FE packet
560 * - 16 or more lines of vertical blanking
562 imx296_write(sensor, IMX296_HMAX, 1100, &ret);
563 imx296_write(sensor, IMX296_VMAX,
564 format->height + sensor->vblank->cur.val, &ret);
566 for (i = 0; i < ARRAY_SIZE(sensor->clk_params->incksel); ++i)
567 imx296_write(sensor, IMX296_INCKSEL(i),
568 sensor->clk_params->incksel[i], &ret);
569 imx296_write(sensor, IMX296_GTTABLENUM, 0xc5, &ret);
570 imx296_write(sensor, IMX296_CTRL418C, sensor->clk_params->ctrl418c,
573 imx296_write(sensor, IMX296_GAINDLY, IMX296_GAINDLY_NONE, &ret);
574 imx296_write(sensor, IMX296_BLKLEVEL, 0x03c, &ret);
579 static int imx296_stream_on(struct imx296 *sensor)
583 imx296_write(sensor, IMX296_CTRL00, 0, &ret);
584 usleep_range(2000, 5000);
586 if (trigger_mode == 1) {
587 imx296_write(sensor, IMX296_CTRL0B, IMX296_CTRL0B_TRIGEN, &ret);
588 imx296_write(sensor, IMX296_LOWLAGTRG, IMX296_LOWLAGTRG_FAST, &ret);
591 imx296_write(sensor, IMX296_CTRL0A, 0, &ret);
596 static int imx296_stream_off(struct imx296 *sensor)
600 imx296_write(sensor, IMX296_CTRL0A, IMX296_CTRL0A_XMSTA, &ret);
601 imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, &ret);
606 static int imx296_s_stream(struct v4l2_subdev *sd, int enable)
608 struct imx296 *sensor = to_imx296(sd);
609 struct v4l2_subdev_state *state;
612 state = v4l2_subdev_lock_and_get_active_state(sd);
615 ret = imx296_stream_off(sensor);
617 pm_runtime_mark_last_busy(sensor->dev);
618 pm_runtime_put_autosuspend(sensor->dev);
620 sensor->streaming = false;
625 ret = pm_runtime_resume_and_get(sensor->dev);
629 ret = imx296_setup(sensor, state);
634 * Set streaming to true to ensure __v4l2_ctrl_handler_setup() will set
635 * the controls. The flag is reset to false further down if an error
638 sensor->streaming = true;
640 ret = __v4l2_ctrl_handler_setup(&sensor->ctrls);
644 ret = imx296_stream_on(sensor);
649 v4l2_subdev_unlock_state(state);
655 * In case of error, turn the power off synchronously as the device
656 * likely has no other chance to recover.
658 pm_runtime_put_sync(sensor->dev);
659 sensor->streaming = false;
664 static int imx296_enum_mbus_code(struct v4l2_subdev *sd,
665 struct v4l2_subdev_state *state,
666 struct v4l2_subdev_mbus_code_enum *code)
668 struct imx296 *sensor = to_imx296(sd);
670 if (code->index != 0)
673 code->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
674 : MEDIA_BUS_FMT_SBGGR10_1X10;
679 static int imx296_enum_frame_size(struct v4l2_subdev *sd,
680 struct v4l2_subdev_state *state,
681 struct v4l2_subdev_frame_size_enum *fse)
683 const struct v4l2_mbus_framefmt *format;
685 format = v4l2_subdev_get_pad_format(sd, state, fse->pad);
688 * Binning does not seem to work on either mono or colour sensor
689 * variants. Disable enumerating the binned frame size for now.
691 if (fse->index >= 1 || fse->code != format->code)
694 fse->min_width = IMX296_PIXEL_ARRAY_WIDTH / (fse->index + 1);
695 fse->max_width = fse->min_width;
696 fse->min_height = IMX296_PIXEL_ARRAY_HEIGHT / (fse->index + 1);
697 fse->max_height = fse->min_height;
702 static int imx296_set_format(struct v4l2_subdev *sd,
703 struct v4l2_subdev_state *state,
704 struct v4l2_subdev_format *fmt)
706 struct imx296 *sensor = to_imx296(sd);
707 struct v4l2_mbus_framefmt *format;
708 struct v4l2_rect *crop;
710 crop = v4l2_subdev_get_pad_crop(sd, state, fmt->pad);
711 format = v4l2_subdev_get_pad_format(sd, state, fmt->pad);
713 format->width = crop->width;
714 format->height = crop->height;
716 format->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
717 : MEDIA_BUS_FMT_SBGGR10_1X10;
718 format->field = V4L2_FIELD_NONE;
719 format->colorspace = V4L2_COLORSPACE_RAW;
720 format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
721 format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
722 format->xfer_func = V4L2_XFER_FUNC_NONE;
724 fmt->format = *format;
729 static int imx296_get_selection(struct v4l2_subdev *sd,
730 struct v4l2_subdev_state *state,
731 struct v4l2_subdev_selection *sel)
733 switch (sel->target) {
734 case V4L2_SEL_TGT_CROP:
735 sel->r = *v4l2_subdev_get_pad_crop(sd, state, sel->pad);
738 case V4L2_SEL_TGT_CROP_DEFAULT:
739 case V4L2_SEL_TGT_CROP_BOUNDS:
740 case V4L2_SEL_TGT_NATIVE_SIZE:
743 sel->r.width = IMX296_PIXEL_ARRAY_WIDTH;
744 sel->r.height = IMX296_PIXEL_ARRAY_HEIGHT;
754 static int imx296_set_selection(struct v4l2_subdev *sd,
755 struct v4l2_subdev_state *state,
756 struct v4l2_subdev_selection *sel)
758 struct v4l2_mbus_framefmt *format;
759 struct v4l2_rect *crop;
760 struct v4l2_rect rect;
762 if (sel->target != V4L2_SEL_TGT_CROP)
766 * Clamp the crop rectangle boundaries and align them to a multiple of 4
767 * pixels to satisfy hardware requirements.
769 rect.left = clamp(ALIGN(sel->r.left, 4), 0,
770 IMX296_PIXEL_ARRAY_WIDTH - IMX296_FID0_ROIWH1_MIN);
771 rect.top = clamp(ALIGN(sel->r.top, 4), 0,
772 IMX296_PIXEL_ARRAY_HEIGHT - IMX296_FID0_ROIWV1_MIN);
773 rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 4),
774 IMX296_FID0_ROIWH1_MIN, IMX296_PIXEL_ARRAY_WIDTH);
775 rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 4),
776 IMX296_FID0_ROIWV1_MIN, IMX296_PIXEL_ARRAY_HEIGHT);
778 rect.width = min_t(unsigned int, rect.width,
779 IMX296_PIXEL_ARRAY_WIDTH - rect.left);
780 rect.height = min_t(unsigned int, rect.height,
781 IMX296_PIXEL_ARRAY_HEIGHT - rect.top);
783 crop = v4l2_subdev_get_pad_crop(sd, state, sel->pad);
785 if (rect.width != crop->width || rect.height != crop->height) {
787 * Reset the output image size if the crop rectangle size has
790 format = v4l2_subdev_get_pad_format(sd, state, sel->pad);
791 format->width = rect.width;
792 format->height = rect.height;
801 static int imx296_init_cfg(struct v4l2_subdev *sd,
802 struct v4l2_subdev_state *state)
804 struct v4l2_subdev_selection sel = {
805 .target = V4L2_SEL_TGT_CROP,
806 .r.width = IMX296_PIXEL_ARRAY_WIDTH,
807 .r.height = IMX296_PIXEL_ARRAY_HEIGHT,
809 struct v4l2_subdev_format format = {
811 .width = IMX296_PIXEL_ARRAY_WIDTH,
812 .height = IMX296_PIXEL_ARRAY_HEIGHT,
816 imx296_set_selection(sd, state, &sel);
817 imx296_set_format(sd, state, &format);
822 static const struct v4l2_subdev_video_ops imx296_subdev_video_ops = {
823 .s_stream = imx296_s_stream,
826 static const struct v4l2_subdev_pad_ops imx296_subdev_pad_ops = {
827 .enum_mbus_code = imx296_enum_mbus_code,
828 .enum_frame_size = imx296_enum_frame_size,
829 .get_fmt = v4l2_subdev_get_fmt,
830 .set_fmt = imx296_set_format,
831 .get_selection = imx296_get_selection,
832 .set_selection = imx296_set_selection,
833 .init_cfg = imx296_init_cfg,
836 static const struct v4l2_subdev_ops imx296_subdev_ops = {
837 .video = &imx296_subdev_video_ops,
838 .pad = &imx296_subdev_pad_ops,
841 static int imx296_subdev_init(struct imx296 *sensor)
843 struct i2c_client *client = to_i2c_client(sensor->dev);
846 v4l2_i2c_subdev_init(&sensor->subdev, client, &imx296_subdev_ops);
848 ret = imx296_ctrls_init(sensor);
852 sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
853 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
854 sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
855 ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
857 v4l2_ctrl_handler_free(&sensor->ctrls);
861 sensor->subdev.state_lock = sensor->subdev.ctrl_handler->lock;
863 v4l2_subdev_init_finalize(&sensor->subdev);
868 static void imx296_subdev_cleanup(struct imx296 *sensor)
870 media_entity_cleanup(&sensor->subdev.entity);
871 v4l2_ctrl_handler_free(&sensor->ctrls);
874 /* -----------------------------------------------------------------------------
878 static int __maybe_unused imx296_runtime_resume(struct device *dev)
880 struct i2c_client *client = to_i2c_client(dev);
881 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
882 struct imx296 *sensor = to_imx296(subdev);
884 return imx296_power_on(sensor);
887 static int __maybe_unused imx296_runtime_suspend(struct device *dev)
889 struct i2c_client *client = to_i2c_client(dev);
890 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
891 struct imx296 *sensor = to_imx296(subdev);
893 imx296_power_off(sensor);
898 static const struct dev_pm_ops imx296_pm_ops = {
899 SET_RUNTIME_PM_OPS(imx296_runtime_suspend, imx296_runtime_resume, NULL)
902 /* -----------------------------------------------------------------------------
906 static int imx296_read_temperature(struct imx296 *sensor, int *temp)
911 ret = imx296_write(sensor, IMX296_TMDCTRL, IMX296_TMDCTRL_LATCH, NULL);
915 tmdout = imx296_read(sensor, IMX296_TMDOUT);
919 tmdout &= IMX296_TMDOUT_MASK;
921 /* T(°C) = 246.312 - 0.304 * TMDOUT */;
922 *temp = 246312 - 304 * tmdout;
924 return imx296_write(sensor, IMX296_TMDCTRL, 0, NULL);
927 static int imx296_identify_model(struct imx296 *sensor)
933 model = (uintptr_t)of_device_get_match_data(sensor->dev);
936 "sensor model auto-detection disabled, forcing 0x%04x\n",
938 sensor->mono = model & IMX296_SENSOR_INFO_MONO;
943 * While most registers can be read when the sensor is in standby, this
944 * is not the case of the sensor info register :-(
946 ret = imx296_write(sensor, IMX296_CTRL00, 0, NULL);
949 "failed to get sensor out of standby (%d)\n", ret);
953 usleep_range(2000, 5000);
955 ret = imx296_read(sensor, IMX296_SENSOR_INFO);
957 dev_err(sensor->dev, "failed to read sensor information (%d)\n",
962 model = (ret >> 6) & 0x1ff;
966 sensor->mono = ret & IMX296_SENSOR_INFO_MONO;
969 * The IMX297 seems to share features with the IMX296, it may be
970 * possible to support it in the same driver.
974 dev_err(sensor->dev, "invalid device model 0x%04x\n", ret);
979 ret = imx296_read_temperature(sensor, &temp);
983 dev_info(sensor->dev, "found IMX%u%s (%u.%uC)\n", model,
984 sensor->mono ? "LL" : "LQ", temp / 1000, (temp / 100) % 10);
987 imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, NULL);
991 static const struct regmap_config imx296_regmap_config = {
995 .wr_table = &(const struct regmap_access_table) {
996 .no_ranges = (const struct regmap_range[]) {
998 .range_min = IMX296_SENSOR_INFO & 0xffff,
999 .range_max = (IMX296_SENSOR_INFO & 0xffff) + 1,
1006 static int imx296_probe(struct i2c_client *client)
1008 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1009 unsigned long clk_rate;
1010 struct imx296 *sensor;
1014 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1015 dev_warn(&adapter->dev,
1016 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1020 sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
1024 sensor->dev = &client->dev;
1026 /* Acquire resources. */
1027 for (i = 0; i < ARRAY_SIZE(sensor->supplies); ++i)
1028 sensor->supplies[i].supply = imx296_supply_names[i];
1030 ret = devm_regulator_bulk_get(sensor->dev, ARRAY_SIZE(sensor->supplies),
1033 dev_err_probe(sensor->dev, ret, "failed to get supplies\n");
1037 sensor->reset = devm_gpiod_get_optional(sensor->dev, "reset",
1039 if (IS_ERR(sensor->reset))
1040 return dev_err_probe(sensor->dev, PTR_ERR(sensor->reset),
1041 "failed to get reset GPIO\n");
1043 sensor->clk = devm_clk_get(sensor->dev, "inck");
1044 if (IS_ERR(sensor->clk))
1045 return dev_err_probe(sensor->dev, PTR_ERR(sensor->clk),
1046 "failed to get clock\n");
1048 clk_rate = clk_get_rate(sensor->clk);
1049 for (i = 0; i < ARRAY_SIZE(imx296_clk_params); ++i) {
1050 if (clk_rate == imx296_clk_params[i].freq) {
1051 sensor->clk_params = &imx296_clk_params[i];
1056 if (!sensor->clk_params) {
1057 dev_err(sensor->dev, "unsupported clock rate %lu\n", clk_rate);
1061 sensor->regmap = devm_regmap_init_i2c(client, &imx296_regmap_config);
1062 if (IS_ERR(sensor->regmap))
1063 return PTR_ERR(sensor->regmap);
1066 * Enable power management. The driver supports runtime PM, but needs to
1067 * work when runtime PM is disabled in the kernel. To that end, power
1068 * the sensor on manually here, identify it, and fully initialize it.
1070 ret = imx296_power_on(sensor);
1074 ret = imx296_identify_model(sensor);
1078 /* Initialize the V4L2 subdev. */
1079 ret = imx296_subdev_init(sensor);
1084 * Enable runtime PM. As the device has been powered manually, mark it
1085 * as active, and increase the usage count without resuming the device.
1087 pm_runtime_set_active(sensor->dev);
1088 pm_runtime_get_noresume(sensor->dev);
1089 pm_runtime_enable(sensor->dev);
1091 /* Register the V4L2 subdev. */
1092 ret = v4l2_async_register_subdev(&sensor->subdev);
1097 * Finally, enable autosuspend and decrease the usage count. The device
1098 * will get suspended after the autosuspend delay, turning the power
1101 pm_runtime_set_autosuspend_delay(sensor->dev, 1000);
1102 pm_runtime_use_autosuspend(sensor->dev);
1103 pm_runtime_put_autosuspend(sensor->dev);
1108 pm_runtime_disable(sensor->dev);
1109 pm_runtime_put_noidle(sensor->dev);
1110 imx296_subdev_cleanup(sensor);
1112 imx296_power_off(sensor);
1116 static void imx296_remove(struct i2c_client *client)
1118 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1119 struct imx296 *sensor = to_imx296(subdev);
1121 v4l2_async_unregister_subdev(subdev);
1123 imx296_subdev_cleanup(sensor);
1126 * Disable runtime PM. In case runtime PM is disabled in the kernel,
1127 * make sure to turn power off manually.
1129 pm_runtime_disable(sensor->dev);
1130 if (!pm_runtime_status_suspended(sensor->dev))
1131 imx296_power_off(sensor);
1132 pm_runtime_set_suspended(sensor->dev);
1135 static const struct of_device_id imx296_of_match[] = {
1136 { .compatible = "sony,imx296", .data = NULL },
1137 { .compatible = "sony,imx296ll", .data = (void *)IMX296_SENSOR_INFO_IMX296LL },
1138 { .compatible = "sony,imx296lq", .data = (void *)IMX296_SENSOR_INFO_IMX296LQ },
1141 MODULE_DEVICE_TABLE(of, imx296_of_match);
1143 static struct i2c_driver imx296_i2c_driver = {
1145 .of_match_table = imx296_of_match,
1147 .pm = &imx296_pm_ops
1149 .probe = imx296_probe,
1150 .remove = imx296_remove,
1153 module_i2c_driver(imx296_i2c_driver);
1155 MODULE_DESCRIPTION("Sony IMX296 Camera driver");
1156 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1157 MODULE_LICENSE("GPL");