media: i2c: IMX296 camera sensor driver
[platform/kernel/linux-rpi.git] / drivers / media / i2c / imx296.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for IMX296 CMOS Image Sensor from Sony
4  *
5  * Copyright 2019 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6  */
7
8 #include <linux/clk.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/i2c.h>
11 #include <linux/module.h>
12 #include <linux/mutex.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/slab.h>
17 #include <linux/videodev2.h>
18
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
22
23 #define IMX296_PIXEL_ARRAY_WIDTH                        1456
24 #define IMX296_PIXEL_ARRAY_HEIGHT                       1088
25
26 #define IMX296_REG_8BIT(n)                              ((1 << 16) | (n))
27 #define IMX296_REG_16BIT(n)                             ((2 << 16) | (n))
28 #define IMX296_REG_24BIT(n)                             ((3 << 16) | (n))
29 #define IMX296_REG_SIZE_SHIFT                           16
30 #define IMX296_REG_ADDR_MASK                            0xffff
31
32 #define IMX296_CTRL00                                   IMX296_REG_8BIT(0x3000)
33 #define IMX296_CTRL00_STANDBY                           BIT(0)
34 #define IMX296_CTRL08                                   IMX296_REG_8BIT(0x3008)
35 #define IMX296_CTRL08_REGHOLD                           BIT(0)
36 #define IMX296_CTRL0A                                   IMX296_REG_8BIT(0x300a)
37 #define IMX296_CTRL0A_XMSTA                             BIT(0)
38 #define IMX296_CTRL0B                                   IMX296_REG_8BIT(0x300b)
39 #define IMX296_CTRL0B_TRIGEN                            BIT(0)
40 #define IMX296_CTRL0D                                   IMX296_REG_8BIT(0x300d)
41 #define IMX296_CTRL0D_WINMODE_ALL                       (0 << 0)
42 #define IMX296_CTRL0D_WINMODE_FD_BINNING                (2 << 0)
43 #define IMX296_CTRL0D_HADD_ON_BINNING                   BIT(5)
44 #define IMX296_CTRL0D_SAT_CNT                           BIT(6)
45 #define IMX296_CTRL0E                                   IMX296_REG_8BIT(0x300e)
46 #define IMX296_CTRL0E_VREVERSE                          BIT(0)
47 #define IMX296_CTRL0E_HREVERSE                          BIT(1)
48 #define IMX296_VMAX                                     IMX296_REG_24BIT(0x3010)
49 #define IMX296_HMAX                                     IMX296_REG_16BIT(0x3014)
50 #define IMX296_TMDCTRL                                  IMX296_REG_8BIT(0x301d)
51 #define IMX296_TMDCTRL_LATCH                            BIT(0)
52 #define IMX296_TMDOUT                                   IMX296_REG_16BIT(0x301e)
53 #define IMX296_TMDOUT_MASK                              0x3ff
54 #define IMX296_WDSEL                                    IMX296_REG_8BIT(0x3021)
55 #define IMX296_WDSEL_NORMAL                             (0 << 0)
56 #define IMX296_WDSEL_MULTI_2                            (1 << 0)
57 #define IMX296_WDSEL_MULTI_4                            (3 << 0)
58 #define IMX296_BLKLEVELAUTO                             IMX296_REG_8BIT(0x3022)
59 #define IMX296_BLKLEVELAUTO_ON                          0x01
60 #define IMX296_BLKLEVELAUTO_OFF                         0xf0
61 #define IMX296_SST                                      IMX296_REG_8BIT(0x3024)
62 #define IMX296_SST_EN                                   BIT(0)
63 #define IMX296_CTRLTOUT                                 IMX296_REG_8BIT(0x3026)
64 #define IMX296_CTRLTOUT_TOUT1SEL_LOW                    (0 << 0)
65 #define IMX296_CTRLTOUT_TOUT1SEL_PULSE                  (3 << 0)
66 #define IMX296_CTRLTOUT_TOUT2SEL_LOW                    (0 << 2)
67 #define IMX296_CTRLTOUT_TOUT2SEL_PULSE                  (3 << 2)
68 #define IMX296_CTRLTRIG                                 IMX296_REG_8BIT(0x3029)
69 #define IMX296_CTRLTRIG_TOUT1_SEL_LOW                   (0 << 0)
70 #define IMX296_CTRLTRIG_TOUT1_SEL_PULSE1                (1 << 0)
71 #define IMX296_CTRLTRIG_TOUT2_SEL_LOW                   (0 << 4)
72 #define IMX296_CTRLTRIG_TOUT2_SEL_PULSE2                (2 << 4)
73 #define IMX296_SYNCSEL                                  IMX296_REG_8BIT(0x3036)
74 #define IMX296_SYNCSEL_NORMAL                           0xc0
75 #define IMX296_SYNCSEL_HIZ                              0xf0
76 #define IMX296_PULSE1                                   IMX296_REG_8BIT(0x306d)
77 #define IMX296_PULSE1_EN_NOR                            BIT(0)
78 #define IMX296_PULSE1_EN_TRIG                           BIT(1)
79 #define IMX296_PULSE1_POL_HIGH                          (0 << 2)
80 #define IMX296_PULSE1_POL_LOW                           (1 << 2)
81 #define IMX296_PULSE1_UP                                IMX296_REG_24BIT(0x3070)
82 #define IMX296_PULSE1_DN                                IMX296_REG_24BIT(0x3074)
83 #define IMX296_PULSE2                                   IMX296_REG_8BIT(0x3079)
84 #define IMX296_PULSE2_EN_NOR                            BIT(0)
85 #define IMX296_PULSE2_EN_TRIG                           BIT(1)
86 #define IMX296_PULSE2_POL_HIGH                          (0 << 2)
87 #define IMX296_PULSE2_POL_LOW                           (1 << 2)
88 #define IMX296_PULSE2_UP                                IMX296_REG_24BIT(0x307c)
89 #define IMX296_PULSE2_DN                                IMX296_REG_24BIT(0x3080)
90 #define IMX296_INCKSEL(n)                               IMX296_REG_8BIT(0x3089 + (n))
91 #define IMX296_SHS1                                     IMX296_REG_24BIT(0x308d)
92 #define IMX296_SHS2                                     IMX296_REG_24BIT(0x3090)
93 #define IMX296_SHS3                                     IMX296_REG_24BIT(0x3094)
94 #define IMX296_SHS4                                     IMX296_REG_24BIT(0x3098)
95 #define IMX296_VBLANKLP                                 IMX296_REG_8BIT(0x309c)
96 #define IMX296_VBLANKLP_NORMAL                          0x04
97 #define IMX296_VBLANKLP_LOW_POWER                       0x2c
98 #define IMX296_EXP_CNT                                  IMX296_REG_8BIT(0x30a3)
99 #define IMX296_EXP_CNT_RESET                            BIT(0)
100 #define IMX296_EXP_MAX                                  IMX296_REG_16BIT(0x30a6)
101 #define IMX296_VINT                                     IMX296_REG_8BIT(0x30aa)
102 #define IMX296_VINT_EN                                  BIT(0)
103 #define IMX296_LOWLAGTRG                                IMX296_REG_8BIT(0x30ae)
104 #define IMX296_LOWLAGTRG_FAST                           BIT(0)
105 #define IMX296_I2CCTRL                                  IMX296_REG_8BIT(0x30ef)
106 #define IMX296_I2CCTRL_I2CACKEN                         BIT(0)
107
108 #define IMX296_SENSOR_INFO                              IMX296_REG_16BIT(0x3148)
109 #define IMX296_SENSOR_INFO_MONO                         BIT(15)
110 #define IMX296_S_SHSA                                   IMX296_REG_16BIT(0x31ca)
111 #define IMX296_S_SHSB                                   IMX296_REG_16BIT(0x31d2)
112 /*
113  * Registers 0x31c8 to 0x31cd, 0x31d0 to 0x31d5, 0x31e2, 0x31e3, 0x31ea and
114  * 0x31eb are related to exposure mode but otherwise not documented.
115  */
116
117 #define IMX296_GAINCTRL                                 IMX296_REG_8BIT(0x3200)
118 #define IMX296_GAINCTRL_WD_GAIN_MODE_NORMAL             0x01
119 #define IMX296_GAINCTRL_WD_GAIN_MODE_MULTI              0x41
120 #define IMX296_GAIN                                     IMX296_REG_16BIT(0x3204)
121 #define IMX296_GAIN_MIN                                 0
122 #define IMX296_GAIN_MAX                                 480
123 #define IMX296_GAIN1                                    IMX296_REG_16BIT(0x3208)
124 #define IMX296_GAIN2                                    IMX296_REG_16BIT(0x320c)
125 #define IMX296_GAIN3                                    IMX296_REG_16BIT(0x3210)
126 #define IMX296_GAINDLY                                  IMX296_REG_8BIT(0x3212)
127 #define IMX296_GAINDLY_NONE                             0x08
128 #define IMX296_GAINDLY_1FRAME                           0x09
129 #define IMX296_PGCTRL                                   IMX296_REG_8BIT(0x3238)
130 #define IMX296_PGCTRL_REGEN                             BIT(0)
131 #define IMX296_PGCTRL_THRU                              BIT(1)
132 #define IMX296_PGCTRL_CLKEN                             BIT(2)
133 #define IMX296_PGCTRL_MODE(n)                           ((n) << 3)
134 #define IMX296_PGHPOS                                   IMX296_REG_16BIT(0x3239)
135 #define IMX296_PGVPOS                                   IMX296_REG_16BIT(0x323c)
136 #define IMX296_PGHPSTEP                                 IMX296_REG_8BIT(0x323e)
137 #define IMX296_PGVPSTEP                                 IMX296_REG_8BIT(0x323f)
138 #define IMX296_PGHPNUM                                  IMX296_REG_8BIT(0x3240)
139 #define IMX296_PGVPNUM                                  IMX296_REG_8BIT(0x3241)
140 #define IMX296_PGDATA1                                  IMX296_REG_16BIT(0x3244)
141 #define IMX296_PGDATA2                                  IMX296_REG_16BIT(0x3246)
142 #define IMX296_PGHGSTEP                                 IMX296_REG_8BIT(0x3249)
143 #define IMX296_BLKLEVEL                                 IMX296_REG_16BIT(0x3254)
144
145 #define IMX296_FID0_ROI                                 IMX296_REG_8BIT(0x3300)
146 #define IMX296_FID0_ROIH1ON                             BIT(0)
147 #define IMX296_FID0_ROIV1ON                             BIT(1)
148 #define IMX296_FID0_ROIPH1                              IMX296_REG_16BIT(0x3310)
149 #define IMX296_FID0_ROIPV1                              IMX296_REG_16BIT(0x3312)
150 #define IMX296_FID0_ROIWH1                              IMX296_REG_16BIT(0x3314)
151 #define IMX296_FID0_ROIWH1_MIN                          80
152 #define IMX296_FID0_ROIWV1                              IMX296_REG_16BIT(0x3316)
153 #define IMX296_FID0_ROIWV1_MIN                          4
154
155 #define IMX296_CM_HSST_STARTTMG                         IMX296_REG_16BIT(0x4018)
156 #define IMX296_CM_HSST_ENDTMG                           IMX296_REG_16BIT(0x401a)
157 #define IMX296_DA_HSST_STARTTMG                         IMX296_REG_16BIT(0x404d)
158 #define IMX296_DA_HSST_ENDTMG                           IMX296_REG_16BIT(0x4050)
159 #define IMX296_LM_HSST_STARTTMG                         IMX296_REG_16BIT(0x4094)
160 #define IMX296_LM_HSST_ENDTMG                           IMX296_REG_16BIT(0x4096)
161 #define IMX296_SST_SIEASTA1_SET                         IMX296_REG_8BIT(0x40c9)
162 #define IMX296_SST_SIEASTA1PRE_1U                       IMX296_REG_16BIT(0x40cc)
163 #define IMX296_SST_SIEASTA1PRE_1D                       IMX296_REG_16BIT(0x40ce)
164 #define IMX296_SST_SIEASTA1PRE_2U                       IMX296_REG_16BIT(0x40d0)
165 #define IMX296_SST_SIEASTA1PRE_2D                       IMX296_REG_16BIT(0x40d2)
166 #define IMX296_HSST                                     IMX296_REG_8BIT(0x40dc)
167 #define IMX296_HSST_EN                                  BIT(2)
168
169 #define IMX296_CKREQSEL                                 IMX296_REG_8BIT(0x4101)
170 #define IMX296_CKREQSEL_HS                              BIT(2)
171 #define IMX296_GTTABLENUM                               IMX296_REG_8BIT(0x4114)
172 #define IMX296_CTRL418C                                 IMX296_REG_8BIT(0x418c)
173
174 struct imx296_clk_params {
175         unsigned int freq;
176         u8 incksel[4];
177         u8 ctrl418c;
178 };
179
180 static const struct imx296_clk_params imx296_clk_params[] = {
181         { 37125000, { 0x80, 0x0b, 0x80, 0x08 }, 116 },
182         { 54000000, { 0xb0, 0x0f, 0xb0, 0x0c }, 168 },
183         { 74250000, { 0x80, 0x0f, 0x80, 0x0c }, 232 },
184 };
185
186 static const char * const imx296_supply_names[] = {
187         "dvdd",
188         "ovdd",
189         "avdd",
190 };
191
192 struct imx296 {
193         struct device *dev;
194         struct clk *clk;
195         struct regulator_bulk_data supplies[ARRAY_SIZE(imx296_supply_names)];
196         struct gpio_desc *reset;
197         struct regmap *regmap;
198
199         const struct imx296_clk_params *clk_params;
200         bool mono;
201
202         bool streaming;                 /* Protected by ctrls.lock */
203
204         struct v4l2_subdev subdev;
205         struct media_pad pad;
206
207         struct v4l2_ctrl_handler ctrls;
208         struct v4l2_ctrl *hblank;
209         struct v4l2_ctrl *vblank;
210
211         struct mutex lock;              /* Protects format and crop */
212         struct v4l2_mbus_framefmt format;
213         struct v4l2_rect crop;
214 };
215
216 static inline struct imx296 *to_imx296(struct v4l2_subdev *sd)
217 {
218         return container_of(sd, struct imx296, subdev);
219 }
220
221 static int imx296_read(struct imx296 *sensor, u32 addr)
222 {
223         u8 data[3] = { 0, 0, 0 };
224         int ret;
225
226         ret = regmap_raw_read(sensor->regmap, addr & IMX296_REG_ADDR_MASK, data,
227                               (addr >> IMX296_REG_SIZE_SHIFT) & 3);
228         if (ret < 0)
229                 return ret;
230
231         return (data[2] << 16) | (data[1] << 8) | data[0];
232 }
233
234 static int imx296_write(struct imx296 *sensor, u32 addr, u32 value, int *err)
235 {
236         u8 data[3] = { value & 0xff, (value >> 8) & 0xff, value >> 16 };
237         int ret;
238
239         if (err && *err)
240                 return *err;
241
242         ret = regmap_raw_write(sensor->regmap, addr & IMX296_REG_ADDR_MASK,
243                                data, (addr >> IMX296_REG_SIZE_SHIFT) & 3);
244         if (ret < 0) {
245                 dev_err(sensor->dev, "%u-bit write to 0x%04x failed: %d\n",
246                         ((addr >> IMX296_REG_SIZE_SHIFT) & 3) * 8,
247                         addr & IMX296_REG_ADDR_MASK, ret);
248                 if (err)
249                         *err = ret;
250         }
251
252         return ret;
253 }
254
255 /* -----------------------------------------------------------------------------
256  * Controls
257  */
258
259 static const char * const imx296_test_pattern_menu[] = {
260         "Disabled",
261         "Multiple Pixels",
262         "Sequence 1",
263         "Sequence 2",
264         "Gradient",
265         "Row",
266         "Column",
267         "Cross",
268         "Stripe",
269         "Checks",
270 };
271
272 static int imx296_s_ctrl(struct v4l2_ctrl *ctrl)
273 {
274         struct imx296 *sensor = container_of(ctrl->handler, struct imx296, ctrls);
275         unsigned int vmax;
276         int ret = 0;
277
278         if (!sensor->streaming)
279                 return 0;
280
281         switch (ctrl->id) {
282         case V4L2_CID_EXPOSURE:
283                 /* Clamp the exposure value to VMAX. */
284                 vmax = sensor->format.height + sensor->vblank->cur.val;
285                 ctrl->val = min_t(int, ctrl->val, vmax);
286                 imx296_write(sensor, IMX296_SHS1, vmax - ctrl->val, &ret);
287                 break;
288
289         case V4L2_CID_ANALOGUE_GAIN:
290                 imx296_write(sensor, IMX296_GAIN, ctrl->val, &ret);
291                 break;
292
293         case V4L2_CID_VBLANK:
294                 imx296_write(sensor, IMX296_VMAX,
295                              sensor->format.height + ctrl->val, &ret);
296                 break;
297
298         case V4L2_CID_TEST_PATTERN:
299                 if (ctrl->val) {
300                         imx296_write(sensor, IMX296_PGHPOS, 8, &ret);
301                         imx296_write(sensor, IMX296_PGVPOS, 8, &ret);
302                         imx296_write(sensor, IMX296_PGHPSTEP, 8, &ret);
303                         imx296_write(sensor, IMX296_PGVPSTEP, 8, &ret);
304                         imx296_write(sensor, IMX296_PGHPNUM, 100, &ret);
305                         imx296_write(sensor, IMX296_PGVPNUM, 100, &ret);
306                         imx296_write(sensor, IMX296_PGDATA1, 0x300, &ret);
307                         imx296_write(sensor, IMX296_PGDATA2, 0x100, &ret);
308                         imx296_write(sensor, IMX296_PGHGSTEP, 0, &ret);
309                         imx296_write(sensor, IMX296_BLKLEVEL, 0, &ret);
310                         imx296_write(sensor, IMX296_BLKLEVELAUTO,
311                                      IMX296_BLKLEVELAUTO_OFF, &ret);
312                         imx296_write(sensor, IMX296_PGCTRL,
313                                      IMX296_PGCTRL_REGEN |
314                                      IMX296_PGCTRL_CLKEN |
315                                      IMX296_PGCTRL_MODE(ctrl->val - 1), &ret);
316                 } else {
317                         imx296_write(sensor, IMX296_PGCTRL,
318                                      IMX296_PGCTRL_CLKEN, &ret);
319                         imx296_write(sensor, IMX296_BLKLEVEL, 0x3c, &ret);
320                         imx296_write(sensor, IMX296_BLKLEVELAUTO,
321                                      IMX296_BLKLEVELAUTO_ON, &ret);
322                 }
323                 break;
324
325         default:
326                 ret = -EINVAL;
327                 break;
328         }
329
330         return ret;
331 }
332
333 static const struct v4l2_ctrl_ops imx296_ctrl_ops = {
334         .s_ctrl = imx296_s_ctrl,
335 };
336
337 static int imx296_ctrls_init(struct imx296 *sensor)
338 {
339         struct v4l2_fwnode_device_properties props;
340         unsigned int hblank;
341         int ret;
342
343         ret = v4l2_fwnode_device_parse(sensor->dev, &props);
344         if (ret < 0)
345                 return ret;
346
347         v4l2_ctrl_handler_init(&sensor->ctrls, 9);
348
349         v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
350                           V4L2_CID_EXPOSURE, 1, 1048575, 1, 1104);
351         v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
352                           V4L2_CID_ANALOGUE_GAIN, IMX296_GAIN_MIN,
353                           IMX296_GAIN_MAX, 1, IMX296_GAIN_MIN);
354
355         /*
356          * Horizontal blanking is controlled through the HMAX register, which
357          * contains a line length in INCK clock units. The INCK frequency is
358          * fixed to 74.25 MHz. The HMAX value is currently fixed to 1100,
359          * convert it to a number of pixels based on the nominal pixel rate.
360          */
361         hblank = 1100 * 1188000000ULL / 10 / 74250000
362                - IMX296_PIXEL_ARRAY_WIDTH;
363         sensor->hblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
364                                            V4L2_CID_HBLANK, hblank, hblank, 1,
365                                            hblank);
366         if (sensor->hblank)
367                 sensor->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
368
369         sensor->vblank = v4l2_ctrl_new_std(&sensor->ctrls, &imx296_ctrl_ops,
370                                            V4L2_CID_VBLANK, 30,
371                                            1048575 - IMX296_PIXEL_ARRAY_HEIGHT,
372                                            1, 30);
373         /*
374          * The sensor calculates the MIPI timings internally to achieve a bit
375          * rate between 1122 and 1198 Mbps. The exact value is unfortunately not
376          * reported, at least according to the documentation. Report a nominal
377          * rate of 1188 Mbps as that is used by the datasheet in multiple
378          * examples.
379          */
380         v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE,
381                           1122000000 / 10, 1198000000 / 10, 1, 1188000000 / 10);
382         v4l2_ctrl_new_std_menu_items(&sensor->ctrls, &imx296_ctrl_ops,
383                                      V4L2_CID_TEST_PATTERN,
384                                      ARRAY_SIZE(imx296_test_pattern_menu) - 1,
385                                      0, 0, imx296_test_pattern_menu);
386
387         v4l2_ctrl_new_fwnode_properties(&sensor->ctrls, &imx296_ctrl_ops,
388                                         &props);
389
390         if (sensor->ctrls.error) {
391                 dev_err(sensor->dev, "failed to add controls (%d)\n",
392                         sensor->ctrls.error);
393                 v4l2_ctrl_handler_free(&sensor->ctrls);
394                 return sensor->ctrls.error;
395         }
396
397         sensor->subdev.ctrl_handler = &sensor->ctrls;
398
399         return 0;
400 }
401
402 /* -----------------------------------------------------------------------------
403  * V4L2 Subdev Operations
404  */
405
406 /*
407  * This table is extracted from vendor data that is entirely undocumented. The
408  * first register write is required to activate the CSI-2 output. The other
409  * entries may or may not be optional?
410  */
411 static const struct {
412         unsigned int reg;
413         unsigned int value;
414 } imx296_init_table[] = {
415         { IMX296_REG_8BIT(0x3005), 0xf0 },
416         { IMX296_REG_8BIT(0x309e), 0x04 },
417         { IMX296_REG_8BIT(0x30a0), 0x04 },
418         { IMX296_REG_8BIT(0x30a1), 0x3c },
419         { IMX296_REG_8BIT(0x30a4), 0x5f },
420         { IMX296_REG_8BIT(0x30a8), 0x91 },
421         { IMX296_REG_8BIT(0x30ac), 0x28 },
422         { IMX296_REG_8BIT(0x30af), 0x09 },
423         { IMX296_REG_8BIT(0x30df), 0x00 },
424         { IMX296_REG_8BIT(0x3165), 0x00 },
425         { IMX296_REG_8BIT(0x3169), 0x10 },
426         { IMX296_REG_8BIT(0x316a), 0x02 },
427         { IMX296_REG_8BIT(0x31c8), 0xf3 },      /* Exposure-related */
428         { IMX296_REG_8BIT(0x31d0), 0xf4 },      /* Exposure-related */
429         { IMX296_REG_8BIT(0x321a), 0x00 },
430         { IMX296_REG_8BIT(0x3226), 0x02 },
431         { IMX296_REG_8BIT(0x3256), 0x01 },
432         { IMX296_REG_8BIT(0x3541), 0x72 },
433         { IMX296_REG_8BIT(0x3516), 0x77 },
434         { IMX296_REG_8BIT(0x350b), 0x7f },
435         { IMX296_REG_8BIT(0x3758), 0xa3 },
436         { IMX296_REG_8BIT(0x3759), 0x00 },
437         { IMX296_REG_8BIT(0x375a), 0x85 },
438         { IMX296_REG_8BIT(0x375b), 0x00 },
439         { IMX296_REG_8BIT(0x3832), 0xf5 },
440         { IMX296_REG_8BIT(0x3833), 0x00 },
441         { IMX296_REG_8BIT(0x38a2), 0xf6 },
442         { IMX296_REG_8BIT(0x38a3), 0x00 },
443         { IMX296_REG_8BIT(0x3a00), 0x80 },
444         { IMX296_REG_8BIT(0x3d48), 0xa3 },
445         { IMX296_REG_8BIT(0x3d49), 0x00 },
446         { IMX296_REG_8BIT(0x3d4a), 0x85 },
447         { IMX296_REG_8BIT(0x3d4b), 0x00 },
448         { IMX296_REG_8BIT(0x400e), 0x58 },
449         { IMX296_REG_8BIT(0x4014), 0x1c },
450         { IMX296_REG_8BIT(0x4041), 0x2a },
451         { IMX296_REG_8BIT(0x40a2), 0x06 },
452         { IMX296_REG_8BIT(0x40c1), 0xf6 },
453         { IMX296_REG_8BIT(0x40c7), 0x0f },
454         { IMX296_REG_8BIT(0x40c8), 0x00 },
455         { IMX296_REG_8BIT(0x4174), 0x00 },
456 };
457
458 static int imx296_setup(struct imx296 *sensor)
459 {
460         const struct v4l2_mbus_framefmt *format = &sensor->format;
461         const struct v4l2_rect *crop = &sensor->crop;
462         unsigned int i;
463         int ret = 0;
464
465         for (i = 0; i < ARRAY_SIZE(imx296_init_table); ++i)
466                 imx296_write(sensor, imx296_init_table[i].reg,
467                              imx296_init_table[i].value, &ret);
468
469         if (crop->width != IMX296_PIXEL_ARRAY_WIDTH ||
470             crop->height != IMX296_PIXEL_ARRAY_HEIGHT) {
471                 imx296_write(sensor, IMX296_FID0_ROI,
472                              IMX296_FID0_ROIH1ON | IMX296_FID0_ROIV1ON, &ret);
473                 imx296_write(sensor, IMX296_FID0_ROIPH1, crop->left, &ret);
474                 imx296_write(sensor, IMX296_FID0_ROIPV1, crop->top, &ret);
475                 imx296_write(sensor, IMX296_FID0_ROIWH1, crop->width, &ret);
476                 imx296_write(sensor, IMX296_FID0_ROIWV1, crop->height, &ret);
477         } else {
478                 imx296_write(sensor, IMX296_FID0_ROI, 0, &ret);
479         }
480
481         imx296_write(sensor, IMX296_CTRL0D,
482                      (crop->width != format->width ?
483                       IMX296_CTRL0D_HADD_ON_BINNING : 0) |
484                      (crop->height != format->height ?
485                       IMX296_CTRL0D_WINMODE_FD_BINNING : 0),
486                      &ret);
487
488         /*
489          * HMAX and VMAX configure horizontal and vertical blanking by
490          * specifying the total line time and frame time respectively. The line
491          * time is specified in operational clock units (which appears to be the
492          * output of an internal PLL, fixed at 74.25 MHz regardless of the
493          * exernal clock frequency), while the frame time is specified as a
494          * number of lines.
495          *
496          * In the vertical direction the sensor outputs the following:
497          *
498          * - one line for the FS packet
499          * - two lines of embedded data (DT 0x12)
500          * - six null lines (DT 0x10)
501          * - four lines of vertical effective optical black (DT 0x37)
502          * - 8 to 1088 lines of active image data (RAW10, DT 0x2b)
503          * - one line for the FE packet
504          * - 16 or more lines of vertical blanking
505          */
506         imx296_write(sensor, IMX296_HMAX, 1100, &ret);
507         imx296_write(sensor, IMX296_VMAX,
508                      format->height + sensor->vblank->cur.val, &ret);
509
510         for (i = 0; i < ARRAY_SIZE(sensor->clk_params->incksel); ++i)
511                 imx296_write(sensor, IMX296_INCKSEL(i),
512                              sensor->clk_params->incksel[i], &ret);
513         imx296_write(sensor, IMX296_GTTABLENUM, 0xc5, &ret);
514         imx296_write(sensor, IMX296_CTRL418C, sensor->clk_params->ctrl418c,
515                      &ret);
516
517         imx296_write(sensor, IMX296_GAINDLY, IMX296_GAINDLY_NONE, &ret);
518         imx296_write(sensor, IMX296_BLKLEVEL, 0x03c, &ret);
519
520         if (ret < 0)
521                 return ret;
522
523         return __v4l2_ctrl_handler_setup(&sensor->ctrls);
524 }
525
526 static int imx296_stream_on(struct imx296 *sensor)
527 {
528         int ret = 0;
529
530         imx296_write(sensor, IMX296_CTRL00, 0, &ret);
531         usleep_range(2000, 5000);
532         imx296_write(sensor, IMX296_CTRL0A, 0, &ret);
533
534         return ret;
535 }
536
537 static int imx296_stream_off(struct imx296 *sensor)
538 {
539         int ret = 0;
540
541         imx296_write(sensor, IMX296_CTRL0A, IMX296_CTRL0A_XMSTA, &ret);
542         imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, &ret);
543
544         return ret;
545 }
546
547 static int imx296_s_stream(struct v4l2_subdev *sd, int enable)
548 {
549         struct imx296 *sensor = to_imx296(sd);
550         int ret;
551
552         if (!enable) {
553                 ret = imx296_stream_off(sensor);
554
555                 pm_runtime_mark_last_busy(sensor->dev);
556                 pm_runtime_put_autosuspend(sensor->dev);
557
558                 mutex_lock(sensor->ctrls.lock);
559                 sensor->streaming = false;
560                 mutex_unlock(sensor->ctrls.lock);
561
562                 return ret;
563         }
564
565         mutex_lock(sensor->ctrls.lock);
566
567         ret = pm_runtime_get_sync(sensor->dev);
568         if (ret < 0)
569                 goto done;
570
571         ret = imx296_setup(sensor);
572         if (ret < 0)
573                 goto done;
574
575         /*
576          * Set streaming to true to ensure __v4l2_ctrl_handler_setup() will set
577          * the controls. The flag is reset to false further down if an error
578          * occurs.
579          */
580         sensor->streaming = true;
581
582         ret = __v4l2_ctrl_handler_setup(&sensor->ctrls);
583         if (ret < 0)
584                 goto done;
585
586         ret = imx296_stream_on(sensor);
587
588 done:
589         if (ret < 0) {
590                 /*
591                  * In case of error, turn the power off synchronously as the
592                  * device likely has no other chance to recover.
593                  */
594                 pm_runtime_put_sync(sensor->dev);
595                 sensor->streaming = false;
596         }
597
598         mutex_unlock(sensor->ctrls.lock);
599
600         return ret;
601 }
602
603 static int imx296_enum_mbus_code(struct v4l2_subdev *sd,
604                                  struct v4l2_subdev_state *state,
605                                  struct v4l2_subdev_mbus_code_enum *code)
606 {
607         struct imx296 *sensor = to_imx296(sd);
608
609         if (code->index != 0)
610                 return -EINVAL;
611
612         code->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
613                    : MEDIA_BUS_FMT_SBGGR10_1X10;
614
615         return 0;
616 }
617
618 static int imx296_enum_frame_size(struct v4l2_subdev *sd,
619                                   struct v4l2_subdev_state *state,
620                                   struct v4l2_subdev_frame_size_enum *fse)
621 {
622         struct imx296 *sensor = to_imx296(sd);
623
624         if (fse->index >= 2 || fse->code != sensor->format.code)
625                 return -EINVAL;
626
627         fse->min_width = IMX296_PIXEL_ARRAY_WIDTH / (fse->index + 1);
628         fse->max_width = fse->min_width;
629         fse->min_height = IMX296_PIXEL_ARRAY_HEIGHT / (fse->index + 1);
630         fse->max_height = fse->min_height;
631
632         return 0;
633 }
634
635 static struct v4l2_mbus_framefmt *
636 imx296_get_pad_format(struct imx296 *sensor, struct v4l2_subdev_state *state,
637                       unsigned int pad, u32 which)
638 {
639         switch (which) {
640         case V4L2_SUBDEV_FORMAT_TRY:
641                 return v4l2_subdev_get_try_format(&sensor->subdev, state, pad);
642         case V4L2_SUBDEV_FORMAT_ACTIVE:
643                 return &sensor->format;
644         default:
645                 return NULL;
646         }
647 }
648
649 static struct v4l2_rect *
650 imx296_get_pad_crop(struct imx296 *sensor, struct v4l2_subdev_state *state,
651                     unsigned int pad, u32 which)
652 {
653         switch (which) {
654         case V4L2_SUBDEV_FORMAT_TRY:
655                 return v4l2_subdev_get_try_crop(&sensor->subdev, state, pad);
656         case V4L2_SUBDEV_FORMAT_ACTIVE:
657                 return &sensor->crop;
658         default:
659                 return NULL;
660         }
661 }
662
663 static int imx296_get_format(struct v4l2_subdev *sd,
664                              struct v4l2_subdev_state *state,
665                              struct v4l2_subdev_format *fmt)
666 {
667         struct imx296 *sensor = to_imx296(sd);
668
669         mutex_lock(&sensor->lock);
670         fmt->format = *imx296_get_pad_format(sensor, state, fmt->pad,
671                                              fmt->which);
672         mutex_unlock(&sensor->lock);
673
674         return 0;
675 }
676
677 static int imx296_set_format(struct v4l2_subdev *sd,
678                              struct v4l2_subdev_state *state,
679                              struct v4l2_subdev_format *fmt)
680 {
681         struct imx296 *sensor = to_imx296(sd);
682         struct v4l2_mbus_framefmt *format;
683         struct v4l2_rect *crop;
684
685         crop = imx296_get_pad_crop(sensor, state, fmt->pad, fmt->which);
686         format = imx296_get_pad_format(sensor, state, fmt->pad, fmt->which);
687
688         mutex_lock(&sensor->lock);
689
690         /*
691          * Binning is only allowed when cropping is disabled according to the
692          * documentation. This should be double-checked.
693          */
694         if (crop->width == IMX296_PIXEL_ARRAY_WIDTH &&
695             crop->height == IMX296_PIXEL_ARRAY_HEIGHT) {
696                 unsigned int width;
697                 unsigned int height;
698                 unsigned int hratio;
699                 unsigned int vratio;
700
701                 /* Clamp the width and height to avoid dividing by zero. */
702                 width = clamp_t(unsigned int, fmt->format.width,
703                                 crop->width / 2, crop->width);
704                 height = clamp_t(unsigned int, fmt->format.height,
705                                  crop->height / 2, crop->height);
706
707                 hratio = DIV_ROUND_CLOSEST(crop->width, width);
708                 vratio = DIV_ROUND_CLOSEST(crop->height, height);
709
710                 format->width = crop->width / hratio;
711                 format->height = crop->height / vratio;
712         } else {
713                 format->width = crop->width;
714                 format->height = crop->height;
715         }
716
717         format->code = sensor->mono ? MEDIA_BUS_FMT_Y10_1X10
718                      : MEDIA_BUS_FMT_SBGGR10_1X10;
719         format->field = V4L2_FIELD_NONE;
720         format->colorspace = V4L2_COLORSPACE_RAW;
721         format->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
722         format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
723         format->xfer_func = V4L2_XFER_FUNC_NONE;
724
725         fmt->format = *format;
726
727         mutex_unlock(&sensor->lock);
728
729         return 0;
730 }
731
732 static int imx296_get_selection(struct v4l2_subdev *sd,
733                                 struct v4l2_subdev_state *state,
734                                 struct v4l2_subdev_selection *sel)
735 {
736         struct imx296 *sensor = to_imx296(sd);
737
738         switch (sel->target) {
739         case V4L2_SEL_TGT_CROP:
740                 mutex_lock(&sensor->lock);
741                 sel->r = *imx296_get_pad_crop(sensor, state, sel->pad,
742                                               sel->which);
743                 mutex_unlock(&sensor->lock);
744                 break;
745
746         case V4L2_SEL_TGT_CROP_DEFAULT:
747         case V4L2_SEL_TGT_CROP_BOUNDS:
748         case V4L2_SEL_TGT_NATIVE_SIZE:
749                 sel->r.left = 0;
750                 sel->r.top = 0;
751                 sel->r.width = IMX296_PIXEL_ARRAY_WIDTH;
752                 sel->r.height = IMX296_PIXEL_ARRAY_HEIGHT;
753                 break;
754
755         default:
756                 return -EINVAL;
757         }
758
759         return 0;
760 }
761
762 static int imx296_set_selection(struct v4l2_subdev *sd,
763                                 struct v4l2_subdev_state *state,
764                                 struct v4l2_subdev_selection *sel)
765 {
766         struct imx296 *sensor = to_imx296(sd);
767         struct v4l2_mbus_framefmt *format;
768         struct v4l2_rect *crop;
769         struct v4l2_rect rect;
770
771         if (sel->target != V4L2_SEL_TGT_CROP)
772                 return -EINVAL;
773
774         /*
775          * Clamp the crop rectangle boundaries and align them to a multiple of 4
776          * pixels to satisfy hardware requirements.
777          */
778         rect.left = clamp(ALIGN(sel->r.left, 4), 0,
779                           IMX296_PIXEL_ARRAY_WIDTH - IMX296_FID0_ROIWH1_MIN);
780         rect.top = clamp(ALIGN(sel->r.top, 4), 0,
781                           IMX296_PIXEL_ARRAY_HEIGHT - IMX296_FID0_ROIWV1_MIN);
782         rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 4),
783                              IMX296_FID0_ROIWH1_MIN, IMX296_PIXEL_ARRAY_WIDTH);
784         rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 4),
785                               IMX296_FID0_ROIWV1_MIN, IMX296_PIXEL_ARRAY_HEIGHT);
786
787         rect.width = min_t(unsigned int, rect.width,
788                            IMX296_PIXEL_ARRAY_WIDTH - rect.left);
789         rect.height = min_t(unsigned int, rect.height,
790                             IMX296_PIXEL_ARRAY_HEIGHT - rect.top);
791
792         crop = imx296_get_pad_crop(sensor, state, sel->pad, sel->which);
793
794         mutex_lock(&sensor->lock);
795
796         if (rect.width != crop->width || rect.height != crop->height) {
797                 /*
798                  * Reset the output image size if the crop rectangle size has
799                  * been modified.
800                  */
801                 format = imx296_get_pad_format(sensor, state, sel->pad,
802                                                sel->which);
803                 format->width = rect.width;
804                 format->height = rect.height;
805         }
806
807         *crop = rect;
808         sel->r = rect;
809
810         mutex_unlock(&sensor->lock);
811
812         return 0;
813 }
814
815 static int imx296_init_cfg(struct v4l2_subdev *sd,
816                            struct v4l2_subdev_state *state)
817 {
818         struct v4l2_subdev_selection sel = {
819                 .target = V4L2_SEL_TGT_CROP,
820                 .which = state ? V4L2_SUBDEV_FORMAT_TRY
821                        : V4L2_SUBDEV_FORMAT_ACTIVE,
822                 .r.width = IMX296_PIXEL_ARRAY_WIDTH,
823                 .r.height = IMX296_PIXEL_ARRAY_HEIGHT,
824         };
825         struct v4l2_subdev_format format = {
826                 .which = state ? V4L2_SUBDEV_FORMAT_TRY
827                        : V4L2_SUBDEV_FORMAT_ACTIVE,
828                 .format = {
829                         .width = IMX296_PIXEL_ARRAY_WIDTH,
830                         .height = IMX296_PIXEL_ARRAY_HEIGHT,
831                 },
832         };
833
834         imx296_set_selection(sd, state, &sel);
835         imx296_set_format(sd, state, &format);
836
837         return 0;
838 }
839
840 static const struct v4l2_subdev_video_ops imx296_subdev_video_ops = {
841         .s_stream = imx296_s_stream,
842 };
843
844 static const struct v4l2_subdev_pad_ops imx296_subdev_pad_ops = {
845         .enum_mbus_code = imx296_enum_mbus_code,
846         .enum_frame_size = imx296_enum_frame_size,
847         .get_fmt = imx296_get_format,
848         .set_fmt = imx296_set_format,
849         .get_selection = imx296_get_selection,
850         .set_selection = imx296_set_selection,
851         .init_cfg = imx296_init_cfg,
852 };
853
854 static const struct v4l2_subdev_ops imx296_subdev_ops = {
855         .video = &imx296_subdev_video_ops,
856         .pad = &imx296_subdev_pad_ops,
857 };
858
859 /* -----------------------------------------------------------------------------
860  * Power management
861  */
862
863 static int imx296_power_on(struct imx296 *sensor)
864 {
865         int ret;
866
867         ret = regulator_bulk_enable(ARRAY_SIZE(sensor->supplies),
868                                     sensor->supplies);
869         if (ret < 0)
870                 return ret;
871
872         udelay(1);
873
874         ret = gpiod_direction_output(sensor->reset, 0);
875         if (ret < 0)
876                 goto err_supply;
877
878         udelay(1);
879
880         ret = clk_prepare_enable(sensor->clk);
881         if (ret < 0)
882                 goto err_reset;
883
884         /*
885          * The documentation doesn't explicitly say how much time is required
886          * after providing a clock and before starting I2C communication. It
887          * mentions a delay of 20µs in 4-wire mode, but tests showed that a
888          * delay of 100µs resulted in I2C communication failures, while 500µs
889          * seems to be enough. Be conservative.
890          */
891         usleep_range(1000, 2000);
892
893         return 0;
894
895 err_reset:
896         gpiod_direction_output(sensor->reset, 1);
897 err_supply:
898         regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
899         return ret;
900 }
901
902 static void imx296_power_off(struct imx296 *sensor)
903 {
904         clk_disable_unprepare(sensor->clk);
905         gpiod_direction_output(sensor->reset, 1);
906         regulator_bulk_disable(ARRAY_SIZE(sensor->supplies), sensor->supplies);
907 }
908
909 static int __maybe_unused imx296_runtime_resume(struct device *dev)
910 {
911         struct i2c_client *client = to_i2c_client(dev);
912         struct v4l2_subdev *subdev = i2c_get_clientdata(client);
913         struct imx296 *sensor = to_imx296(subdev);
914
915         return imx296_power_on(sensor);
916 }
917
918 static int __maybe_unused imx296_runtime_suspend(struct device *dev)
919 {
920         struct i2c_client *client = to_i2c_client(dev);
921         struct v4l2_subdev *subdev = i2c_get_clientdata(client);
922         struct imx296 *sensor = to_imx296(subdev);
923
924         imx296_power_off(sensor);
925
926         return 0;
927 }
928
929 static const struct dev_pm_ops imx296_pm_ops = {
930         SET_RUNTIME_PM_OPS(imx296_runtime_suspend, imx296_runtime_resume, NULL)
931 };
932
933 /* -----------------------------------------------------------------------------
934  * Probe & Remove
935  */
936
937 static int imx296_read_temperature(struct imx296 *sensor, int *temp)
938 {
939         int tmdout;
940         int ret;
941
942         ret = imx296_write(sensor, IMX296_TMDCTRL, IMX296_TMDCTRL_LATCH, NULL);
943         if (ret < 0)
944                 return ret;
945
946         tmdout = imx296_read(sensor, IMX296_TMDOUT) & IMX296_TMDOUT_MASK;
947         if (tmdout < 0)
948                 return tmdout;
949
950         /* T(°C) = 246.312 - 0.304 * TMDOUT */;
951         *temp = 246312 - 304 * tmdout;
952
953         return imx296_write(sensor, IMX296_TMDCTRL, 0, NULL);
954 }
955
956 static int imx296_identify_model(struct imx296 *sensor)
957 {
958         unsigned int model;
959         int temp = 0;
960         int ret;
961
962         /*
963          * While most registers can be read when the sensor is in standby, this
964          * is not the case of the sensor info register :-(
965          */
966         ret = imx296_write(sensor, IMX296_CTRL00, 0, NULL);
967         if (ret < 0) {
968                 dev_err(sensor->dev,
969                         "failed to get sensor out of standby (%d)\n", ret);
970                 return ret;
971         }
972
973         ret = imx296_read(sensor, IMX296_SENSOR_INFO);
974         if (ret < 0) {
975                 dev_err(sensor->dev, "failed to read sensor information (%d)\n",
976                         ret);
977                 goto done;
978         }
979
980         model = (ret >> 6) & 0x1ff;
981
982         switch (model) {
983         case 296:
984                 sensor->mono = ret & IMX296_SENSOR_INFO_MONO;
985                 break;
986         /*
987          * The IMX297 seems to share features with the IMX296, it may be
988          * possible to support it in the same driver.
989          */
990         case 297:
991         default:
992                 dev_err(sensor->dev, "invalid device model 0x%04x\n", ret);
993                 ret = -ENODEV;
994                 goto done;
995         }
996
997         ret = imx296_read_temperature(sensor, &temp);
998         if (ret < 0)
999                 goto done;
1000
1001         dev_info(sensor->dev, "found IMX%u%s (%u.%uC)\n", model,
1002                  sensor->mono ? "LL" : "LQ", temp / 1000, (temp / 100) % 10);
1003
1004 done:
1005         imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, NULL);
1006         return ret;
1007 }
1008
1009 static const struct regmap_config imx296_regmap_config = {
1010         .reg_bits = 16,
1011         .val_bits = 8,
1012
1013         .wr_table = &(const struct regmap_access_table) {
1014                 .no_ranges = (const struct regmap_range[]) {
1015                         {
1016                                 .range_min = IMX296_SENSOR_INFO & 0xffff,
1017                                 .range_max = (IMX296_SENSOR_INFO & 0xffff) + 1,
1018                         },
1019                 },
1020                 .n_no_ranges = 1,
1021         },
1022 };
1023
1024 static int imx296_probe(struct i2c_client *client)
1025 {
1026         struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1027         unsigned long clk_rate;
1028         struct imx296 *sensor;
1029         unsigned int i;
1030         int ret;
1031
1032         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1033                 dev_warn(&adapter->dev,
1034                          "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1035                 return -EIO;
1036         }
1037
1038         sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
1039         if (!sensor)
1040                 return -ENOMEM;
1041
1042         sensor->dev = &client->dev;
1043
1044         mutex_init(&sensor->lock);
1045
1046         /* Acquire resources. */
1047         for (i = 0; i < ARRAY_SIZE(sensor->supplies); ++i)
1048                 sensor->supplies[i].supply = imx296_supply_names[i];
1049
1050         ret = devm_regulator_bulk_get(sensor->dev, ARRAY_SIZE(sensor->supplies),
1051                                       sensor->supplies);
1052         if (ret) {
1053                 dev_err_probe(sensor->dev, ret, "failed to get supplies\n");
1054                 goto err_mutex;
1055         }
1056
1057         sensor->reset = devm_gpiod_get_optional(sensor->dev, "reset",
1058                                                 GPIOD_OUT_HIGH);
1059         if (IS_ERR(sensor->reset)) {
1060                 ret = PTR_ERR(sensor->reset);
1061                 dev_err_probe(sensor->dev, ret, "failed to get reset GPIO\n");
1062                 goto err_mutex;
1063         }
1064
1065         sensor->clk = devm_clk_get(sensor->dev, "inck");
1066         if (IS_ERR(sensor->clk)) {
1067                 ret = PTR_ERR(sensor->clk);
1068                 dev_err_probe(sensor->dev, ret, "failed to get clock\n");
1069                 goto err_mutex;
1070         }
1071
1072         clk_rate = clk_get_rate(sensor->clk);
1073         for (i = 0; i < ARRAY_SIZE(imx296_clk_params); ++i) {
1074                 if (clk_rate == imx296_clk_params[i].freq) {
1075                         sensor->clk_params = &imx296_clk_params[i];
1076                         break;
1077                 }
1078         }
1079
1080         if (!sensor->clk_params) {
1081                 dev_err(sensor->dev, "unsupported clock rate %lu\n", clk_rate);
1082                 ret = -EINVAL;
1083                 goto err_mutex;
1084         }
1085
1086         sensor->regmap = devm_regmap_init_i2c(client, &imx296_regmap_config);
1087         if (IS_ERR(sensor->regmap)) {
1088                 ret = PTR_ERR(sensor->regmap);
1089                 goto err_mutex;
1090         }
1091
1092         /*
1093          * Enable power management. The driver supports runtime PM, but needs to
1094          * work when runtime PM is disabled in the kernel. To that end, power
1095          * the sensor on manually here, identify it, and fully initialize it.
1096          */
1097         ret = imx296_power_on(sensor);
1098         if (ret < 0)
1099                 goto err_mutex;
1100
1101         ret = imx296_identify_model(sensor);
1102         if (ret < 0)
1103                 goto err_power;
1104
1105         /* Initialize the V4L2 subdev, controls and media entity. */
1106         v4l2_i2c_subdev_init(&sensor->subdev, client, &imx296_subdev_ops);
1107
1108         ret = imx296_ctrls_init(sensor);
1109         if (ret < 0)
1110                 goto err_power;
1111
1112         sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1113         sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
1114         sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1115         ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
1116         if (ret < 0)
1117                 goto err_ctrls;
1118
1119         imx296_init_cfg(&sensor->subdev, NULL);
1120
1121         /*
1122          * Enable runtime PM. As the device has been powered manually, mark it
1123          * as active, and increase the usage count without resuming the device.
1124          */
1125         pm_runtime_set_active(sensor->dev);
1126         pm_runtime_get_noresume(sensor->dev);
1127         pm_runtime_enable(sensor->dev);
1128
1129         ret = v4l2_async_register_subdev(&sensor->subdev);
1130         if (ret < 0)
1131                 goto err_pm;
1132
1133         /*
1134          * Finally, enable autosuspend and decrease the usage count. The device
1135          * will get suspended after the autosuspend delay, turning the power
1136          * off.
1137          */
1138         pm_runtime_set_autosuspend_delay(sensor->dev, 1000);
1139         pm_runtime_use_autosuspend(sensor->dev);
1140         pm_runtime_put_autosuspend(sensor->dev);
1141
1142         return 0;
1143
1144 err_pm:
1145         pm_runtime_disable(sensor->dev);
1146         pm_runtime_put_noidle(sensor->dev);
1147         media_entity_cleanup(&sensor->subdev.entity);
1148 err_ctrls:
1149         v4l2_ctrl_handler_free(&sensor->ctrls);
1150 err_power:
1151         imx296_power_off(sensor);
1152 err_mutex:
1153         mutex_destroy(&sensor->lock);
1154         return ret;
1155 }
1156
1157 static int imx296_remove(struct i2c_client *client)
1158 {
1159         struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1160         struct imx296 *sensor = to_imx296(subdev);
1161
1162         v4l2_async_unregister_subdev(subdev);
1163         media_entity_cleanup(&subdev->entity);
1164         v4l2_ctrl_handler_free(&sensor->ctrls);
1165
1166         /*
1167          * Disable runtime PM. In case runtime PM is disabled in the kernel,
1168          * make sure to turn power off manually.
1169          */
1170         pm_runtime_disable(sensor->dev);
1171         if (!pm_runtime_status_suspended(sensor->dev))
1172                 imx296_power_off(sensor);
1173         pm_runtime_set_suspended(sensor->dev);
1174
1175         mutex_destroy(&sensor->lock);
1176
1177         return 0;
1178 }
1179
1180 static const struct of_device_id imx296_of_match[] = {
1181         { .compatible = "sony,imx296" },
1182         { /* sentinel */ },
1183 };
1184 MODULE_DEVICE_TABLE(of, imx296_of_match);
1185
1186 static struct i2c_driver imx296_i2c_driver = {
1187         .driver = {
1188                 .of_match_table = imx296_of_match,
1189                 .name = "imx296",
1190                 .pm = &imx296_pm_ops
1191         },
1192         .probe_new = imx296_probe,
1193         .remove = imx296_remove,
1194 };
1195
1196 module_i2c_driver(imx296_i2c_driver);
1197
1198 MODULE_DESCRIPTION("Sony IMX296 Camera driver");
1199 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1200 MODULE_LICENSE("GPL v2");