1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <linux/acpi.h>
6 #include <linux/delay.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/regulator/consumer.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-fwnode.h>
14 #include <asm/unaligned.h>
16 #define IMX258_REG_VALUE_08BIT 1
17 #define IMX258_REG_VALUE_16BIT 2
19 #define IMX258_REG_MODE_SELECT 0x0100
20 #define IMX258_MODE_STANDBY 0x00
21 #define IMX258_MODE_STREAMING 0x01
24 #define IMX258_REG_CHIP_ID 0x0016
25 #define IMX258_CHIP_ID 0x0258
27 /* V_TIMING internal */
28 #define IMX258_VTS_30FPS 0x0c50
29 #define IMX258_VTS_30FPS_2K 0x0638
30 #define IMX258_VTS_30FPS_VGA 0x034c
31 #define IMX258_VTS_MAX 65525
33 #define IMX258_REG_VTS 0x0340
35 /* Exposure control */
36 #define IMX258_REG_EXPOSURE 0x0202
37 #define IMX258_EXPOSURE_OFFSET 10
38 #define IMX258_EXPOSURE_MIN 4
39 #define IMX258_EXPOSURE_STEP 1
40 #define IMX258_EXPOSURE_DEFAULT 0x640
41 #define IMX258_EXPOSURE_MAX (IMX258_VTS_MAX - IMX258_EXPOSURE_OFFSET)
43 /* HBLANK control - read only */
44 #define IMX258_PPL_DEFAULT 5352
46 /* Analog gain control */
47 #define IMX258_REG_ANALOG_GAIN 0x0204
48 #define IMX258_ANA_GAIN_MIN 0
49 #define IMX258_ANA_GAIN_MAX 480
50 #define IMX258_ANA_GAIN_STEP 1
51 #define IMX258_ANA_GAIN_DEFAULT 0x0
53 /* Digital gain control */
54 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e
55 #define IMX258_REG_R_DIGITAL_GAIN 0x0210
56 #define IMX258_REG_B_DIGITAL_GAIN 0x0212
57 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214
58 #define IMX258_DGTL_GAIN_MIN 0
59 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */
60 #define IMX258_DGTL_GAIN_DEFAULT 1024
61 #define IMX258_DGTL_GAIN_STEP 1
64 #define IMX258_REG_HDR 0x0220
65 #define IMX258_HDR_ON BIT(0)
66 #define IMX258_REG_HDR_RATIO 0x0222
67 #define IMX258_HDR_RATIO_MIN 0
68 #define IMX258_HDR_RATIO_MAX 5
69 #define IMX258_HDR_RATIO_STEP 1
70 #define IMX258_HDR_RATIO_DEFAULT 0x0
72 /* Test Pattern Control */
73 #define IMX258_REG_TEST_PATTERN 0x0600
75 #define IMX258_CLK_BLANK_STOP 0x4040
78 #define REG_MIRROR_FLIP_CONTROL 0x0101
79 #define REG_CONFIG_MIRROR_FLIP 0x03
80 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02
82 /* IMX258 native and active pixel array size. */
83 #define IMX258_NATIVE_WIDTH 4224U
84 #define IMX258_NATIVE_HEIGHT 3192U
85 #define IMX258_PIXEL_ARRAY_LEFT 8U
86 #define IMX258_PIXEL_ARRAY_TOP 16U
87 #define IMX258_PIXEL_ARRAY_WIDTH 4208U
88 #define IMX258_PIXEL_ARRAY_HEIGHT 3120U
95 struct imx258_reg_list {
97 const struct imx258_reg *regs;
100 #define IMX258_LANE_CONFIGS 2
101 #define IMX258_2_LANE_MODE 0
102 #define IMX258_4_LANE_MODE 1
104 /* Link frequency config */
105 struct imx258_link_freq_config {
109 /* PLL registers for this link frequency */
110 struct imx258_reg_list reg_list[IMX258_LANE_CONFIGS];
113 /* Mode : resolution and related config&values */
124 /* Index of Link frequency config to be used */
126 /* Default register values */
127 struct imx258_reg_list reg_list;
129 /* Analog crop rectangle. */
130 struct v4l2_rect crop;
133 /* 4208x3120 needs 1267Mbps/lane, 4 lanes. Use that rate on 2 lanes as well */
134 static const struct imx258_reg mipi_1267mbps_19_2mhz_2l[] = {
156 static const struct imx258_reg mipi_1267mbps_19_2mhz_4l[] = {
178 static const struct imx258_reg mipi_1272mbps_24mhz_2l[] = {
200 static const struct imx258_reg mipi_1272mbps_24mhz_4l[] = {
222 static const struct imx258_reg mipi_640mbps_19_2mhz_2l[] = {
244 static const struct imx258_reg mipi_640mbps_19_2mhz_4l[] = {
266 static const struct imx258_reg mipi_642mbps_24mhz_2l[] = {
288 static const struct imx258_reg mipi_642mbps_24mhz_4l[] = {
310 static const struct imx258_reg mode_4208x3120_regs[] = {
422 static const struct imx258_reg mode_2104_1560_regs[] = {
534 static const struct imx258_reg mode_1048_780_regs[] = {
646 static const char * const imx258_test_pattern_menu[] = {
649 "Eight Vertical Colour Bars",
650 "Colour Bars With Fade to Grey",
651 "Pseudorandom Sequence (PN9)",
654 /* regulator supplies */
655 static const char * const imx258_supply_name[] = {
656 /* Supplies can be enabled in any order */
657 "vana", /* Analog (2.8V) supply */
658 "vdig", /* Digital Core (1.05V) supply */
659 "vif", /* IF (1.8V) supply */
662 #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_name)
665 IMX258_LINK_FREQ_1267MBPS,
666 IMX258_LINK_FREQ_640MBPS,
670 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
671 * data rate => double data rate;
672 * number of lanes => (configurable 2 or 4);
673 * bits per pixel => 10
675 static u64 link_freq_to_pixel_rate(u64 f, unsigned int nlanes)
683 /* Menu items for LINK_FREQ V4L2 control */
684 /* Configurations for supported link frequencies */
685 #define IMX258_LINK_FREQ_634MHZ 633600000ULL
686 #define IMX258_LINK_FREQ_320MHZ 320000000ULL
688 static const s64 link_freq_menu_items_19_2[] = {
689 IMX258_LINK_FREQ_634MHZ,
690 IMX258_LINK_FREQ_320MHZ,
693 /* Configurations for supported link frequencies */
694 #define IMX258_LINK_FREQ_636MHZ 636000000ULL
695 #define IMX258_LINK_FREQ_321MHZ 321000000ULL
697 static const s64 link_freq_menu_items_24[] = {
698 IMX258_LINK_FREQ_636MHZ,
699 IMX258_LINK_FREQ_321MHZ,
702 /* Link frequency configs */
703 static const struct imx258_link_freq_config link_freq_configs_19_2[] = {
704 [IMX258_LINK_FREQ_1267MBPS] = {
705 .pixels_per_line = IMX258_PPL_DEFAULT,
707 [IMX258_2_LANE_MODE] = {
708 .num_of_regs = ARRAY_SIZE(mipi_1267mbps_19_2mhz_2l),
709 .regs = mipi_1267mbps_19_2mhz_2l,
711 [IMX258_4_LANE_MODE] = {
712 .num_of_regs = ARRAY_SIZE(mipi_1267mbps_19_2mhz_4l),
713 .regs = mipi_1267mbps_19_2mhz_4l,
717 [IMX258_LINK_FREQ_640MBPS] = {
718 .pixels_per_line = IMX258_PPL_DEFAULT,
720 [IMX258_2_LANE_MODE] = {
721 .num_of_regs = ARRAY_SIZE(mipi_640mbps_19_2mhz_2l),
722 .regs = mipi_640mbps_19_2mhz_2l,
724 [IMX258_4_LANE_MODE] = {
725 .num_of_regs = ARRAY_SIZE(mipi_640mbps_19_2mhz_4l),
726 .regs = mipi_640mbps_19_2mhz_4l,
732 static const struct imx258_link_freq_config link_freq_configs_24[] = {
733 [IMX258_LINK_FREQ_1267MBPS] = {
734 .pixels_per_line = IMX258_PPL_DEFAULT,
736 [IMX258_2_LANE_MODE] = {
737 .num_of_regs = ARRAY_SIZE(mipi_1272mbps_24mhz_2l),
738 .regs = mipi_1272mbps_24mhz_2l,
740 [IMX258_4_LANE_MODE] = {
741 .num_of_regs = ARRAY_SIZE(mipi_1272mbps_24mhz_4l),
742 .regs = mipi_1272mbps_24mhz_4l,
746 [IMX258_LINK_FREQ_640MBPS] = {
747 .pixels_per_line = IMX258_PPL_DEFAULT,
749 [IMX258_2_LANE_MODE] = {
750 .num_of_regs = ARRAY_SIZE(mipi_642mbps_24mhz_2l),
751 .regs = mipi_642mbps_24mhz_2l,
753 [IMX258_4_LANE_MODE] = {
754 .num_of_regs = ARRAY_SIZE(mipi_642mbps_24mhz_4l),
755 .regs = mipi_642mbps_24mhz_4l,
762 static const struct imx258_mode supported_modes[] = {
766 .vts_def = IMX258_VTS_30FPS,
767 .vts_min = IMX258_VTS_30FPS,
769 .num_of_regs = ARRAY_SIZE(mode_4208x3120_regs),
770 .regs = mode_4208x3120_regs,
772 .link_freq_index = IMX258_LINK_FREQ_1267MBPS,
774 .left = IMX258_PIXEL_ARRAY_LEFT,
775 .top = IMX258_PIXEL_ARRAY_TOP,
783 .vts_def = IMX258_VTS_30FPS_2K,
784 .vts_min = IMX258_VTS_30FPS_2K,
786 .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs),
787 .regs = mode_2104_1560_regs,
789 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
791 .left = IMX258_PIXEL_ARRAY_LEFT,
792 .top = IMX258_PIXEL_ARRAY_TOP,
800 .vts_def = IMX258_VTS_30FPS_VGA,
801 .vts_min = IMX258_VTS_30FPS_VGA,
803 .num_of_regs = ARRAY_SIZE(mode_1048_780_regs),
804 .regs = mode_1048_780_regs,
806 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
808 .left = IMX258_PIXEL_ARRAY_LEFT,
809 .top = IMX258_PIXEL_ARRAY_TOP,
817 struct v4l2_subdev sd;
818 struct media_pad pad;
820 struct v4l2_ctrl_handler ctrl_handler;
822 struct v4l2_ctrl *link_freq;
823 struct v4l2_ctrl *pixel_rate;
824 struct v4l2_ctrl *vblank;
825 struct v4l2_ctrl *hblank;
826 struct v4l2_ctrl *exposure;
829 const struct imx258_mode *cur_mode;
831 const struct imx258_link_freq_config *link_freq_configs;
832 const s64 *link_freq_menu_items;
834 unsigned int csi2_flags;
837 * Mutex for serialized access:
838 * Protect sensor module set pad format and start/stop streaming safely.
842 /* Streaming on/off */
846 struct regulator_bulk_data supplies[IMX258_NUM_SUPPLIES];
849 static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd)
851 return container_of(_sd, struct imx258, sd);
854 /* Read registers up to 2 at a time */
855 static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val)
857 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
858 struct i2c_msg msgs[2];
859 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
860 u8 data_buf[4] = { 0, };
866 /* Write register address */
867 msgs[0].addr = client->addr;
869 msgs[0].len = ARRAY_SIZE(addr_buf);
870 msgs[0].buf = addr_buf;
872 /* Read data from register */
873 msgs[1].addr = client->addr;
874 msgs[1].flags = I2C_M_RD;
876 msgs[1].buf = &data_buf[4 - len];
878 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
879 if (ret != ARRAY_SIZE(msgs))
882 *val = get_unaligned_be32(data_buf);
887 /* Write registers up to 2 at a time */
888 static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val)
890 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
896 put_unaligned_be16(reg, buf);
897 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
898 if (i2c_master_send(client, buf, len + 2) != len + 2)
904 /* Write a list of registers */
905 static int imx258_write_regs(struct imx258 *imx258,
906 const struct imx258_reg *regs, u32 len)
908 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
912 for (i = 0; i < len; i++) {
913 ret = imx258_write_reg(imx258, regs[i].address, 1,
918 "Failed to write reg 0x%4.4x. error = %d\n",
919 regs[i].address, ret);
928 /* Open sub-device */
929 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
931 struct v4l2_mbus_framefmt *try_fmt =
932 v4l2_subdev_get_try_format(sd, fh->state, 0);
933 struct v4l2_rect *try_crop;
935 /* Initialize try_fmt */
936 try_fmt->width = supported_modes[0].width;
937 try_fmt->height = supported_modes[0].height;
938 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
939 try_fmt->field = V4L2_FIELD_NONE;
941 /* Initialize try_crop */
942 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
943 try_crop->left = IMX258_PIXEL_ARRAY_LEFT;
944 try_crop->top = IMX258_PIXEL_ARRAY_TOP;
945 try_crop->width = IMX258_PIXEL_ARRAY_WIDTH;
946 try_crop->height = IMX258_PIXEL_ARRAY_HEIGHT;
951 static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val)
955 ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN,
956 IMX258_REG_VALUE_16BIT,
960 ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN,
961 IMX258_REG_VALUE_16BIT,
965 ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN,
966 IMX258_REG_VALUE_16BIT,
970 ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN,
971 IMX258_REG_VALUE_16BIT,
978 static void imx258_adjust_exposure_range(struct imx258 *imx258)
980 int exposure_max, exposure_def;
982 /* Honour the VBLANK limits when setting exposure. */
983 exposure_max = imx258->cur_mode->height + imx258->vblank->val -
984 IMX258_EXPOSURE_OFFSET;
985 exposure_def = min(exposure_max, imx258->exposure->val);
986 __v4l2_ctrl_modify_range(imx258->exposure, imx258->exposure->minimum,
987 exposure_max, imx258->exposure->step,
991 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)
993 struct imx258 *imx258 =
994 container_of(ctrl->handler, struct imx258, ctrl_handler);
995 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
999 * The VBLANK control may change the limits of usable exposure, so check
1000 * and adjust if necessary.
1002 if (ctrl->id == V4L2_CID_VBLANK)
1003 imx258_adjust_exposure_range(imx258);
1006 * Applying V4L2 control value only happens
1007 * when power is up for streaming
1009 if (pm_runtime_get_if_in_use(&client->dev) == 0)
1013 case V4L2_CID_ANALOGUE_GAIN:
1014 ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN,
1015 IMX258_REG_VALUE_16BIT,
1018 case V4L2_CID_EXPOSURE:
1019 ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE,
1020 IMX258_REG_VALUE_16BIT,
1023 case V4L2_CID_DIGITAL_GAIN:
1024 ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT,
1027 case V4L2_CID_TEST_PATTERN:
1028 ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN,
1029 IMX258_REG_VALUE_16BIT,
1031 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
1032 IMX258_REG_VALUE_08BIT,
1033 !ctrl->val ? REG_CONFIG_MIRROR_FLIP :
1034 REG_CONFIG_FLIP_TEST_PATTERN);
1036 case V4L2_CID_WIDE_DYNAMIC_RANGE:
1038 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
1039 IMX258_REG_VALUE_08BIT,
1040 IMX258_HDR_RATIO_MIN);
1042 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
1043 IMX258_REG_VALUE_08BIT,
1047 ret = imx258_write_reg(imx258, IMX258_REG_HDR_RATIO,
1048 IMX258_REG_VALUE_08BIT,
1049 BIT(IMX258_HDR_RATIO_MAX));
1052 case V4L2_CID_VBLANK:
1053 ret = imx258_write_reg(imx258, IMX258_REG_VTS,
1054 IMX258_REG_VALUE_16BIT,
1055 imx258->cur_mode->height + ctrl->val);
1058 dev_info(&client->dev,
1059 "ctrl(id:0x%x,val:0x%x) is not handled\n",
1060 ctrl->id, ctrl->val);
1065 pm_runtime_put(&client->dev);
1070 static const struct v4l2_ctrl_ops imx258_ctrl_ops = {
1071 .s_ctrl = imx258_set_ctrl,
1074 static int imx258_enum_mbus_code(struct v4l2_subdev *sd,
1075 struct v4l2_subdev_state *sd_state,
1076 struct v4l2_subdev_mbus_code_enum *code)
1078 /* Only one bayer order(GRBG) is supported */
1079 if (code->index > 0)
1082 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1087 static int imx258_enum_frame_size(struct v4l2_subdev *sd,
1088 struct v4l2_subdev_state *sd_state,
1089 struct v4l2_subdev_frame_size_enum *fse)
1091 if (fse->index >= ARRAY_SIZE(supported_modes))
1094 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
1097 fse->min_width = supported_modes[fse->index].width;
1098 fse->max_width = fse->min_width;
1099 fse->min_height = supported_modes[fse->index].height;
1100 fse->max_height = fse->min_height;
1105 static void imx258_update_pad_format(const struct imx258_mode *mode,
1106 struct v4l2_subdev_format *fmt)
1108 fmt->format.width = mode->width;
1109 fmt->format.height = mode->height;
1110 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
1111 fmt->format.field = V4L2_FIELD_NONE;
1114 static int __imx258_get_pad_format(struct imx258 *imx258,
1115 struct v4l2_subdev_state *sd_state,
1116 struct v4l2_subdev_format *fmt)
1118 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1119 fmt->format = *v4l2_subdev_get_try_format(&imx258->sd,
1123 imx258_update_pad_format(imx258->cur_mode, fmt);
1128 static int imx258_get_pad_format(struct v4l2_subdev *sd,
1129 struct v4l2_subdev_state *sd_state,
1130 struct v4l2_subdev_format *fmt)
1132 struct imx258 *imx258 = to_imx258(sd);
1135 mutex_lock(&imx258->mutex);
1136 ret = __imx258_get_pad_format(imx258, sd_state, fmt);
1137 mutex_unlock(&imx258->mutex);
1142 static int imx258_set_pad_format(struct v4l2_subdev *sd,
1143 struct v4l2_subdev_state *sd_state,
1144 struct v4l2_subdev_format *fmt)
1146 struct imx258 *imx258 = to_imx258(sd);
1147 const struct imx258_mode *mode;
1148 struct v4l2_mbus_framefmt *framefmt;
1155 mutex_lock(&imx258->mutex);
1157 /* Only one raw bayer(GBRG) order is supported */
1158 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
1160 mode = v4l2_find_nearest_size(supported_modes,
1161 ARRAY_SIZE(supported_modes), width, height,
1162 fmt->format.width, fmt->format.height);
1163 imx258_update_pad_format(mode, fmt);
1164 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1165 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
1166 *framefmt = fmt->format;
1168 imx258->cur_mode = mode;
1169 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index);
1171 link_freq = imx258->link_freq_menu_items[mode->link_freq_index];
1172 pixel_rate = link_freq_to_pixel_rate(link_freq, imx258->nlanes);
1173 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate, pixel_rate);
1174 /* Update limits and set FPS to default */
1175 vblank_def = imx258->cur_mode->vts_def -
1176 imx258->cur_mode->height;
1177 vblank_min = imx258->cur_mode->vts_min -
1178 imx258->cur_mode->height;
1179 __v4l2_ctrl_modify_range(
1180 imx258->vblank, vblank_min,
1181 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1183 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def);
1185 imx258->link_freq_configs[mode->link_freq_index].pixels_per_line
1186 - imx258->cur_mode->width;
1187 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
1188 h_blank, 1, h_blank);
1191 mutex_unlock(&imx258->mutex);
1196 static const struct v4l2_rect *
1197 __imx258_get_pad_crop(struct imx258 *imx258,
1198 struct v4l2_subdev_state *sd_state,
1199 unsigned int pad, enum v4l2_subdev_format_whence which)
1202 case V4L2_SUBDEV_FORMAT_TRY:
1203 return v4l2_subdev_get_try_crop(&imx258->sd, sd_state, pad);
1204 case V4L2_SUBDEV_FORMAT_ACTIVE:
1205 return &imx258->cur_mode->crop;
1211 static int imx258_get_selection(struct v4l2_subdev *sd,
1212 struct v4l2_subdev_state *sd_state,
1213 struct v4l2_subdev_selection *sel)
1215 switch (sel->target) {
1216 case V4L2_SEL_TGT_CROP: {
1217 struct imx258 *imx258 = to_imx258(sd);
1219 mutex_lock(&imx258->mutex);
1220 sel->r = *__imx258_get_pad_crop(imx258, sd_state, sel->pad,
1222 mutex_unlock(&imx258->mutex);
1227 case V4L2_SEL_TGT_NATIVE_SIZE:
1230 sel->r.width = IMX258_NATIVE_WIDTH;
1231 sel->r.height = IMX258_NATIVE_HEIGHT;
1235 case V4L2_SEL_TGT_CROP_DEFAULT:
1236 case V4L2_SEL_TGT_CROP_BOUNDS:
1237 sel->r.left = IMX258_PIXEL_ARRAY_LEFT;
1238 sel->r.top = IMX258_PIXEL_ARRAY_TOP;
1239 sel->r.width = IMX258_PIXEL_ARRAY_WIDTH;
1240 sel->r.height = IMX258_PIXEL_ARRAY_HEIGHT;
1248 /* Start streaming */
1249 static int imx258_start_streaming(struct imx258 *imx258)
1251 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1252 const struct imx258_reg_list *reg_list;
1253 const struct imx258_link_freq_config *link_freq_cfg;
1254 int ret, link_freq_index;
1257 link_freq_index = imx258->cur_mode->link_freq_index;
1258 link_freq_cfg = &imx258->link_freq_configs[link_freq_index];
1259 reg_list = &link_freq_cfg->reg_list[imx258->nlanes == 2 ? 0 : 1];
1260 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1262 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1266 ret = imx258_write_reg(imx258, IMX258_CLK_BLANK_STOP,
1267 IMX258_REG_VALUE_08BIT,
1268 imx258->csi2_flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK ?
1271 dev_err(&client->dev, "%s failed to set clock lane mode\n", __func__);
1275 /* Apply default values of current mode */
1276 reg_list = &imx258->cur_mode->reg_list;
1277 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1279 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1283 /* Set Orientation be 180 degree */
1284 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
1285 IMX258_REG_VALUE_08BIT, REG_CONFIG_MIRROR_FLIP);
1287 dev_err(&client->dev, "%s failed to set orientation\n",
1292 /* Apply customized values from user */
1293 ret = __v4l2_ctrl_handler_setup(imx258->sd.ctrl_handler);
1297 /* set stream on register */
1298 return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1299 IMX258_REG_VALUE_08BIT,
1300 IMX258_MODE_STREAMING);
1303 /* Stop streaming */
1304 static int imx258_stop_streaming(struct imx258 *imx258)
1306 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1309 /* set stream off register */
1310 ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1311 IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY);
1313 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1316 * Return success even if it was an error, as there is nothing the
1317 * caller can do about it.
1322 static int imx258_power_on(struct device *dev)
1324 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1325 struct imx258 *imx258 = to_imx258(sd);
1328 ret = regulator_bulk_enable(IMX258_NUM_SUPPLIES,
1331 dev_err(dev, "%s: failed to enable regulators\n",
1336 ret = clk_prepare_enable(imx258->clk);
1338 dev_err(dev, "failed to enable clock\n");
1339 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1345 static int imx258_power_off(struct device *dev)
1347 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1348 struct imx258 *imx258 = to_imx258(sd);
1350 clk_disable_unprepare(imx258->clk);
1351 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1356 static int imx258_set_stream(struct v4l2_subdev *sd, int enable)
1358 struct imx258 *imx258 = to_imx258(sd);
1359 struct i2c_client *client = v4l2_get_subdevdata(sd);
1362 mutex_lock(&imx258->mutex);
1363 if (imx258->streaming == enable) {
1364 mutex_unlock(&imx258->mutex);
1369 ret = pm_runtime_resume_and_get(&client->dev);
1374 * Apply default & customized values
1375 * and then start streaming.
1377 ret = imx258_start_streaming(imx258);
1381 imx258_stop_streaming(imx258);
1382 pm_runtime_put(&client->dev);
1385 imx258->streaming = enable;
1386 mutex_unlock(&imx258->mutex);
1391 pm_runtime_put(&client->dev);
1393 mutex_unlock(&imx258->mutex);
1398 static int __maybe_unused imx258_suspend(struct device *dev)
1400 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1401 struct imx258 *imx258 = to_imx258(sd);
1403 if (imx258->streaming)
1404 imx258_stop_streaming(imx258);
1409 static int __maybe_unused imx258_resume(struct device *dev)
1411 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1412 struct imx258 *imx258 = to_imx258(sd);
1415 if (imx258->streaming) {
1416 ret = imx258_start_streaming(imx258);
1424 imx258_stop_streaming(imx258);
1425 imx258->streaming = 0;
1429 /* Verify chip ID */
1430 static int imx258_identify_module(struct imx258 *imx258)
1432 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1436 ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID,
1437 IMX258_REG_VALUE_16BIT, &val);
1439 dev_err(&client->dev, "failed to read chip id %x\n",
1444 if (val != IMX258_CHIP_ID) {
1445 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1446 IMX258_CHIP_ID, val);
1453 static const struct v4l2_subdev_video_ops imx258_video_ops = {
1454 .s_stream = imx258_set_stream,
1457 static const struct v4l2_subdev_pad_ops imx258_pad_ops = {
1458 .enum_mbus_code = imx258_enum_mbus_code,
1459 .get_fmt = imx258_get_pad_format,
1460 .set_fmt = imx258_set_pad_format,
1461 .enum_frame_size = imx258_enum_frame_size,
1462 .get_selection = imx258_get_selection,
1465 static const struct v4l2_subdev_ops imx258_subdev_ops = {
1466 .video = &imx258_video_ops,
1467 .pad = &imx258_pad_ops,
1470 static const struct v4l2_subdev_internal_ops imx258_internal_ops = {
1471 .open = imx258_open,
1474 /* Initialize control handlers */
1475 static int imx258_init_controls(struct imx258 *imx258)
1477 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1478 struct v4l2_fwnode_device_properties props;
1479 struct v4l2_ctrl_handler *ctrl_hdlr;
1480 struct v4l2_ctrl *vflip, *hflip;
1487 ctrl_hdlr = &imx258->ctrl_handler;
1488 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 13);
1492 mutex_init(&imx258->mutex);
1493 ctrl_hdlr->lock = &imx258->mutex;
1494 imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1497 ARRAY_SIZE(link_freq_menu_items_19_2) - 1,
1499 imx258->link_freq_menu_items);
1501 if (imx258->link_freq)
1502 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1504 /* The driver only supports one bayer order and flips by default. */
1505 hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1506 V4L2_CID_HFLIP, 1, 1, 1, 1);
1508 hflip->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1510 vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1511 V4L2_CID_VFLIP, 1, 1, 1, 1);
1513 vflip->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1516 link_freq_to_pixel_rate(imx258->link_freq_menu_items[0],
1519 link_freq_to_pixel_rate(imx258->link_freq_menu_items[1],
1521 /* By default, PIXEL_RATE is read only */
1522 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1523 V4L2_CID_PIXEL_RATE,
1524 pixel_rate_min, pixel_rate_max,
1528 vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height;
1529 vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height;
1530 imx258->vblank = v4l2_ctrl_new_std(
1531 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_VBLANK,
1533 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1536 imx258->hblank = v4l2_ctrl_new_std(
1537 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_HBLANK,
1538 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1539 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1541 IMX258_PPL_DEFAULT - imx258->cur_mode->width);
1544 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1546 imx258->exposure = v4l2_ctrl_new_std(
1547 ctrl_hdlr, &imx258_ctrl_ops,
1548 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN,
1549 IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP,
1550 IMX258_EXPOSURE_DEFAULT);
1552 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1553 IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX,
1554 IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT);
1556 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1557 IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX,
1558 IMX258_DGTL_GAIN_STEP,
1559 IMX258_DGTL_GAIN_DEFAULT);
1561 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_WIDE_DYNAMIC_RANGE,
1562 0, 1, 1, IMX258_HDR_RATIO_DEFAULT);
1564 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx258_ctrl_ops,
1565 V4L2_CID_TEST_PATTERN,
1566 ARRAY_SIZE(imx258_test_pattern_menu) - 1,
1567 0, 0, imx258_test_pattern_menu);
1569 if (ctrl_hdlr->error) {
1570 ret = ctrl_hdlr->error;
1571 dev_err(&client->dev, "%s control init failed (%d)\n",
1576 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1580 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx258_ctrl_ops,
1585 imx258->sd.ctrl_handler = ctrl_hdlr;
1590 v4l2_ctrl_handler_free(ctrl_hdlr);
1591 mutex_destroy(&imx258->mutex);
1596 static void imx258_free_controls(struct imx258 *imx258)
1598 v4l2_ctrl_handler_free(imx258->sd.ctrl_handler);
1599 mutex_destroy(&imx258->mutex);
1602 static int imx258_get_regulators(struct imx258 *imx258,
1603 struct i2c_client *client)
1607 for (i = 0; i < IMX258_NUM_SUPPLIES; i++)
1608 imx258->supplies[i].supply = imx258_supply_name[i];
1610 return devm_regulator_bulk_get(&client->dev,
1611 IMX258_NUM_SUPPLIES,
1615 static int imx258_probe(struct i2c_client *client)
1617 struct imx258 *imx258;
1618 struct fwnode_handle *endpoint;
1619 struct v4l2_fwnode_endpoint ep = {
1620 .bus_type = V4L2_MBUS_CSI2_DPHY
1625 imx258 = devm_kzalloc(&client->dev, sizeof(*imx258), GFP_KERNEL);
1629 ret = imx258_get_regulators(imx258, client);
1633 imx258->clk = devm_clk_get_optional(&client->dev, NULL);
1634 if (IS_ERR(imx258->clk))
1635 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1636 "error getting clock\n");
1638 dev_dbg(&client->dev,
1639 "no clock provided, using clock-frequency property\n");
1641 device_property_read_u32(&client->dev, "clock-frequency", &val);
1642 } else if (IS_ERR(imx258->clk)) {
1643 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1644 "error getting clock\n");
1646 val = clk_get_rate(imx258->clk);
1651 imx258->link_freq_configs = link_freq_configs_19_2;
1652 imx258->link_freq_menu_items = link_freq_menu_items_19_2;
1655 imx258->link_freq_configs = link_freq_configs_24;
1656 imx258->link_freq_menu_items = link_freq_menu_items_24;
1659 dev_err(&client->dev, "input clock frequency of %u not supported\n",
1664 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
1666 dev_err(&client->dev, "Endpoint node not found\n");
1670 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep);
1671 fwnode_handle_put(endpoint);
1672 if (ret == -ENXIO) {
1673 dev_err(&client->dev, "Unsupported bus type, should be CSI2\n");
1674 goto error_endpoint_poweron;
1676 dev_err(&client->dev, "Parsing endpoint node failed\n");
1677 goto error_endpoint_poweron;
1680 /* Get number of data lanes */
1681 imx258->nlanes = ep.bus.mipi_csi2.num_data_lanes;
1682 if (imx258->nlanes != 2 && imx258->nlanes != 4) {
1683 dev_err(&client->dev, "Invalid data lanes: %u\n",
1686 goto error_endpoint_poweron;
1689 imx258->csi2_flags = ep.bus.mipi_csi2.flags;
1691 /* Initialize subdev */
1692 v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops);
1694 /* Will be powered off via pm_runtime_idle */
1695 ret = imx258_power_on(&client->dev);
1697 goto error_endpoint_poweron;
1699 /* Check module identity */
1700 ret = imx258_identify_module(imx258);
1702 goto error_identify;
1704 /* Set default mode to max resolution */
1705 imx258->cur_mode = &supported_modes[0];
1707 ret = imx258_init_controls(imx258);
1709 goto error_identify;
1711 /* Initialize subdev */
1712 imx258->sd.internal_ops = &imx258_internal_ops;
1713 imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1714 imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1716 /* Initialize source pad */
1717 imx258->pad.flags = MEDIA_PAD_FL_SOURCE;
1719 ret = media_entity_pads_init(&imx258->sd.entity, 1, &imx258->pad);
1721 goto error_handler_free;
1723 ret = v4l2_async_register_subdev_sensor(&imx258->sd);
1725 goto error_media_entity;
1727 pm_runtime_set_active(&client->dev);
1728 pm_runtime_enable(&client->dev);
1729 pm_runtime_idle(&client->dev);
1734 media_entity_cleanup(&imx258->sd.entity);
1737 imx258_free_controls(imx258);
1740 imx258_power_off(&client->dev);
1742 error_endpoint_poweron:
1743 v4l2_fwnode_endpoint_free(&ep);
1748 static void imx258_remove(struct i2c_client *client)
1750 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1751 struct imx258 *imx258 = to_imx258(sd);
1753 v4l2_async_unregister_subdev(sd);
1754 media_entity_cleanup(&sd->entity);
1755 imx258_free_controls(imx258);
1757 pm_runtime_disable(&client->dev);
1758 if (!pm_runtime_status_suspended(&client->dev))
1759 imx258_power_off(&client->dev);
1760 pm_runtime_set_suspended(&client->dev);
1763 static const struct dev_pm_ops imx258_pm_ops = {
1764 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend, imx258_resume)
1765 SET_RUNTIME_PM_OPS(imx258_power_off, imx258_power_on, NULL)
1769 static const struct acpi_device_id imx258_acpi_ids[] = {
1774 MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids);
1777 static const struct of_device_id imx258_dt_ids[] = {
1778 { .compatible = "sony,imx258" },
1781 MODULE_DEVICE_TABLE(of, imx258_dt_ids);
1783 static struct i2c_driver imx258_i2c_driver = {
1786 .pm = &imx258_pm_ops,
1787 .acpi_match_table = ACPI_PTR(imx258_acpi_ids),
1788 .of_match_table = imx258_dt_ids,
1790 .probe = imx258_probe,
1791 .remove = imx258_remove,
1794 module_i2c_driver(imx258_i2c_driver);
1796 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>");
1797 MODULE_AUTHOR("Chiang, Alan");
1798 MODULE_AUTHOR("Chen, Jason");
1799 MODULE_DESCRIPTION("Sony IMX258 sensor driver");
1800 MODULE_LICENSE("GPL v2");