1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <linux/acpi.h>
6 #include <linux/delay.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/regulator/consumer.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-fwnode.h>
14 #include <asm/unaligned.h>
16 #define IMX258_REG_VALUE_08BIT 1
17 #define IMX258_REG_VALUE_16BIT 2
19 #define IMX258_REG_MODE_SELECT 0x0100
20 #define IMX258_MODE_STANDBY 0x00
21 #define IMX258_MODE_STREAMING 0x01
24 #define IMX258_REG_CHIP_ID 0x0016
25 #define IMX258_CHIP_ID 0x0258
27 /* V_TIMING internal */
28 #define IMX258_VTS_30FPS 0x0c50
29 #define IMX258_VTS_30FPS_2K 0x0638
30 #define IMX258_VTS_30FPS_VGA 0x034c
31 #define IMX258_VTS_MAX 0xffff
33 #define IMX258_REG_VTS 0x0340
35 /* Exposure control */
36 #define IMX258_REG_EXPOSURE 0x0202
37 #define IMX258_EXPOSURE_OFFSET 10
38 #define IMX258_EXPOSURE_MIN 4
39 #define IMX258_EXPOSURE_STEP 1
40 #define IMX258_EXPOSURE_DEFAULT 0x640
41 #define IMX258_EXPOSURE_MAX (IMX258_VTS_MAX - IMX258_EXPOSURE_OFFSET)
43 /* HBLANK control - read only */
44 #define IMX258_PPL_DEFAULT 5352
46 /* Analog gain control */
47 #define IMX258_REG_ANALOG_GAIN 0x0204
48 #define IMX258_ANA_GAIN_MIN 0
49 #define IMX258_ANA_GAIN_MAX 480
50 #define IMX258_ANA_GAIN_STEP 1
51 #define IMX258_ANA_GAIN_DEFAULT 0x0
53 /* Digital gain control */
54 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e
55 #define IMX258_REG_R_DIGITAL_GAIN 0x0210
56 #define IMX258_REG_B_DIGITAL_GAIN 0x0212
57 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214
58 #define IMX258_DGTL_GAIN_MIN 0
59 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */
60 #define IMX258_DGTL_GAIN_DEFAULT 1024
61 #define IMX258_DGTL_GAIN_STEP 1
64 #define IMX258_REG_HDR 0x0220
65 #define IMX258_HDR_ON BIT(0)
66 #define IMX258_REG_HDR_RATIO 0x0222
67 #define IMX258_HDR_RATIO_MIN 0
68 #define IMX258_HDR_RATIO_MAX 5
69 #define IMX258_HDR_RATIO_STEP 1
70 #define IMX258_HDR_RATIO_DEFAULT 0x0
72 /* Test Pattern Control */
73 #define IMX258_REG_TEST_PATTERN 0x0600
76 #define REG_MIRROR_FLIP_CONTROL 0x0101
77 #define REG_CONFIG_MIRROR_FLIP 0x03
78 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02
85 struct imx258_reg_list {
87 const struct imx258_reg *regs;
90 #define IMX258_LANE_CONFIGS 2
91 #define IMX258_2_LANE_MODE 0
92 #define IMX258_4_LANE_MODE 1
94 /* Link frequency config */
95 struct imx258_link_freq_config {
99 /* PLL registers for this link frequency */
100 struct imx258_reg_list reg_list[IMX258_LANE_CONFIGS];
103 /* Mode : resolution and related config&values */
114 /* Index of Link frequency config to be used */
116 /* Default register values */
117 struct imx258_reg_list reg_list;
120 /* 4208x3120 needs 1267Mbps/lane, 4 lanes. Use that rate on 2 lanes as well */
121 static const struct imx258_reg mipi_1267mbps_19_2mhz_2l[] = {
143 static const struct imx258_reg mipi_1267mbps_19_2mhz_4l[] = {
165 static const struct imx258_reg mipi_1272mbps_24mhz_2l[] = {
187 static const struct imx258_reg mipi_1272mbps_24mhz_4l[] = {
209 static const struct imx258_reg mipi_640mbps_19_2mhz_2l[] = {
231 static const struct imx258_reg mipi_640mbps_19_2mhz_4l[] = {
253 static const struct imx258_reg mipi_642mbps_24mhz_2l[] = {
275 static const struct imx258_reg mipi_642mbps_24mhz_4l[] = {
297 static const struct imx258_reg mode_4208x3120_regs[] = {
409 static const struct imx258_reg mode_2104_1560_regs[] = {
521 static const struct imx258_reg mode_1048_780_regs[] = {
633 static const char * const imx258_test_pattern_menu[] = {
636 "Eight Vertical Colour Bars",
637 "Colour Bars With Fade to Grey",
638 "Pseudorandom Sequence (PN9)",
641 /* regulator supplies */
642 static const char * const imx258_supply_name[] = {
643 /* Supplies can be enabled in any order */
644 "vana", /* Analog (2.8V) supply */
645 "vdig", /* Digital Core (1.05V) supply */
646 "vif", /* IF (1.8V) supply */
649 #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_name)
652 IMX258_LINK_FREQ_1267MBPS,
653 IMX258_LINK_FREQ_640MBPS,
657 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
658 * data rate => double data rate;
659 * number of lanes => (configurable 2 or 4);
660 * bits per pixel => 10
662 static u64 link_freq_to_pixel_rate(u64 f, unsigned int nlanes)
670 /* Menu items for LINK_FREQ V4L2 control */
671 /* Configurations for supported link frequencies */
672 #define IMX258_LINK_FREQ_634MHZ 633600000ULL
673 #define IMX258_LINK_FREQ_320MHZ 320000000ULL
675 static const s64 link_freq_menu_items_19_2[] = {
676 IMX258_LINK_FREQ_634MHZ,
677 IMX258_LINK_FREQ_320MHZ,
680 /* Configurations for supported link frequencies */
681 #define IMX258_LINK_FREQ_636MHZ 636000000ULL
682 #define IMX258_LINK_FREQ_321MHZ 321000000ULL
684 static const s64 link_freq_menu_items_24[] = {
685 IMX258_LINK_FREQ_636MHZ,
686 IMX258_LINK_FREQ_321MHZ,
689 /* Link frequency configs */
690 static const struct imx258_link_freq_config link_freq_configs_19_2[] = {
691 [IMX258_LINK_FREQ_1267MBPS] = {
692 .pixels_per_line = IMX258_PPL_DEFAULT,
694 [IMX258_2_LANE_MODE] = {
695 .num_of_regs = ARRAY_SIZE(mipi_1267mbps_19_2mhz_2l),
696 .regs = mipi_1267mbps_19_2mhz_2l,
698 [IMX258_4_LANE_MODE] = {
699 .num_of_regs = ARRAY_SIZE(mipi_1267mbps_19_2mhz_4l),
700 .regs = mipi_1267mbps_19_2mhz_4l,
704 [IMX258_LINK_FREQ_640MBPS] = {
705 .pixels_per_line = IMX258_PPL_DEFAULT,
707 [IMX258_2_LANE_MODE] = {
708 .num_of_regs = ARRAY_SIZE(mipi_640mbps_19_2mhz_2l),
709 .regs = mipi_640mbps_19_2mhz_2l,
711 [IMX258_4_LANE_MODE] = {
712 .num_of_regs = ARRAY_SIZE(mipi_640mbps_19_2mhz_4l),
713 .regs = mipi_640mbps_19_2mhz_4l,
719 static const struct imx258_link_freq_config link_freq_configs_24[] = {
720 [IMX258_LINK_FREQ_1267MBPS] = {
721 .pixels_per_line = IMX258_PPL_DEFAULT,
723 [IMX258_2_LANE_MODE] = {
724 .num_of_regs = ARRAY_SIZE(mipi_1272mbps_24mhz_2l),
725 .regs = mipi_1272mbps_24mhz_2l,
727 [IMX258_4_LANE_MODE] = {
728 .num_of_regs = ARRAY_SIZE(mipi_1272mbps_24mhz_4l),
729 .regs = mipi_1272mbps_24mhz_4l,
733 [IMX258_LINK_FREQ_640MBPS] = {
734 .pixels_per_line = IMX258_PPL_DEFAULT,
736 [IMX258_2_LANE_MODE] = {
737 .num_of_regs = ARRAY_SIZE(mipi_642mbps_24mhz_2l),
738 .regs = mipi_642mbps_24mhz_2l,
740 [IMX258_4_LANE_MODE] = {
741 .num_of_regs = ARRAY_SIZE(mipi_642mbps_24mhz_4l),
742 .regs = mipi_642mbps_24mhz_4l,
749 static const struct imx258_mode supported_modes[] = {
753 .vts_def = IMX258_VTS_30FPS,
754 .vts_min = IMX258_VTS_30FPS,
756 .num_of_regs = ARRAY_SIZE(mode_4208x3120_regs),
757 .regs = mode_4208x3120_regs,
759 .link_freq_index = IMX258_LINK_FREQ_1267MBPS,
764 .vts_def = IMX258_VTS_30FPS_2K,
765 .vts_min = IMX258_VTS_30FPS_2K,
767 .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs),
768 .regs = mode_2104_1560_regs,
770 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
775 .vts_def = IMX258_VTS_30FPS_VGA,
776 .vts_min = IMX258_VTS_30FPS_VGA,
778 .num_of_regs = ARRAY_SIZE(mode_1048_780_regs),
779 .regs = mode_1048_780_regs,
781 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
786 struct v4l2_subdev sd;
787 struct media_pad pad;
789 struct v4l2_ctrl_handler ctrl_handler;
791 struct v4l2_ctrl *link_freq;
792 struct v4l2_ctrl *pixel_rate;
793 struct v4l2_ctrl *vblank;
794 struct v4l2_ctrl *hblank;
795 struct v4l2_ctrl *exposure;
798 const struct imx258_mode *cur_mode;
800 const struct imx258_link_freq_config *link_freq_configs;
801 const s64 *link_freq_menu_items;
805 * Mutex for serialized access:
806 * Protect sensor module set pad format and start/stop streaming safely.
810 /* Streaming on/off */
814 struct regulator_bulk_data supplies[IMX258_NUM_SUPPLIES];
817 static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd)
819 return container_of(_sd, struct imx258, sd);
822 /* Read registers up to 2 at a time */
823 static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val)
825 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
826 struct i2c_msg msgs[2];
827 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
828 u8 data_buf[4] = { 0, };
834 /* Write register address */
835 msgs[0].addr = client->addr;
837 msgs[0].len = ARRAY_SIZE(addr_buf);
838 msgs[0].buf = addr_buf;
840 /* Read data from register */
841 msgs[1].addr = client->addr;
842 msgs[1].flags = I2C_M_RD;
844 msgs[1].buf = &data_buf[4 - len];
846 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
847 if (ret != ARRAY_SIZE(msgs))
850 *val = get_unaligned_be32(data_buf);
855 /* Write registers up to 2 at a time */
856 static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val)
858 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
864 put_unaligned_be16(reg, buf);
865 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
866 if (i2c_master_send(client, buf, len + 2) != len + 2)
872 /* Write a list of registers */
873 static int imx258_write_regs(struct imx258 *imx258,
874 const struct imx258_reg *regs, u32 len)
876 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
880 for (i = 0; i < len; i++) {
881 ret = imx258_write_reg(imx258, regs[i].address, 1,
886 "Failed to write reg 0x%4.4x. error = %d\n",
887 regs[i].address, ret);
896 /* Open sub-device */
897 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
899 struct v4l2_mbus_framefmt *try_fmt =
900 v4l2_subdev_get_try_format(sd, fh->state, 0);
902 /* Initialize try_fmt */
903 try_fmt->width = supported_modes[0].width;
904 try_fmt->height = supported_modes[0].height;
905 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
906 try_fmt->field = V4L2_FIELD_NONE;
911 static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val)
915 ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN,
916 IMX258_REG_VALUE_16BIT,
920 ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN,
921 IMX258_REG_VALUE_16BIT,
925 ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN,
926 IMX258_REG_VALUE_16BIT,
930 ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN,
931 IMX258_REG_VALUE_16BIT,
938 static void imx258_adjust_exposure_range(struct imx258 *imx258)
940 int exposure_max, exposure_def;
942 /* Honour the VBLANK limits when setting exposure. */
943 exposure_max = imx258->cur_mode->height + imx258->vblank->val -
944 IMX258_EXPOSURE_OFFSET;
945 exposure_def = min(exposure_max, imx258->exposure->val);
946 __v4l2_ctrl_modify_range(imx258->exposure, imx258->exposure->minimum,
947 exposure_max, imx258->exposure->step,
951 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)
953 struct imx258 *imx258 =
954 container_of(ctrl->handler, struct imx258, ctrl_handler);
955 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
959 * The VBLANK control may change the limits of usable exposure, so check
960 * and adjust if necessary.
962 if (ctrl->id == V4L2_CID_VBLANK)
963 imx258_adjust_exposure_range(imx258);
966 * Applying V4L2 control value only happens
967 * when power is up for streaming
969 if (pm_runtime_get_if_in_use(&client->dev) == 0)
973 case V4L2_CID_ANALOGUE_GAIN:
974 ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN,
975 IMX258_REG_VALUE_16BIT,
978 case V4L2_CID_EXPOSURE:
979 ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE,
980 IMX258_REG_VALUE_16BIT,
983 case V4L2_CID_DIGITAL_GAIN:
984 ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT,
987 case V4L2_CID_TEST_PATTERN:
988 ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN,
989 IMX258_REG_VALUE_16BIT,
991 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
992 IMX258_REG_VALUE_08BIT,
993 !ctrl->val ? REG_CONFIG_MIRROR_FLIP :
994 REG_CONFIG_FLIP_TEST_PATTERN);
996 case V4L2_CID_WIDE_DYNAMIC_RANGE:
998 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
999 IMX258_REG_VALUE_08BIT,
1000 IMX258_HDR_RATIO_MIN);
1002 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
1003 IMX258_REG_VALUE_08BIT,
1007 ret = imx258_write_reg(imx258, IMX258_REG_HDR_RATIO,
1008 IMX258_REG_VALUE_08BIT,
1009 BIT(IMX258_HDR_RATIO_MAX));
1012 case V4L2_CID_VBLANK:
1013 ret = imx258_write_reg(imx258, IMX258_REG_VTS,
1014 IMX258_REG_VALUE_16BIT,
1015 imx258->cur_mode->height + ctrl->val);
1018 dev_info(&client->dev,
1019 "ctrl(id:0x%x,val:0x%x) is not handled\n",
1020 ctrl->id, ctrl->val);
1025 pm_runtime_put(&client->dev);
1030 static const struct v4l2_ctrl_ops imx258_ctrl_ops = {
1031 .s_ctrl = imx258_set_ctrl,
1034 static int imx258_enum_mbus_code(struct v4l2_subdev *sd,
1035 struct v4l2_subdev_state *sd_state,
1036 struct v4l2_subdev_mbus_code_enum *code)
1038 /* Only one bayer order(GRBG) is supported */
1039 if (code->index > 0)
1042 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1047 static int imx258_enum_frame_size(struct v4l2_subdev *sd,
1048 struct v4l2_subdev_state *sd_state,
1049 struct v4l2_subdev_frame_size_enum *fse)
1051 if (fse->index >= ARRAY_SIZE(supported_modes))
1054 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
1057 fse->min_width = supported_modes[fse->index].width;
1058 fse->max_width = fse->min_width;
1059 fse->min_height = supported_modes[fse->index].height;
1060 fse->max_height = fse->min_height;
1065 static void imx258_update_pad_format(const struct imx258_mode *mode,
1066 struct v4l2_subdev_format *fmt)
1068 fmt->format.width = mode->width;
1069 fmt->format.height = mode->height;
1070 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
1071 fmt->format.field = V4L2_FIELD_NONE;
1074 static int __imx258_get_pad_format(struct imx258 *imx258,
1075 struct v4l2_subdev_state *sd_state,
1076 struct v4l2_subdev_format *fmt)
1078 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1079 fmt->format = *v4l2_subdev_get_try_format(&imx258->sd,
1083 imx258_update_pad_format(imx258->cur_mode, fmt);
1088 static int imx258_get_pad_format(struct v4l2_subdev *sd,
1089 struct v4l2_subdev_state *sd_state,
1090 struct v4l2_subdev_format *fmt)
1092 struct imx258 *imx258 = to_imx258(sd);
1095 mutex_lock(&imx258->mutex);
1096 ret = __imx258_get_pad_format(imx258, sd_state, fmt);
1097 mutex_unlock(&imx258->mutex);
1102 static int imx258_set_pad_format(struct v4l2_subdev *sd,
1103 struct v4l2_subdev_state *sd_state,
1104 struct v4l2_subdev_format *fmt)
1106 struct imx258 *imx258 = to_imx258(sd);
1107 const struct imx258_mode *mode;
1108 struct v4l2_mbus_framefmt *framefmt;
1115 mutex_lock(&imx258->mutex);
1117 /* Only one raw bayer(GBRG) order is supported */
1118 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
1120 mode = v4l2_find_nearest_size(supported_modes,
1121 ARRAY_SIZE(supported_modes), width, height,
1122 fmt->format.width, fmt->format.height);
1123 imx258_update_pad_format(mode, fmt);
1124 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1125 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
1126 *framefmt = fmt->format;
1128 imx258->cur_mode = mode;
1129 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index);
1131 link_freq = imx258->link_freq_menu_items[mode->link_freq_index];
1132 pixel_rate = link_freq_to_pixel_rate(link_freq, imx258->nlanes);
1133 __v4l2_ctrl_s_ctrl_int64(imx258->pixel_rate, pixel_rate);
1134 /* Update limits and set FPS to default */
1135 vblank_def = imx258->cur_mode->vts_def -
1136 imx258->cur_mode->height;
1137 vblank_min = imx258->cur_mode->vts_min -
1138 imx258->cur_mode->height;
1139 __v4l2_ctrl_modify_range(
1140 imx258->vblank, vblank_min,
1141 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1143 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def);
1145 imx258->link_freq_configs[mode->link_freq_index].pixels_per_line
1146 - imx258->cur_mode->width;
1147 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
1148 h_blank, 1, h_blank);
1151 mutex_unlock(&imx258->mutex);
1156 /* Start streaming */
1157 static int imx258_start_streaming(struct imx258 *imx258)
1159 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1160 const struct imx258_reg_list *reg_list;
1161 const struct imx258_link_freq_config *link_freq_cfg;
1162 int ret, link_freq_index;
1165 link_freq_index = imx258->cur_mode->link_freq_index;
1166 link_freq_cfg = &imx258->link_freq_configs[link_freq_index];
1167 reg_list = &link_freq_cfg->reg_list[imx258->nlanes == 2 ? 0 : 1];
1168 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1170 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1174 /* Apply default values of current mode */
1175 reg_list = &imx258->cur_mode->reg_list;
1176 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1178 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1182 /* Set Orientation be 180 degree */
1183 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
1184 IMX258_REG_VALUE_08BIT, REG_CONFIG_MIRROR_FLIP);
1186 dev_err(&client->dev, "%s failed to set orientation\n",
1191 /* Apply customized values from user */
1192 ret = __v4l2_ctrl_handler_setup(imx258->sd.ctrl_handler);
1196 /* set stream on register */
1197 return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1198 IMX258_REG_VALUE_08BIT,
1199 IMX258_MODE_STREAMING);
1202 /* Stop streaming */
1203 static int imx258_stop_streaming(struct imx258 *imx258)
1205 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1208 /* set stream off register */
1209 ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1210 IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY);
1212 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1215 * Return success even if it was an error, as there is nothing the
1216 * caller can do about it.
1221 static int imx258_power_on(struct device *dev)
1223 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1224 struct imx258 *imx258 = to_imx258(sd);
1227 ret = regulator_bulk_enable(IMX258_NUM_SUPPLIES,
1230 dev_err(dev, "%s: failed to enable regulators\n",
1235 ret = clk_prepare_enable(imx258->clk);
1237 dev_err(dev, "failed to enable clock\n");
1238 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1244 static int imx258_power_off(struct device *dev)
1246 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1247 struct imx258 *imx258 = to_imx258(sd);
1249 clk_disable_unprepare(imx258->clk);
1250 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1255 static int imx258_set_stream(struct v4l2_subdev *sd, int enable)
1257 struct imx258 *imx258 = to_imx258(sd);
1258 struct i2c_client *client = v4l2_get_subdevdata(sd);
1261 mutex_lock(&imx258->mutex);
1262 if (imx258->streaming == enable) {
1263 mutex_unlock(&imx258->mutex);
1268 ret = pm_runtime_resume_and_get(&client->dev);
1273 * Apply default & customized values
1274 * and then start streaming.
1276 ret = imx258_start_streaming(imx258);
1280 imx258_stop_streaming(imx258);
1281 pm_runtime_put(&client->dev);
1284 imx258->streaming = enable;
1285 mutex_unlock(&imx258->mutex);
1290 pm_runtime_put(&client->dev);
1292 mutex_unlock(&imx258->mutex);
1297 static int __maybe_unused imx258_suspend(struct device *dev)
1299 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1300 struct imx258 *imx258 = to_imx258(sd);
1302 if (imx258->streaming)
1303 imx258_stop_streaming(imx258);
1308 static int __maybe_unused imx258_resume(struct device *dev)
1310 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1311 struct imx258 *imx258 = to_imx258(sd);
1314 if (imx258->streaming) {
1315 ret = imx258_start_streaming(imx258);
1323 imx258_stop_streaming(imx258);
1324 imx258->streaming = 0;
1328 /* Verify chip ID */
1329 static int imx258_identify_module(struct imx258 *imx258)
1331 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1335 ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID,
1336 IMX258_REG_VALUE_16BIT, &val);
1338 dev_err(&client->dev, "failed to read chip id %x\n",
1343 if (val != IMX258_CHIP_ID) {
1344 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1345 IMX258_CHIP_ID, val);
1352 static const struct v4l2_subdev_video_ops imx258_video_ops = {
1353 .s_stream = imx258_set_stream,
1356 static const struct v4l2_subdev_pad_ops imx258_pad_ops = {
1357 .enum_mbus_code = imx258_enum_mbus_code,
1358 .get_fmt = imx258_get_pad_format,
1359 .set_fmt = imx258_set_pad_format,
1360 .enum_frame_size = imx258_enum_frame_size,
1363 static const struct v4l2_subdev_ops imx258_subdev_ops = {
1364 .video = &imx258_video_ops,
1365 .pad = &imx258_pad_ops,
1368 static const struct v4l2_subdev_internal_ops imx258_internal_ops = {
1369 .open = imx258_open,
1372 /* Initialize control handlers */
1373 static int imx258_init_controls(struct imx258 *imx258)
1375 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1376 struct v4l2_fwnode_device_properties props;
1377 struct v4l2_ctrl_handler *ctrl_hdlr;
1378 struct v4l2_ctrl *vflip, *hflip;
1385 ctrl_hdlr = &imx258->ctrl_handler;
1386 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 13);
1390 mutex_init(&imx258->mutex);
1391 ctrl_hdlr->lock = &imx258->mutex;
1392 imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1395 ARRAY_SIZE(link_freq_menu_items_19_2) - 1,
1397 imx258->link_freq_menu_items);
1399 if (imx258->link_freq)
1400 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1402 /* The driver only supports one bayer order and flips by default. */
1403 hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1404 V4L2_CID_HFLIP, 1, 1, 1, 1);
1406 hflip->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1408 vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1409 V4L2_CID_VFLIP, 1, 1, 1, 1);
1411 vflip->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1414 link_freq_to_pixel_rate(imx258->link_freq_menu_items[0],
1417 link_freq_to_pixel_rate(imx258->link_freq_menu_items[1],
1419 /* By default, PIXEL_RATE is read only */
1420 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1421 V4L2_CID_PIXEL_RATE,
1422 pixel_rate_min, pixel_rate_max,
1426 vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height;
1427 vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height;
1428 imx258->vblank = v4l2_ctrl_new_std(
1429 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_VBLANK,
1431 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1434 imx258->hblank = v4l2_ctrl_new_std(
1435 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_HBLANK,
1436 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1437 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1439 IMX258_PPL_DEFAULT - imx258->cur_mode->width);
1442 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1444 imx258->exposure = v4l2_ctrl_new_std(
1445 ctrl_hdlr, &imx258_ctrl_ops,
1446 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN,
1447 IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP,
1448 IMX258_EXPOSURE_DEFAULT);
1450 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1451 IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX,
1452 IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT);
1454 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1455 IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX,
1456 IMX258_DGTL_GAIN_STEP,
1457 IMX258_DGTL_GAIN_DEFAULT);
1459 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_WIDE_DYNAMIC_RANGE,
1460 0, 1, 1, IMX258_HDR_RATIO_DEFAULT);
1462 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx258_ctrl_ops,
1463 V4L2_CID_TEST_PATTERN,
1464 ARRAY_SIZE(imx258_test_pattern_menu) - 1,
1465 0, 0, imx258_test_pattern_menu);
1467 if (ctrl_hdlr->error) {
1468 ret = ctrl_hdlr->error;
1469 dev_err(&client->dev, "%s control init failed (%d)\n",
1474 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1478 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx258_ctrl_ops,
1483 imx258->sd.ctrl_handler = ctrl_hdlr;
1488 v4l2_ctrl_handler_free(ctrl_hdlr);
1489 mutex_destroy(&imx258->mutex);
1494 static void imx258_free_controls(struct imx258 *imx258)
1496 v4l2_ctrl_handler_free(imx258->sd.ctrl_handler);
1497 mutex_destroy(&imx258->mutex);
1500 static int imx258_get_regulators(struct imx258 *imx258,
1501 struct i2c_client *client)
1505 for (i = 0; i < IMX258_NUM_SUPPLIES; i++)
1506 imx258->supplies[i].supply = imx258_supply_name[i];
1508 return devm_regulator_bulk_get(&client->dev,
1509 IMX258_NUM_SUPPLIES,
1513 static int imx258_probe(struct i2c_client *client)
1515 struct imx258 *imx258;
1516 struct fwnode_handle *endpoint;
1517 struct v4l2_fwnode_endpoint ep = {
1518 .bus_type = V4L2_MBUS_CSI2_DPHY
1523 imx258 = devm_kzalloc(&client->dev, sizeof(*imx258), GFP_KERNEL);
1527 ret = imx258_get_regulators(imx258, client);
1531 imx258->clk = devm_clk_get_optional(&client->dev, NULL);
1532 if (IS_ERR(imx258->clk))
1533 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1534 "error getting clock\n");
1536 dev_dbg(&client->dev,
1537 "no clock provided, using clock-frequency property\n");
1539 device_property_read_u32(&client->dev, "clock-frequency", &val);
1540 } else if (IS_ERR(imx258->clk)) {
1541 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1542 "error getting clock\n");
1544 val = clk_get_rate(imx258->clk);
1549 imx258->link_freq_configs = link_freq_configs_19_2;
1550 imx258->link_freq_menu_items = link_freq_menu_items_19_2;
1553 imx258->link_freq_configs = link_freq_configs_24;
1554 imx258->link_freq_menu_items = link_freq_menu_items_24;
1557 dev_err(&client->dev, "input clock frequency of %u not supported\n",
1562 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
1564 dev_err(&client->dev, "Endpoint node not found\n");
1568 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep);
1569 fwnode_handle_put(endpoint);
1570 if (ret == -ENXIO) {
1571 dev_err(&client->dev, "Unsupported bus type, should be CSI2\n");
1572 goto error_endpoint_poweron;
1574 dev_err(&client->dev, "Parsing endpoint node failed\n");
1575 goto error_endpoint_poweron;
1578 /* Get number of data lanes */
1579 imx258->nlanes = ep.bus.mipi_csi2.num_data_lanes;
1580 if (imx258->nlanes != 2 && imx258->nlanes != 4) {
1581 dev_err(&client->dev, "Invalid data lanes: %u\n",
1584 goto error_endpoint_poweron;
1587 /* Initialize subdev */
1588 v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops);
1590 /* Will be powered off via pm_runtime_idle */
1591 ret = imx258_power_on(&client->dev);
1593 goto error_endpoint_poweron;
1595 /* Check module identity */
1596 ret = imx258_identify_module(imx258);
1598 goto error_identify;
1600 /* Set default mode to max resolution */
1601 imx258->cur_mode = &supported_modes[0];
1603 ret = imx258_init_controls(imx258);
1605 goto error_identify;
1607 /* Initialize subdev */
1608 imx258->sd.internal_ops = &imx258_internal_ops;
1609 imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1610 imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1612 /* Initialize source pad */
1613 imx258->pad.flags = MEDIA_PAD_FL_SOURCE;
1615 ret = media_entity_pads_init(&imx258->sd.entity, 1, &imx258->pad);
1617 goto error_handler_free;
1619 ret = v4l2_async_register_subdev_sensor(&imx258->sd);
1621 goto error_media_entity;
1623 pm_runtime_set_active(&client->dev);
1624 pm_runtime_enable(&client->dev);
1625 pm_runtime_idle(&client->dev);
1630 media_entity_cleanup(&imx258->sd.entity);
1633 imx258_free_controls(imx258);
1636 imx258_power_off(&client->dev);
1638 error_endpoint_poweron:
1639 v4l2_fwnode_endpoint_free(&ep);
1644 static void imx258_remove(struct i2c_client *client)
1646 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1647 struct imx258 *imx258 = to_imx258(sd);
1649 v4l2_async_unregister_subdev(sd);
1650 media_entity_cleanup(&sd->entity);
1651 imx258_free_controls(imx258);
1653 pm_runtime_disable(&client->dev);
1654 if (!pm_runtime_status_suspended(&client->dev))
1655 imx258_power_off(&client->dev);
1656 pm_runtime_set_suspended(&client->dev);
1659 static const struct dev_pm_ops imx258_pm_ops = {
1660 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend, imx258_resume)
1661 SET_RUNTIME_PM_OPS(imx258_power_off, imx258_power_on, NULL)
1665 static const struct acpi_device_id imx258_acpi_ids[] = {
1670 MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids);
1673 static const struct of_device_id imx258_dt_ids[] = {
1674 { .compatible = "sony,imx258" },
1677 MODULE_DEVICE_TABLE(of, imx258_dt_ids);
1679 static struct i2c_driver imx258_i2c_driver = {
1682 .pm = &imx258_pm_ops,
1683 .acpi_match_table = ACPI_PTR(imx258_acpi_ids),
1684 .of_match_table = imx258_dt_ids,
1686 .probe = imx258_probe,
1687 .remove = imx258_remove,
1690 module_i2c_driver(imx258_i2c_driver);
1692 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>");
1693 MODULE_AUTHOR("Chiang, Alan");
1694 MODULE_AUTHOR("Chen, Jason");
1695 MODULE_DESCRIPTION("Sony IMX258 sensor driver");
1696 MODULE_LICENSE("GPL v2");