1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <linux/acpi.h>
6 #include <linux/delay.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <linux/regulator/consumer.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-fwnode.h>
14 #include <asm/unaligned.h>
16 #define IMX258_REG_VALUE_08BIT 1
17 #define IMX258_REG_VALUE_16BIT 2
19 #define IMX258_REG_MODE_SELECT 0x0100
20 #define IMX258_MODE_STANDBY 0x00
21 #define IMX258_MODE_STREAMING 0x01
23 #define IMX258_REG_RESET 0x0103
26 #define IMX258_REG_CHIP_ID 0x0016
27 #define IMX258_CHIP_ID 0x0258
29 /* V_TIMING internal */
30 #define IMX258_VTS_30FPS 0x0c50
31 #define IMX258_VTS_30FPS_2K 0x0638
32 #define IMX258_VTS_30FPS_VGA 0x034c
33 #define IMX258_VTS_MAX 65525
35 #define IMX258_REG_VTS 0x0340
37 /* Exposure control */
38 #define IMX258_REG_EXPOSURE 0x0202
39 #define IMX258_EXPOSURE_OFFSET 10
40 #define IMX258_EXPOSURE_MIN 4
41 #define IMX258_EXPOSURE_STEP 1
42 #define IMX258_EXPOSURE_DEFAULT 0x640
43 #define IMX258_EXPOSURE_MAX (IMX258_VTS_MAX - IMX258_EXPOSURE_OFFSET)
45 /* HBLANK control - read only */
46 #define IMX258_PPL_DEFAULT 5352
48 /* Analog gain control */
49 #define IMX258_REG_ANALOG_GAIN 0x0204
50 #define IMX258_ANA_GAIN_MIN 0
51 #define IMX258_ANA_GAIN_MAX 480
52 #define IMX258_ANA_GAIN_STEP 1
53 #define IMX258_ANA_GAIN_DEFAULT 0x0
55 /* Digital gain control */
56 #define IMX258_REG_GR_DIGITAL_GAIN 0x020e
57 #define IMX258_REG_R_DIGITAL_GAIN 0x0210
58 #define IMX258_REG_B_DIGITAL_GAIN 0x0212
59 #define IMX258_REG_GB_DIGITAL_GAIN 0x0214
60 #define IMX258_DGTL_GAIN_MIN 0
61 #define IMX258_DGTL_GAIN_MAX 4096 /* Max = 0xFFF */
62 #define IMX258_DGTL_GAIN_DEFAULT 1024
63 #define IMX258_DGTL_GAIN_STEP 1
66 #define IMX258_REG_HDR 0x0220
67 #define IMX258_HDR_ON BIT(0)
68 #define IMX258_REG_HDR_RATIO 0x0222
69 #define IMX258_HDR_RATIO_MIN 0
70 #define IMX258_HDR_RATIO_MAX 5
71 #define IMX258_HDR_RATIO_STEP 1
72 #define IMX258_HDR_RATIO_DEFAULT 0x0
74 /* Long exposure multiplier */
75 #define IMX258_LONG_EXP_SHIFT_MAX 7
76 #define IMX258_LONG_EXP_SHIFT_REG 0x3002
78 /* Test Pattern Control */
79 #define IMX258_REG_TEST_PATTERN 0x0600
81 #define IMX258_CLK_BLANK_STOP 0x4040
84 #define REG_MIRROR_FLIP_CONTROL 0x0101
85 #define REG_CONFIG_MIRROR_HFLIP 0x01
86 #define REG_CONFIG_MIRROR_VFLIP 0x02
87 #define REG_CONFIG_FLIP_TEST_PATTERN 0x02
89 /* IMX258 native and active pixel array size. */
90 #define IMX258_NATIVE_WIDTH 4224U
91 #define IMX258_NATIVE_HEIGHT 3192U
92 #define IMX258_PIXEL_ARRAY_LEFT 8U
93 #define IMX258_PIXEL_ARRAY_TOP 16U
94 #define IMX258_PIXEL_ARRAY_WIDTH 4208U
95 #define IMX258_PIXEL_ARRAY_HEIGHT 3120U
102 struct imx258_reg_list {
104 const struct imx258_reg *regs;
107 struct imx258_link_cfg {
108 unsigned int lf_to_pix_rate_factor;
109 struct imx258_reg_list reg_list;
112 #define IMX258_LANE_CONFIGS 2
113 #define IMX258_2_LANE_MODE 0
114 #define IMX258_4_LANE_MODE 1
116 /* Link frequency config */
117 struct imx258_link_freq_config {
121 /* Configuration for this link frequency / num lanes selection */
122 struct imx258_link_cfg link_cfg[IMX258_LANE_CONFIGS];
125 /* Mode : resolution and related config&values */
136 /* Index of Link frequency config to be used */
138 /* Default register values */
139 struct imx258_reg_list reg_list;
141 /* Analog crop rectangle. */
142 struct v4l2_rect crop;
145 /* 4208x3120 needs 1267Mbps/lane, 4 lanes. Use that rate on 2 lanes as well */
146 static const struct imx258_reg mipi_1267mbps_19_2mhz_2l[] = {
168 static const struct imx258_reg mipi_1267mbps_19_2mhz_4l[] = {
190 static const struct imx258_reg mipi_1272mbps_24mhz_2l[] = {
212 static const struct imx258_reg mipi_1272mbps_24mhz_4l[] = {
234 static const struct imx258_reg mipi_640mbps_19_2mhz_2l[] = {
256 static const struct imx258_reg mipi_640mbps_19_2mhz_4l[] = {
278 static const struct imx258_reg mipi_642mbps_24mhz_2l[] = {
300 static const struct imx258_reg mipi_642mbps_24mhz_4l[] = {
322 static const struct imx258_reg mode_4208x3120_regs[] = {
431 static const struct imx258_reg mode_2104_1560_regs[] = {
540 static const struct imx258_reg mode_1048_780_regs[] = {
649 struct imx258_variant_cfg {
650 const struct imx258_reg *regs;
651 unsigned int num_regs;
654 static const struct imx258_reg imx258_cfg_regs[] = {
660 static const struct imx258_variant_cfg imx258_cfg = {
661 .regs = imx258_cfg_regs,
662 .num_regs = ARRAY_SIZE(imx258_cfg_regs),
665 static const struct imx258_reg imx258_pdaf_cfg_regs[] = {
671 static const struct imx258_variant_cfg imx258_pdaf_cfg = {
672 .regs = imx258_pdaf_cfg_regs,
673 .num_regs = ARRAY_SIZE(imx258_pdaf_cfg_regs),
677 * The supported formats.
678 * This table MUST contain 4 entries per format, to cover the various flip
679 * combinations in the order
685 static const u32 codes[] = {
687 MEDIA_BUS_FMT_SRGGB10_1X10,
688 MEDIA_BUS_FMT_SGRBG10_1X10,
689 MEDIA_BUS_FMT_SGBRG10_1X10,
690 MEDIA_BUS_FMT_SBGGR10_1X10
692 static const char * const imx258_test_pattern_menu[] = {
695 "Eight Vertical Colour Bars",
696 "Colour Bars With Fade to Grey",
697 "Pseudorandom Sequence (PN9)",
700 /* regulator supplies */
701 static const char * const imx258_supply_name[] = {
702 /* Supplies can be enabled in any order */
703 "vana", /* Analog (2.8V) supply */
704 "vdig", /* Digital Core (1.05V) supply */
705 "vif", /* IF (1.8V) supply */
708 #define IMX258_NUM_SUPPLIES ARRAY_SIZE(imx258_supply_name)
711 IMX258_LINK_FREQ_1267MBPS,
712 IMX258_LINK_FREQ_640MBPS,
716 * Pixel rate does not necessarily relate to link frequency on this sensor as
717 * there is a FIFO between the pixel array pipeline and the MIPI serializer.
718 * The recommendation from Sony is that the pixel array is always run with a
719 * line length of 5352 pixels, which means that there is a large amount of
720 * blanking time for the 1048x780 mode. There is no need to replicate this
721 * blanking on the CSI2 bus, and the configuration of register 0x0301 allows the
722 * divider to be altered.
724 * The actual factor between link frequency and pixel rate is in the
725 * imx258_link_cfg, so use this to convert between the two.
726 * bits per pixel being 10, and D-PHY being DDR is assumed by this function, so
727 * the value is only the combination of number of lanes and pixel clock divider.
729 static u64 link_freq_to_pixel_rate(u64 f, const struct imx258_link_cfg *link_cfg)
731 f *= 2 * link_cfg->lf_to_pix_rate_factor;
737 /* Menu items for LINK_FREQ V4L2 control */
738 /* Configurations for supported link frequencies */
739 #define IMX258_LINK_FREQ_634MHZ 633600000ULL
740 #define IMX258_LINK_FREQ_320MHZ 320000000ULL
742 static const s64 link_freq_menu_items_19_2[] = {
743 IMX258_LINK_FREQ_634MHZ,
744 IMX258_LINK_FREQ_320MHZ,
747 /* Configurations for supported link frequencies */
748 #define IMX258_LINK_FREQ_636MHZ 636000000ULL
749 #define IMX258_LINK_FREQ_321MHZ 321000000ULL
751 static const s64 link_freq_menu_items_24[] = {
752 IMX258_LINK_FREQ_636MHZ,
753 IMX258_LINK_FREQ_321MHZ,
756 #define REGS(_list) { .num_of_regs = ARRAY_SIZE(_list), .regs = _list, }
758 /* Link frequency configs */
759 static const struct imx258_link_freq_config link_freq_configs_19_2[] = {
760 [IMX258_LINK_FREQ_1267MBPS] = {
761 .pixels_per_line = IMX258_PPL_DEFAULT,
763 [IMX258_2_LANE_MODE] = {
764 .lf_to_pix_rate_factor = 2 * 2,
765 .reg_list = REGS(mipi_1267mbps_19_2mhz_2l),
767 [IMX258_4_LANE_MODE] = {
768 .lf_to_pix_rate_factor = 4,
769 .reg_list = REGS(mipi_1267mbps_19_2mhz_4l),
773 [IMX258_LINK_FREQ_640MBPS] = {
774 .pixels_per_line = IMX258_PPL_DEFAULT,
776 [IMX258_2_LANE_MODE] = {
777 .lf_to_pix_rate_factor = 2,
778 .reg_list = REGS(mipi_640mbps_19_2mhz_2l),
780 [IMX258_4_LANE_MODE] = {
781 .lf_to_pix_rate_factor = 4,
782 .reg_list = REGS(mipi_640mbps_19_2mhz_4l),
788 static const struct imx258_link_freq_config link_freq_configs_24[] = {
789 [IMX258_LINK_FREQ_1267MBPS] = {
790 .pixels_per_line = IMX258_PPL_DEFAULT,
792 [IMX258_2_LANE_MODE] = {
793 .lf_to_pix_rate_factor = 2,
794 .reg_list = REGS(mipi_1272mbps_24mhz_2l),
796 [IMX258_4_LANE_MODE] = {
797 .lf_to_pix_rate_factor = 4,
798 .reg_list = REGS(mipi_1272mbps_24mhz_4l),
802 [IMX258_LINK_FREQ_640MBPS] = {
803 .pixels_per_line = IMX258_PPL_DEFAULT,
805 [IMX258_2_LANE_MODE] = {
806 .lf_to_pix_rate_factor = 2 * 2,
807 .reg_list = REGS(mipi_642mbps_24mhz_2l),
809 [IMX258_4_LANE_MODE] = {
810 .lf_to_pix_rate_factor = 4,
811 .reg_list = REGS(mipi_642mbps_24mhz_4l),
818 static const struct imx258_mode supported_modes[] = {
822 .vts_def = IMX258_VTS_30FPS,
823 .vts_min = IMX258_VTS_30FPS,
825 .num_of_regs = ARRAY_SIZE(mode_4208x3120_regs),
826 .regs = mode_4208x3120_regs,
828 .link_freq_index = IMX258_LINK_FREQ_1267MBPS,
830 .left = IMX258_PIXEL_ARRAY_LEFT,
831 .top = IMX258_PIXEL_ARRAY_TOP,
839 .vts_def = IMX258_VTS_30FPS_2K,
840 .vts_min = IMX258_VTS_30FPS_2K,
842 .num_of_regs = ARRAY_SIZE(mode_2104_1560_regs),
843 .regs = mode_2104_1560_regs,
845 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
847 .left = IMX258_PIXEL_ARRAY_LEFT,
848 .top = IMX258_PIXEL_ARRAY_TOP,
856 .vts_def = IMX258_VTS_30FPS_VGA,
857 .vts_min = IMX258_VTS_30FPS_VGA,
859 .num_of_regs = ARRAY_SIZE(mode_1048_780_regs),
860 .regs = mode_1048_780_regs,
862 .link_freq_index = IMX258_LINK_FREQ_640MBPS,
864 .left = IMX258_PIXEL_ARRAY_LEFT,
865 .top = IMX258_PIXEL_ARRAY_TOP,
873 struct v4l2_subdev sd;
874 struct media_pad pad;
876 const struct imx258_variant_cfg *variant_cfg;
878 struct v4l2_ctrl_handler ctrl_handler;
880 struct v4l2_ctrl *link_freq;
881 struct v4l2_ctrl *pixel_rate;
882 struct v4l2_ctrl *vblank;
883 struct v4l2_ctrl *hblank;
884 struct v4l2_ctrl *exposure;
885 struct v4l2_ctrl *hflip;
886 struct v4l2_ctrl *vflip;
887 /* Current long exposure factor in use. Set through V4L2_CID_VBLANK */
888 unsigned int long_exp_shift;
891 const struct imx258_mode *cur_mode;
893 const struct imx258_link_freq_config *link_freq_configs;
894 const s64 *link_freq_menu_items;
895 unsigned int lane_mode_idx;
896 unsigned int csi2_flags;
899 * Mutex for serialized access:
900 * Protect sensor module set pad format and start/stop streaming safely.
904 /* Streaming on/off */
908 struct regulator_bulk_data supplies[IMX258_NUM_SUPPLIES];
911 static inline struct imx258 *to_imx258(struct v4l2_subdev *_sd)
913 return container_of(_sd, struct imx258, sd);
916 /* Read registers up to 2 at a time */
917 static int imx258_read_reg(struct imx258 *imx258, u16 reg, u32 len, u32 *val)
919 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
920 struct i2c_msg msgs[2];
921 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
922 u8 data_buf[4] = { 0, };
928 /* Write register address */
929 msgs[0].addr = client->addr;
931 msgs[0].len = ARRAY_SIZE(addr_buf);
932 msgs[0].buf = addr_buf;
934 /* Read data from register */
935 msgs[1].addr = client->addr;
936 msgs[1].flags = I2C_M_RD;
938 msgs[1].buf = &data_buf[4 - len];
940 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
941 if (ret != ARRAY_SIZE(msgs))
944 *val = get_unaligned_be32(data_buf);
949 /* Write registers up to 2 at a time */
950 static int imx258_write_reg(struct imx258 *imx258, u16 reg, u32 len, u32 val)
952 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
958 put_unaligned_be16(reg, buf);
959 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
960 if (i2c_master_send(client, buf, len + 2) != len + 2)
966 /* Write a list of registers */
967 static int imx258_write_regs(struct imx258 *imx258,
968 const struct imx258_reg *regs, u32 len)
970 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
974 for (i = 0; i < len; i++) {
975 ret = imx258_write_reg(imx258, regs[i].address, 1,
980 "Failed to write reg 0x%4.4x. error = %d\n",
981 regs[i].address, ret);
990 /* Get bayer order based on flip setting. */
991 static u32 imx258_get_format_code(struct imx258 *imx258)
995 lockdep_assert_held(&imx258->mutex);
997 i = (imx258->vflip->val ? 2 : 0) |
998 (imx258->hflip->val ? 1 : 0);
1002 /* Open sub-device */
1003 static int imx258_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1005 struct imx258 *imx258 = to_imx258(sd);
1006 struct v4l2_mbus_framefmt *try_fmt =
1007 v4l2_subdev_get_try_format(sd, fh->state, 0);
1008 struct v4l2_rect *try_crop;
1010 /* Initialize try_fmt */
1011 try_fmt->width = supported_modes[0].width;
1012 try_fmt->height = supported_modes[0].height;
1013 try_fmt->code = imx258_get_format_code(imx258);
1014 try_fmt->field = V4L2_FIELD_NONE;
1016 /* Initialize try_crop */
1017 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
1018 try_crop->left = IMX258_PIXEL_ARRAY_LEFT;
1019 try_crop->top = IMX258_PIXEL_ARRAY_TOP;
1020 try_crop->width = IMX258_PIXEL_ARRAY_WIDTH;
1021 try_crop->height = IMX258_PIXEL_ARRAY_HEIGHT;
1026 static int imx258_update_digital_gain(struct imx258 *imx258, u32 len, u32 val)
1030 ret = imx258_write_reg(imx258, IMX258_REG_GR_DIGITAL_GAIN,
1031 IMX258_REG_VALUE_16BIT,
1035 ret = imx258_write_reg(imx258, IMX258_REG_GB_DIGITAL_GAIN,
1036 IMX258_REG_VALUE_16BIT,
1040 ret = imx258_write_reg(imx258, IMX258_REG_R_DIGITAL_GAIN,
1041 IMX258_REG_VALUE_16BIT,
1045 ret = imx258_write_reg(imx258, IMX258_REG_B_DIGITAL_GAIN,
1046 IMX258_REG_VALUE_16BIT,
1053 static void imx258_adjust_exposure_range(struct imx258 *imx258)
1055 int exposure_max, exposure_def;
1057 /* Honour the VBLANK limits when setting exposure. */
1058 exposure_max = imx258->cur_mode->height + imx258->vblank->val -
1059 IMX258_EXPOSURE_OFFSET;
1060 exposure_def = min(exposure_max, imx258->exposure->val);
1061 __v4l2_ctrl_modify_range(imx258->exposure, imx258->exposure->minimum,
1062 exposure_max, imx258->exposure->step,
1066 static int imx258_set_frame_length(struct imx258 *imx258, unsigned int val)
1070 imx258->long_exp_shift = 0;
1072 while (val > IMX258_VTS_MAX) {
1073 imx258->long_exp_shift++;
1077 ret = imx258_write_reg(imx258, IMX258_REG_VTS,
1078 IMX258_REG_VALUE_16BIT, val);
1082 return imx258_write_reg(imx258, IMX258_LONG_EXP_SHIFT_REG,
1083 IMX258_REG_VALUE_08BIT, imx258->long_exp_shift);
1086 static int imx258_set_ctrl(struct v4l2_ctrl *ctrl)
1088 struct imx258 *imx258 =
1089 container_of(ctrl->handler, struct imx258, ctrl_handler);
1090 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1094 * The VBLANK control may change the limits of usable exposure, so check
1095 * and adjust if necessary.
1097 if (ctrl->id == V4L2_CID_VBLANK)
1098 imx258_adjust_exposure_range(imx258);
1101 * Applying V4L2 control value only happens
1102 * when power is up for streaming
1104 if (pm_runtime_get_if_in_use(&client->dev) == 0)
1108 case V4L2_CID_ANALOGUE_GAIN:
1109 ret = imx258_write_reg(imx258, IMX258_REG_ANALOG_GAIN,
1110 IMX258_REG_VALUE_16BIT,
1113 case V4L2_CID_EXPOSURE:
1114 ret = imx258_write_reg(imx258, IMX258_REG_EXPOSURE,
1115 IMX258_REG_VALUE_16BIT,
1116 ctrl->val >> imx258->long_exp_shift);
1118 case V4L2_CID_DIGITAL_GAIN:
1119 ret = imx258_update_digital_gain(imx258, IMX258_REG_VALUE_16BIT,
1122 case V4L2_CID_TEST_PATTERN:
1123 ret = imx258_write_reg(imx258, IMX258_REG_TEST_PATTERN,
1124 IMX258_REG_VALUE_16BIT,
1127 case V4L2_CID_WIDE_DYNAMIC_RANGE:
1129 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
1130 IMX258_REG_VALUE_08BIT,
1131 IMX258_HDR_RATIO_MIN);
1133 ret = imx258_write_reg(imx258, IMX258_REG_HDR,
1134 IMX258_REG_VALUE_08BIT,
1138 ret = imx258_write_reg(imx258, IMX258_REG_HDR_RATIO,
1139 IMX258_REG_VALUE_08BIT,
1140 BIT(IMX258_HDR_RATIO_MAX));
1143 case V4L2_CID_VBLANK:
1144 ret = imx258_set_frame_length(imx258,
1145 imx258->cur_mode->height + ctrl->val);
1147 case V4L2_CID_VFLIP:
1148 case V4L2_CID_HFLIP:
1149 ret = imx258_write_reg(imx258, REG_MIRROR_FLIP_CONTROL,
1150 IMX258_REG_VALUE_08BIT,
1151 (imx258->hflip->val ?
1152 REG_CONFIG_MIRROR_HFLIP : 0) |
1153 (imx258->vflip->val ?
1154 REG_CONFIG_MIRROR_VFLIP : 0));
1157 dev_info(&client->dev,
1158 "ctrl(id:0x%x,val:0x%x) is not handled\n",
1159 ctrl->id, ctrl->val);
1164 pm_runtime_put(&client->dev);
1169 static const struct v4l2_ctrl_ops imx258_ctrl_ops = {
1170 .s_ctrl = imx258_set_ctrl,
1173 static int imx258_enum_mbus_code(struct v4l2_subdev *sd,
1174 struct v4l2_subdev_state *sd_state,
1175 struct v4l2_subdev_mbus_code_enum *code)
1177 struct imx258 *imx258 = to_imx258(sd);
1179 /* Only one bayer format (10 bit) is supported */
1180 if (code->index > 0)
1183 code->code = imx258_get_format_code(imx258);
1188 static int imx258_enum_frame_size(struct v4l2_subdev *sd,
1189 struct v4l2_subdev_state *sd_state,
1190 struct v4l2_subdev_frame_size_enum *fse)
1192 struct imx258 *imx258 = to_imx258(sd);
1193 if (fse->index >= ARRAY_SIZE(supported_modes))
1196 if (fse->code != imx258_get_format_code(imx258))
1199 fse->min_width = supported_modes[fse->index].width;
1200 fse->max_width = fse->min_width;
1201 fse->min_height = supported_modes[fse->index].height;
1202 fse->max_height = fse->min_height;
1207 static void imx258_update_pad_format(struct imx258 *imx258,
1208 const struct imx258_mode *mode,
1209 struct v4l2_subdev_format *fmt)
1211 fmt->format.width = mode->width;
1212 fmt->format.height = mode->height;
1213 fmt->format.code = imx258_get_format_code(imx258);
1214 fmt->format.field = V4L2_FIELD_NONE;
1217 static int __imx258_get_pad_format(struct imx258 *imx258,
1218 struct v4l2_subdev_state *sd_state,
1219 struct v4l2_subdev_format *fmt)
1221 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1222 fmt->format = *v4l2_subdev_get_try_format(&imx258->sd,
1226 imx258_update_pad_format(imx258, imx258->cur_mode, fmt);
1231 static int imx258_get_pad_format(struct v4l2_subdev *sd,
1232 struct v4l2_subdev_state *sd_state,
1233 struct v4l2_subdev_format *fmt)
1235 struct imx258 *imx258 = to_imx258(sd);
1238 mutex_lock(&imx258->mutex);
1239 ret = __imx258_get_pad_format(imx258, sd_state, fmt);
1240 mutex_unlock(&imx258->mutex);
1245 static int imx258_set_pad_format(struct v4l2_subdev *sd,
1246 struct v4l2_subdev_state *sd_state,
1247 struct v4l2_subdev_format *fmt)
1249 struct imx258 *imx258 = to_imx258(sd);
1250 const struct imx258_link_freq_config *link_freq_cfgs;
1251 const struct imx258_link_cfg *link_cfg;
1252 struct v4l2_mbus_framefmt *framefmt;
1253 const struct imx258_mode *mode;
1260 mutex_lock(&imx258->mutex);
1262 fmt->format.code = imx258_get_format_code(imx258);
1264 mode = v4l2_find_nearest_size(supported_modes,
1265 ARRAY_SIZE(supported_modes), width, height,
1266 fmt->format.width, fmt->format.height);
1267 imx258_update_pad_format(imx258, mode, fmt);
1268 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1269 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
1270 *framefmt = fmt->format;
1272 imx258->cur_mode = mode;
1273 __v4l2_ctrl_s_ctrl(imx258->link_freq, mode->link_freq_index);
1275 link_freq = imx258->link_freq_menu_items[mode->link_freq_index];
1277 &imx258->link_freq_configs[mode->link_freq_index];
1279 link_cfg = &link_freq_cfgs->link_cfg[imx258->lane_mode_idx];
1280 pixel_rate = link_freq_to_pixel_rate(link_freq, link_cfg);
1281 __v4l2_ctrl_modify_range(imx258->pixel_rate, pixel_rate,
1282 pixel_rate, 1, pixel_rate);
1283 /* Update limits and set FPS to default */
1284 vblank_def = imx258->cur_mode->vts_def -
1285 imx258->cur_mode->height;
1286 vblank_min = imx258->cur_mode->vts_min -
1287 imx258->cur_mode->height;
1288 __v4l2_ctrl_modify_range(
1289 imx258->vblank, vblank_min,
1290 ((1 << IMX258_LONG_EXP_SHIFT_MAX) * IMX258_VTS_MAX) -
1291 imx258->cur_mode->height,
1293 __v4l2_ctrl_s_ctrl(imx258->vblank, vblank_def);
1295 imx258->link_freq_configs[mode->link_freq_index].pixels_per_line
1296 - imx258->cur_mode->width;
1297 __v4l2_ctrl_modify_range(imx258->hblank, h_blank,
1298 h_blank, 1, h_blank);
1301 mutex_unlock(&imx258->mutex);
1306 static const struct v4l2_rect *
1307 __imx258_get_pad_crop(struct imx258 *imx258,
1308 struct v4l2_subdev_state *sd_state,
1309 unsigned int pad, enum v4l2_subdev_format_whence which)
1312 case V4L2_SUBDEV_FORMAT_TRY:
1313 return v4l2_subdev_get_try_crop(&imx258->sd, sd_state, pad);
1314 case V4L2_SUBDEV_FORMAT_ACTIVE:
1315 return &imx258->cur_mode->crop;
1321 static int imx258_get_selection(struct v4l2_subdev *sd,
1322 struct v4l2_subdev_state *sd_state,
1323 struct v4l2_subdev_selection *sel)
1325 switch (sel->target) {
1326 case V4L2_SEL_TGT_CROP: {
1327 struct imx258 *imx258 = to_imx258(sd);
1329 mutex_lock(&imx258->mutex);
1330 sel->r = *__imx258_get_pad_crop(imx258, sd_state, sel->pad,
1332 mutex_unlock(&imx258->mutex);
1337 case V4L2_SEL_TGT_NATIVE_SIZE:
1340 sel->r.width = IMX258_NATIVE_WIDTH;
1341 sel->r.height = IMX258_NATIVE_HEIGHT;
1345 case V4L2_SEL_TGT_CROP_DEFAULT:
1346 case V4L2_SEL_TGT_CROP_BOUNDS:
1347 sel->r.left = IMX258_PIXEL_ARRAY_LEFT;
1348 sel->r.top = IMX258_PIXEL_ARRAY_TOP;
1349 sel->r.width = IMX258_PIXEL_ARRAY_WIDTH;
1350 sel->r.height = IMX258_PIXEL_ARRAY_HEIGHT;
1358 /* Start streaming */
1359 static int imx258_start_streaming(struct imx258 *imx258)
1361 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1362 const struct imx258_reg_list *reg_list;
1363 const struct imx258_link_freq_config *link_freq_cfg;
1364 int ret, link_freq_index;
1366 ret = imx258_write_reg(imx258, IMX258_REG_RESET, IMX258_REG_VALUE_08BIT,
1369 dev_err(&client->dev, "%s failed to reset sensor\n", __func__);
1372 usleep_range(10000, 15000);
1375 link_freq_index = imx258->cur_mode->link_freq_index;
1376 link_freq_cfg = &imx258->link_freq_configs[link_freq_index];
1378 reg_list = &link_freq_cfg->link_cfg[imx258->lane_mode_idx].reg_list;
1379 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1381 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1385 ret = imx258_write_regs(imx258, imx258->variant_cfg->regs,
1386 imx258->variant_cfg->num_regs);
1388 dev_err(&client->dev, "%s failed to set variant config\n",
1393 ret = imx258_write_reg(imx258, IMX258_CLK_BLANK_STOP,
1394 IMX258_REG_VALUE_08BIT,
1395 imx258->csi2_flags & V4L2_MBUS_CSI2_CONTINUOUS_CLOCK ?
1398 dev_err(&client->dev, "%s failed to set clock lane mode\n", __func__);
1402 /* Apply default values of current mode */
1403 reg_list = &imx258->cur_mode->reg_list;
1404 ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs);
1406 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1410 /* Apply customized values from user */
1411 ret = __v4l2_ctrl_handler_setup(imx258->sd.ctrl_handler);
1415 /* set stream on register */
1416 return imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1417 IMX258_REG_VALUE_08BIT,
1418 IMX258_MODE_STREAMING);
1421 /* Stop streaming */
1422 static int imx258_stop_streaming(struct imx258 *imx258)
1424 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1427 /* set stream off register */
1428 ret = imx258_write_reg(imx258, IMX258_REG_MODE_SELECT,
1429 IMX258_REG_VALUE_08BIT, IMX258_MODE_STANDBY);
1431 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1434 * Return success even if it was an error, as there is nothing the
1435 * caller can do about it.
1440 static int imx258_power_on(struct device *dev)
1442 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1443 struct imx258 *imx258 = to_imx258(sd);
1446 ret = regulator_bulk_enable(IMX258_NUM_SUPPLIES,
1449 dev_err(dev, "%s: failed to enable regulators\n",
1454 ret = clk_prepare_enable(imx258->clk);
1456 dev_err(dev, "failed to enable clock\n");
1457 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1463 static int imx258_power_off(struct device *dev)
1465 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1466 struct imx258 *imx258 = to_imx258(sd);
1468 clk_disable_unprepare(imx258->clk);
1469 regulator_bulk_disable(IMX258_NUM_SUPPLIES, imx258->supplies);
1474 static int imx258_set_stream(struct v4l2_subdev *sd, int enable)
1476 struct imx258 *imx258 = to_imx258(sd);
1477 struct i2c_client *client = v4l2_get_subdevdata(sd);
1480 mutex_lock(&imx258->mutex);
1481 if (imx258->streaming == enable) {
1482 mutex_unlock(&imx258->mutex);
1487 ret = pm_runtime_resume_and_get(&client->dev);
1492 * Apply default & customized values
1493 * and then start streaming.
1495 ret = imx258_start_streaming(imx258);
1499 imx258_stop_streaming(imx258);
1500 pm_runtime_put(&client->dev);
1503 imx258->streaming = enable;
1504 mutex_unlock(&imx258->mutex);
1509 pm_runtime_put(&client->dev);
1511 mutex_unlock(&imx258->mutex);
1516 static int __maybe_unused imx258_suspend(struct device *dev)
1518 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1519 struct imx258 *imx258 = to_imx258(sd);
1521 if (imx258->streaming)
1522 imx258_stop_streaming(imx258);
1527 static int __maybe_unused imx258_resume(struct device *dev)
1529 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1530 struct imx258 *imx258 = to_imx258(sd);
1533 if (imx258->streaming) {
1534 ret = imx258_start_streaming(imx258);
1542 imx258_stop_streaming(imx258);
1543 imx258->streaming = 0;
1547 /* Verify chip ID */
1548 static int imx258_identify_module(struct imx258 *imx258)
1550 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1554 ret = imx258_read_reg(imx258, IMX258_REG_CHIP_ID,
1555 IMX258_REG_VALUE_16BIT, &val);
1557 dev_err(&client->dev, "failed to read chip id %x\n",
1562 if (val != IMX258_CHIP_ID) {
1563 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1564 IMX258_CHIP_ID, val);
1571 static const struct v4l2_subdev_video_ops imx258_video_ops = {
1572 .s_stream = imx258_set_stream,
1575 static const struct v4l2_subdev_pad_ops imx258_pad_ops = {
1576 .enum_mbus_code = imx258_enum_mbus_code,
1577 .get_fmt = imx258_get_pad_format,
1578 .set_fmt = imx258_set_pad_format,
1579 .enum_frame_size = imx258_enum_frame_size,
1580 .get_selection = imx258_get_selection,
1583 static const struct v4l2_subdev_ops imx258_subdev_ops = {
1584 .video = &imx258_video_ops,
1585 .pad = &imx258_pad_ops,
1588 static const struct v4l2_subdev_internal_ops imx258_internal_ops = {
1589 .open = imx258_open,
1592 /* Initialize control handlers */
1593 static int imx258_init_controls(struct imx258 *imx258)
1595 struct i2c_client *client = v4l2_get_subdevdata(&imx258->sd);
1596 const struct imx258_link_freq_config *link_freq_cfgs;
1597 struct v4l2_fwnode_device_properties props;
1598 struct v4l2_ctrl_handler *ctrl_hdlr;
1599 const struct imx258_link_cfg *link_cfg;
1605 ctrl_hdlr = &imx258->ctrl_handler;
1606 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
1610 mutex_init(&imx258->mutex);
1611 ctrl_hdlr->lock = &imx258->mutex;
1612 imx258->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1615 ARRAY_SIZE(link_freq_menu_items_19_2) - 1,
1617 imx258->link_freq_menu_items);
1619 if (imx258->link_freq)
1620 imx258->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1622 link_freq_cfgs = &imx258->link_freq_configs[0];
1623 link_cfg = link_freq_cfgs[imx258->lane_mode_idx].link_cfg;
1624 pixel_rate = link_freq_to_pixel_rate(imx258->link_freq_menu_items[0],
1627 /* By default, PIXEL_RATE is read only */
1628 imx258->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1629 V4L2_CID_PIXEL_RATE,
1630 pixel_rate, pixel_rate,
1634 vblank_def = imx258->cur_mode->vts_def - imx258->cur_mode->height;
1635 vblank_min = imx258->cur_mode->vts_min - imx258->cur_mode->height;
1636 imx258->vblank = v4l2_ctrl_new_std(
1637 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_VBLANK,
1639 IMX258_VTS_MAX - imx258->cur_mode->height, 1,
1642 imx258->hblank = v4l2_ctrl_new_std(
1643 ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_HBLANK,
1644 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1645 IMX258_PPL_DEFAULT - imx258->cur_mode->width,
1647 IMX258_PPL_DEFAULT - imx258->cur_mode->width);
1650 imx258->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1652 imx258->exposure = v4l2_ctrl_new_std(
1653 ctrl_hdlr, &imx258_ctrl_ops,
1654 V4L2_CID_EXPOSURE, IMX258_EXPOSURE_MIN,
1655 IMX258_EXPOSURE_MAX, IMX258_EXPOSURE_STEP,
1656 IMX258_EXPOSURE_DEFAULT);
1658 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1659 IMX258_ANA_GAIN_MIN, IMX258_ANA_GAIN_MAX,
1660 IMX258_ANA_GAIN_STEP, IMX258_ANA_GAIN_DEFAULT);
1662 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1663 IMX258_DGTL_GAIN_MIN, IMX258_DGTL_GAIN_MAX,
1664 IMX258_DGTL_GAIN_STEP,
1665 IMX258_DGTL_GAIN_DEFAULT);
1667 v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops, V4L2_CID_WIDE_DYNAMIC_RANGE,
1668 0, 1, 1, IMX258_HDR_RATIO_DEFAULT);
1670 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx258_ctrl_ops,
1671 V4L2_CID_TEST_PATTERN,
1672 ARRAY_SIZE(imx258_test_pattern_menu) - 1,
1673 0, 0, imx258_test_pattern_menu);
1675 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1678 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx258_ctrl_ops,
1683 imx258->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1684 V4L2_CID_HFLIP, 0, 1, 1,
1685 props.rotation == 180 ? 1 : 0);
1687 imx258->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1689 imx258->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx258_ctrl_ops,
1690 V4L2_CID_VFLIP, 0, 1, 1,
1691 props.rotation == 180 ? 1 : 0);
1693 imx258->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1694 if (ctrl_hdlr->error) {
1695 ret = ctrl_hdlr->error;
1696 dev_err(&client->dev, "%s control init failed (%d)\n",
1701 imx258->sd.ctrl_handler = ctrl_hdlr;
1706 v4l2_ctrl_handler_free(ctrl_hdlr);
1707 mutex_destroy(&imx258->mutex);
1712 static void imx258_free_controls(struct imx258 *imx258)
1714 v4l2_ctrl_handler_free(imx258->sd.ctrl_handler);
1715 mutex_destroy(&imx258->mutex);
1718 static int imx258_get_regulators(struct imx258 *imx258,
1719 struct i2c_client *client)
1723 for (i = 0; i < IMX258_NUM_SUPPLIES; i++)
1724 imx258->supplies[i].supply = imx258_supply_name[i];
1726 return devm_regulator_bulk_get(&client->dev,
1727 IMX258_NUM_SUPPLIES,
1731 static const struct of_device_id imx258_dt_ids[] = {
1732 { .compatible = "sony,imx258", .data = &imx258_cfg },
1733 { .compatible = "sony,imx258-pdaf", .data = &imx258_pdaf_cfg },
1737 static int imx258_probe(struct i2c_client *client)
1739 struct imx258 *imx258;
1740 struct fwnode_handle *endpoint;
1741 struct v4l2_fwnode_endpoint ep = {
1742 .bus_type = V4L2_MBUS_CSI2_DPHY
1744 const struct of_device_id *match;
1748 imx258 = devm_kzalloc(&client->dev, sizeof(*imx258), GFP_KERNEL);
1752 ret = imx258_get_regulators(imx258, client);
1756 imx258->clk = devm_clk_get_optional(&client->dev, NULL);
1757 if (IS_ERR(imx258->clk))
1758 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1759 "error getting clock\n");
1761 dev_dbg(&client->dev,
1762 "no clock provided, using clock-frequency property\n");
1764 device_property_read_u32(&client->dev, "clock-frequency", &val);
1765 } else if (IS_ERR(imx258->clk)) {
1766 return dev_err_probe(&client->dev, PTR_ERR(imx258->clk),
1767 "error getting clock\n");
1769 val = clk_get_rate(imx258->clk);
1774 imx258->link_freq_configs = link_freq_configs_19_2;
1775 imx258->link_freq_menu_items = link_freq_menu_items_19_2;
1778 imx258->link_freq_configs = link_freq_configs_24;
1779 imx258->link_freq_menu_items = link_freq_menu_items_24;
1782 dev_err(&client->dev, "input clock frequency of %u not supported\n",
1787 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
1789 dev_err(&client->dev, "Endpoint node not found\n");
1793 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep);
1794 fwnode_handle_put(endpoint);
1795 if (ret == -ENXIO) {
1796 dev_err(&client->dev, "Unsupported bus type, should be CSI2\n");
1797 goto error_endpoint_poweron;
1799 dev_err(&client->dev, "Parsing endpoint node failed\n");
1800 goto error_endpoint_poweron;
1803 /* Get number of data lanes */
1804 switch (ep.bus.mipi_csi2.num_data_lanes) {
1806 imx258->lane_mode_idx = IMX258_2_LANE_MODE;
1809 imx258->lane_mode_idx = IMX258_4_LANE_MODE;
1812 dev_err(&client->dev, "Invalid data lanes: %u\n",
1813 ep.bus.mipi_csi2.num_data_lanes);
1815 goto error_endpoint_poweron;
1818 imx258->csi2_flags = ep.bus.mipi_csi2.flags;
1820 match = i2c_of_match_device(imx258_dt_ids, client);
1821 if (!match || !match->data)
1822 imx258->variant_cfg = &imx258_cfg;
1824 imx258->variant_cfg =
1825 (const struct imx258_variant_cfg *)match->data;
1827 /* Initialize subdev */
1828 v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops);
1830 /* Will be powered off via pm_runtime_idle */
1831 ret = imx258_power_on(&client->dev);
1833 goto error_endpoint_poweron;
1835 /* Check module identity */
1836 ret = imx258_identify_module(imx258);
1838 goto error_identify;
1840 /* Set default mode to max resolution */
1841 imx258->cur_mode = &supported_modes[0];
1843 ret = imx258_init_controls(imx258);
1845 goto error_identify;
1847 /* Initialize subdev */
1848 imx258->sd.internal_ops = &imx258_internal_ops;
1849 imx258->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1850 imx258->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1852 /* Initialize source pad */
1853 imx258->pad.flags = MEDIA_PAD_FL_SOURCE;
1855 ret = media_entity_pads_init(&imx258->sd.entity, 1, &imx258->pad);
1857 goto error_handler_free;
1859 ret = v4l2_async_register_subdev_sensor(&imx258->sd);
1861 goto error_media_entity;
1863 pm_runtime_set_active(&client->dev);
1864 pm_runtime_enable(&client->dev);
1865 pm_runtime_idle(&client->dev);
1870 media_entity_cleanup(&imx258->sd.entity);
1873 imx258_free_controls(imx258);
1876 imx258_power_off(&client->dev);
1878 error_endpoint_poweron:
1879 v4l2_fwnode_endpoint_free(&ep);
1884 static int imx258_remove(struct i2c_client *client)
1886 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1887 struct imx258 *imx258 = to_imx258(sd);
1889 v4l2_async_unregister_subdev(sd);
1890 media_entity_cleanup(&sd->entity);
1891 imx258_free_controls(imx258);
1893 pm_runtime_disable(&client->dev);
1894 if (!pm_runtime_status_suspended(&client->dev))
1895 imx258_power_off(&client->dev);
1896 pm_runtime_set_suspended(&client->dev);
1901 static const struct dev_pm_ops imx258_pm_ops = {
1902 SET_SYSTEM_SLEEP_PM_OPS(imx258_suspend, imx258_resume)
1903 SET_RUNTIME_PM_OPS(imx258_power_off, imx258_power_on, NULL)
1907 static const struct acpi_device_id imx258_acpi_ids[] = {
1912 MODULE_DEVICE_TABLE(acpi, imx258_acpi_ids);
1915 MODULE_DEVICE_TABLE(of, imx258_dt_ids);
1917 static struct i2c_driver imx258_i2c_driver = {
1920 .pm = &imx258_pm_ops,
1921 .acpi_match_table = ACPI_PTR(imx258_acpi_ids),
1922 .of_match_table = imx258_dt_ids,
1924 .probe_new = imx258_probe,
1925 .remove = imx258_remove,
1928 module_i2c_driver(imx258_i2c_driver);
1930 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>");
1931 MODULE_AUTHOR("Chiang, Alan");
1932 MODULE_AUTHOR("Chen, Jason");
1933 MODULE_DESCRIPTION("Sony IMX258 sensor driver");
1934 MODULE_LICENSE("GPL v2");