1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for LG2160 - ATSC/MH
5 * Copyright (C) 2010 Michael Krufky <mkrufky@linuxtv.org>
8 #include <linux/jiffies.h>
9 #include <linux/dvb/frontend.h>
13 module_param(debug, int, 0644);
14 MODULE_PARM_DESC(debug, "set debug level (info=1, reg=2 (or-able))");
19 #define lg_printk(kern, fmt, arg...) \
20 printk(kern "%s: " fmt, __func__, ##arg)
22 #define lg_info(fmt, arg...) printk(KERN_INFO "lg2160: " fmt, ##arg)
23 #define lg_warn(fmt, arg...) lg_printk(KERN_WARNING, fmt, ##arg)
24 #define lg_err(fmt, arg...) lg_printk(KERN_ERR, fmt, ##arg)
25 #define lg_dbg(fmt, arg...) if (debug & DBG_INFO) \
26 lg_printk(KERN_DEBUG, fmt, ##arg)
27 #define lg_reg(fmt, arg...) if (debug & DBG_REG) \
28 lg_printk(KERN_DEBUG, fmt, ##arg)
30 #define lg_fail(ret) \
35 lg_err("error %d on line %d\n", ret, __LINE__); \
40 struct i2c_adapter *i2c_adap;
41 const struct lg2160_config *cfg;
43 struct dvb_frontend frontend;
45 u32 current_frequency;
48 unsigned int last_reset;
51 /* ------------------------------------------------------------------------ */
53 static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val)
56 u8 buf[] = { reg >> 8, reg & 0xff, val };
57 struct i2c_msg msg = {
58 .addr = state->cfg->i2c_addr, .flags = 0,
62 lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);
64 ret = i2c_transfer(state->i2c_adap, &msg, 1);
67 lg_err("error (addr %02x %02x <- %02x, err = %i)\n",
68 msg.buf[0], msg.buf[1], msg.buf[2], ret);
77 static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val)
80 u8 reg_buf[] = { reg >> 8, reg & 0xff };
81 struct i2c_msg msg[] = {
82 { .addr = state->cfg->i2c_addr,
83 .flags = 0, .buf = reg_buf, .len = 2 },
84 { .addr = state->cfg->i2c_addr,
85 .flags = I2C_M_RD, .buf = val, .len = 1 },
88 lg_reg("reg: 0x%04x\n", reg);
90 ret = i2c_transfer(state->i2c_adap, msg, 2);
93 lg_err("error (addr %02x reg %04x error (ret == %i)\n",
94 state->cfg->i2c_addr, reg, ret);
108 static int lg216x_write_regs(struct lg216x_state *state,
109 struct lg216x_reg *regs, int len)
113 lg_reg("writing %d registers...\n", len);
115 for (i = 0; i < len; i++) {
116 ret = lg216x_write_reg(state, regs[i].reg, regs[i].val);
123 static int lg216x_set_reg_bit(struct lg216x_state *state,
124 u16 reg, int bit, int onoff)
129 lg_reg("reg: 0x%04x, bit: %d, level: %d\n", reg, bit, onoff);
131 ret = lg216x_read_reg(state, reg, &val);
136 val |= (onoff & 1) << bit;
138 ret = lg216x_write_reg(state, reg, val);
144 /* ------------------------------------------------------------------------ */
146 static int lg216x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
148 struct lg216x_state *state = fe->demodulator_priv;
151 if (state->cfg->deny_i2c_rptr)
154 lg_dbg("(%d)\n", enable);
156 ret = lg216x_set_reg_bit(state, 0x0000, 0, enable ? 0 : 1);
163 static int lg216x_soft_reset(struct lg216x_state *state)
169 ret = lg216x_write_reg(state, 0x0002, 0x00);
174 ret = lg216x_write_reg(state, 0x0002, 0x01);
178 state->last_reset = jiffies_to_msecs(jiffies);
183 static int lg216x_initialize(struct lg216x_state *state)
187 static struct lg216x_reg lg2160_init[] = {
189 { .reg = 0x0015, .val = 0xe6 },
191 { .reg = 0x0015, .val = 0xf7 },
192 { .reg = 0x001b, .val = 0x52 },
193 { .reg = 0x0208, .val = 0x00 },
194 { .reg = 0x0209, .val = 0x82 },
195 { .reg = 0x0210, .val = 0xf9 },
196 { .reg = 0x020a, .val = 0x00 },
197 { .reg = 0x020b, .val = 0x82 },
198 { .reg = 0x020d, .val = 0x28 },
199 { .reg = 0x020f, .val = 0x14 },
203 static struct lg216x_reg lg2161_init[] = {
204 { .reg = 0x0000, .val = 0x41 },
205 { .reg = 0x0001, .val = 0xfb },
206 { .reg = 0x0216, .val = 0x00 },
207 { .reg = 0x0219, .val = 0x00 },
208 { .reg = 0x021b, .val = 0x55 },
209 { .reg = 0x0606, .val = 0x0a },
212 switch (state->cfg->lg_chip) {
214 ret = lg216x_write_regs(state,
215 lg2160_init, ARRAY_SIZE(lg2160_init));
218 ret = lg216x_write_regs(state,
219 lg2161_init, ARRAY_SIZE(lg2161_init));
228 ret = lg216x_soft_reset(state);
234 /* ------------------------------------------------------------------------ */
236 static int lg216x_set_if(struct lg216x_state *state)
241 lg_dbg("%d KHz\n", state->cfg->if_khz);
243 ret = lg216x_read_reg(state, 0x0132, &val);
248 val |= (0 == state->cfg->if_khz) ? 0x04 : 0x00;
250 ret = lg216x_write_reg(state, 0x0132, val);
253 /* if NOT zero IF, 6 MHz is the default */
258 /* ------------------------------------------------------------------------ */
260 static int lg2160_agc_fix(struct lg216x_state *state,
261 int if_agc_fix, int rf_agc_fix)
266 ret = lg216x_read_reg(state, 0x0100, &val);
271 val |= (if_agc_fix) ? 0x08 : 0x00;
272 val |= (rf_agc_fix) ? 0x04 : 0x00;
274 ret = lg216x_write_reg(state, 0x0100, val);
281 static int lg2160_agc_freeze(struct lg216x_state *state,
282 int if_agc_freeze, int rf_agc_freeze)
287 ret = lg216x_read_reg(state, 0x0100, &val);
292 val |= (if_agc_freeze) ? 0x20 : 0x00;
293 val |= (rf_agc_freeze) ? 0x10 : 0x00;
295 ret = lg216x_write_reg(state, 0x0100, val);
302 static int lg2160_agc_polarity(struct lg216x_state *state,
303 int if_agc_polarity, int rf_agc_polarity)
308 ret = lg216x_read_reg(state, 0x0100, &val);
313 val |= (if_agc_polarity) ? 0x02 : 0x00;
314 val |= (rf_agc_polarity) ? 0x01 : 0x00;
316 ret = lg216x_write_reg(state, 0x0100, val);
322 static int lg2160_tuner_pwr_save_polarity(struct lg216x_state *state,
328 ret = lg216x_read_reg(state, 0x0008, &val);
333 val |= (polarity) ? 0x01 : 0x00;
335 ret = lg216x_write_reg(state, 0x0008, val);
341 static int lg2160_spectrum_polarity(struct lg216x_state *state,
347 ret = lg216x_read_reg(state, 0x0132, &val);
352 val |= (inverted) ? 0x02 : 0x00;
354 ret = lg216x_write_reg(state, 0x0132, val);
357 return lg216x_soft_reset(state);
360 static int lg2160_tuner_pwr_save(struct lg216x_state *state, int onoff)
365 ret = lg216x_read_reg(state, 0x0007, &val);
370 val |= (onoff) ? 0x40 : 0x00;
372 ret = lg216x_write_reg(state, 0x0007, val);
378 static int lg216x_set_parade(struct lg216x_state *state, int id)
382 ret = lg216x_write_reg(state, 0x013e, id & 0x7f);
386 state->parade_id = id & 0x7f;
391 static int lg216x_set_ensemble(struct lg216x_state *state, int id)
397 switch (state->cfg->lg_chip) {
407 ret = lg216x_read_reg(state, reg, &val);
412 val |= (id) ? 0x01 : 0x00;
414 ret = lg216x_write_reg(state, reg, val);
420 static int lg2160_set_spi_clock(struct lg216x_state *state)
425 ret = lg216x_read_reg(state, 0x0014, &val);
430 val |= (state->cfg->spi_clock << 2);
432 ret = lg216x_write_reg(state, 0x0014, val);
438 static int lg2161_set_output_interface(struct lg216x_state *state)
443 ret = lg216x_read_reg(state, 0x0014, &val);
448 val |= state->cfg->output_if; /* FIXME: needs sanity check */
450 ret = lg216x_write_reg(state, 0x0014, val);
456 static int lg216x_enable_fic(struct lg216x_state *state, int onoff)
460 ret = lg216x_write_reg(state, 0x0017, 0x23);
464 ret = lg216x_write_reg(state, 0x0016, 0xfc);
468 switch (state->cfg->lg_chip) {
470 ret = lg216x_write_reg(state, 0x0016,
471 0xfc | ((onoff) ? 0x02 : 0x00));
474 ret = lg216x_write_reg(state, 0x0016, (onoff) ? 0x10 : 0x00);
480 ret = lg216x_initialize(state);
485 ret = lg216x_write_reg(state, 0x0017, 0x03);
492 /* ------------------------------------------------------------------------ */
494 static int lg216x_get_fic_version(struct lg216x_state *state, u8 *ficver)
499 *ficver = 0xff; /* invalid value */
501 ret = lg216x_read_reg(state, 0x0128, &val);
505 *ficver = (val >> 3) & 0x1f;
511 static int lg2160_get_parade_id(struct lg216x_state *state, u8 *id)
516 *id = 0xff; /* invalid value */
518 ret = lg216x_read_reg(state, 0x0123, &val);
528 static int lg216x_get_nog(struct lg216x_state *state, u8 *nog)
533 *nog = 0xff; /* invalid value */
535 ret = lg216x_read_reg(state, 0x0124, &val);
539 *nog = ((val >> 4) & 0x07) + 1;
544 static int lg216x_get_tnog(struct lg216x_state *state, u8 *tnog)
549 *tnog = 0xff; /* invalid value */
551 ret = lg216x_read_reg(state, 0x0125, &val);
560 static int lg216x_get_sgn(struct lg216x_state *state, u8 *sgn)
565 *sgn = 0xff; /* invalid value */
567 ret = lg216x_read_reg(state, 0x0124, &val);
576 static int lg216x_get_prc(struct lg216x_state *state, u8 *prc)
581 *prc = 0xff; /* invalid value */
583 ret = lg216x_read_reg(state, 0x0125, &val);
587 *prc = ((val >> 5) & 0x07) + 1;
592 /* ------------------------------------------------------------------------ */
594 static int lg216x_get_rs_frame_mode(struct lg216x_state *state,
595 enum atscmh_rs_frame_mode *rs_framemode)
600 switch (state->cfg->lg_chip) {
602 ret = lg216x_read_reg(state, 0x0410, &val);
605 ret = lg216x_read_reg(state, 0x0513, &val);
613 switch ((val >> 4) & 0x03) {
618 *rs_framemode = ATSCMH_RSFRAME_PRI_ONLY;
621 *rs_framemode = ATSCMH_RSFRAME_PRI_SEC;
625 *rs_framemode = ATSCMH_RSFRAME_RES;
634 int lg216x_get_rs_frame_ensemble(struct lg216x_state *state,
635 enum atscmh_rs_frame_ensemble *rs_frame_ens)
640 switch (state->cfg->lg_chip) {
642 ret = lg216x_read_reg(state, 0x0400, &val);
645 ret = lg216x_read_reg(state, 0x0500, &val);
654 *rs_frame_ens = (enum atscmh_rs_frame_ensemble) val;
659 static int lg216x_get_rs_code_mode(struct lg216x_state *state,
660 enum atscmh_rs_code_mode *rs_code_pri,
661 enum atscmh_rs_code_mode *rs_code_sec)
666 switch (state->cfg->lg_chip) {
668 ret = lg216x_read_reg(state, 0x0410, &val);
671 ret = lg216x_read_reg(state, 0x0513, &val);
679 *rs_code_pri = (enum atscmh_rs_code_mode) ((val >> 2) & 0x03);
680 *rs_code_sec = (enum atscmh_rs_code_mode) (val & 0x03);
685 static int lg216x_get_sccc_block_mode(struct lg216x_state *state,
686 enum atscmh_sccc_block_mode *sccc_block)
691 switch (state->cfg->lg_chip) {
693 ret = lg216x_read_reg(state, 0x0315, &val);
696 ret = lg216x_read_reg(state, 0x0511, &val);
704 switch (val & 0x03) {
706 *sccc_block = ATSCMH_SCCC_BLK_SEP;
709 *sccc_block = ATSCMH_SCCC_BLK_COMB;
712 *sccc_block = ATSCMH_SCCC_BLK_RES;
719 static int lg216x_get_sccc_code_mode(struct lg216x_state *state,
720 enum atscmh_sccc_code_mode *mode_a,
721 enum atscmh_sccc_code_mode *mode_b,
722 enum atscmh_sccc_code_mode *mode_c,
723 enum atscmh_sccc_code_mode *mode_d)
728 switch (state->cfg->lg_chip) {
730 ret = lg216x_read_reg(state, 0x0316, &val);
733 ret = lg216x_read_reg(state, 0x0512, &val);
741 switch ((val >> 6) & 0x03) {
743 *mode_a = ATSCMH_SCCC_CODE_HLF;
746 *mode_a = ATSCMH_SCCC_CODE_QTR;
749 *mode_a = ATSCMH_SCCC_CODE_RES;
753 switch ((val >> 4) & 0x03) {
755 *mode_b = ATSCMH_SCCC_CODE_HLF;
758 *mode_b = ATSCMH_SCCC_CODE_QTR;
761 *mode_b = ATSCMH_SCCC_CODE_RES;
765 switch ((val >> 2) & 0x03) {
767 *mode_c = ATSCMH_SCCC_CODE_HLF;
770 *mode_c = ATSCMH_SCCC_CODE_QTR;
773 *mode_c = ATSCMH_SCCC_CODE_RES;
777 switch (val & 0x03) {
779 *mode_d = ATSCMH_SCCC_CODE_HLF;
782 *mode_d = ATSCMH_SCCC_CODE_QTR;
785 *mode_d = ATSCMH_SCCC_CODE_RES;
792 /* ------------------------------------------------------------------------ */
795 static int lg216x_read_fic_err_count(struct lg216x_state *state, u8 *err)
802 switch (state->cfg->lg_chip) {
804 ret = lg216x_read_reg(state, 0x0012, &fic_err);
807 ret = lg216x_read_reg(state, 0x001e, &fic_err);
818 static int lg2160_read_crc_err_count(struct lg216x_state *state, u16 *err)
820 u8 crc_err1, crc_err2;
825 ret = lg216x_read_reg(state, 0x0411, &crc_err1);
829 ret = lg216x_read_reg(state, 0x0412, &crc_err2);
833 *err = (u16)(((crc_err2 & 0x0f) << 8) | crc_err1);
838 static int lg2161_read_crc_err_count(struct lg216x_state *state, u16 *err)
845 ret = lg216x_read_reg(state, 0x0612, &crc_err);
854 static int lg216x_read_crc_err_count(struct lg216x_state *state, u16 *err)
857 switch (state->cfg->lg_chip) {
859 ret = lg2160_read_crc_err_count(state, err);
862 ret = lg2161_read_crc_err_count(state, err);
871 static int lg2160_read_rs_err_count(struct lg216x_state *state, u16 *err)
878 ret = lg216x_read_reg(state, 0x0413, &rs_err1);
882 ret = lg216x_read_reg(state, 0x0414, &rs_err2);
886 *err = (u16)(((rs_err2 & 0x0f) << 8) | rs_err1);
891 static int lg2161_read_rs_err_count(struct lg216x_state *state, u16 *err)
898 ret = lg216x_read_reg(state, 0x0613, &rs_err1);
902 ret = lg216x_read_reg(state, 0x0614, &rs_err2);
906 *err = (u16)((rs_err1 << 8) | rs_err2);
911 static int lg216x_read_rs_err_count(struct lg216x_state *state, u16 *err)
914 switch (state->cfg->lg_chip) {
916 ret = lg2160_read_rs_err_count(state, err);
919 ret = lg2161_read_rs_err_count(state, err);
929 /* ------------------------------------------------------------------------ */
931 static int lg216x_get_frontend(struct dvb_frontend *fe,
932 struct dtv_frontend_properties *c)
934 struct lg216x_state *state = fe->demodulator_priv;
939 c->modulation = VSB_8;
940 c->frequency = state->current_frequency;
941 c->delivery_system = SYS_ATSCMH;
943 ret = lg216x_get_fic_version(state,
947 if (state->fic_ver != c->atscmh_fic_ver) {
948 state->fic_ver = c->atscmh_fic_ver;
951 ret = lg2160_get_parade_id(state,
952 &c->atscmh_parade_id);
956 c->atscmh_parade_id = state->parade_id;
958 ret = lg216x_get_nog(state,
962 ret = lg216x_get_tnog(state,
966 ret = lg216x_get_sgn(state,
970 ret = lg216x_get_prc(state,
975 ret = lg216x_get_rs_frame_mode(state,
976 (enum atscmh_rs_frame_mode *)
977 &c->atscmh_rs_frame_mode);
980 ret = lg216x_get_rs_frame_ensemble(state,
981 (enum atscmh_rs_frame_ensemble *)
982 &c->atscmh_rs_frame_ensemble);
985 ret = lg216x_get_rs_code_mode(state,
986 (enum atscmh_rs_code_mode *)
987 &c->atscmh_rs_code_mode_pri,
988 (enum atscmh_rs_code_mode *)
989 &c->atscmh_rs_code_mode_sec);
992 ret = lg216x_get_sccc_block_mode(state,
993 (enum atscmh_sccc_block_mode *)
994 &c->atscmh_sccc_block_mode);
997 ret = lg216x_get_sccc_code_mode(state,
998 (enum atscmh_sccc_code_mode *)
999 &c->atscmh_sccc_code_mode_a,
1000 (enum atscmh_sccc_code_mode *)
1001 &c->atscmh_sccc_code_mode_b,
1002 (enum atscmh_sccc_code_mode *)
1003 &c->atscmh_sccc_code_mode_c,
1004 (enum atscmh_sccc_code_mode *)
1005 &c->atscmh_sccc_code_mode_d);
1010 ret = lg216x_read_fic_err_count(state,
1011 (u8 *)&c->atscmh_fic_err);
1014 ret = lg216x_read_crc_err_count(state,
1015 &c->atscmh_crc_err);
1018 ret = lg216x_read_rs_err_count(state,
1023 switch (state->cfg->lg_chip) {
1025 if (((c->atscmh_rs_err >= 240) &&
1026 (c->atscmh_crc_err >= 240)) &&
1027 ((jiffies_to_msecs(jiffies) - state->last_reset) > 6000))
1028 ret = lg216x_soft_reset(state);
1031 /* no fix needed here (as far as we know) */
1041 static int lg2160_set_frontend(struct dvb_frontend *fe)
1043 struct lg216x_state *state = fe->demodulator_priv;
1044 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1047 lg_dbg("(%d)\n", fe->dtv_property_cache.frequency);
1049 if (fe->ops.tuner_ops.set_params) {
1050 ret = fe->ops.tuner_ops.set_params(fe);
1051 if (fe->ops.i2c_gate_ctrl)
1052 fe->ops.i2c_gate_ctrl(fe, 0);
1055 state->current_frequency = fe->dtv_property_cache.frequency;
1058 ret = lg2160_agc_fix(state, 0, 0);
1061 ret = lg2160_agc_polarity(state, 0, 0);
1064 ret = lg2160_tuner_pwr_save_polarity(state, 1);
1067 ret = lg216x_set_if(state);
1070 ret = lg2160_spectrum_polarity(state, state->cfg->spectral_inversion);
1074 /* be tuned before this point */
1075 ret = lg216x_soft_reset(state);
1079 ret = lg2160_tuner_pwr_save(state, 0);
1083 switch (state->cfg->lg_chip) {
1085 ret = lg2160_set_spi_clock(state);
1090 ret = lg2161_set_output_interface(state);
1096 ret = lg216x_set_parade(state, fe->dtv_property_cache.atscmh_parade_id);
1100 ret = lg216x_set_ensemble(state,
1101 fe->dtv_property_cache.atscmh_rs_frame_ensemble);
1105 ret = lg216x_initialize(state);
1109 ret = lg216x_enable_fic(state, 1);
1112 lg216x_get_frontend(fe, c);
1117 /* ------------------------------------------------------------------------ */
1119 static int lg2160_read_lock_status(struct lg216x_state *state,
1120 int *acq_lock, int *sync_lock)
1128 ret = lg216x_read_reg(state, 0x011b, &val);
1132 *sync_lock = (val & 0x20) ? 0 : 1;
1133 *acq_lock = (val & 0x40) ? 0 : 1;
1138 #ifdef USE_LG2161_LOCK_BITS
1139 static int lg2161_read_lock_status(struct lg216x_state *state,
1140 int *acq_lock, int *sync_lock)
1148 ret = lg216x_read_reg(state, 0x0304, &val);
1152 *sync_lock = (val & 0x80) ? 0 : 1;
1154 ret = lg216x_read_reg(state, 0x011b, &val);
1158 *acq_lock = (val & 0x40) ? 0 : 1;
1164 static int lg216x_read_lock_status(struct lg216x_state *state,
1165 int *acq_lock, int *sync_lock)
1167 #ifdef USE_LG2161_LOCK_BITS
1169 switch (state->cfg->lg_chip) {
1171 ret = lg2160_read_lock_status(state, acq_lock, sync_lock);
1174 ret = lg2161_read_lock_status(state, acq_lock, sync_lock);
1182 return lg2160_read_lock_status(state, acq_lock, sync_lock);
1186 static int lg216x_read_status(struct dvb_frontend *fe, enum fe_status *status)
1188 struct lg216x_state *state = fe->demodulator_priv;
1189 int ret, acq_lock, sync_lock;
1193 ret = lg216x_read_lock_status(state, &acq_lock, &sync_lock);
1198 acq_lock ? "SIGNALEXIST " : "",
1199 sync_lock ? "SYNCLOCK" : "");
1202 *status |= FE_HAS_SIGNAL;
1204 *status |= FE_HAS_SYNC;
1207 *status |= FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_LOCK;
1213 /* ------------------------------------------------------------------------ */
1215 static int lg2160_read_snr(struct dvb_frontend *fe, u16 *snr)
1217 struct lg216x_state *state = fe->demodulator_priv;
1223 ret = lg216x_read_reg(state, 0x0202, &snr1);
1227 ret = lg216x_read_reg(state, 0x0203, &snr2);
1231 if ((snr1 == 0xba) || (snr2 == 0xdf))
1235 *snr = ((snr1 >> 4) * 100) + ((snr1 & 0x0f) * 10) + (snr2 >> 4);
1237 *snr = (snr2 | (snr1 << 8));
1243 static int lg2161_read_snr(struct dvb_frontend *fe, u16 *snr)
1245 struct lg216x_state *state = fe->demodulator_priv;
1251 ret = lg216x_read_reg(state, 0x0302, &snr1);
1255 ret = lg216x_read_reg(state, 0x0303, &snr2);
1259 if ((snr1 == 0xba) || (snr2 == 0xfd))
1263 *snr = ((snr1 >> 4) * 100) + ((snr1 & 0x0f) * 10) + (snr2 & 0x0f);
1268 static int lg216x_read_signal_strength(struct dvb_frontend *fe,
1272 /* borrowed from lgdt330x.c
1274 * Calculate strength from SNR up to 35dB
1275 * Even though the SNR can go higher than 35dB,
1276 * there is some comfort factor in having a range of
1277 * strong signals that can show at 100%
1279 struct lg216x_state *state = fe->demodulator_priv;
1285 ret = fe->ops.read_snr(fe, &snr);
1288 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
1289 /* scale the range 0 - 35*2^24 into 0 - 65535 */
1290 if (state->snr >= 8960 * 0x10000)
1293 *strength = state->snr / 8960;
1301 /* ------------------------------------------------------------------------ */
1303 static int lg216x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1306 struct lg216x_state *state = fe->demodulator_priv;
1309 ret = lg216x_read_rs_err_count(state,
1310 &fe->dtv_property_cache.atscmh_rs_err);
1314 *ucblocks = fe->dtv_property_cache.atscmh_rs_err;
1322 static int lg216x_get_tune_settings(struct dvb_frontend *fe,
1323 struct dvb_frontend_tune_settings
1326 fe_tune_settings->min_delay_ms = 500;
1331 static void lg216x_release(struct dvb_frontend *fe)
1333 struct lg216x_state *state = fe->demodulator_priv;
1338 static const struct dvb_frontend_ops lg2160_ops = {
1339 .delsys = { SYS_ATSCMH },
1341 .name = "LG Electronics LG2160 ATSC/MH Frontend",
1342 .frequency_min_hz = 54 * MHz,
1343 .frequency_max_hz = 858 * MHz,
1344 .frequency_stepsize_hz = 62500,
1346 .i2c_gate_ctrl = lg216x_i2c_gate_ctrl,
1348 .init = lg216x_init,
1349 .sleep = lg216x_sleep,
1351 .set_frontend = lg2160_set_frontend,
1352 .get_frontend = lg216x_get_frontend,
1353 .get_tune_settings = lg216x_get_tune_settings,
1354 .read_status = lg216x_read_status,
1356 .read_ber = lg216x_read_ber,
1358 .read_signal_strength = lg216x_read_signal_strength,
1359 .read_snr = lg2160_read_snr,
1360 .read_ucblocks = lg216x_read_ucblocks,
1361 .release = lg216x_release,
1364 static const struct dvb_frontend_ops lg2161_ops = {
1365 .delsys = { SYS_ATSCMH },
1367 .name = "LG Electronics LG2161 ATSC/MH Frontend",
1368 .frequency_min_hz = 54 * MHz,
1369 .frequency_max_hz = 858 * MHz,
1370 .frequency_stepsize_hz = 62500,
1372 .i2c_gate_ctrl = lg216x_i2c_gate_ctrl,
1374 .init = lg216x_init,
1375 .sleep = lg216x_sleep,
1377 .set_frontend = lg2160_set_frontend,
1378 .get_frontend = lg216x_get_frontend,
1379 .get_tune_settings = lg216x_get_tune_settings,
1380 .read_status = lg216x_read_status,
1382 .read_ber = lg216x_read_ber,
1384 .read_signal_strength = lg216x_read_signal_strength,
1385 .read_snr = lg2161_read_snr,
1386 .read_ucblocks = lg216x_read_ucblocks,
1387 .release = lg216x_release,
1390 struct dvb_frontend *lg2160_attach(const struct lg2160_config *config,
1391 struct i2c_adapter *i2c_adap)
1393 struct lg216x_state *state = NULL;
1395 lg_dbg("(%d-%04x)\n",
1396 i2c_adap ? i2c_adapter_id(i2c_adap) : 0,
1397 config ? config->i2c_addr : 0);
1399 state = kzalloc(sizeof(struct lg216x_state), GFP_KERNEL);
1403 state->cfg = config;
1404 state->i2c_adap = i2c_adap;
1405 state->fic_ver = 0xff;
1406 state->parade_id = 0xff;
1408 switch (config->lg_chip) {
1410 lg_warn("invalid chip requested, defaulting to LG2160");
1413 memcpy(&state->frontend.ops, &lg2160_ops,
1414 sizeof(struct dvb_frontend_ops));
1417 memcpy(&state->frontend.ops, &lg2161_ops,
1418 sizeof(struct dvb_frontend_ops));
1422 state->frontend.demodulator_priv = state;
1423 state->current_frequency = -1;
1424 /* parade 1 by default */
1425 state->frontend.dtv_property_cache.atscmh_parade_id = 1;
1427 return &state->frontend;
1429 EXPORT_SYMBOL(lg2160_attach);
1431 MODULE_DESCRIPTION("LG Electronics LG216x ATSC/MH Demodulator Driver");
1432 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1433 MODULE_LICENSE("GPL");
1434 MODULE_VERSION("0.3");