1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Joe.C <yingjoe.chen@mediatek.com>
8 #include <linux/irqchip.h>
9 #include <linux/irqdomain.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_address.h>
14 #include <linux/slab.h>
15 #include <linux/spinlock.h>
17 struct mtk_sysirq_chip_data {
20 void __iomem **intpol_bases;
26 static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
28 irq_hw_number_t hwirq = data->hwirq;
29 struct mtk_sysirq_chip_data *chip_data = data->chip_data;
30 u8 intpol_idx = chip_data->intpol_idx[hwirq];
32 u32 offset, reg_index, value;
36 base = chip_data->intpol_bases[intpol_idx];
37 reg_index = chip_data->which_word[hwirq];
38 offset = hwirq & 0x1f;
40 raw_spin_lock_irqsave(&chip_data->lock, flags);
41 value = readl_relaxed(base + reg_index * 4);
42 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
43 if (type == IRQ_TYPE_LEVEL_LOW)
44 type = IRQ_TYPE_LEVEL_HIGH;
46 type = IRQ_TYPE_EDGE_RISING;
47 value |= (1 << offset);
49 value &= ~(1 << offset);
52 writel_relaxed(value, base + reg_index * 4);
54 data = data->parent_data;
55 ret = data->chip->irq_set_type(data, type);
56 raw_spin_unlock_irqrestore(&chip_data->lock, flags);
60 static struct irq_chip mtk_sysirq_chip = {
62 .irq_mask = irq_chip_mask_parent,
63 .irq_unmask = irq_chip_unmask_parent,
64 .irq_eoi = irq_chip_eoi_parent,
65 .irq_set_type = mtk_sysirq_set_type,
66 .irq_retrigger = irq_chip_retrigger_hierarchy,
67 .irq_set_affinity = irq_chip_set_affinity_parent,
68 .flags = IRQCHIP_SKIP_SET_WAKE,
71 static int mtk_sysirq_domain_translate(struct irq_domain *d,
72 struct irq_fwspec *fwspec,
76 if (is_of_node(fwspec->fwnode)) {
77 if (fwspec->param_count != 3)
80 /* No PPI should point to this domain */
81 if (fwspec->param[0] != 0)
84 *hwirq = fwspec->param[1];
85 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
92 static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
93 unsigned int nr_irqs, void *arg)
96 irq_hw_number_t hwirq;
97 struct irq_fwspec *fwspec = arg;
98 struct irq_fwspec gic_fwspec = *fwspec;
100 if (fwspec->param_count != 3)
103 /* sysirq doesn't support PPI */
104 if (fwspec->param[0])
107 hwirq = fwspec->param[1];
108 for (i = 0; i < nr_irqs; i++)
109 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
113 gic_fwspec.fwnode = domain->parent->fwnode;
114 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec);
117 static const struct irq_domain_ops sysirq_domain_ops = {
118 .translate = mtk_sysirq_domain_translate,
119 .alloc = mtk_sysirq_domain_alloc,
120 .free = irq_domain_free_irqs_common,
123 static int __init mtk_sysirq_of_init(struct device_node *node,
124 struct device_node *parent)
126 struct irq_domain *domain, *domain_parent;
127 struct mtk_sysirq_chip_data *chip_data;
128 int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
130 domain_parent = irq_find_host(parent);
131 if (!domain_parent) {
132 pr_err("mtk_sysirq: interrupt-parent not found\n");
136 chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
140 while (of_get_address(node, i++, NULL, NULL))
143 if (nr_intpol_bases == 0) {
144 pr_err("mtk_sysirq: base address not specified\n");
149 chip_data->intpol_words = kcalloc(nr_intpol_bases,
150 sizeof(*chip_data->intpol_words),
152 if (!chip_data->intpol_words) {
157 chip_data->intpol_bases = kcalloc(nr_intpol_bases,
158 sizeof(*chip_data->intpol_bases),
160 if (!chip_data->intpol_bases) {
162 goto out_free_intpol_words;
165 for (i = 0; i < nr_intpol_bases; i++) {
168 ret = of_address_to_resource(node, i, &res);
169 size = resource_size(&res);
170 intpol_num += size * 8;
171 chip_data->intpol_words[i] = size / 4;
172 chip_data->intpol_bases[i] = of_iomap(node, i);
173 if (ret || !chip_data->intpol_bases[i]) {
174 pr_err("%pOF: couldn't map region %d\n", node, i);
176 goto out_free_intpol;
180 chip_data->intpol_idx = kcalloc(intpol_num,
181 sizeof(*chip_data->intpol_idx),
183 if (!chip_data->intpol_idx) {
185 goto out_free_intpol;
188 chip_data->which_word = kcalloc(intpol_num,
189 sizeof(*chip_data->which_word),
191 if (!chip_data->which_word) {
193 goto out_free_intpol_idx;
197 * assign an index of the intpol_bases for each irq
198 * to set it fast later
200 for (i = 0; i < intpol_num ; i++) {
201 u32 word = i / 32, j;
203 for (j = 0; word >= chip_data->intpol_words[j] ; j++)
204 word -= chip_data->intpol_words[j];
206 chip_data->intpol_idx[i] = j;
207 chip_data->which_word[i] = word;
210 domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
211 &sysirq_domain_ops, chip_data);
214 goto out_free_which_word;
216 raw_spin_lock_init(&chip_data->lock);
221 kfree(chip_data->which_word);
223 kfree(chip_data->intpol_idx);
225 for (i = 0; i < nr_intpol_bases; i++)
226 if (chip_data->intpol_bases[i])
227 iounmap(chip_data->intpol_bases[i]);
228 kfree(chip_data->intpol_bases);
229 out_free_intpol_words:
230 kfree(chip_data->intpol_words);
235 IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);