3 * Copyright (C) 2012 Hideki EIRAKU
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
10 #include <linux/err.h>
11 #include <linux/export.h>
13 #include <linux/platform_device.h>
14 #include <linux/slab.h>
15 #include <linux/platform_data/sh_ipmmu.h>
16 #include "shmobile-ipmmu.h"
24 #define IMCTR1_TLBEN (1 << 0)
25 #define IMCTR1_FLUSH (1 << 1)
27 static void ipmmu_reg_write(struct shmobile_ipmmu *ipmmu, unsigned long reg_off,
30 iowrite32(data, ipmmu->ipmmu_base + reg_off);
33 void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu)
38 mutex_lock(&ipmmu->flush_lock);
39 if (ipmmu->tlb_enabled)
40 ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH | IMCTR1_TLBEN);
42 ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH);
43 mutex_unlock(&ipmmu->flush_lock);
46 void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size,
52 mutex_lock(&ipmmu->flush_lock);
55 ipmmu->tlb_enabled = 0;
58 ipmmu_reg_write(ipmmu, IMTTBCR, 1);
59 ipmmu->tlb_enabled = 1;
62 ipmmu_reg_write(ipmmu, IMTTBCR, 2);
63 ipmmu->tlb_enabled = 1;
66 ipmmu_reg_write(ipmmu, IMTTBCR, 3);
67 ipmmu->tlb_enabled = 1;
70 ipmmu_reg_write(ipmmu, IMTTBCR, 4);
71 ipmmu->tlb_enabled = 1;
74 ipmmu_reg_write(ipmmu, IMTTBCR, 5);
75 ipmmu->tlb_enabled = 1;
78 ipmmu_reg_write(ipmmu, IMTTBCR, 6);
79 ipmmu->tlb_enabled = 1;
82 ipmmu_reg_write(ipmmu, IMTTBCR, 7);
83 ipmmu->tlb_enabled = 1;
86 ipmmu_reg_write(ipmmu, IMTTBR, phys);
87 ipmmu_reg_write(ipmmu, IMASID, asid);
88 mutex_unlock(&ipmmu->flush_lock);
91 static int ipmmu_probe(struct platform_device *pdev)
93 struct shmobile_ipmmu *ipmmu;
95 struct shmobile_ipmmu_platform_data *pdata = pdev->dev.platform_data;
97 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
99 dev_err(&pdev->dev, "cannot get platform resources\n");
102 ipmmu = devm_kzalloc(&pdev->dev, sizeof(*ipmmu), GFP_KERNEL);
104 dev_err(&pdev->dev, "cannot allocate device data\n");
107 mutex_init(&ipmmu->flush_lock);
108 ipmmu->dev = &pdev->dev;
109 ipmmu->ipmmu_base = devm_ioremap_nocache(&pdev->dev, res->start,
111 if (!ipmmu->ipmmu_base) {
112 dev_err(&pdev->dev, "ioremap_nocache failed\n");
115 ipmmu->dev_names = pdata->dev_names;
116 ipmmu->num_dev_names = pdata->num_dev_names;
117 platform_set_drvdata(pdev, ipmmu);
118 ipmmu_reg_write(ipmmu, IMCTR1, 0x0); /* disable TLB */
119 ipmmu_reg_write(ipmmu, IMCTR2, 0x0); /* disable PMB */
120 ipmmu_iommu_init(ipmmu);
124 static struct platform_driver ipmmu_driver = {
125 .probe = ipmmu_probe,
127 .owner = THIS_MODULE,
132 static int __init ipmmu_init(void)
134 return platform_driver_register(&ipmmu_driver);
136 subsys_initcall(ipmmu_init);