1 // SPDX-License-Identifier: GPL-2.0-only
3 * IOMMU driver for BCM2712
5 * Copyright (c) 2023 Raspberry Pi Ltd.
8 #include "bcm2712-iommu.h"
10 #include <linux/err.h>
11 #include <linux/of_platform.h>
12 #include <linux/platform_device.h>
13 #include <linux/spinlock.h>
15 #define MMUC_CONTROL_ENABLE 1
16 #define MMUC_CONTROL_FLUSH 2
17 #define MMUC_CONTROL_FLUSHING 4
19 void bcm2712_iommu_cache_flush(struct bcm2712_iommu_cache *cache)
24 spin_lock_irqsave(&cache->hw_lock, flags);
25 if (cache->reg_base) {
26 /* Enable and flush the TLB cache */
27 writel(MMUC_CONTROL_ENABLE | MMUC_CONTROL_FLUSH,
30 /* Wait for flush to complete: it should be very quick */
31 for (i = 0; i < 1024; i++) {
32 if (!(MMUC_CONTROL_FLUSHING & readl(cache->reg_base)))
37 spin_unlock_irqrestore(&cache->hw_lock, flags);
40 static int bcm2712_iommu_cache_probe(struct platform_device *pdev)
42 struct bcm2712_iommu_cache *cache;
44 dev_info(&pdev->dev, __func__);
45 cache = devm_kzalloc(&pdev->dev, sizeof(*cache), GFP_KERNEL);
49 cache->dev = &pdev->dev;
50 platform_set_drvdata(pdev, cache);
51 spin_lock_init(&cache->hw_lock);
53 /* Get IOMMUC registers; we only use the first register (IOMMUC_CTRL) */
54 cache->reg_base = devm_platform_ioremap_resource(pdev, 0);
55 if (IS_ERR(cache->reg_base)) {
56 dev_err(&pdev->dev, "Failed to get IOMMU Cache registers address\n");
57 cache->reg_base = NULL;
62 static const struct of_device_id bcm2712_iommu_cache_of_match[] = {
64 . compatible = "brcm,bcm2712-iommuc"
69 static struct platform_driver bcm2712_iommu_cache_driver = {
70 .probe = bcm2712_iommu_cache_probe,
72 .name = "bcm2712-iommu-cache",
73 .of_match_table = bcm2712_iommu_cache_of_match
77 builtin_platform_driver(bcm2712_iommu_cache_driver);