1 // SPDX-License-Identifier: GPL-2.0-only
3 * Apple DART (Device Address Resolution Table) IOMMU driver
5 * Copyright (C) 2021 The Asahi Linux Contributors
7 * Based on arm/arm-smmu/arm-ssmu.c and arm/arm-smmu-v3/arm-smmu-v3.c
8 * Copyright (C) 2013 ARM Limited
9 * Copyright (C) 2015 ARM Limited
10 * and on exynos-iommu.c
11 * Copyright (c) 2011,2016 Samsung Electronics Co., Ltd.
14 #include <linux/atomic.h>
15 #include <linux/bitfield.h>
16 #include <linux/clk.h>
17 #include <linux/dev_printk.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/io-pgtable.h>
22 #include <linux/iommu.h>
23 #include <linux/iopoll.h>
24 #include <linux/module.h>
26 #include <linux/of_address.h>
27 #include <linux/of_iommu.h>
28 #include <linux/of_platform.h>
29 #include <linux/pci.h>
30 #include <linux/platform_device.h>
31 #include <linux/slab.h>
32 #include <linux/swab.h>
33 #include <linux/types.h>
35 #include "dma-iommu.h"
37 #define DART_MAX_STREAMS 256
38 #define DART_MAX_TTBR 4
39 #define MAX_DARTS_PER_DEVICE 2
41 /* Common registers */
43 #define DART_PARAMS1 0x00
44 #define DART_PARAMS1_PAGE_SHIFT GENMASK(27, 24)
46 #define DART_PARAMS2 0x04
47 #define DART_PARAMS2_BYPASS_SUPPORT BIT(0)
49 /* T8020/T6000 registers */
51 #define DART_T8020_STREAM_COMMAND 0x20
52 #define DART_T8020_STREAM_COMMAND_BUSY BIT(2)
53 #define DART_T8020_STREAM_COMMAND_INVALIDATE BIT(20)
55 #define DART_T8020_STREAM_SELECT 0x34
57 #define DART_T8020_ERROR 0x40
58 #define DART_T8020_ERROR_STREAM GENMASK(27, 24)
59 #define DART_T8020_ERROR_CODE GENMASK(11, 0)
60 #define DART_T8020_ERROR_FLAG BIT(31)
62 #define DART_T8020_ERROR_READ_FAULT BIT(4)
63 #define DART_T8020_ERROR_WRITE_FAULT BIT(3)
64 #define DART_T8020_ERROR_NO_PTE BIT(2)
65 #define DART_T8020_ERROR_NO_PMD BIT(1)
66 #define DART_T8020_ERROR_NO_TTBR BIT(0)
68 #define DART_T8020_CONFIG 0x60
69 #define DART_T8020_CONFIG_LOCK BIT(15)
71 #define DART_STREAM_COMMAND_BUSY_TIMEOUT 100
73 #define DART_T8020_ERROR_ADDR_HI 0x54
74 #define DART_T8020_ERROR_ADDR_LO 0x50
76 #define DART_T8020_STREAMS_ENABLE 0xfc
78 #define DART_T8020_TCR 0x100
79 #define DART_T8020_TCR_TRANSLATE_ENABLE BIT(7)
80 #define DART_T8020_TCR_BYPASS_DART BIT(8)
81 #define DART_T8020_TCR_BYPASS_DAPF BIT(12)
83 #define DART_T8020_TTBR 0x200
84 #define DART_T8020_TTBR_VALID BIT(31)
85 #define DART_T8020_TTBR_ADDR_FIELD_SHIFT 0
86 #define DART_T8020_TTBR_SHIFT 12
90 #define DART_T8110_PARAMS3 0x08
91 #define DART_T8110_PARAMS3_PA_WIDTH GENMASK(29, 24)
92 #define DART_T8110_PARAMS3_VA_WIDTH GENMASK(21, 16)
93 #define DART_T8110_PARAMS3_VER_MAJ GENMASK(15, 8)
94 #define DART_T8110_PARAMS3_VER_MIN GENMASK(7, 0)
96 #define DART_T8110_PARAMS4 0x0c
97 #define DART_T8110_PARAMS4_NUM_CLIENTS GENMASK(24, 16)
98 #define DART_T8110_PARAMS4_NUM_SIDS GENMASK(8, 0)
100 #define DART_T8110_TLB_CMD 0x80
101 #define DART_T8110_TLB_CMD_BUSY BIT(31)
102 #define DART_T8110_TLB_CMD_OP GENMASK(10, 8)
103 #define DART_T8110_TLB_CMD_OP_FLUSH_ALL 0
104 #define DART_T8110_TLB_CMD_OP_FLUSH_SID 1
105 #define DART_T8110_TLB_CMD_STREAM GENMASK(7, 0)
107 #define DART_T8110_ERROR 0x100
108 #define DART_T8110_ERROR_STREAM GENMASK(27, 20)
109 #define DART_T8110_ERROR_CODE GENMASK(14, 0)
110 #define DART_T8110_ERROR_FLAG BIT(31)
112 #define DART_T8110_ERROR_MASK 0x104
114 #define DART_T8110_ERROR_READ_FAULT BIT(5)
115 #define DART_T8110_ERROR_WRITE_FAULT BIT(4)
116 #define DART_T8110_ERROR_NO_PTE BIT(3)
117 #define DART_T8110_ERROR_NO_PMD BIT(2)
118 #define DART_T8110_ERROR_NO_PGD BIT(1)
119 #define DART_T8110_ERROR_NO_TTBR BIT(0)
121 #define DART_T8110_ERROR_ADDR_LO 0x170
122 #define DART_T8110_ERROR_ADDR_HI 0x174
124 #define DART_T8110_PROTECT 0x200
125 #define DART_T8110_UNPROTECT 0x204
126 #define DART_T8110_PROTECT_LOCK 0x208
127 #define DART_T8110_PROTECT_TTBR_TCR BIT(0)
129 #define DART_T8110_ENABLE_STREAMS 0xc00
130 #define DART_T8110_DISABLE_STREAMS 0xc20
132 #define DART_T8110_TCR 0x1000
133 #define DART_T8110_TCR_REMAP GENMASK(11, 8)
134 #define DART_T8110_TCR_REMAP_EN BIT(7)
135 #define DART_T8110_TCR_BYPASS_DAPF BIT(2)
136 #define DART_T8110_TCR_BYPASS_DART BIT(1)
137 #define DART_T8110_TCR_TRANSLATE_ENABLE BIT(0)
139 #define DART_T8110_TTBR 0x1400
140 #define DART_T8110_TTBR_VALID BIT(0)
141 #define DART_T8110_TTBR_ADDR_FIELD_SHIFT 2
142 #define DART_T8110_TTBR_SHIFT 14
144 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))
146 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
147 (((dart)->hw->ttbr_count * (sid)) << 2) + \
150 struct apple_dart_stream_map;
158 struct apple_dart_hw {
160 irqreturn_t (*irq_handler)(int irq, void *dev);
161 int (*invalidate_tlb)(struct apple_dart_stream_map *stream_map);
164 enum io_pgtable_fmt fmt;
182 u64 ttbr_addr_field_shift;
188 * Private structure associated with each DART device.
190 * @dev: device struct
191 * @hw: SoC-specific hardware data
192 * @regs: mapped MMIO region
193 * @irq: interrupt number, can be shared with other DARTs
194 * @clks: clocks associated with this DART
195 * @num_clks: number of @clks
196 * @lock: lock for hardware operations involving this dart
197 * @pgsize: pagesize supported by this DART
198 * @supports_bypass: indicates if this DART supports bypass mode
199 * @force_bypass: force bypass mode due to pagesize mismatch?
200 * @sid2group: maps stream ids to iommu_groups
201 * @iommu: iommu core device
205 const struct apple_dart_hw *hw;
210 struct clk_bulk_data *clks;
219 u32 supports_bypass : 1;
220 u32 force_bypass : 1;
222 struct iommu_group *sid2group[DART_MAX_STREAMS];
223 struct iommu_device iommu;
225 u32 save_tcr[DART_MAX_STREAMS];
226 u32 save_ttbr[DART_MAX_STREAMS][DART_MAX_TTBR];
230 * Convenience struct to identify streams.
232 * The normal variant is used inside apple_dart_master_cfg which isn't written
234 * The atomic variant is used inside apple_dart_domain where we have to guard
235 * against races from potential parallel calls to attach/detach_device.
236 * Note that even inside the atomic variant the apple_dart pointer is not
237 * protected: This pointer is initialized once under the domain init mutex
238 * and never changed again afterwards. Devices with different dart pointers
239 * cannot be attached to the same domain.
242 * @sid stream id bitmap
244 struct apple_dart_stream_map {
245 struct apple_dart *dart;
246 DECLARE_BITMAP(sidmap, DART_MAX_STREAMS);
248 struct apple_dart_atomic_stream_map {
249 struct apple_dart *dart;
250 atomic_long_t sidmap[BITS_TO_LONGS(DART_MAX_STREAMS)];
254 * This structure is attached to each iommu domain handled by a DART.
256 * @pgtbl_ops: pagetable ops allocated by io-pgtable
257 * @finalized: true if the domain has been completely initialized
258 * @init_lock: protects domain initialization
259 * @stream_maps: streams attached to this domain (valid for DMA/UNMANAGED only)
260 * @domain: core iommu domain pointer
262 struct apple_dart_domain {
263 struct io_pgtable_ops *pgtbl_ops;
266 struct mutex init_lock;
267 struct apple_dart_atomic_stream_map stream_maps[MAX_DARTS_PER_DEVICE];
269 struct iommu_domain domain;
273 * This structure is attached to devices with dev_iommu_priv_set() on of_xlate
274 * and contains a list of streams bound to this device.
275 * So far the worst case seen is a single device with two streams
276 * from different darts, such that this simple static array is enough.
278 * @streams: streams for this device
280 struct apple_dart_master_cfg {
281 struct apple_dart_stream_map stream_maps[MAX_DARTS_PER_DEVICE];
285 * Helper macro to iterate over apple_dart_master_cfg.stream_maps and
286 * apple_dart_domain.stream_maps
288 * @i int used as loop variable
289 * @base pointer to base struct (apple_dart_master_cfg or apple_dart_domain)
290 * @stream pointer to the apple_dart_streams struct for each loop iteration
292 #define for_each_stream_map(i, base, stream_map) \
293 for (i = 0, stream_map = &(base)->stream_maps[0]; \
294 i < MAX_DARTS_PER_DEVICE && stream_map->dart; \
295 stream_map = &(base)->stream_maps[++i])
297 static struct platform_driver apple_dart_driver;
298 static const struct iommu_ops apple_dart_iommu_ops;
300 static struct apple_dart_domain *to_dart_domain(struct iommu_domain *dom)
302 return container_of(dom, struct apple_dart_domain, domain);
306 apple_dart_hw_enable_translation(struct apple_dart_stream_map *stream_map)
308 struct apple_dart *dart = stream_map->dart;
311 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
312 writel(dart->hw->tcr_enabled, dart->regs + DART_TCR(dart, sid));
315 static void apple_dart_hw_disable_dma(struct apple_dart_stream_map *stream_map)
317 struct apple_dart *dart = stream_map->dart;
320 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
321 writel(dart->hw->tcr_disabled, dart->regs + DART_TCR(dart, sid));
325 apple_dart_hw_enable_bypass(struct apple_dart_stream_map *stream_map)
327 struct apple_dart *dart = stream_map->dart;
330 WARN_ON(!stream_map->dart->supports_bypass);
331 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
332 writel(dart->hw->tcr_bypass,
333 dart->regs + DART_TCR(dart, sid));
336 static void apple_dart_hw_set_ttbr(struct apple_dart_stream_map *stream_map,
337 u8 idx, phys_addr_t paddr)
339 struct apple_dart *dart = stream_map->dart;
342 WARN_ON(paddr & ((1 << dart->hw->ttbr_shift) - 1));
343 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
344 writel(dart->hw->ttbr_valid |
345 (paddr >> dart->hw->ttbr_shift) << dart->hw->ttbr_addr_field_shift,
346 dart->regs + DART_TTBR(dart, sid, idx));
349 static void apple_dart_hw_clear_ttbr(struct apple_dart_stream_map *stream_map,
352 struct apple_dart *dart = stream_map->dart;
355 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
356 writel(0, dart->regs + DART_TTBR(dart, sid, idx));
360 apple_dart_hw_clear_all_ttbrs(struct apple_dart_stream_map *stream_map)
364 for (i = 0; i < stream_map->dart->hw->ttbr_count; ++i)
365 apple_dart_hw_clear_ttbr(stream_map, i);
369 apple_dart_t8020_hw_stream_command(struct apple_dart_stream_map *stream_map,
376 spin_lock_irqsave(&stream_map->dart->lock, flags);
378 writel(stream_map->sidmap[0], stream_map->dart->regs + DART_T8020_STREAM_SELECT);
379 writel(command, stream_map->dart->regs + DART_T8020_STREAM_COMMAND);
381 ret = readl_poll_timeout_atomic(
382 stream_map->dart->regs + DART_T8020_STREAM_COMMAND, command_reg,
383 !(command_reg & DART_T8020_STREAM_COMMAND_BUSY), 1,
384 DART_STREAM_COMMAND_BUSY_TIMEOUT);
386 spin_unlock_irqrestore(&stream_map->dart->lock, flags);
389 dev_err(stream_map->dart->dev,
390 "busy bit did not clear after command %x for streams %lx\n",
391 command, stream_map->sidmap[0]);
399 apple_dart_t8110_hw_tlb_command(struct apple_dart_stream_map *stream_map,
402 struct apple_dart *dart = stream_map->dart;
407 spin_lock_irqsave(&dart->lock, flags);
409 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) {
410 u32 val = FIELD_PREP(DART_T8110_TLB_CMD_OP, command) |
411 FIELD_PREP(DART_T8110_TLB_CMD_STREAM, sid);
412 writel(val, dart->regs + DART_T8110_TLB_CMD);
414 ret = readl_poll_timeout_atomic(
415 dart->regs + DART_T8110_TLB_CMD, val,
416 !(val & DART_T8110_TLB_CMD_BUSY), 1,
417 DART_STREAM_COMMAND_BUSY_TIMEOUT);
424 spin_unlock_irqrestore(&dart->lock, flags);
427 dev_err(stream_map->dart->dev,
428 "busy bit did not clear after command %x for stream %d\n",
437 apple_dart_t8020_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map)
439 return apple_dart_t8020_hw_stream_command(
440 stream_map, DART_T8020_STREAM_COMMAND_INVALIDATE);
444 apple_dart_t8110_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map)
446 return apple_dart_t8110_hw_tlb_command(
447 stream_map, DART_T8110_TLB_CMD_OP_FLUSH_SID);
450 static int apple_dart_hw_reset(struct apple_dart *dart)
453 struct apple_dart_stream_map stream_map;
456 config = readl(dart->regs + dart->hw->lock);
457 if (config & dart->hw->lock_bit) {
458 dev_err(dart->dev, "DART is locked down until reboot: %08x\n",
463 stream_map.dart = dart;
464 bitmap_zero(stream_map.sidmap, DART_MAX_STREAMS);
465 bitmap_set(stream_map.sidmap, 0, dart->num_streams);
466 apple_dart_hw_disable_dma(&stream_map);
467 apple_dart_hw_clear_all_ttbrs(&stream_map);
469 /* enable all streams globally since TCR is used to control isolation */
470 for (i = 0; i < BITS_TO_U32(dart->num_streams); i++)
471 writel(U32_MAX, dart->regs + dart->hw->enable_streams + 4 * i);
473 /* clear any pending errors before the interrupt is unmasked */
474 writel(readl(dart->regs + dart->hw->error), dart->regs + dart->hw->error);
476 if (dart->hw->type == DART_T8110)
477 writel(0, dart->regs + DART_T8110_ERROR_MASK);
479 return dart->hw->invalidate_tlb(&stream_map);
482 static void apple_dart_domain_flush_tlb(struct apple_dart_domain *domain)
485 struct apple_dart_atomic_stream_map *domain_stream_map;
486 struct apple_dart_stream_map stream_map;
488 for_each_stream_map(i, domain, domain_stream_map) {
489 stream_map.dart = domain_stream_map->dart;
491 for (j = 0; j < BITS_TO_LONGS(stream_map.dart->num_streams); j++)
492 stream_map.sidmap[j] = atomic_long_read(&domain_stream_map->sidmap[j]);
494 stream_map.dart->hw->invalidate_tlb(&stream_map);
498 static void apple_dart_flush_iotlb_all(struct iommu_domain *domain)
500 apple_dart_domain_flush_tlb(to_dart_domain(domain));
503 static void apple_dart_iotlb_sync(struct iommu_domain *domain,
504 struct iommu_iotlb_gather *gather)
506 apple_dart_domain_flush_tlb(to_dart_domain(domain));
509 static void apple_dart_iotlb_sync_map(struct iommu_domain *domain,
510 unsigned long iova, size_t size)
512 apple_dart_domain_flush_tlb(to_dart_domain(domain));
515 static phys_addr_t apple_dart_iova_to_phys(struct iommu_domain *domain,
518 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
519 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
524 return ops->iova_to_phys(ops, iova);
527 static int apple_dart_map_pages(struct iommu_domain *domain, unsigned long iova,
528 phys_addr_t paddr, size_t pgsize,
529 size_t pgcount, int prot, gfp_t gfp,
532 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
533 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
538 return ops->map_pages(ops, iova, paddr, pgsize, pgcount, prot, gfp,
542 static size_t apple_dart_unmap_pages(struct iommu_domain *domain,
543 unsigned long iova, size_t pgsize,
545 struct iommu_iotlb_gather *gather)
547 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
548 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
550 return ops->unmap_pages(ops, iova, pgsize, pgcount, gather);
554 apple_dart_setup_translation(struct apple_dart_domain *domain,
555 struct apple_dart_stream_map *stream_map)
558 struct io_pgtable_cfg *pgtbl_cfg =
559 &io_pgtable_ops_to_pgtable(domain->pgtbl_ops)->cfg;
561 for (i = 0; i < pgtbl_cfg->apple_dart_cfg.n_ttbrs; ++i)
562 apple_dart_hw_set_ttbr(stream_map, i,
563 pgtbl_cfg->apple_dart_cfg.ttbr[i]);
564 for (; i < stream_map->dart->hw->ttbr_count; ++i)
565 apple_dart_hw_clear_ttbr(stream_map, i);
567 apple_dart_hw_enable_translation(stream_map);
568 stream_map->dart->hw->invalidate_tlb(stream_map);
571 static int apple_dart_finalize_domain(struct iommu_domain *domain,
572 struct apple_dart_master_cfg *cfg)
574 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
575 struct apple_dart *dart = cfg->stream_maps[0].dart;
576 struct io_pgtable_cfg pgtbl_cfg;
580 mutex_lock(&dart_domain->init_lock);
582 if (dart_domain->finalized)
585 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
586 dart_domain->stream_maps[i].dart = cfg->stream_maps[i].dart;
587 for (j = 0; j < BITS_TO_LONGS(dart->num_streams); j++)
588 atomic_long_set(&dart_domain->stream_maps[i].sidmap[j],
589 cfg->stream_maps[i].sidmap[j]);
592 pgtbl_cfg = (struct io_pgtable_cfg){
593 .pgsize_bitmap = dart->pgsize,
597 .iommu_dev = dart->dev,
600 dart_domain->pgtbl_ops =
601 alloc_io_pgtable_ops(dart->hw->fmt, &pgtbl_cfg, domain);
602 if (!dart_domain->pgtbl_ops) {
607 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
608 domain->geometry.aperture_start = 0;
609 domain->geometry.aperture_end = (dma_addr_t)DMA_BIT_MASK(dart->ias);
610 domain->geometry.force_aperture = true;
612 dart_domain->finalized = true;
615 mutex_unlock(&dart_domain->init_lock);
620 apple_dart_mod_streams(struct apple_dart_atomic_stream_map *domain_maps,
621 struct apple_dart_stream_map *master_maps,
626 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
627 if (domain_maps[i].dart != master_maps[i].dart)
631 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
632 if (!domain_maps[i].dart)
634 for (j = 0; j < BITS_TO_LONGS(domain_maps[i].dart->num_streams); j++) {
636 atomic_long_or(master_maps[i].sidmap[j],
637 &domain_maps[i].sidmap[j]);
639 atomic_long_and(~master_maps[i].sidmap[j],
640 &domain_maps[i].sidmap[j]);
647 static int apple_dart_domain_add_streams(struct apple_dart_domain *domain,
648 struct apple_dart_master_cfg *cfg)
650 return apple_dart_mod_streams(domain->stream_maps, cfg->stream_maps,
654 static int apple_dart_attach_dev(struct iommu_domain *domain,
658 struct apple_dart_stream_map *stream_map;
659 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
660 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
662 if (cfg->stream_maps[0].dart->force_bypass &&
663 domain->type != IOMMU_DOMAIN_IDENTITY)
665 if (!cfg->stream_maps[0].dart->supports_bypass &&
666 domain->type == IOMMU_DOMAIN_IDENTITY)
669 ret = apple_dart_finalize_domain(domain, cfg);
673 switch (domain->type) {
675 ret = apple_dart_domain_add_streams(dart_domain, cfg);
679 for_each_stream_map(i, cfg, stream_map)
680 apple_dart_setup_translation(dart_domain, stream_map);
682 case IOMMU_DOMAIN_BLOCKED:
683 for_each_stream_map(i, cfg, stream_map)
684 apple_dart_hw_disable_dma(stream_map);
686 case IOMMU_DOMAIN_IDENTITY:
687 for_each_stream_map(i, cfg, stream_map)
688 apple_dart_hw_enable_bypass(stream_map);
695 static struct iommu_device *apple_dart_probe_device(struct device *dev)
697 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
698 struct apple_dart_stream_map *stream_map;
702 return ERR_PTR(-ENODEV);
704 for_each_stream_map(i, cfg, stream_map)
706 dev, stream_map->dart->dev,
707 DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_SUPPLIER);
709 return &cfg->stream_maps[0].dart->iommu;
712 static void apple_dart_release_device(struct device *dev)
714 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
716 dev_iommu_priv_set(dev, NULL);
720 static struct iommu_domain *apple_dart_domain_alloc(unsigned int type)
722 struct apple_dart_domain *dart_domain;
724 if (type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_UNMANAGED &&
725 type != IOMMU_DOMAIN_IDENTITY && type != IOMMU_DOMAIN_BLOCKED)
728 dart_domain = kzalloc(sizeof(*dart_domain), GFP_KERNEL);
732 mutex_init(&dart_domain->init_lock);
734 /* no need to allocate pgtbl_ops or do any other finalization steps */
735 if (type == IOMMU_DOMAIN_IDENTITY || type == IOMMU_DOMAIN_BLOCKED)
736 dart_domain->finalized = true;
738 return &dart_domain->domain;
741 static void apple_dart_domain_free(struct iommu_domain *domain)
743 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
745 if (dart_domain->pgtbl_ops)
746 free_io_pgtable_ops(dart_domain->pgtbl_ops);
751 static int apple_dart_of_xlate(struct device *dev, struct of_phandle_args *args)
753 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
754 struct platform_device *iommu_pdev = of_find_device_by_node(args->np);
755 struct apple_dart *dart = platform_get_drvdata(iommu_pdev);
756 struct apple_dart *cfg_dart;
759 if (args->args_count != 1)
764 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
767 dev_iommu_priv_set(dev, cfg);
769 cfg_dart = cfg->stream_maps[0].dart;
771 if (cfg_dart->supports_bypass != dart->supports_bypass)
773 if (cfg_dart->force_bypass != dart->force_bypass)
775 if (cfg_dart->pgsize != dart->pgsize)
779 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
780 if (cfg->stream_maps[i].dart == dart) {
781 set_bit(sid, cfg->stream_maps[i].sidmap);
785 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
786 if (!cfg->stream_maps[i].dart) {
787 cfg->stream_maps[i].dart = dart;
788 set_bit(sid, cfg->stream_maps[i].sidmap);
796 static DEFINE_MUTEX(apple_dart_groups_lock);
798 static void apple_dart_release_group(void *iommu_data)
801 struct apple_dart_stream_map *stream_map;
802 struct apple_dart_master_cfg *group_master_cfg = iommu_data;
804 mutex_lock(&apple_dart_groups_lock);
806 for_each_stream_map(i, group_master_cfg, stream_map)
807 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
808 stream_map->dart->sid2group[sid] = NULL;
811 mutex_unlock(&apple_dart_groups_lock);
814 static int apple_dart_merge_master_cfg(struct apple_dart_master_cfg *dst,
815 struct apple_dart_master_cfg *src)
818 * We know that this function is only called for groups returned from
819 * pci_device_group and that all Apple Silicon platforms never spread
820 * PCIe devices from the same bus across multiple DARTs such that we can
821 * just assume that both src and dst only have the same single DART.
823 if (src->stream_maps[1].dart)
825 if (dst->stream_maps[1].dart)
827 if (src->stream_maps[0].dart != dst->stream_maps[0].dart)
830 bitmap_or(dst->stream_maps[0].sidmap,
831 dst->stream_maps[0].sidmap,
832 src->stream_maps[0].sidmap,
833 dst->stream_maps[0].dart->num_streams);
837 static struct iommu_group *apple_dart_device_group(struct device *dev)
840 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
841 struct apple_dart_stream_map *stream_map;
842 struct apple_dart_master_cfg *group_master_cfg;
843 struct iommu_group *group = NULL;
844 struct iommu_group *res = ERR_PTR(-EINVAL);
846 mutex_lock(&apple_dart_groups_lock);
848 for_each_stream_map(i, cfg, stream_map) {
849 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) {
850 struct iommu_group *stream_group =
851 stream_map->dart->sid2group[sid];
853 if (group && group != stream_group) {
854 res = ERR_PTR(-EINVAL);
858 group = stream_group;
863 res = iommu_group_ref_get(group);
869 group = pci_device_group(dev);
872 group = generic_device_group(dev);
874 res = ERR_PTR(-ENOMEM);
878 group_master_cfg = iommu_group_get_iommudata(group);
879 if (group_master_cfg) {
882 ret = apple_dart_merge_master_cfg(group_master_cfg, cfg);
884 dev_err(dev, "Failed to merge DART IOMMU grups.\n");
885 iommu_group_put(group);
890 group_master_cfg = kmemdup(cfg, sizeof(*group_master_cfg),
892 if (!group_master_cfg) {
893 iommu_group_put(group);
897 iommu_group_set_iommudata(group, group_master_cfg,
898 apple_dart_release_group);
901 for_each_stream_map(i, cfg, stream_map)
902 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
903 stream_map->dart->sid2group[sid] = group;
908 mutex_unlock(&apple_dart_groups_lock);
912 static int apple_dart_def_domain_type(struct device *dev)
914 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
916 if (cfg->stream_maps[0].dart->force_bypass)
917 return IOMMU_DOMAIN_IDENTITY;
918 if (!cfg->stream_maps[0].dart->supports_bypass)
919 return IOMMU_DOMAIN_DMA;
924 #ifndef CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
925 /* Keep things compiling when CONFIG_PCI_APPLE isn't selected */
926 #define CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 0
928 #define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK)
930 static void apple_dart_get_resv_regions(struct device *dev,
931 struct list_head *head)
933 if (IS_ENABLED(CONFIG_PCIE_APPLE) && dev_is_pci(dev)) {
934 struct iommu_resv_region *region;
935 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
937 region = iommu_alloc_resv_region(DOORBELL_ADDR,
939 IOMMU_RESV_MSI, GFP_KERNEL);
943 list_add_tail(®ion->list, head);
946 iommu_dma_get_resv_regions(dev, head);
949 static const struct iommu_ops apple_dart_iommu_ops = {
950 .domain_alloc = apple_dart_domain_alloc,
951 .probe_device = apple_dart_probe_device,
952 .release_device = apple_dart_release_device,
953 .device_group = apple_dart_device_group,
954 .of_xlate = apple_dart_of_xlate,
955 .def_domain_type = apple_dart_def_domain_type,
956 .get_resv_regions = apple_dart_get_resv_regions,
957 .pgsize_bitmap = -1UL, /* Restricted during dart probe */
958 .owner = THIS_MODULE,
959 .default_domain_ops = &(const struct iommu_domain_ops) {
960 .attach_dev = apple_dart_attach_dev,
961 .map_pages = apple_dart_map_pages,
962 .unmap_pages = apple_dart_unmap_pages,
963 .flush_iotlb_all = apple_dart_flush_iotlb_all,
964 .iotlb_sync = apple_dart_iotlb_sync,
965 .iotlb_sync_map = apple_dart_iotlb_sync_map,
966 .iova_to_phys = apple_dart_iova_to_phys,
967 .free = apple_dart_domain_free,
971 static irqreturn_t apple_dart_t8020_irq(int irq, void *dev)
973 struct apple_dart *dart = dev;
974 const char *fault_name = NULL;
975 u32 error = readl(dart->regs + DART_T8020_ERROR);
976 u32 error_code = FIELD_GET(DART_T8020_ERROR_CODE, error);
977 u32 addr_lo = readl(dart->regs + DART_T8020_ERROR_ADDR_LO);
978 u32 addr_hi = readl(dart->regs + DART_T8020_ERROR_ADDR_HI);
979 u64 addr = addr_lo | (((u64)addr_hi) << 32);
980 u8 stream_idx = FIELD_GET(DART_T8020_ERROR_STREAM, error);
982 if (!(error & DART_T8020_ERROR_FLAG))
985 /* there should only be a single bit set but let's use == to be sure */
986 if (error_code == DART_T8020_ERROR_READ_FAULT)
987 fault_name = "READ FAULT";
988 else if (error_code == DART_T8020_ERROR_WRITE_FAULT)
989 fault_name = "WRITE FAULT";
990 else if (error_code == DART_T8020_ERROR_NO_PTE)
991 fault_name = "NO PTE FOR IOVA";
992 else if (error_code == DART_T8020_ERROR_NO_PMD)
993 fault_name = "NO PMD FOR IOVA";
994 else if (error_code == DART_T8020_ERROR_NO_TTBR)
995 fault_name = "NO TTBR FOR IOVA";
997 fault_name = "unknown";
1001 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx",
1002 error, stream_idx, error_code, fault_name, addr);
1004 writel(error, dart->regs + DART_T8020_ERROR);
1008 static irqreturn_t apple_dart_t8110_irq(int irq, void *dev)
1010 struct apple_dart *dart = dev;
1011 const char *fault_name = NULL;
1012 u32 error = readl(dart->regs + DART_T8110_ERROR);
1013 u32 error_code = FIELD_GET(DART_T8110_ERROR_CODE, error);
1014 u32 addr_lo = readl(dart->regs + DART_T8110_ERROR_ADDR_LO);
1015 u32 addr_hi = readl(dart->regs + DART_T8110_ERROR_ADDR_HI);
1016 u64 addr = addr_lo | (((u64)addr_hi) << 32);
1017 u8 stream_idx = FIELD_GET(DART_T8110_ERROR_STREAM, error);
1019 if (!(error & DART_T8110_ERROR_FLAG))
1022 /* there should only be a single bit set but let's use == to be sure */
1023 if (error_code == DART_T8110_ERROR_READ_FAULT)
1024 fault_name = "READ FAULT";
1025 else if (error_code == DART_T8110_ERROR_WRITE_FAULT)
1026 fault_name = "WRITE FAULT";
1027 else if (error_code == DART_T8110_ERROR_NO_PTE)
1028 fault_name = "NO PTE FOR IOVA";
1029 else if (error_code == DART_T8110_ERROR_NO_PMD)
1030 fault_name = "NO PMD FOR IOVA";
1031 else if (error_code == DART_T8110_ERROR_NO_PGD)
1032 fault_name = "NO PGD FOR IOVA";
1033 else if (error_code == DART_T8110_ERROR_NO_TTBR)
1034 fault_name = "NO TTBR FOR IOVA";
1036 fault_name = "unknown";
1038 dev_err_ratelimited(
1040 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx",
1041 error, stream_idx, error_code, fault_name, addr);
1043 writel(error, dart->regs + DART_T8110_ERROR);
1047 static int apple_dart_probe(struct platform_device *pdev)
1051 struct resource *res;
1052 struct apple_dart *dart;
1053 struct device *dev = &pdev->dev;
1055 dart = devm_kzalloc(dev, sizeof(*dart), GFP_KERNEL);
1060 dart->hw = of_device_get_match_data(dev);
1061 spin_lock_init(&dart->lock);
1063 dart->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1064 if (IS_ERR(dart->regs))
1065 return PTR_ERR(dart->regs);
1067 if (resource_size(res) < 0x4000) {
1068 dev_err(dev, "MMIO region too small (%pr)\n", res);
1072 dart->irq = platform_get_irq(pdev, 0);
1076 ret = devm_clk_bulk_get_all(dev, &dart->clks);
1079 dart->num_clks = ret;
1081 ret = clk_bulk_prepare_enable(dart->num_clks, dart->clks);
1085 dart_params[0] = readl(dart->regs + DART_PARAMS1);
1086 dart_params[1] = readl(dart->regs + DART_PARAMS2);
1087 dart->pgsize = 1 << FIELD_GET(DART_PARAMS1_PAGE_SHIFT, dart_params[0]);
1088 dart->supports_bypass = dart_params[1] & DART_PARAMS2_BYPASS_SUPPORT;
1090 switch (dart->hw->type) {
1094 dart->oas = dart->hw->oas;
1095 dart->num_streams = dart->hw->max_sid_count;
1099 dart_params[2] = readl(dart->regs + DART_T8110_PARAMS3);
1100 dart_params[3] = readl(dart->regs + DART_T8110_PARAMS4);
1101 dart->ias = FIELD_GET(DART_T8110_PARAMS3_VA_WIDTH, dart_params[2]);
1102 dart->oas = FIELD_GET(DART_T8110_PARAMS3_PA_WIDTH, dart_params[2]);
1103 dart->num_streams = FIELD_GET(DART_T8110_PARAMS4_NUM_SIDS, dart_params[3]);
1107 if (dart->num_streams > DART_MAX_STREAMS) {
1108 dev_err(&pdev->dev, "Too many streams (%d > %d)\n",
1109 dart->num_streams, DART_MAX_STREAMS);
1111 goto err_clk_disable;
1114 dart->force_bypass = dart->pgsize > PAGE_SIZE;
1116 ret = apple_dart_hw_reset(dart);
1118 goto err_clk_disable;
1120 ret = request_irq(dart->irq, dart->hw->irq_handler, IRQF_SHARED,
1121 "apple-dart fault handler", dart);
1123 goto err_clk_disable;
1125 platform_set_drvdata(pdev, dart);
1127 ret = iommu_device_sysfs_add(&dart->iommu, dev, NULL, "apple-dart.%s",
1128 dev_name(&pdev->dev));
1132 ret = iommu_device_register(&dart->iommu, &apple_dart_iommu_ops, dev);
1134 goto err_sysfs_remove;
1138 "DART [pagesize %x, %d streams, bypass support: %d, bypass forced: %d] initialized\n",
1139 dart->pgsize, dart->num_streams, dart->supports_bypass, dart->force_bypass);
1143 iommu_device_sysfs_remove(&dart->iommu);
1145 free_irq(dart->irq, dart);
1147 clk_bulk_disable_unprepare(dart->num_clks, dart->clks);
1152 static void apple_dart_remove(struct platform_device *pdev)
1154 struct apple_dart *dart = platform_get_drvdata(pdev);
1156 apple_dart_hw_reset(dart);
1157 free_irq(dart->irq, dart);
1159 iommu_device_unregister(&dart->iommu);
1160 iommu_device_sysfs_remove(&dart->iommu);
1162 clk_bulk_disable_unprepare(dart->num_clks, dart->clks);
1165 static const struct apple_dart_hw apple_dart_hw_t8103 = {
1167 .irq_handler = apple_dart_t8020_irq,
1168 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb,
1171 .max_sid_count = 16,
1173 .enable_streams = DART_T8020_STREAMS_ENABLE,
1174 .lock = DART_T8020_CONFIG,
1175 .lock_bit = DART_T8020_CONFIG_LOCK,
1177 .error = DART_T8020_ERROR,
1179 .tcr = DART_T8020_TCR,
1180 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE,
1182 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART,
1184 .ttbr = DART_T8020_TTBR,
1185 .ttbr_valid = DART_T8020_TTBR_VALID,
1186 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT,
1187 .ttbr_shift = DART_T8020_TTBR_SHIFT,
1190 static const struct apple_dart_hw apple_dart_hw_t6000 = {
1192 .irq_handler = apple_dart_t8020_irq,
1193 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb,
1196 .max_sid_count = 16,
1198 .enable_streams = DART_T8020_STREAMS_ENABLE,
1199 .lock = DART_T8020_CONFIG,
1200 .lock_bit = DART_T8020_CONFIG_LOCK,
1202 .error = DART_T8020_ERROR,
1204 .tcr = DART_T8020_TCR,
1205 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE,
1207 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART,
1209 .ttbr = DART_T8020_TTBR,
1210 .ttbr_valid = DART_T8020_TTBR_VALID,
1211 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT,
1212 .ttbr_shift = DART_T8020_TTBR_SHIFT,
1216 static const struct apple_dart_hw apple_dart_hw_t8110 = {
1218 .irq_handler = apple_dart_t8110_irq,
1219 .invalidate_tlb = apple_dart_t8110_hw_invalidate_tlb,
1221 .max_sid_count = 256,
1223 .enable_streams = DART_T8110_ENABLE_STREAMS,
1224 .lock = DART_T8110_PROTECT,
1225 .lock_bit = DART_T8110_PROTECT_TTBR_TCR,
1227 .error = DART_T8110_ERROR,
1229 .tcr = DART_T8110_TCR,
1230 .tcr_enabled = DART_T8110_TCR_TRANSLATE_ENABLE,
1232 .tcr_bypass = DART_T8110_TCR_BYPASS_DAPF | DART_T8110_TCR_BYPASS_DART,
1234 .ttbr = DART_T8110_TTBR,
1235 .ttbr_valid = DART_T8110_TTBR_VALID,
1236 .ttbr_addr_field_shift = DART_T8110_TTBR_ADDR_FIELD_SHIFT,
1237 .ttbr_shift = DART_T8110_TTBR_SHIFT,
1241 static __maybe_unused int apple_dart_suspend(struct device *dev)
1243 struct apple_dart *dart = dev_get_drvdata(dev);
1244 unsigned int sid, idx;
1246 for (sid = 0; sid < dart->num_streams; sid++) {
1247 dart->save_tcr[sid] = readl_relaxed(dart->regs + DART_TCR(dart, sid));
1248 for (idx = 0; idx < dart->hw->ttbr_count; idx++)
1249 dart->save_ttbr[sid][idx] =
1250 readl(dart->regs + DART_TTBR(dart, sid, idx));
1256 static __maybe_unused int apple_dart_resume(struct device *dev)
1258 struct apple_dart *dart = dev_get_drvdata(dev);
1259 unsigned int sid, idx;
1262 ret = apple_dart_hw_reset(dart);
1264 dev_err(dev, "Failed to reset DART on resume\n");
1268 for (sid = 0; sid < dart->num_streams; sid++) {
1269 for (idx = 0; idx < dart->hw->ttbr_count; idx++)
1270 writel(dart->save_ttbr[sid][idx],
1271 dart->regs + DART_TTBR(dart, sid, idx));
1272 writel(dart->save_tcr[sid], dart->regs + DART_TCR(dart, sid));
1278 static DEFINE_SIMPLE_DEV_PM_OPS(apple_dart_pm_ops, apple_dart_suspend, apple_dart_resume);
1280 static const struct of_device_id apple_dart_of_match[] = {
1281 { .compatible = "apple,t8103-dart", .data = &apple_dart_hw_t8103 },
1282 { .compatible = "apple,t8110-dart", .data = &apple_dart_hw_t8110 },
1283 { .compatible = "apple,t6000-dart", .data = &apple_dart_hw_t6000 },
1286 MODULE_DEVICE_TABLE(of, apple_dart_of_match);
1288 static struct platform_driver apple_dart_driver = {
1290 .name = "apple-dart",
1291 .of_match_table = apple_dart_of_match,
1292 .suppress_bind_attrs = true,
1293 .pm = pm_sleep_ptr(&apple_dart_pm_ops),
1295 .probe = apple_dart_probe,
1296 .remove_new = apple_dart_remove,
1299 module_platform_driver(apple_dart_driver);
1301 MODULE_DESCRIPTION("IOMMU API for Apple's DART");
1302 MODULE_AUTHOR("Sven Peter <sven@svenpeter.dev>");
1303 MODULE_LICENSE("GPL v2");