drivers/iommu/amd_iommu_v2.c

   1 /*
   2  * Copyright (C) 2010-2012 Advanced Micro Devices, Inc.
   3  * Author: Joerg Roedel <jroedel@suse.de>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published
   7  * by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  17  */
  18
  19 #include <linux/mmu_notifier.h>
  20 #include <linux/amd-iommu.h>
  21 #include <linux/mm_types.h>
  22 #include <linux/profile.h>
  23 #include <linux/module.h>
  24 #include <linux/sched.h>
  25 #include <linux/sched/mm.h>
  26 #include <linux/iommu.h>
  27 #include <linux/wait.h>
  28 #include <linux/pci.h>
  29 #include <linux/gfp.h>
  30
  31 #include "amd_iommu_types.h"
  32 #include "amd_iommu_proto.h"
  33
  34 MODULE_LICENSE("GPL v2");
  35 MODULE_AUTHOR("Joerg Roedel <jroedel@suse.de>");
  36
  37 #define MAX_DEVICES             0x10000
  38 #define PRI_QUEUE_SIZE          512
  39
  40 struct pri_queue {
  41         atomic_t inflight;
  42         bool finish;
  43         int status;
  44 };
  45
  46 struct pasid_state {
  47         struct list_head list;                  /* For global state-list */
  48         atomic_t count;                         /* Reference count */
  49         unsigned mmu_notifier_count;            /* Counting nested mmu_notifier
  50                                                    calls */
  51         struct mm_struct *mm;                   /* mm_struct for the faults */
  52         struct mmu_notifier mn;                 /* mmu_notifier handle */
  53         struct pri_queue pri[PRI_QUEUE_SIZE];   /* PRI tag states */
  54         struct device_state *device_state;      /* Link to our device_state */
  55         int pasid;                              /* PASID index */
  56         bool invalid;                           /* Used during setup and
  57                                                    teardown of the pasid */
  58         spinlock_t lock;                        /* Protect pri_queues and
  59                                                    mmu_notifer_count */
  60         wait_queue_head_t wq;                   /* To wait for count == 0 */
  61 };
  62
  63 struct device_state {
  64         struct list_head list;
  65         u16 devid;
  66         atomic_t count;
  67         struct pci_dev *pdev;
  68         struct pasid_state **states;
  69         struct iommu_domain *domain;
  70         int pasid_levels;
  71         int max_pasids;
  72         amd_iommu_invalid_ppr_cb inv_ppr_cb;
  73         amd_iommu_invalidate_ctx inv_ctx_cb;
  74         spinlock_t lock;
  75         wait_queue_head_t wq;
  76 };
  77
  78 struct fault {
  79         struct work_struct work;
  80         struct device_state *dev_state;
  81         struct pasid_state *state;
  82         struct mm_struct *mm;
  83         u64 address;
  84         u16 devid;
  85         u16 pasid;
  86         u16 tag;
  87         u16 finish;
  88         u16 flags;
  89 };
  90
  91 static LIST_HEAD(state_list);
  92 static spinlock_t state_lock;
  93
  94 static struct workqueue_struct *iommu_wq;
  95
  96 static void free_pasid_states(struct device_state *dev_state);
  97
  98 static u16 device_id(struct pci_dev *pdev)
  99 {
 100         u16 devid;
 101
 102         devid = pdev->bus->number;
 103         devid = (devid << 8) | pdev->devfn;
 104
 105         return devid;
 106 }
 107
 108 static struct device_state *__get_device_state(u16 devid)
 109 {
 110         struct device_state *dev_state;
 111
 112         list_for_each_entry(dev_state, &state_list, list) {
 113                 if (dev_state->devid == devid)
 114                         return dev_state;
 115         }
 116
 117         return NULL;
 118 }
 119
 120 static struct device_state *get_device_state(u16 devid)
 121 {
 122         struct device_state *dev_state;
 123         unsigned long flags;
 124
 125         spin_lock_irqsave(&state_lock, flags);
 126         dev_state = __get_device_state(devid);
 127         if (dev_state != NULL)
 128                 atomic_inc(&dev_state->count);
 129         spin_unlock_irqrestore(&state_lock, flags);
 130
 131         return dev_state;
 132 }
 133
 134 static void free_device_state(struct device_state *dev_state)
 135 {
 136         struct iommu_group *group;
 137
 138         /*
 139          * First detach device from domain - No more PRI requests will arrive
 140          * from that device after it is unbound from the IOMMUv2 domain.
 141          */
 142         group = iommu_group_get(&dev_state->pdev->dev);
 143         if (WARN_ON(!group))
 144                 return;
 145
 146         iommu_detach_group(dev_state->domain, group);
 147
 148         iommu_group_put(group);
 149
 150         /* Everything is down now, free the IOMMUv2 domain */
 151         iommu_domain_free(dev_state->domain);
 152
 153         /* Finally get rid of the device-state */
 154         kfree(dev_state);
 155 }
 156
 157 static void put_device_state(struct device_state *dev_state)
 158 {
 159         if (atomic_dec_and_test(&dev_state->count))
 160                 wake_up(&dev_state->wq);
 161 }
 162
 163 /* Must be called under dev_state->lock */
 164 static struct pasid_state **__get_pasid_state_ptr(struct device_state *dev_state,
 165                                                   int pasid, bool alloc)
 166 {
 167         struct pasid_state **root, **ptr;
 168         int level, index;
 169
 170         level = dev_state->pasid_levels;
 171         root  = dev_state->states;
 172
 173         while (true) {
 174
 175                 index = (pasid >> (9 * level)) & 0x1ff;
 176                 ptr   = &root[index];
 177
 178                 if (level == 0)
 179                         break;
 180
 181                 if (*ptr == NULL) {
 182                         if (!alloc)
 183                                 return NULL;
 184
 185                         *ptr = (void *)get_zeroed_page(GFP_ATOMIC);
 186                         if (*ptr == NULL)
 187                                 return NULL;
 188                 }
 189
 190                 root   = (struct pasid_state **)*ptr;
 191                 level -= 1;
 192         }
 193
 194         return ptr;
 195 }
 196
 197 static int set_pasid_state(struct device_state *dev_state,
 198                            struct pasid_state *pasid_state,
 199                            int pasid)
 200 {
 201         struct pasid_state **ptr;
 202         unsigned long flags;
 203         int ret;
 204
 205         spin_lock_irqsave(&dev_state->lock, flags);
 206         ptr = __get_pasid_state_ptr(dev_state, pasid, true);
 207
 208         ret = -ENOMEM;
 209         if (ptr == NULL)
 210                 goto out_unlock;
 211
 212         ret = -ENOMEM;
 213         if (*ptr != NULL)
 214                 goto out_unlock;
 215
 216         *ptr = pasid_state;
 217
 218         ret = 0;
 219
 220 out_unlock:
 221         spin_unlock_irqrestore(&dev_state->lock, flags);
 222
 223         return ret;
 224 }
 225
 226 static void clear_pasid_state(struct device_state *dev_state, int pasid)
 227 {
 228         struct pasid_state **ptr;
 229         unsigned long flags;
 230
 231         spin_lock_irqsave(&dev_state->lock, flags);
 232         ptr = __get_pasid_state_ptr(dev_state, pasid, true);
 233
 234         if (ptr == NULL)
 235                 goto out_unlock;
 236
 237         *ptr = NULL;
 238
 239 out_unlock:
 240         spin_unlock_irqrestore(&dev_state->lock, flags);
 241 }
 242
 243 static struct pasid_state *get_pasid_state(struct device_state *dev_state,
 244                                            int pasid)
 245 {
 246         struct pasid_state **ptr, *ret = NULL;
 247         unsigned long flags;
 248
 249         spin_lock_irqsave(&dev_state->lock, flags);
 250         ptr = __get_pasid_state_ptr(dev_state, pasid, false);
 251
 252         if (ptr == NULL)
 253                 goto out_unlock;
 254
 255         ret = *ptr;
 256         if (ret)
 257                 atomic_inc(&ret->count);
 258
 259 out_unlock:
 260         spin_unlock_irqrestore(&dev_state->lock, flags);
 261
 262         return ret;
 263 }
 264
 265 static void free_pasid_state(struct pasid_state *pasid_state)
 266 {
 267         kfree(pasid_state);
 268 }
 269
 270 static void put_pasid_state(struct pasid_state *pasid_state)
 271 {
 272         if (atomic_dec_and_test(&pasid_state->count))
 273                 wake_up(&pasid_state->wq);
 274 }
 275
 276 static void put_pasid_state_wait(struct pasid_state *pasid_state)
 277 {
 278         atomic_dec(&pasid_state->count);
 279         wait_event(pasid_state->wq, !atomic_read(&pasid_state->count));
 280         free_pasid_state(pasid_state);
 281 }
 282
 283 static void unbind_pasid(struct pasid_state *pasid_state)
 284 {
 285         struct iommu_domain *domain;
 286
 287         domain = pasid_state->device_state->domain;
 288
 289         /*
 290          * Mark pasid_state as invalid, no more faults will we added to the
 291          * work queue after this is visible everywhere.
 292          */
 293         pasid_state->invalid = true;
 294
 295         /* Make sure this is visible */
 296         smp_wmb();
 297
 298         /* After this the device/pasid can't access the mm anymore */
 299         amd_iommu_domain_clear_gcr3(domain, pasid_state->pasid);
 300
 301         /* Make sure no more pending faults are in the queue */
 302         flush_workqueue(iommu_wq);
 303 }
 304
 305 static void free_pasid_states_level1(struct pasid_state **tbl)
 306 {
 307         int i;
 308
 309         for (i = 0; i < 512; ++i) {
 310                 if (tbl[i] == NULL)
 311                         continue;
 312
 313                 free_page((unsigned long)tbl[i]);
 314         }
 315 }
 316
 317 static void free_pasid_states_level2(struct pasid_state **tbl)
 318 {
 319         struct pasid_state **ptr;
 320         int i;
 321
 322         for (i = 0; i < 512; ++i) {
 323                 if (tbl[i] == NULL)
 324                         continue;
 325
 326                 ptr = (struct pasid_state **)tbl[i];
 327                 free_pasid_states_level1(ptr);
 328         }
 329 }
 330
 331 static void free_pasid_states(struct device_state *dev_state)
 332 {
 333         struct pasid_state *pasid_state;
 334         int i;
 335
 336         for (i = 0; i < dev_state->max_pasids; ++i) {
 337                 pasid_state = get_pasid_state(dev_state, i);
 338                 if (pasid_state == NULL)
 339                         continue;
 340
 341                 put_pasid_state(pasid_state);
 342
 343                 /*
 344                  * This will call the mn_release function and
 345                  * unbind the PASID
 346                  */
 347                 mmu_notifier_unregister(&pasid_state->mn, pasid_state->mm);
 348
 349                 put_pasid_state_wait(pasid_state); /* Reference taken in
 350                                                       amd_iommu_bind_pasid */
 351
 352                 /* Drop reference taken in amd_iommu_bind_pasid */
 353                 put_device_state(dev_state);
 354         }
 355
 356         if (dev_state->pasid_levels == 2)
 357                 free_pasid_states_level2(dev_state->states);
 358         else if (dev_state->pasid_levels == 1)
 359                 free_pasid_states_level1(dev_state->states);
 360         else
 361                 BUG_ON(dev_state->pasid_levels != 0);
 362
 363         free_page((unsigned long)dev_state->states);
 364 }
 365
 366 static struct pasid_state *mn_to_state(struct mmu_notifier *mn)
 367 {
 368         return container_of(mn, struct pasid_state, mn);
 369 }
 370
 371 static void __mn_flush_page(struct mmu_notifier *mn,
 372                             unsigned long address)
 373 {
 374         struct pasid_state *pasid_state;
 375         struct device_state *dev_state;
 376
 377         pasid_state = mn_to_state(mn);
 378         dev_state   = pasid_state->device_state;
 379
 380         amd_iommu_flush_page(dev_state->domain, pasid_state->pasid, address);
 381 }
 382
 383 static int mn_clear_flush_young(struct mmu_notifier *mn,
 384                                 struct mm_struct *mm,
 385                                 unsigned long start,
 386                                 unsigned long end)
 387 {
 388         for (; start < end; start += PAGE_SIZE)
 389                 __mn_flush_page(mn, start);
 390
 391         return 0;
 392 }
 393
 394 static void mn_invalidate_page(struct mmu_notifier *mn,
 395                                struct mm_struct *mm,
 396                                unsigned long address)
 397 {
 398         __mn_flush_page(mn, address);
 399 }
 400
 401 static void mn_invalidate_range(struct mmu_notifier *mn,
 402                                 struct mm_struct *mm,
 403                                 unsigned long start, unsigned long end)
 404 {
 405         struct pasid_state *pasid_state;
 406         struct device_state *dev_state;
 407
 408         pasid_state = mn_to_state(mn);
 409         dev_state   = pasid_state->device_state;
 410
 411         if ((start ^ (end - 1)) < PAGE_SIZE)
 412                 amd_iommu_flush_page(dev_state->domain, pasid_state->pasid,
 413                                      start);
 414         else
 415                 amd_iommu_flush_tlb(dev_state->domain, pasid_state->pasid);
 416 }
 417
 418 static void mn_release(struct mmu_notifier *mn, struct mm_struct *mm)
 419 {
 420         struct pasid_state *pasid_state;
 421         struct device_state *dev_state;
 422         bool run_inv_ctx_cb;
 423
 424         might_sleep();
 425
 426         pasid_state    = mn_to_state(mn);
 427         dev_state      = pasid_state->device_state;
 428         run_inv_ctx_cb = !pasid_state->invalid;
 429
 430         if (run_inv_ctx_cb && dev_state->inv_ctx_cb)
 431                 dev_state->inv_ctx_cb(dev_state->pdev, pasid_state->pasid);
 432
 433         unbind_pasid(pasid_state);
 434 }
 435
 436 static const struct mmu_notifier_ops iommu_mn = {
 437         .release                = mn_release,
 438         .clear_flush_young      = mn_clear_flush_young,
 439         .invalidate_page        = mn_invalidate_page,
 440         .invalidate_range       = mn_invalidate_range,
 441 };
 442
 443 static void set_pri_tag_status(struct pasid_state *pasid_state,
 444                                u16 tag, int status)
 445 {
 446         unsigned long flags;
 447
 448         spin_lock_irqsave(&pasid_state->lock, flags);
 449         pasid_state->pri[tag].status = status;
 450         spin_unlock_irqrestore(&pasid_state->lock, flags);
 451 }
 452
 453 static void finish_pri_tag(struct device_state *dev_state,
 454                            struct pasid_state *pasid_state,
 455                            u16 tag)
 456 {
 457         unsigned long flags;
 458
 459         spin_lock_irqsave(&pasid_state->lock, flags);
 460         if (atomic_dec_and_test(&pasid_state->pri[tag].inflight) &&
 461             pasid_state->pri[tag].finish) {
 462                 amd_iommu_complete_ppr(dev_state->pdev, pasid_state->pasid,
 463                                        pasid_state->pri[tag].status, tag);
 464                 pasid_state->pri[tag].finish = false;
 465                 pasid_state->pri[tag].status = PPR_SUCCESS;
 466         }
 467         spin_unlock_irqrestore(&pasid_state->lock, flags);
 468 }
 469
 470 static void handle_fault_error(struct fault *fault)
 471 {
 472         int status;
 473
 474         if (!fault->dev_state->inv_ppr_cb) {
 475                 set_pri_tag_status(fault->state, fault->tag, PPR_INVALID);
 476                 return;
 477         }
 478
 479         status = fault->dev_state->inv_ppr_cb(fault->dev_state->pdev,
 480                                               fault->pasid,
 481                                               fault->address,
 482                                               fault->flags);
 483         switch (status) {
 484         case AMD_IOMMU_INV_PRI_RSP_SUCCESS:
 485                 set_pri_tag_status(fault->state, fault->tag, PPR_SUCCESS);
 486                 break;
 487         case AMD_IOMMU_INV_PRI_RSP_INVALID:
 488                 set_pri_tag_status(fault->state, fault->tag, PPR_INVALID);
 489                 break;
 490         case AMD_IOMMU_INV_PRI_RSP_FAIL:
 491                 set_pri_tag_status(fault->state, fault->tag, PPR_FAILURE);
 492                 break;
 493         default:
 494                 BUG();
 495         }
 496 }
 497
 498 static bool access_error(struct vm_area_struct *vma, struct fault *fault)
 499 {
 500         unsigned long requested = 0;
 501
 502         if (fault->flags & PPR_FAULT_EXEC)
 503                 requested |= VM_EXEC;
 504
 505         if (fault->flags & PPR_FAULT_READ)
 506                 requested |= VM_READ;
 507
 508         if (fault->flags & PPR_FAULT_WRITE)
 509                 requested |= VM_WRITE;
 510
 511         return (requested & ~vma->vm_flags) != 0;
 512 }
 513
 514 static void do_fault(struct work_struct *work)
 515 {
 516         struct fault *fault = container_of(work, struct fault, work);
 517         struct vm_area_struct *vma;
 518         int ret = VM_FAULT_ERROR;
 519         unsigned int flags = 0;
 520         struct mm_struct *mm;
 521         u64 address;
 522
 523         mm = fault->state->mm;
 524         address = fault->address;
 525
 526         if (fault->flags & PPR_FAULT_USER)
 527                 flags |= FAULT_FLAG_USER;
 528         if (fault->flags & PPR_FAULT_WRITE)
 529                 flags |= FAULT_FLAG_WRITE;
 530         flags |= FAULT_FLAG_REMOTE;
 531
 532         down_read(&mm->mmap_sem);
 533         vma = find_extend_vma(mm, address);
 534         if (!vma || address < vma->vm_start)
 535                 /* failed to get a vma in the right range */
 536                 goto out;
 537
 538         /* Check if we have the right permissions on the vma */
 539         if (access_error(vma, fault))
 540                 goto out;
 541
 542         ret = handle_mm_fault(vma, address, flags);
 543 out:
 544         up_read(&mm->mmap_sem);
 545
 546         if (ret & VM_FAULT_ERROR)
 547                 /* failed to service fault */
 548                 handle_fault_error(fault);
 549
 550         finish_pri_tag(fault->dev_state, fault->state, fault->tag);
 551
 552         put_pasid_state(fault->state);
 553
 554         kfree(fault);
 555 }
 556
 557 static int ppr_notifier(struct notifier_block *nb, unsigned long e, void *data)
 558 {
 559         struct amd_iommu_fault *iommu_fault;
 560         struct pasid_state *pasid_state;
 561         struct device_state *dev_state;
 562         unsigned long flags;
 563         struct fault *fault;
 564         bool finish;
 565         u16 tag;
 566         int ret;
 567
 568         iommu_fault = data;
 569         tag         = iommu_fault->tag & 0x1ff;
 570         finish      = (iommu_fault->tag >> 9) & 1;
 571
 572         ret = NOTIFY_DONE;
 573         dev_state = get_device_state(iommu_fault->device_id);
 574         if (dev_state == NULL)
 575                 goto out;
 576
 577         pasid_state = get_pasid_state(dev_state, iommu_fault->pasid);
 578         if (pasid_state == NULL || pasid_state->invalid) {
 579                 /* We know the device but not the PASID -> send INVALID */
 580                 amd_iommu_complete_ppr(dev_state->pdev, iommu_fault->pasid,
 581                                        PPR_INVALID, tag);
 582                 goto out_drop_state;
 583         }
 584
 585         spin_lock_irqsave(&pasid_state->lock, flags);
 586         atomic_inc(&pasid_state->pri[tag].inflight);
 587         if (finish)
 588                 pasid_state->pri[tag].finish = true;
 589         spin_unlock_irqrestore(&pasid_state->lock, flags);
 590
 591         fault = kzalloc(sizeof(*fault), GFP_ATOMIC);
 592         if (fault == NULL) {
 593                 /* We are OOM - send success and let the device re-fault */
 594                 finish_pri_tag(dev_state, pasid_state, tag);
 595                 goto out_drop_state;
 596         }
 597
 598         fault->dev_state = dev_state;
 599         fault->address   = iommu_fault->address;
 600         fault->state     = pasid_state;
 601         fault->tag       = tag;
 602         fault->finish    = finish;
 603         fault->pasid     = iommu_fault->pasid;
 604         fault->flags     = iommu_fault->flags;
 605         INIT_WORK(&fault->work, do_fault);
 606
 607         queue_work(iommu_wq, &fault->work);
 608
 609         ret = NOTIFY_OK;
 610
 611 out_drop_state:
 612
 613         if (ret != NOTIFY_OK && pasid_state)
 614                 put_pasid_state(pasid_state);
 615
 616         put_device_state(dev_state);
 617
 618 out:
 619         return ret;
 620 }
 621
 622 static struct notifier_block ppr_nb = {
 623         .notifier_call = ppr_notifier,
 624 };
 625
 626 int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
 627                          struct task_struct *task)
 628 {
 629         struct pasid_state *pasid_state;
 630         struct device_state *dev_state;
 631         struct mm_struct *mm;
 632         u16 devid;
 633         int ret;
 634
 635         might_sleep();
 636
 637         if (!amd_iommu_v2_supported())
 638                 return -ENODEV;
 639
 640         devid     = device_id(pdev);
 641         dev_state = get_device_state(devid);
 642
 643         if (dev_state == NULL)
 644                 return -EINVAL;
 645
 646         ret = -EINVAL;
 647         if (pasid < 0 || pasid >= dev_state->max_pasids)
 648                 goto out;
 649
 650         ret = -ENOMEM;
 651         pasid_state = kzalloc(sizeof(*pasid_state), GFP_KERNEL);
 652         if (pasid_state == NULL)
 653                 goto out;
 654
 655
 656         atomic_set(&pasid_state->count, 1);
 657         init_waitqueue_head(&pasid_state->wq);
 658         spin_lock_init(&pasid_state->lock);
 659
 660         mm                        = get_task_mm(task);
 661         pasid_state->mm           = mm;
 662         pasid_state->device_state = dev_state;
 663         pasid_state->pasid        = pasid;
 664         pasid_state->invalid      = true; /* Mark as valid only if we are
 665                                              done with setting up the pasid */
 666         pasid_state->mn.ops       = &iommu_mn;
 667
 668         if (pasid_state->mm == NULL)
 669                 goto out_free;
 670
 671         mmu_notifier_register(&pasid_state->mn, mm);
 672
 673         ret = set_pasid_state(dev_state, pasid_state, pasid);
 674         if (ret)
 675                 goto out_unregister;
 676
 677         ret = amd_iommu_domain_set_gcr3(dev_state->domain, pasid,
 678                                         __pa(pasid_state->mm->pgd));
 679         if (ret)
 680                 goto out_clear_state;
 681
 682         /* Now we are ready to handle faults */
 683         pasid_state->invalid = false;
 684
 685         /*
 686          * Drop the reference to the mm_struct here. We rely on the
 687          * mmu_notifier release call-back to inform us when the mm
 688          * is going away.
 689          */
 690         mmput(mm);
 691
 692         return 0;
 693
 694 out_clear_state:
 695         clear_pasid_state(dev_state, pasid);
 696
 697 out_unregister:
 698         mmu_notifier_unregister(&pasid_state->mn, mm);
 699         mmput(mm);
 700
 701 out_free:
 702         free_pasid_state(pasid_state);
 703
 704 out:
 705         put_device_state(dev_state);
 706
 707         return ret;
 708 }
 709 EXPORT_SYMBOL(amd_iommu_bind_pasid);
 710
 711 void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid)
 712 {
 713         struct pasid_state *pasid_state;
 714         struct device_state *dev_state;
 715         u16 devid;
 716
 717         might_sleep();
 718
 719         if (!amd_iommu_v2_supported())
 720                 return;
 721
 722         devid = device_id(pdev);
 723         dev_state = get_device_state(devid);
 724         if (dev_state == NULL)
 725                 return;
 726
 727         if (pasid < 0 || pasid >= dev_state->max_pasids)
 728                 goto out;
 729
 730         pasid_state = get_pasid_state(dev_state, pasid);
 731         if (pasid_state == NULL)
 732                 goto out;
 733         /*
 734          * Drop reference taken here. We are safe because we still hold
 735          * the reference taken in the amd_iommu_bind_pasid function.
 736          */
 737         put_pasid_state(pasid_state);
 738
 739         /* Clear the pasid state so that the pasid can be re-used */
 740         clear_pasid_state(dev_state, pasid_state->pasid);
 741
 742         /*
 743          * Call mmu_notifier_unregister to drop our reference
 744          * to pasid_state->mm
 745          */
 746         mmu_notifier_unregister(&pasid_state->mn, pasid_state->mm);
 747
 748         put_pasid_state_wait(pasid_state); /* Reference taken in
 749                                               amd_iommu_bind_pasid */
 750 out:
 751         /* Drop reference taken in this function */
 752         put_device_state(dev_state);
 753
 754         /* Drop reference taken in amd_iommu_bind_pasid */
 755         put_device_state(dev_state);
 756 }
 757 EXPORT_SYMBOL(amd_iommu_unbind_pasid);
 758
 759 int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 760 {
 761         struct device_state *dev_state;
 762         struct iommu_group *group;
 763         unsigned long flags;
 764         int ret, tmp;
 765         u16 devid;
 766
 767         might_sleep();
 768
 769         if (!amd_iommu_v2_supported())
 770                 return -ENODEV;
 771
 772         if (pasids <= 0 || pasids > (PASID_MASK + 1))
 773                 return -EINVAL;
 774
 775         devid = device_id(pdev);
 776
 777         dev_state = kzalloc(sizeof(*dev_state), GFP_KERNEL);
 778         if (dev_state == NULL)
 779                 return -ENOMEM;
 780
 781         spin_lock_init(&dev_state->lock);
 782         init_waitqueue_head(&dev_state->wq);
 783         dev_state->pdev  = pdev;
 784         dev_state->devid = devid;
 785
 786         tmp = pasids;
 787         for (dev_state->pasid_levels = 0; (tmp - 1) & ~0x1ff; tmp >>= 9)
 788                 dev_state->pasid_levels += 1;
 789
 790         atomic_set(&dev_state->count, 1);
 791         dev_state->max_pasids = pasids;
 792
 793         ret = -ENOMEM;
 794         dev_state->states = (void *)get_zeroed_page(GFP_KERNEL);
 795         if (dev_state->states == NULL)
 796                 goto out_free_dev_state;
 797
 798         dev_state->domain = iommu_domain_alloc(&pci_bus_type);
 799         if (dev_state->domain == NULL)
 800                 goto out_free_states;
 801
 802         amd_iommu_domain_direct_map(dev_state->domain);
 803
 804         ret = amd_iommu_domain_enable_v2(dev_state->domain, pasids);
 805         if (ret)
 806                 goto out_free_domain;
 807
 808         group = iommu_group_get(&pdev->dev);
 809         if (!group) {
 810                 ret = -EINVAL;
 811                 goto out_free_domain;
 812         }
 813
 814         ret = iommu_attach_group(dev_state->domain, group);
 815         if (ret != 0)
 816                 goto out_drop_group;
 817
 818         iommu_group_put(group);
 819
 820         spin_lock_irqsave(&state_lock, flags);
 821
 822         if (__get_device_state(devid) != NULL) {
 823                 spin_unlock_irqrestore(&state_lock, flags);
 824                 ret = -EBUSY;
 825                 goto out_free_domain;
 826         }
 827
 828         list_add_tail(&dev_state->list, &state_list);
 829
 830         spin_unlock_irqrestore(&state_lock, flags);
 831
 832         return 0;
 833
 834 out_drop_group:
 835         iommu_group_put(group);
 836
 837 out_free_domain:
 838         iommu_domain_free(dev_state->domain);
 839
 840 out_free_states:
 841         free_page((unsigned long)dev_state->states);
 842
 843 out_free_dev_state:
 844         kfree(dev_state);
 845
 846         return ret;
 847 }
 848 EXPORT_SYMBOL(amd_iommu_init_device);
 849
 850 void amd_iommu_free_device(struct pci_dev *pdev)
 851 {
 852         struct device_state *dev_state;
 853         unsigned long flags;
 854         u16 devid;
 855
 856         if (!amd_iommu_v2_supported())
 857                 return;
 858
 859         devid = device_id(pdev);
 860
 861         spin_lock_irqsave(&state_lock, flags);
 862
 863         dev_state = __get_device_state(devid);
 864         if (dev_state == NULL) {
 865                 spin_unlock_irqrestore(&state_lock, flags);
 866                 return;
 867         }
 868
 869         list_del(&dev_state->list);
 870
 871         spin_unlock_irqrestore(&state_lock, flags);
 872
 873         /* Get rid of any remaining pasid states */
 874         free_pasid_states(dev_state);
 875
 876         put_device_state(dev_state);
 877         /*
 878          * Wait until the last reference is dropped before freeing
 879          * the device state.
 880          */
 881         wait_event(dev_state->wq, !atomic_read(&dev_state->count));
 882         free_device_state(dev_state);
 883 }
 884 EXPORT_SYMBOL(amd_iommu_free_device);
 885
 886 int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
 887                                  amd_iommu_invalid_ppr_cb cb)
 888 {
 889         struct device_state *dev_state;
 890         unsigned long flags;
 891         u16 devid;
 892         int ret;
 893
 894         if (!amd_iommu_v2_supported())
 895                 return -ENODEV;
 896
 897         devid = device_id(pdev);
 898
 899         spin_lock_irqsave(&state_lock, flags);
 900
 901         ret = -EINVAL;
 902         dev_state = __get_device_state(devid);
 903         if (dev_state == NULL)
 904                 goto out_unlock;
 905
 906         dev_state->inv_ppr_cb = cb;
 907
 908         ret = 0;
 909
 910 out_unlock:
 911         spin_unlock_irqrestore(&state_lock, flags);
 912
 913         return ret;
 914 }
 915 EXPORT_SYMBOL(amd_iommu_set_invalid_ppr_cb);
 916
 917 int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
 918                                     amd_iommu_invalidate_ctx cb)
 919 {
 920         struct device_state *dev_state;
 921         unsigned long flags;
 922         u16 devid;
 923         int ret;
 924
 925         if (!amd_iommu_v2_supported())
 926                 return -ENODEV;
 927
 928         devid = device_id(pdev);
 929
 930         spin_lock_irqsave(&state_lock, flags);
 931
 932         ret = -EINVAL;
 933         dev_state = __get_device_state(devid);
 934         if (dev_state == NULL)
 935                 goto out_unlock;
 936
 937         dev_state->inv_ctx_cb = cb;
 938
 939         ret = 0;
 940
 941 out_unlock:
 942         spin_unlock_irqrestore(&state_lock, flags);
 943
 944         return ret;
 945 }
 946 EXPORT_SYMBOL(amd_iommu_set_invalidate_ctx_cb);
 947
 948 static int __init amd_iommu_v2_init(void)
 949 {
 950         int ret;
 951
 952         pr_info("AMD IOMMUv2 driver by Joerg Roedel <jroedel@suse.de>\n");
 953
 954         if (!amd_iommu_v2_supported()) {
 955                 pr_info("AMD IOMMUv2 functionality not available on this system\n");
 956                 /*
 957                  * Load anyway to provide the symbols to other modules
 958                  * which may use AMD IOMMUv2 optionally.
 959                  */
 960                 return 0;
 961         }
 962
 963         spin_lock_init(&state_lock);
 964
 965         ret = -ENOMEM;
 966         iommu_wq = alloc_workqueue("amd_iommu_v2", WQ_MEM_RECLAIM, 0);
 967         if (iommu_wq == NULL)
 968                 goto out;
 969
 970         amd_iommu_register_ppr_notifier(&ppr_nb);
 971
 972         return 0;
 973
 974 out:
 975         return ret;
 976 }
 977
 978 static void __exit amd_iommu_v2_exit(void)
 979 {
 980         struct device_state *dev_state;
 981         int i;
 982
 983         if (!amd_iommu_v2_supported())
 984                 return;
 985
 986         amd_iommu_unregister_ppr_notifier(&ppr_nb);
 987
 988         flush_workqueue(iommu_wq);
 989
 990         /*
 991          * The loop below might call flush_workqueue(), so call
 992          * destroy_workqueue() after it
 993          */
 994         for (i = 0; i < MAX_DEVICES; ++i) {
 995                 dev_state = get_device_state(i);
 996
 997                 if (dev_state == NULL)
 998                         continue;
 999
1000                 WARN_ON_ONCE(1);
1001
1002                 put_device_state(dev_state);
1003                 amd_iommu_free_device(dev_state->pdev);
1004         }
1005
1006         destroy_workqueue(iommu_wq);
1007 }
1008
1009 module_init(amd_iommu_v2_init);
1010 module_exit(amd_iommu_v2_exit);