drivers/interconnect/qcom/sm8450.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * SM8450 interconnect IDs
   4  *
   5  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
   6  * Copyright (c) 2021, Linaro Limited
   7  */
   8
   9 #ifndef __DRIVERS_INTERCONNECT_QCOM_SM8450_H
  10 #define __DRIVERS_INTERCONNECT_QCOM_SM8450_H
  11
  12 #define SM8450_MASTER_GPU_TCU                           0
  13 #define SM8450_MASTER_SYS_TCU                           1
  14 #define SM8450_MASTER_APPSS_PROC                        2
  15 #define SM8450_MASTER_LLCC                              3
  16 #define SM8450_MASTER_CNOC_LPASS_AG_NOC                 4
  17 #define SM8450_MASTER_GIC_AHB                           5
  18 #define SM8450_MASTER_CDSP_NOC_CFG                      6
  19 #define SM8450_MASTER_QDSS_BAM                          7
  20 #define SM8450_MASTER_QSPI_0                            8
  21 #define SM8450_MASTER_QUP_0                             9
  22 #define SM8450_MASTER_QUP_1                             10
  23 #define SM8450_MASTER_QUP_2                             11
  24 #define SM8450_MASTER_A1NOC_CFG                         12
  25 #define SM8450_MASTER_A2NOC_CFG                         13
  26 #define SM8450_MASTER_A1NOC_SNOC                        14
  27 #define SM8450_MASTER_A2NOC_SNOC                        15
  28 #define SM8450_MASTER_CAMNOC_HF                         16
  29 #define SM8450_MASTER_CAMNOC_ICP                        17
  30 #define SM8450_MASTER_CAMNOC_SF                         18
  31 #define SM8450_MASTER_GEM_NOC_CNOC                      19
  32 #define SM8450_MASTER_GEM_NOC_PCIE_SNOC                 20
  33 #define SM8450_MASTER_GFX3D                             21
  34 #define SM8450_MASTER_LPASS_ANOC                        22
  35 #define SM8450_MASTER_MDP                               23
  36 #define SM8450_MASTER_MDP0                              SM8450_MASTER_MDP
  37 #define SM8450_MASTER_MDP1                              SM8450_MASTER_MDP
  38 #define SM8450_MASTER_MSS_PROC                          24
  39 #define SM8450_MASTER_CNOC_MNOC_CFG                     25
  40 #define SM8450_MASTER_MNOC_HF_MEM_NOC                   26
  41 #define SM8450_MASTER_MNOC_SF_MEM_NOC                   27
  42 #define SM8450_MASTER_COMPUTE_NOC                       28
  43 #define SM8450_MASTER_ANOC_PCIE_GEM_NOC                 29
  44 #define SM8450_MASTER_PCIE_ANOC_CFG                     30
  45 #define SM8450_MASTER_ROTATOR                           31
  46 #define SM8450_MASTER_SNOC_CFG                          32
  47 #define SM8450_MASTER_SNOC_GC_MEM_NOC                   33
  48 #define SM8450_MASTER_SNOC_SF_MEM_NOC                   34
  49 #define SM8450_MASTER_CDSP_HCP                          35
  50 #define SM8450_MASTER_VIDEO                             36
  51 #define SM8450_MASTER_VIDEO_P0                          SM8450_MASTER_VIDEO
  52 #define SM8450_MASTER_VIDEO_P1                          SM8450_MASTER_VIDEO
  53 #define SM8450_MASTER_VIDEO_CV_PROC                     37
  54 #define SM8450_MASTER_VIDEO_PROC                        38
  55 #define SM8450_MASTER_VIDEO_V_PROC                      39
  56 #define SM8450_MASTER_QUP_CORE_0                        40
  57 #define SM8450_MASTER_QUP_CORE_1                        41
  58 #define SM8450_MASTER_QUP_CORE_2                        42
  59 #define SM8450_MASTER_CRYPTO                            43
  60 #define SM8450_MASTER_IPA                               44
  61 #define SM8450_MASTER_LPASS_PROC                        45
  62 #define SM8450_MASTER_CDSP_PROC                         46
  63 #define SM8450_MASTER_PIMEM                             47
  64 #define SM8450_MASTER_SENSORS_PROC                      48
  65 #define SM8450_MASTER_SP                                49
  66 #define SM8450_MASTER_GIC                               50
  67 #define SM8450_MASTER_PCIE_0                            51
  68 #define SM8450_MASTER_PCIE_1                            52
  69 #define SM8450_MASTER_QDSS_ETR                          53
  70 #define SM8450_MASTER_QDSS_ETR_1                        54
  71 #define SM8450_MASTER_SDCC_2                            55
  72 #define SM8450_MASTER_SDCC_4                            56
  73 #define SM8450_MASTER_UFS_MEM                           57
  74 #define SM8450_MASTER_USB3_0                            58
  75 #define SM8450_SLAVE_EBI1                               512
  76 #define SM8450_SLAVE_AHB2PHY_SOUTH                      513
  77 #define SM8450_SLAVE_AHB2PHY_NORTH                      514
  78 #define SM8450_SLAVE_AOSS                               515
  79 #define SM8450_SLAVE_CAMERA_CFG                         516
  80 #define SM8450_SLAVE_CLK_CTL                            517
  81 #define SM8450_SLAVE_CDSP_CFG                           518
  82 #define SM8450_SLAVE_RBCPR_CX_CFG                       519
  83 #define SM8450_SLAVE_RBCPR_MMCX_CFG                     520
  84 #define SM8450_SLAVE_RBCPR_MXA_CFG                      521
  85 #define SM8450_SLAVE_RBCPR_MXC_CFG                      522
  86 #define SM8450_SLAVE_CRYPTO_0_CFG                       523
  87 #define SM8450_SLAVE_CX_RDPM                            524
  88 #define SM8450_SLAVE_DISPLAY_CFG                        525
  89 #define SM8450_SLAVE_GFX3D_CFG                          526
  90 #define SM8450_SLAVE_IMEM_CFG                           527
  91 #define SM8450_SLAVE_IPA_CFG                            528
  92 #define SM8450_SLAVE_IPC_ROUTER_CFG                     529
  93 #define SM8450_SLAVE_LPASS                              530
  94 #define SM8450_SLAVE_LPASS_CORE_CFG                     531
  95 #define SM8450_SLAVE_LPASS_LPI_CFG                      532
  96 #define SM8450_SLAVE_LPASS_MPU_CFG                      533
  97 #define SM8450_SLAVE_LPASS_TOP_CFG                      534
  98 #define SM8450_SLAVE_CNOC_MSS                           535
  99 #define SM8450_SLAVE_MX_RDPM                            536
 100 #define SM8450_SLAVE_PCIE_0_CFG                         537
 101 #define SM8450_SLAVE_PCIE_1_CFG                         538
 102 #define SM8450_SLAVE_PDM                                539
 103 #define SM8450_SLAVE_PIMEM_CFG                          540
 104 #define SM8450_SLAVE_PRNG                               541
 105 #define SM8450_SLAVE_QDSS_CFG                           542
 106 #define SM8450_SLAVE_QSPI_0                             543
 107 #define SM8450_SLAVE_QUP_0                              544
 108 #define SM8450_SLAVE_QUP_1                              545
 109 #define SM8450_SLAVE_QUP_2                              546
 110 #define SM8450_SLAVE_SDCC_2                             547
 111 #define SM8450_SLAVE_SDCC_4                             548
 112 #define SM8450_SLAVE_SPSS_CFG                           549
 113 #define SM8450_SLAVE_TCSR                               550
 114 #define SM8450_SLAVE_TLMM                               551
 115 #define SM8450_SLAVE_TME_CFG                            552
 116 #define SM8450_SLAVE_UFS_MEM_CFG                        553
 117 #define SM8450_SLAVE_USB3_0                             554
 118 #define SM8450_SLAVE_VENUS_CFG                          555
 119 #define SM8450_SLAVE_VSENSE_CTRL_CFG                    556
 120 #define SM8450_SLAVE_A1NOC_CFG                          557
 121 #define SM8450_SLAVE_A1NOC_SNOC                         558
 122 #define SM8450_SLAVE_A2NOC_CFG                          559
 123 #define SM8450_SLAVE_A2NOC_SNOC                         560
 124 #define SM8450_SLAVE_DDRSS_CFG                          561
 125 #define SM8450_SLAVE_GEM_NOC_CNOC                       562
 126 #define SM8450_SLAVE_SNOC_GEM_NOC_GC                    563
 127 #define SM8450_SLAVE_SNOC_GEM_NOC_SF                    564
 128 #define SM8450_SLAVE_LLCC                               565
 129 #define SM8450_SLAVE_MNOC_HF_MEM_NOC                    566
 130 #define SM8450_SLAVE_MNOC_SF_MEM_NOC                    567
 131 #define SM8450_SLAVE_CNOC_MNOC_CFG                      568
 132 #define SM8450_SLAVE_CDSP_MEM_NOC                       569
 133 #define SM8450_SLAVE_MEM_NOC_PCIE_SNOC                  570
 134 #define SM8450_SLAVE_PCIE_ANOC_CFG                      571
 135 #define SM8450_SLAVE_ANOC_PCIE_GEM_NOC                  572
 136 #define SM8450_SLAVE_SNOC_CFG                           573
 137 #define SM8450_SLAVE_LPASS_SNOC                         574
 138 #define SM8450_SLAVE_QUP_CORE_0                         575
 139 #define SM8450_SLAVE_QUP_CORE_1                         576
 140 #define SM8450_SLAVE_QUP_CORE_2                         577
 141 #define SM8450_SLAVE_IMEM                               578
 142 #define SM8450_SLAVE_PIMEM                              579
 143 #define SM8450_SLAVE_SERVICE_NSP_NOC                    580
 144 #define SM8450_SLAVE_SERVICE_A1NOC                      581
 145 #define SM8450_SLAVE_SERVICE_A2NOC                      582
 146 #define SM8450_SLAVE_SERVICE_CNOC                       583
 147 #define SM8450_SLAVE_SERVICE_MNOC                       584
 148 #define SM8450_SLAVE_SERVICES_LPASS_AML_NOC             585
 149 #define SM8450_SLAVE_SERVICE_LPASS_AG_NOC               586
 150 #define SM8450_SLAVE_SERVICE_PCIE_ANOC                  587
 151 #define SM8450_SLAVE_SERVICE_SNOC                       588
 152 #define SM8450_SLAVE_PCIE_0                             589
 153 #define SM8450_SLAVE_PCIE_1                             590
 154 #define SM8450_SLAVE_QDSS_STM                           591
 155 #define SM8450_SLAVE_TCU                                592
 156 #define SM8450_MASTER_LLCC_DISP                         1000
 157 #define SM8450_MASTER_MDP_DISP                          1001
 158 #define SM8450_MASTER_MDP0_DISP                         SM8450_MASTER_MDP_DISP
 159 #define SM8450_MASTER_MDP1_DISP                         SM8450_MASTER_MDP_DISP
 160 #define SM8450_MASTER_MNOC_HF_MEM_NOC_DISP              1002
 161 #define SM8450_MASTER_MNOC_SF_MEM_NOC_DISP              1003
 162 #define SM8450_MASTER_ANOC_PCIE_GEM_NOC_DISP            1004
 163 #define SM8450_MASTER_ROTATOR_DISP                      1005
 164 #define SM8450_SLAVE_EBI1_DISP                          1512
 165 #define SM8450_SLAVE_LLCC_DISP                          1513
 166 #define SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP               1514
 167 #define SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP               1515
 168
 169 #endif