drivers/input/serio/hil_mlc.c

   1 /*
   2  * HIL MLC state machine and serio interface driver
   3  *
   4  * Copyright (c) 2001 Brian S. Julin
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * Alternatively, this software may be distributed under the terms of the
  17  * GNU General Public License ("GPL").
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  *
  29  * References:
  30  * HP-HIL Technical Reference Manual.  Hewlett Packard Product No. 45918A
  31  *
  32  *
  33  *      Driver theory of operation:
  34  *
  35  *      Some access methods and an ISR is defined by the sub-driver
  36  *      (e.g. hp_sdc_mlc.c).  These methods are expected to provide a
  37  *      few bits of logic in addition to raw access to the HIL MLC,
  38  *      specifically, the ISR, which is entirely registered by the
  39  *      sub-driver and invoked directly, must check for record
  40  *      termination or packet match, at which point a semaphore must
  41  *      be cleared and then the hil_mlcs_tasklet must be scheduled.
  42  *
  43  *      The hil_mlcs_tasklet processes the state machine for all MLCs
  44  *      each time it runs, checking each MLC's progress at the current
  45  *      node in the state machine, and moving the MLC to subsequent nodes
  46  *      in the state machine when appropriate.  It will reschedule
  47  *      itself if output is pending.  (This rescheduling should be replaced
  48  *      at some point with a sub-driver-specific mechanism.)
  49  *
  50  *      A timer task prods the tasklet once per second to prevent
  51  *      hangups when attached devices do not return expected data
  52  *      and to initiate probes of the loop for new devices.
  53  */
  54
  55 #include <linux/hil_mlc.h>
  56 #include <linux/errno.h>
  57 #include <linux/kernel.h>
  58 #include <linux/module.h>
  59 #include <linux/init.h>
  60 #include <linux/interrupt.h>
  61 #include <linux/slab.h>
  62 #include <linux/timer.h>
  63 #include <linux/list.h>
  64
  65 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
  66 MODULE_DESCRIPTION("HIL MLC serio");
  67 MODULE_LICENSE("Dual BSD/GPL");
  68
  69 EXPORT_SYMBOL(hil_mlc_register);
  70 EXPORT_SYMBOL(hil_mlc_unregister);
  71
  72 #define PREFIX "HIL MLC: "
  73
  74 static LIST_HEAD(hil_mlcs);
  75 static DEFINE_RWLOCK(hil_mlcs_lock);
  76 static struct timer_list        hil_mlcs_kicker;
  77 static int                      hil_mlcs_probe;
  78
  79 static void hil_mlcs_process(unsigned long unused);
  80 static DECLARE_TASKLET_DISABLED(hil_mlcs_tasklet, hil_mlcs_process, 0);
  81
  82
  83 /* #define HIL_MLC_DEBUG */
  84
  85 /********************** Device info/instance management **********************/
  86
  87 static void hil_mlc_clear_di_map(hil_mlc *mlc, int val)
  88 {
  89         int j;
  90
  91         for (j = val; j < 7 ; j++)
  92                 mlc->di_map[j] = -1;
  93 }
  94
  95 static void hil_mlc_clear_di_scratch(hil_mlc *mlc)
  96 {
  97         memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch));
  98 }
  99
 100 static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx)
 101 {
 102         memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch));
 103 }
 104
 105 static int hil_mlc_match_di_scratch(hil_mlc *mlc)
 106 {
 107         int idx;
 108
 109         for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
 110                 int j, found = 0;
 111
 112                 /* In-use slots are not eligible. */
 113                 for (j = 0; j < 7 ; j++)
 114                         if (mlc->di_map[j] == idx)
 115                                 found++;
 116
 117                 if (found)
 118                         continue;
 119
 120                 if (!memcmp(mlc->di + idx, &mlc->di_scratch,
 121                                 sizeof(mlc->di_scratch)))
 122                         break;
 123         }
 124         return idx >= HIL_MLC_DEVMEM ? -1 : idx;
 125 }
 126
 127 static int hil_mlc_find_free_di(hil_mlc *mlc)
 128 {
 129         int idx;
 130
 131         /* TODO: Pick all-zero slots first, failing that,
 132          * randomize the slot picked among those eligible.
 133          */
 134         for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
 135                 int j, found = 0;
 136
 137                 for (j = 0; j < 7 ; j++)
 138                         if (mlc->di_map[j] == idx)
 139                                 found++;
 140
 141                 if (!found)
 142                         break;
 143         }
 144
 145         return idx; /* Note: It is guaranteed at least one above will match */
 146 }
 147
 148 static inline void hil_mlc_clean_serio_map(hil_mlc *mlc)
 149 {
 150         int idx;
 151
 152         for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
 153                 int j, found = 0;
 154
 155                 for (j = 0; j < 7 ; j++)
 156                         if (mlc->di_map[j] == idx)
 157                                 found++;
 158
 159                 if (!found)
 160                         mlc->serio_map[idx].di_revmap = -1;
 161         }
 162 }
 163
 164 static void hil_mlc_send_polls(hil_mlc *mlc)
 165 {
 166         int did, i, cnt;
 167         struct serio *serio;
 168         struct serio_driver *drv;
 169
 170         i = cnt = 0;
 171         did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8;
 172         serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL;
 173         drv = (serio != NULL) ? serio->drv : NULL;
 174
 175         while (mlc->icount < 15 - i) {
 176                 hil_packet p;
 177
 178                 p = mlc->ipacket[i];
 179                 if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
 180                         if (drv && drv->interrupt) {
 181                                 drv->interrupt(serio, 0, 0);
 182                                 drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
 183                                 drv->interrupt(serio, HIL_PKT_CMD >> 8,  0);
 184                                 drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
 185                         }
 186
 187                         did = (p & HIL_PKT_ADDR_MASK) >> 8;
 188                         serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
 189                         drv = (serio != NULL) ? serio->drv : NULL;
 190                         cnt = 0;
 191                 }
 192
 193                 cnt++;
 194                 i++;
 195
 196                 if (drv && drv->interrupt) {
 197                         drv->interrupt(serio, (p >> 24), 0);
 198                         drv->interrupt(serio, (p >> 16) & 0xff, 0);
 199                         drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
 200                         drv->interrupt(serio, p & 0xff, 0);
 201                 }
 202         }
 203 }
 204
 205 /*************************** State engine *********************************/
 206
 207 #define HILSEN_SCHED    0x000100        /* Schedule the tasklet         */
 208 #define HILSEN_BREAK    0x000200        /* Wait until next pass         */
 209 #define HILSEN_UP       0x000400        /* relative node#, decrement    */
 210 #define HILSEN_DOWN     0x000800        /* relative node#, increment    */
 211 #define HILSEN_FOLLOW   0x001000        /* use retval as next node#     */
 212
 213 #define HILSEN_MASK     0x0000ff
 214 #define HILSEN_START    0
 215 #define HILSEN_RESTART  1
 216 #define HILSEN_DHR      9
 217 #define HILSEN_DHR2     10
 218 #define HILSEN_IFC      14
 219 #define HILSEN_HEAL0    16
 220 #define HILSEN_HEAL     18
 221 #define HILSEN_ACF      21
 222 #define HILSEN_ACF2     22
 223 #define HILSEN_DISC0    25
 224 #define HILSEN_DISC     27
 225 #define HILSEN_MATCH    40
 226 #define HILSEN_OPERATE  41
 227 #define HILSEN_PROBE    44
 228 #define HILSEN_DSR      52
 229 #define HILSEN_REPOLL   55
 230 #define HILSEN_IFCACF   58
 231 #define HILSEN_END      60
 232
 233 #define HILSEN_NEXT     (HILSEN_DOWN | 1)
 234 #define HILSEN_SAME     (HILSEN_DOWN | 0)
 235 #define HILSEN_LAST     (HILSEN_UP | 1)
 236
 237 #define HILSEN_DOZE     (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK)
 238 #define HILSEN_SLEEP    (HILSEN_SAME | HILSEN_BREAK)
 239
 240 static int hilse_match(hil_mlc *mlc, int unused)
 241 {
 242         int rc;
 243
 244         rc = hil_mlc_match_di_scratch(mlc);
 245         if (rc == -1) {
 246                 rc = hil_mlc_find_free_di(mlc);
 247                 if (rc == -1)
 248                         goto err;
 249
 250 #ifdef HIL_MLC_DEBUG
 251                 printk(KERN_DEBUG PREFIX "new in slot %i\n", rc);
 252 #endif
 253                 hil_mlc_copy_di_scratch(mlc, rc);
 254                 mlc->di_map[mlc->ddi] = rc;
 255                 mlc->serio_map[rc].di_revmap = mlc->ddi;
 256                 hil_mlc_clean_serio_map(mlc);
 257                 serio_rescan(mlc->serio[rc]);
 258                 return -1;
 259         }
 260
 261         mlc->di_map[mlc->ddi] = rc;
 262 #ifdef HIL_MLC_DEBUG
 263         printk(KERN_DEBUG PREFIX "same in slot %i\n", rc);
 264 #endif
 265         mlc->serio_map[rc].di_revmap = mlc->ddi;
 266         hil_mlc_clean_serio_map(mlc);
 267         return 0;
 268
 269  err:
 270         printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n");
 271         return 1;
 272 }
 273
 274 /* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */
 275 static int hilse_init_lcv(hil_mlc *mlc, int unused)
 276 {
 277         struct timeval tv;
 278
 279         do_gettimeofday(&tv);
 280
 281         if (mlc->lcv && (tv.tv_sec - mlc->lcv_tv.tv_sec) < 5)
 282                 return -1;
 283
 284         mlc->lcv_tv = tv;
 285         mlc->lcv = 0;
 286
 287         return 0;
 288 }
 289
 290 static int hilse_inc_lcv(hil_mlc *mlc, int lim)
 291 {
 292         return mlc->lcv++ >= lim ? -1 : 0;
 293 }
 294
 295 #if 0
 296 static int hilse_set_lcv(hil_mlc *mlc, int val)
 297 {
 298         mlc->lcv = val;
 299
 300         return 0;
 301 }
 302 #endif
 303
 304 /* Management of the discovered device index (zero based, -1 means no devs) */
 305 static int hilse_set_ddi(hil_mlc *mlc, int val)
 306 {
 307         mlc->ddi = val;
 308         hil_mlc_clear_di_map(mlc, val + 1);
 309
 310         return 0;
 311 }
 312
 313 static int hilse_dec_ddi(hil_mlc *mlc, int unused)
 314 {
 315         mlc->ddi--;
 316         if (mlc->ddi <= -1) {
 317                 mlc->ddi = -1;
 318                 hil_mlc_clear_di_map(mlc, 0);
 319                 return -1;
 320         }
 321         hil_mlc_clear_di_map(mlc, mlc->ddi + 1);
 322
 323         return 0;
 324 }
 325
 326 static int hilse_inc_ddi(hil_mlc *mlc, int unused)
 327 {
 328         BUG_ON(mlc->ddi >= 6);
 329         mlc->ddi++;
 330
 331         return 0;
 332 }
 333
 334 static int hilse_take_idd(hil_mlc *mlc, int unused)
 335 {
 336         int i;
 337
 338         /* Help the state engine:
 339          * Is this a real IDD response or just an echo?
 340          *
 341          * Real IDD response does not start with a command.
 342          */
 343         if (mlc->ipacket[0] & HIL_PKT_CMD)
 344                 goto bail;
 345
 346         /* Should have the command echoed further down. */
 347         for (i = 1; i < 16; i++) {
 348                 if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) ==
 349                      (mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) &&
 350                     (mlc->ipacket[i] & HIL_PKT_CMD) &&
 351                     ((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD))
 352                         break;
 353         }
 354         if (i > 15)
 355                 goto bail;
 356
 357         /* And the rest of the packets should still be clear. */
 358         while (++i < 16)
 359                 if (mlc->ipacket[i])
 360                         break;
 361
 362         if (i < 16)
 363                 goto bail;
 364
 365         for (i = 0; i < 16; i++)
 366                 mlc->di_scratch.idd[i] =
 367                         mlc->ipacket[i] & HIL_PKT_DATA_MASK;
 368
 369         /* Next step is to see if RSC supported */
 370         if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC)
 371                 return HILSEN_NEXT;
 372
 373         if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
 374                 return HILSEN_DOWN | 4;
 375
 376         return 0;
 377
 378  bail:
 379         mlc->ddi--;
 380
 381         return -1; /* This should send us off to ACF */
 382 }
 383
 384 static int hilse_take_rsc(hil_mlc *mlc, int unused)
 385 {
 386         int i;
 387
 388         for (i = 0; i < 16; i++)
 389                 mlc->di_scratch.rsc[i] =
 390                         mlc->ipacket[i] & HIL_PKT_DATA_MASK;
 391
 392         /* Next step is to see if EXD supported (IDD has already been read) */
 393         if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
 394                 return HILSEN_NEXT;
 395
 396         return 0;
 397 }
 398
 399 static int hilse_take_exd(hil_mlc *mlc, int unused)
 400 {
 401         int i;
 402
 403         for (i = 0; i < 16; i++)
 404                 mlc->di_scratch.exd[i] =
 405                         mlc->ipacket[i] & HIL_PKT_DATA_MASK;
 406
 407         /* Next step is to see if RNM supported. */
 408         if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM)
 409                 return HILSEN_NEXT;
 410
 411         return 0;
 412 }
 413
 414 static int hilse_take_rnm(hil_mlc *mlc, int unused)
 415 {
 416         int i;
 417
 418         for (i = 0; i < 16; i++)
 419                 mlc->di_scratch.rnm[i] =
 420                         mlc->ipacket[i] & HIL_PKT_DATA_MASK;
 421
 422         printk(KERN_INFO PREFIX "Device name gotten: %16s\n",
 423                         mlc->di_scratch.rnm);
 424
 425         return 0;
 426 }
 427
 428 static int hilse_operate(hil_mlc *mlc, int repoll)
 429 {
 430
 431         if (mlc->opercnt == 0)
 432                 hil_mlcs_probe = 0;
 433         mlc->opercnt = 1;
 434
 435         hil_mlc_send_polls(mlc);
 436
 437         if (!hil_mlcs_probe)
 438                 return 0;
 439         hil_mlcs_probe = 0;
 440         mlc->opercnt = 0;
 441         return 1;
 442 }
 443
 444 #define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \
 445 { HILSE_FUNC,           { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc },
 446 #define OUT(pack) \
 447 { HILSE_OUT,            { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 },
 448 #define CTS \
 449 { HILSE_CTS,            { .packet = 0    }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 },
 450 #define EXPECT(comp, to, got, got_wrong, timed_out) \
 451 { HILSE_EXPECT,         { .packet = comp }, to, got, got_wrong, timed_out },
 452 #define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \
 453 { HILSE_EXPECT_LAST,    { .packet = comp }, to, got, got_wrong, timed_out },
 454 #define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \
 455 { HILSE_EXPECT_DISC,    { .packet = comp }, to, got, got_wrong, timed_out },
 456 #define IN(to, got, got_error, timed_out) \
 457 { HILSE_IN,             { .packet = 0    }, to, got, got_error, timed_out },
 458 #define OUT_DISC(pack) \
 459 { HILSE_OUT_DISC,       { .packet = pack }, 0, 0, 0, 0 },
 460 #define OUT_LAST(pack) \
 461 { HILSE_OUT_LAST,       { .packet = pack }, 0, 0, 0, 0 },
 462
 463 static const struct hilse_node hil_mlc_se[HILSEN_END] = {
 464
 465         /* 0  HILSEN_START */
 466         FUNC(hilse_init_lcv, 0, HILSEN_NEXT,    HILSEN_SLEEP,   0)
 467
 468         /* 1  HILSEN_RESTART */
 469         FUNC(hilse_inc_lcv, 10, HILSEN_NEXT,    HILSEN_START,  0)
 470         OUT(HIL_CTRL_ONLY)                      /* Disable APE */
 471         CTS
 472
 473 #define TEST_PACKET(x) \
 474 (HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x)
 475
 476         OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5))
 477         EXPECT(HIL_ERR_INT | TEST_PACKET(0x5),
 478                2000,            HILSEN_NEXT,    HILSEN_RESTART, HILSEN_RESTART)
 479         OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa))
 480         EXPECT(HIL_ERR_INT | TEST_PACKET(0xa),
 481                2000,            HILSEN_NEXT,    HILSEN_RESTART, HILSEN_RESTART)
 482         OUT(HIL_CTRL_ONLY | 0)                  /* Disable test mode */
 483
 484         /* 9  HILSEN_DHR */
 485         FUNC(hilse_init_lcv, 0, HILSEN_NEXT,    HILSEN_SLEEP,   0)
 486
 487         /* 10 HILSEN_DHR2 */
 488         FUNC(hilse_inc_lcv, 10, HILSEN_NEXT,    HILSEN_START,   0)
 489         FUNC(hilse_set_ddi, -1, HILSEN_NEXT,    0,              0)
 490         OUT(HIL_PKT_CMD | HIL_CMD_DHR)
 491         IN(300000,              HILSEN_DHR2,    HILSEN_DHR2,    HILSEN_NEXT)
 492
 493         /* 14 HILSEN_IFC */
 494         OUT(HIL_PKT_CMD | HIL_CMD_IFC)
 495         EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
 496                20000,           HILSEN_DISC,    HILSEN_DHR2,    HILSEN_NEXT )
 497
 498         /* If devices are there, they weren't in PUP or other loopback mode.
 499          * We're more concerned at this point with restoring operation
 500          * to devices than discovering new ones, so we try to salvage
 501          * the loop configuration by closing off the loop.
 502          */
 503
 504         /* 16 HILSEN_HEAL0 */
 505         FUNC(hilse_dec_ddi, 0,  HILSEN_NEXT,    HILSEN_ACF,     0)
 506         FUNC(hilse_inc_ddi, 0,  HILSEN_NEXT,    0,              0)
 507
 508         /* 18 HILSEN_HEAL */
 509         OUT_LAST(HIL_CMD_ELB)
 510         EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT,
 511                     20000,      HILSEN_REPOLL,  HILSEN_DSR,     HILSEN_NEXT)
 512         FUNC(hilse_dec_ddi, 0,  HILSEN_HEAL,    HILSEN_NEXT,    0)
 513
 514         /* 21 HILSEN_ACF */
 515         FUNC(hilse_init_lcv, 0, HILSEN_NEXT,    HILSEN_DOZE,    0)
 516
 517         /* 22 HILSEN_ACF2 */
 518         FUNC(hilse_inc_lcv, 10, HILSEN_NEXT,    HILSEN_START,   0)
 519         OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
 520         IN(20000,               HILSEN_NEXT,    HILSEN_DSR,     HILSEN_NEXT)
 521
 522         /* 25 HILSEN_DISC0 */
 523         OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
 524         EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT,
 525                20000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_DSR)
 526
 527         /* Only enter here if response just received */
 528         /* 27 HILSEN_DISC */
 529         OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD)
 530         EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT,
 531                20000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_START)
 532         FUNC(hilse_inc_ddi,  0, HILSEN_NEXT,    HILSEN_START,   0)
 533         FUNC(hilse_take_idd, 0, HILSEN_MATCH,   HILSEN_IFCACF,  HILSEN_FOLLOW)
 534         OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC)
 535         EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT,
 536                30000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_DSR)
 537         FUNC(hilse_take_rsc, 0, HILSEN_MATCH,   0,              HILSEN_FOLLOW)
 538         OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD)
 539         EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT,
 540                30000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_DSR)
 541         FUNC(hilse_take_exd, 0, HILSEN_MATCH,   0,              HILSEN_FOLLOW)
 542         OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM)
 543         EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT,
 544                30000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_DSR)
 545         FUNC(hilse_take_rnm, 0, HILSEN_MATCH,   0,              0)
 546
 547         /* 40 HILSEN_MATCH */
 548         FUNC(hilse_match, 0,    HILSEN_NEXT,    HILSEN_NEXT,    /* TODO */ 0)
 549
 550         /* 41 HILSEN_OPERATE */
 551         OUT(HIL_PKT_CMD | HIL_CMD_POL)
 552         EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT,
 553                20000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_NEXT)
 554         FUNC(hilse_operate, 0,  HILSEN_OPERATE, HILSEN_IFC,     HILSEN_NEXT)
 555
 556         /* 44 HILSEN_PROBE */
 557         OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT)
 558         IN(10000,               HILSEN_DISC,    HILSEN_DSR,     HILSEN_NEXT)
 559         OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
 560         IN(10000,               HILSEN_DISC,    HILSEN_DSR,     HILSEN_NEXT)
 561         OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
 562         IN(10000,               HILSEN_DISC0,   HILSEN_DSR,     HILSEN_NEXT)
 563         OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB)
 564         IN(10000,               HILSEN_OPERATE, HILSEN_DSR,     HILSEN_DSR)
 565
 566         /* 52 HILSEN_DSR */
 567         FUNC(hilse_set_ddi, -1, HILSEN_NEXT,    0,              0)
 568         OUT(HIL_PKT_CMD | HIL_CMD_DSR)
 569         IN(20000,               HILSEN_DHR,     HILSEN_DHR,     HILSEN_IFC)
 570
 571         /* 55 HILSEN_REPOLL */
 572         OUT(HIL_PKT_CMD | HIL_CMD_RPL)
 573         EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT,
 574                20000,           HILSEN_NEXT,    HILSEN_DSR,     HILSEN_NEXT)
 575         FUNC(hilse_operate, 1,  HILSEN_OPERATE, HILSEN_IFC,     HILSEN_PROBE)
 576
 577         /* 58 HILSEN_IFCACF */
 578         OUT(HIL_PKT_CMD | HIL_CMD_IFC)
 579         EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
 580                20000,           HILSEN_ACF2,    HILSEN_DHR2,    HILSEN_HEAL)
 581
 582         /* 60 HILSEN_END */
 583 };
 584
 585 static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node)
 586 {
 587
 588         switch (node->act) {
 589         case HILSE_EXPECT_DISC:
 590                 mlc->imatch = node->object.packet;
 591                 mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
 592                 break;
 593         case HILSE_EXPECT_LAST:
 594                 mlc->imatch = node->object.packet;
 595                 mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
 596                 break;
 597         case HILSE_EXPECT:
 598                 mlc->imatch = node->object.packet;
 599                 break;
 600         case HILSE_IN:
 601                 mlc->imatch = 0;
 602                 break;
 603         default:
 604                 BUG();
 605         }
 606         mlc->istarted = 1;
 607         mlc->intimeout = node->arg;
 608         do_gettimeofday(&(mlc->instart));
 609         mlc->icount = 15;
 610         memset(mlc->ipacket, 0, 16 * sizeof(hil_packet));
 611         BUG_ON(down_trylock(&mlc->isem));
 612 }
 613
 614 #ifdef HIL_MLC_DEBUG
 615 static int doze;
 616 static int seidx; /* For debug */
 617 #endif
 618
 619 static int hilse_donode(hil_mlc *mlc)
 620 {
 621         const struct hilse_node *node;
 622         int nextidx = 0;
 623         int sched_long = 0;
 624         unsigned long flags;
 625
 626 #ifdef HIL_MLC_DEBUG
 627         if (mlc->seidx && mlc->seidx != seidx &&
 628             mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) {
 629                 printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx);
 630                 doze = 0;
 631         }
 632
 633         seidx = mlc->seidx;
 634 #endif
 635         node = hil_mlc_se + mlc->seidx;
 636
 637         switch (node->act) {
 638                 int rc;
 639                 hil_packet pack;
 640
 641         case HILSE_FUNC:
 642                 BUG_ON(node->object.func == NULL);
 643                 rc = node->object.func(mlc, node->arg);
 644                 nextidx = (rc > 0) ? node->ugly :
 645                         ((rc < 0) ? node->bad : node->good);
 646                 if (nextidx == HILSEN_FOLLOW)
 647                         nextidx = rc;
 648                 break;
 649
 650         case HILSE_EXPECT_LAST:
 651         case HILSE_EXPECT_DISC:
 652         case HILSE_EXPECT:
 653         case HILSE_IN:
 654                 /* Already set up from previous HILSE_OUT_* */
 655                 write_lock_irqsave(&mlc->lock, flags);
 656                 rc = mlc->in(mlc, node->arg);
 657                 if (rc == 2)  {
 658                         nextidx = HILSEN_DOZE;
 659                         sched_long = 1;
 660                         write_unlock_irqrestore(&mlc->lock, flags);
 661                         break;
 662                 }
 663                 if (rc == 1)
 664                         nextidx = node->ugly;
 665                 else if (rc == 0)
 666                         nextidx = node->good;
 667                 else
 668                         nextidx = node->bad;
 669                 mlc->istarted = 0;
 670                 write_unlock_irqrestore(&mlc->lock, flags);
 671                 break;
 672
 673         case HILSE_OUT_LAST:
 674                 write_lock_irqsave(&mlc->lock, flags);
 675                 pack = node->object.packet;
 676                 pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
 677                 goto out;
 678
 679         case HILSE_OUT_DISC:
 680                 write_lock_irqsave(&mlc->lock, flags);
 681                 pack = node->object.packet;
 682                 pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
 683                 goto out;
 684
 685         case HILSE_OUT:
 686                 write_lock_irqsave(&mlc->lock, flags);
 687                 pack = node->object.packet;
 688         out:
 689                 if (!mlc->istarted) {
 690                         /* Prepare to receive input */
 691                         if ((node + 1)->act & HILSE_IN)
 692                                 hilse_setup_input(mlc, node + 1);
 693                 }
 694
 695                 write_unlock_irqrestore(&mlc->lock, flags);
 696
 697                 if (down_trylock(&mlc->osem)) {
 698                         nextidx = HILSEN_DOZE;
 699                         break;
 700                 }
 701                 up(&mlc->osem);
 702
 703                 write_lock_irqsave(&mlc->lock, flags);
 704                 if (!mlc->ostarted) {
 705                         mlc->ostarted = 1;
 706                         mlc->opacket = pack;
 707                         mlc->out(mlc);
 708                         nextidx = HILSEN_DOZE;
 709                         write_unlock_irqrestore(&mlc->lock, flags);
 710                         break;
 711                 }
 712                 mlc->ostarted = 0;
 713                 do_gettimeofday(&(mlc->instart));
 714                 write_unlock_irqrestore(&mlc->lock, flags);
 715                 nextidx = HILSEN_NEXT;
 716                 break;
 717
 718         case HILSE_CTS:
 719                 write_lock_irqsave(&mlc->lock, flags);
 720                 nextidx = mlc->cts(mlc) ? node->bad : node->good;
 721                 write_unlock_irqrestore(&mlc->lock, flags);
 722                 break;
 723
 724         default:
 725                 BUG();
 726         }
 727
 728 #ifdef HIL_MLC_DEBUG
 729         if (nextidx == HILSEN_DOZE)
 730                 doze++;
 731 #endif
 732
 733         while (nextidx & HILSEN_SCHED) {
 734                 struct timeval tv;
 735
 736                 if (!sched_long)
 737                         goto sched;
 738
 739                 do_gettimeofday(&tv);
 740                 tv.tv_usec += USEC_PER_SEC * (tv.tv_sec - mlc->instart.tv_sec);
 741                 tv.tv_usec -= mlc->instart.tv_usec;
 742                 if (tv.tv_usec >= mlc->intimeout) goto sched;
 743                 tv.tv_usec = (mlc->intimeout - tv.tv_usec) * HZ / USEC_PER_SEC;
 744                 if (!tv.tv_usec) goto sched;
 745                 mod_timer(&hil_mlcs_kicker, jiffies + tv.tv_usec);
 746                 break;
 747         sched:
 748                 tasklet_schedule(&hil_mlcs_tasklet);
 749                 break;
 750         }
 751
 752         if (nextidx & HILSEN_DOWN)
 753                 mlc->seidx += nextidx & HILSEN_MASK;
 754         else if (nextidx & HILSEN_UP)
 755                 mlc->seidx -= nextidx & HILSEN_MASK;
 756         else
 757                 mlc->seidx = nextidx & HILSEN_MASK;
 758
 759         if (nextidx & HILSEN_BREAK)
 760                 return 1;
 761
 762         return 0;
 763 }
 764
 765 /******************** tasklet context functions **************************/
 766 static void hil_mlcs_process(unsigned long unused)
 767 {
 768         struct list_head *tmp;
 769
 770         read_lock(&hil_mlcs_lock);
 771         list_for_each(tmp, &hil_mlcs) {
 772                 struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list);
 773                 while (hilse_donode(mlc) == 0) {
 774 #ifdef HIL_MLC_DEBUG
 775                         if (mlc->seidx != 41 &&
 776                             mlc->seidx != 42 &&
 777                             mlc->seidx != 43)
 778                                 printk(KERN_DEBUG PREFIX " + ");
 779 #endif
 780                 }
 781         }
 782         read_unlock(&hil_mlcs_lock);
 783 }
 784
 785 /************************* Keepalive timer task *********************/
 786
 787 static void hil_mlcs_timer(unsigned long data)
 788 {
 789         hil_mlcs_probe = 1;
 790         tasklet_schedule(&hil_mlcs_tasklet);
 791         /* Re-insert the periodic task. */
 792         if (!timer_pending(&hil_mlcs_kicker))
 793                 mod_timer(&hil_mlcs_kicker, jiffies + HZ);
 794 }
 795
 796 /******************** user/kernel context functions **********************/
 797
 798 static int hil_mlc_serio_write(struct serio *serio, unsigned char c)
 799 {
 800         struct hil_mlc_serio_map *map;
 801         struct hil_mlc *mlc;
 802         struct serio_driver *drv;
 803         uint8_t *idx, *last;
 804
 805         map = serio->port_data;
 806         BUG_ON(map == NULL);
 807
 808         mlc = map->mlc;
 809         BUG_ON(mlc == NULL);
 810
 811         mlc->serio_opacket[map->didx] |=
 812                 ((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx]));
 813
 814         if (mlc->serio_oidx[map->didx] >= 3) {
 815                 /* for now only commands */
 816                 if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD))
 817                         return -EIO;
 818                 switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) {
 819                 case HIL_CMD_IDD:
 820                         idx = mlc->di[map->didx].idd;
 821                         goto emu;
 822                 case HIL_CMD_RSC:
 823                         idx = mlc->di[map->didx].rsc;
 824                         goto emu;
 825                 case HIL_CMD_EXD:
 826                         idx = mlc->di[map->didx].exd;
 827                         goto emu;
 828                 case HIL_CMD_RNM:
 829                         idx = mlc->di[map->didx].rnm;
 830                         goto emu;
 831                 default:
 832                         break;
 833                 }
 834                 mlc->serio_oidx[map->didx] = 0;
 835                 mlc->serio_opacket[map->didx] = 0;
 836         }
 837
 838         mlc->serio_oidx[map->didx]++;
 839         return -EIO;
 840  emu:
 841         drv = serio->drv;
 842         BUG_ON(drv == NULL);
 843
 844         last = idx + 15;
 845         while ((last != idx) && (*last == 0))
 846                 last--;
 847
 848         while (idx != last) {
 849                 drv->interrupt(serio, 0, 0);
 850                 drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
 851                 drv->interrupt(serio, 0, 0);
 852                 drv->interrupt(serio, *idx, 0);
 853                 idx++;
 854         }
 855         drv->interrupt(serio, 0, 0);
 856         drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
 857         drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
 858         drv->interrupt(serio, *idx, 0);
 859
 860         mlc->serio_oidx[map->didx] = 0;
 861         mlc->serio_opacket[map->didx] = 0;
 862
 863         return 0;
 864 }
 865
 866 static int hil_mlc_serio_open(struct serio *serio)
 867 {
 868         struct hil_mlc_serio_map *map;
 869         struct hil_mlc *mlc;
 870
 871         if (serio_get_drvdata(serio) != NULL)
 872                 return -EBUSY;
 873
 874         map = serio->port_data;
 875         BUG_ON(map == NULL);
 876
 877         mlc = map->mlc;
 878         BUG_ON(mlc == NULL);
 879
 880         return 0;
 881 }
 882
 883 static void hil_mlc_serio_close(struct serio *serio)
 884 {
 885         struct hil_mlc_serio_map *map;
 886         struct hil_mlc *mlc;
 887
 888         map = serio->port_data;
 889         BUG_ON(map == NULL);
 890
 891         mlc = map->mlc;
 892         BUG_ON(mlc == NULL);
 893
 894         serio_set_drvdata(serio, NULL);
 895         serio->drv = NULL;
 896         /* TODO wake up interruptable */
 897 }
 898
 899 static const struct serio_device_id hil_mlc_serio_id = {
 900         .type = SERIO_HIL_MLC,
 901         .proto = SERIO_HIL,
 902         .extra = SERIO_ANY,
 903         .id = SERIO_ANY,
 904 };
 905
 906 int hil_mlc_register(hil_mlc *mlc)
 907 {
 908         int i;
 909         unsigned long flags;
 910
 911         BUG_ON(mlc == NULL);
 912
 913         mlc->istarted = 0;
 914         mlc->ostarted = 0;
 915
 916         rwlock_init(&mlc->lock);
 917         sema_init(&mlc->osem, 1);
 918
 919         sema_init(&mlc->isem, 1);
 920         mlc->icount = -1;
 921         mlc->imatch = 0;
 922
 923         mlc->opercnt = 0;
 924
 925         sema_init(&(mlc->csem), 0);
 926
 927         hil_mlc_clear_di_scratch(mlc);
 928         hil_mlc_clear_di_map(mlc, 0);
 929         for (i = 0; i < HIL_MLC_DEVMEM; i++) {
 930                 struct serio *mlc_serio;
 931                 hil_mlc_copy_di_scratch(mlc, i);
 932                 mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL);
 933                 mlc->serio[i] = mlc_serio;
 934                 if (!mlc->serio[i]) {
 935                         for (; i >= 0; i--)
 936                                 kfree(mlc->serio[i]);
 937                         return -ENOMEM;
 938                 }
 939                 snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i);
 940                 snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i);
 941                 mlc_serio->id                   = hil_mlc_serio_id;
 942                 mlc_serio->id.id                = i; /* HIL port no. */
 943                 mlc_serio->write                = hil_mlc_serio_write;
 944                 mlc_serio->open                 = hil_mlc_serio_open;
 945                 mlc_serio->close                = hil_mlc_serio_close;
 946                 mlc_serio->port_data            = &(mlc->serio_map[i]);
 947                 mlc->serio_map[i].mlc           = mlc;
 948                 mlc->serio_map[i].didx          = i;
 949                 mlc->serio_map[i].di_revmap     = -1;
 950                 mlc->serio_opacket[i]           = 0;
 951                 mlc->serio_oidx[i]              = 0;
 952                 serio_register_port(mlc_serio);
 953         }
 954
 955         mlc->tasklet = &hil_mlcs_tasklet;
 956
 957         write_lock_irqsave(&hil_mlcs_lock, flags);
 958         list_add_tail(&mlc->list, &hil_mlcs);
 959         mlc->seidx = HILSEN_START;
 960         write_unlock_irqrestore(&hil_mlcs_lock, flags);
 961
 962         tasklet_schedule(&hil_mlcs_tasklet);
 963         return 0;
 964 }
 965
 966 int hil_mlc_unregister(hil_mlc *mlc)
 967 {
 968         struct list_head *tmp;
 969         unsigned long flags;
 970         int i;
 971
 972         BUG_ON(mlc == NULL);
 973
 974         write_lock_irqsave(&hil_mlcs_lock, flags);
 975         list_for_each(tmp, &hil_mlcs)
 976                 if (list_entry(tmp, hil_mlc, list) == mlc)
 977                         goto found;
 978
 979         /* not found in list */
 980         write_unlock_irqrestore(&hil_mlcs_lock, flags);
 981         tasklet_schedule(&hil_mlcs_tasklet);
 982         return -ENODEV;
 983
 984  found:
 985         list_del(tmp);
 986         write_unlock_irqrestore(&hil_mlcs_lock, flags);
 987
 988         for (i = 0; i < HIL_MLC_DEVMEM; i++) {
 989                 serio_unregister_port(mlc->serio[i]);
 990                 mlc->serio[i] = NULL;
 991         }
 992
 993         tasklet_schedule(&hil_mlcs_tasklet);
 994         return 0;
 995 }
 996
 997 /**************************** Module interface *************************/
 998
 999 static int __init hil_mlc_init(void)
1000 {
1001         setup_timer(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
1002         mod_timer(&hil_mlcs_kicker, jiffies + HZ);
1003
1004         tasklet_enable(&hil_mlcs_tasklet);
1005
1006         return 0;
1007 }
1008
1009 static void __exit hil_mlc_exit(void)
1010 {
1011         del_timer_sync(&hil_mlcs_kicker);
1012         tasklet_kill(&hil_mlcs_tasklet);
1013 }
1014
1015 module_init(hil_mlc_init);
1016 module_exit(hil_mlc_exit);