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[kernel/linux-2.6.36.git] / drivers / input / keyboard / melfas_download.h
1 //------------------------------------------------------------------
2 //
3 //      MELFAS Firmware download base code v6 For MCS5080 2008/11/04
4 //
5 //------------------------------------------------------------------
6
7 #ifndef __MELFAS_FIRMWARE_DOWNLOAD_H__
8 #define __MELFAS_FIRMWARE_DOWNLOAD_H__
9
10 //============================================================
11 //
12 //      Porting section 1. Type define
13 //
14 //============================================================
15
16 typedef char                            INT8;
17 typedef unsigned char           UINT8;
18 //typedef unsigned char         uint8_t;
19 typedef short                           INT16;
20 typedef unsigned short          UINT16;
21 //typedef unsigned short                uint16_t;
22 typedef int                                     INT32;
23 typedef unsigned int            UINT32;
24 typedef unsigned char           BOOLEAN;
25
26
27 #ifndef TRUE
28 #define TRUE                            (1==1)
29 #endif
30
31 #ifndef FALSE
32 #define FALSE                           (1==0)
33 #endif
34
35 #ifndef NULL
36 #define NULL                            0
37 #endif
38
39 //============================================================
40 //      Baseand include
41 //============================================================
42 //#include "drv_io.h"
43 //#include "drv_i2c.h"
44 //#include "drv_uart.h"
45 #include <linux/module.h>
46 #include <linux/init.h>
47 #include <linux/fs.h>
48 #include <linux/i2c.h>
49 #include <linux/interrupt.h>
50 #include <linux/irq.h>
51 #include <linux/sched.h>
52 #include <linux/pm.h>
53 #include <linux/sysctl.h>
54 #include <linux/proc_fs.h>
55 #include <linux/delay.h>
56 #include <linux/platform_device.h>
57 #include <linux/input.h>
58 //#include <plat/regs-gpio.h>
59 #include <plat/gpio-cfg.h>
60 #include <linux/gpio.h>
61 //#include <asm/gpio.h>
62 #include <mach/hardware.h>
63 //#include <mach/mux.h>
64 #include <linux/syscalls.h>
65 #include <linux/fcntl.h>
66 #include <asm/uaccess.h>
67 #include <linux/vmalloc.h>
68
69
70 //============================================================
71 //
72 //      Porting section 2. Options
73 //
74 //============================================================
75
76 // Selection of i2c function ( This must be 1 )
77 #define USE_BASEBAND_I2C_FUNCTION                                                                               1
78
79 // Disable downlaoding, if module version does not match.
80 #define MELFAS_DISABLE_DOWNLOAD_IF_MODULE_VERSION_DOES_NOT_MATCH                0
81
82 // If 'enable download command' is needed ( Pinmap dependent option ).
83 #define MELFAS_USE_PROTOCOL_COMMAND_FOR_DOWNLOAD                                                0
84
85 // For printing debug information. ( Please check 'printing function' )
86 #define MELFAS_ENABLE_DBG_PRINT                                                                                 1
87 #define MELFAS_ENABLE_DBG_PROGRESS_PRINT                                                                1
88
89 // For delay function test. ( Disable after Porting is finished )
90 #define MELFAS_ENABLE_DELAY_TEST                                                                                0
91
92
93 //============================================================
94 //
95 //      Port setting. ( Melfas preset this value. Just use default )
96 //
97 //============================================================
98
99 // Set 1 if Enabled.
100 #define MCSDL_USE_CE_CONTROL                                            0
101 #define MCSDL_USE_INTR_CONTROL                                          1
102 #define MCSDL_USE_VDD_CONTROL                                           1
103 #define MCSDL_USE_RESETB_CONTROL                                        0
104
105
106 //============================================================
107 //
108 //      Porting section 3. IO Control poting.
109 //
110 //      Fill up 'I2C IO'
111 //      Fill up 'USE_CONTROL' only on upper setting.
112 //
113 //============================================================
114
115 //----------------
116 // VDD
117 //----------------
118 #if MCSDL_USE_VDD_CONTROL
119 #define TKEY_VDD_SET_HIGH()                                     gpio_direction_output(S5PV310_GPE3(3), 1);
120 #define TKEY_VDD_SET_LOW()                                      gpio_direction_output(S5PV310_GPE3(3), 0);
121 #else
122 #define TKEY_VDD_SET_HIGH()                                                                                                     // Nothing
123 #define TKEY_VDD_SET_LOW()                                                                                                      // Nothing
124 #endif
125
126 //----------------
127 // CE
128 //----------------
129 #if MCSDL_USE_CE_CONTROL
130 #define TKEY_CE_SET_HIGH()                                      ____HERE!_____                                  //
131 #define TKEY_CE_SET_LOW()                                       ____HERE!_____                                  //
132 #define TKEY_CE_SET_OUTPUT()                                    ____HERE!_____                                  //
133 #else
134 #define TKEY_CE_SET_HIGH()                                                                                                      // Nothing
135 #define TKEY_CE_SET_LOW()                                                                                                       // Nothing
136 #define TKEY_CE_SET_OUTPUT()                                                                                                    // Nothing
137 #endif
138
139 //----------------
140 // INTR
141 //----------------
142 #if MCSDL_USE_INTR_CONTROL
143 #define TKEY_INTR_SET_HIGH()                                    gpio_direction_output(S5PV310_GPE3(7), 1);//OT_INTR_SET_HIGH()
144 #define TKEY_INTR_SET_LOW()                                     gpio_direction_output(S5PV310_GPE3(7), 0);//OT_INTR_SET_LOW()
145 #define TKEY_INTR_SET_OUTPUT()                                  s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_OUTPUT);//OT_INTR_SET_OUTPUT()
146 #define TKEY_INTR_SET_INPUT()                                   s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_INPUT);//OT_INTR_SET_INPUT()
147 #else
148 #define TKEY_INTR_SET_HIGH()                                                                                                    // Nothing
149 #define TKEY_INTR_SET_LOW()                                                                                                     // Nothing
150 #define TKEY_TINR_SET_OUTPUT()                                                                                                  // Nothing
151 #define TKEY_INTR_SET_INPUT()                                                                                                   // Nothing
152 #endif
153
154 //----------------
155 // RESETB
156 //----------------
157 #if MCSDL_USE_RESETB_CONTROL
158 #define TKEY_RESETB_SET_HIGH()                                  ____HERE!_____                                  //UHI2C_IRQ_EN(TRUE)
159 #define TKEY_RESETB_SET_LOW()                                   ____HERE!_____                                  //
160 #define TKEY_RESETB_SET_OUTPUT()                                ____HERE!_____                                  //
161 #define TKEY_RESETB_SET_INPUT()                                 ____HERE!_____                                  //
162 #else
163 #define TKEY_RESETB_SET_HIGH()                                                                                                  // Nothing
164 #define TKEY_RESETB_SET_LOW()                                                                                                   // Nothing
165 #define TKEY_RESETB_SET_OUTPUT()                                                                                                // Nothing
166 #define TKEY_RESETB_SET_INPUT()                                                                                                 // Nothing
167 #endif
168
169
170 //------------------
171 // I2C SCL & SDA
172 //------------------
173
174 #define TKEY_I2C_SCL_SET_HIGH()                                         gpio_direction_output(S5PV310_GPE4(1), 1);//OT_SCL_HIGH()
175 #define TKEY_I2C_SCL_SET_LOW()                                          gpio_direction_output(S5PV310_GPE4(1), 0);//OT_SCL_LOW()
176
177 #define TKEY_I2C_SDA_SET_HIGH()                                         gpio_direction_output(S5PV310_GPE4(0), 1);//OT_SDA_HIGH()
178 #define TKEY_I2C_SDA_SET_LOW()                                          gpio_direction_output(S5PV310_GPE4(0), 1);//OT_SDA_LOW()
179
180 #define TKEY_I2C_SCL_SET_OUTPUT()                                       s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_OUTPUT);//OT_SCL_SET_OUTPUT()
181 #define TKEY_I2C_SCL_SET_INPUT()                                        s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_INPUT);//OT_SCL_SET_INPUT()
182
183 #define TKEY_I2C_SDA_SET_OUTPUT()                                       s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_OUTPUT);//OT_SDA_SET_OUTPUT()
184 #define TKEY_I2C_SDA_SET_INPUT()                                        s3c_gpio_cfgpin(S5PV310_GPE3(7), S3C_GPIO_INPUT);//OT_SDA_SET_INPUT()
185
186
187 #define TKEY_I2C_SET_HIGH()                             TKEY_I2C_SCL_SET_HIGH();                \
188                                                                 TKEY_I2C_SDA_SET_HIGH()
189
190 #define TKEY_I2C_SET_LOW()                                                      TKEY_I2C_SCL_SET_LOW();                 \
191                                                                                                         TKEY_I2C_SDA_SET_LOW()
192
193
194 #define TKEY_I2C_SET_OUTPUT()                           TKEY_I2C_SCL_SET_OUTPUT();              \
195                                                                 TKEY_I2C_SDA_SET_OUTPUT()
196
197 #define TKEY_I2C_INIT()                                 TKEY_I2C_SET_HIGH();                    \
198                                                                 TKEY_I2C_SET_OUTPUT()
199
200 #define TKEY_I2C_CLOSE()                                TKEY_I2C_SET_LOW();                             \
201                                                                 TKEY_I2C_SET_OUTPUT()
202
203
204 //============================================================
205 //
206 //      Porting section 4-2. Delay parameter setting
207 //
208 //============================================================
209 #define MCSDL_DELAY_15US                                                        15
210 #define MCSDL_DELAY_100US                                                       100
211 #define MCSDL_DELAY_150US                                                       150
212 #define MCSDL_DELAY_500US                                       500
213 #define MCSDL_DELAY_1MS                                                         1000
214 #define MCSDL_DELAY_25MS                                                        25000
215 #define MCSDL_DELAY_45MS                                                        45000
216
217
218 //============================================================
219 //
220 //      Porting section 5. Defence External Effect
221 //
222 //============================================================
223 #if 0
224
225 #define MELFAS_DISABLE_BASEBAND_ISR()                           ____HERE!_____                          //disable_isr()
226 #define MELFAS_DISABLE_WATCHDOG_TIMER_RESET()           ____HERE!_____                          //disable_wtd_reset()
227
228 #define MELFAS_ROLLBACK_BASEBAND_ISR()                          ____HERE!_____                          //
229 #define MELFAS_ROLLBACK_WATCHDOG_TIMER_RESET()          ____HERE!_____                          //
230
231 #else
232
233 #define MELFAS_DISABLE_BASEBAND_ISR()                                                                                   //Nothing
234 #define MELFAS_DISABLE_WATCHDOG_TIMER_RESET()                                                                   //Nothing
235
236 #define MELFAS_ROLLBACK_BASEBAND_ISR()                                                                                  //Nothing
237 #define MELFAS_ROLLBACK_WATCHDOG_TIMER_RESET()                                                                  //Nothing
238
239 #endif
240
241
242 //=====================================================================
243 //
244 //   MELFAS Firmware download
245 //
246 //=====================================================================
247
248 #define MELFAS_TRANSFER_LENGTH                                  64              // Program & Read flash block size
249
250
251 //-----------------------------------------------
252 //      MELFAS Version information address
253 //-----------------------------------------------
254 #define MCSDL_ADDR_MODULE_REVISION                              0x98
255 #define MCSDL_ADDR_FIRMWARE_VERSION                             0x9C
256
257 //----------------------------------------------------
258 //   Return values of download function
259 //----------------------------------------------------
260 #define MCSDL_RET_SUCCESS                                               0x00
261 #define MCSDL_RET_ENTER_DOWNLOAD_MODE_FAILED    0x01
262 #define MCSDL_RET_ERASE_FLASH_FAILED                    0x02
263 #define MCSDL_RET_PREPARE_ERASE_FLASH_FAILED    0x0B
264 #define MCSDL_RET_ERASE_VERIFY_FAILED                   0x03
265 #define MCSDL_RET_READ_FLASH_FAILED                             0x04
266 #define MCSDL_RET_READ_EEPROM_FAILED                    0x05
267 #define MCSDL_RET_READ_INFORMAION_FAILED                0x06
268 #define MCSDL_RET_PROGRAM_FLASH_FAILED                  0x07
269 #define MCSDL_RET_PROGRAM_EEPROM_FAILED                 0x08
270 #define MCSDL_RET_PREPARE_PROGRAM_FAILED                0x09
271 #define MCSDL_RET_PROGRAM_VERIFY_FAILED                 0x0A
272
273 #define MCSDL_RET_WRONG_MODE_ERROR                              0xF0
274 #define MCSDL_RET_WRONG_SLAVE_SELECTION_ERROR   0xF1
275 #define MCSDL_RET_WRONG_PARAMETER                               0xF2
276 #define MCSDL_RET_COMMUNICATION_FAILED                  0xF3
277 #define MCSDL_RET_READING_HEXFILE_FAILED                0xF4
278 #define MCSDL_RET_FILE_ACCESS_FAILED                    0xF5
279 #define MCSDL_RET_MELLOC_FAILED                                 0xF6
280 #define MCSDL_RET_WRONG_MODULE_REVISION                 0xF7
281
282 //------------------------------
283 // MDS ISP mode entering
284 //------------------------------
285 #define MCSDL_MDS_ENTERING_ISP_MODE_CODE2               0x00
286
287 #define MCSDL_MDS_ENTERING_ISP_MODE_ACK_1               0x55
288 #define MCSDL_MDS_ENTERING_ISP_MODE_ACK_2               0x80
289
290 //------------------------------
291 // ISP commands - MDS & I2C
292 //------------------------------
293 #define MCSDL_ISP_CMD_ERASE                                             0x02
294 #define MCSDL_ISP_CMD_ERASE_TIMING                              0x0F
295 #define MCSDL_ISP_CMD_PROGRAM_FLASH                             0x03
296 #define MCSDL_ISP_CMD_READ_FLASH                                0x04
297 #define MCSDL_ISP_CMD_PROGRAM_TIMING                    0x0F
298 #define MCSDL_ISP_CMD_READ_INFORMATION                  0x06
299 #define MCSDL_ISP_CMD_RESET                                             0x07
300
301 //------------------------------
302 // MCS5000's responses
303 //------------------------------
304 #define MCSDL_ISP_ACK_ERASE_DONE_2ND_MDS                0x81
305 #define MCSDL_ISP_ACK_ERASE_DONE                                0x82
306 #define MCSDL_ISP_ACK_PREPARE_ERASE_DONE                0x8F
307 #define MCSDL_I2C_ACK_PREPARE_PROGRAM                   0x8F
308 #define MCSDL_MDS_ACK_PROGRAM_FLASH                             0x83
309 #define MCSDL_MDS_ACK_READ_FLASH                                0x84
310 #define MCSDL_MDS_ACK_PROGRAM_INFORMATION               0x88
311 #define MCSDL_MDS_ACK_PROGRAM_LOCKED                    0xFE
312 #define MCSDL_MDS_ACK_READ_LOCKED                               0xFE
313 #define MCSDL_MDS_ACK_FAIL                                              0xFE
314
315
316 //------------------------------
317 //      I2C ISP
318 //------------------------------
319
320 #define MCSDL_I2C_SLAVE_ADDR_ORG                                0x7E                                                    // Original Address
321
322 #define MCSDL_I2C_SLAVE_ADDR_SHIFTED                    (MCSDL_I2C_SLAVE_ADDR_ORG<<1)   // Adress after sifting.
323
324 #define MCSDL_I2C_SLAVE_READY_STATUS                    0x55
325
326 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_0                0x00
327 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_1                0x00
328 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_2                0x78
329
330 #define MCSDL_ISP_ERASE_TIMING_VALUE_0                  0x01
331 #define MCSDL_ISP_ERASE_TIMING_VALUE_1                  0xD4
332 #define MCSDL_ISP_ERASE_TIMING_VALUE_2                  0xC0
333
334
335 //----------------------------------------------------
336 //      Functions
337 //----------------------------------------------------
338
339 int mcsdl_download_binary_data(void);                   // with binary type .c   file.
340 int mcsdl_download_binary_file(void);                   // with binary type .bin file.
341 int mcsdl_set_i2c_client(struct i2c_client *c);
342
343 #if MELFAS_ENABLE_DELAY_TEST                                    // For initial porting test.
344 void mcsdl_delay_test(INT32 nCount);
345 #endif
346
347
348 #endif          //#ifndef __MELFAS_FIRMWARE_DOWNLOAD_H__
349
350