2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/mlx5/cmd.h>
34 #include <linux/mlx5/vport.h>
35 #include <rdma/ib_mad.h>
36 #include <rdma/ib_smi.h>
37 #include <rdma/ib_pma.h>
41 MLX5_IB_VENDOR_CLASS1 = 0x9,
42 MLX5_IB_VENDOR_CLASS2 = 0xa
45 int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
46 u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
47 const void *in_mad, void *response_mad)
51 /* Key check traps can't be generated unless we have in_wc to
52 * tell us where to send the trap.
54 if (ignore_mkey || !in_wc)
56 if (ignore_bkey || !in_wc)
59 return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
62 static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
63 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
64 const struct ib_mad *in_mad, struct ib_mad *out_mad)
69 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
71 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
72 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
74 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
75 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
76 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
77 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
78 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
79 return IB_MAD_RESULT_SUCCESS;
81 /* Don't process SMInfo queries -- the SMA can't handle them.
83 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
84 return IB_MAD_RESULT_SUCCESS;
85 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
86 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
87 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
88 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
89 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
90 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
91 return IB_MAD_RESULT_SUCCESS;
93 return IB_MAD_RESULT_SUCCESS;
96 err = mlx5_MAD_IFC(to_mdev(ibdev),
97 mad_flags & IB_MAD_IGNORE_MKEY,
98 mad_flags & IB_MAD_IGNORE_BKEY,
99 port_num, in_wc, in_grh, in_mad, out_mad);
101 return IB_MAD_RESULT_FAILURE;
103 /* set return bit in status of directed route responses */
104 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
105 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
107 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
108 /* no response for trap repress */
109 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
111 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
114 static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
117 #define MLX5_SUM_CNT(p, cntr1, cntr2) \
118 (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
119 MLX5_GET64(query_vport_counter_out, p, cntr2))
121 pma_cnt_ext->port_xmit_data =
122 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
123 transmitted_ib_multicast.octets) >> 2);
124 pma_cnt_ext->port_rcv_data =
125 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
126 received_ib_multicast.octets) >> 2);
127 pma_cnt_ext->port_xmit_packets =
128 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
129 transmitted_ib_multicast.packets));
130 pma_cnt_ext->port_rcv_packets =
131 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
132 received_ib_multicast.packets));
133 pma_cnt_ext->port_unicast_xmit_packets =
134 MLX5_GET64_BE(query_vport_counter_out,
135 out, transmitted_ib_unicast.packets);
136 pma_cnt_ext->port_unicast_rcv_packets =
137 MLX5_GET64_BE(query_vport_counter_out,
138 out, received_ib_unicast.packets);
139 pma_cnt_ext->port_multicast_xmit_packets =
140 MLX5_GET64_BE(query_vport_counter_out,
141 out, transmitted_ib_multicast.packets);
142 pma_cnt_ext->port_multicast_rcv_packets =
143 MLX5_GET64_BE(query_vport_counter_out,
144 out, received_ib_multicast.packets);
147 static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
150 /* Traffic counters will be reported in
151 * their 64bit form via ib_pma_portcounters_ext by default.
153 void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
156 #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
157 counter_var = MLX5_GET_BE(typeof(counter_var), \
158 ib_port_cntrs_grp_data_layout, \
159 out_pma, counter_name); \
162 MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
163 symbol_error_counter);
164 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
165 link_error_recovery_counter);
166 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
167 link_downed_counter);
168 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
170 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
171 port_rcv_remote_physical_errors);
172 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
173 port_rcv_switch_relay_errors);
174 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
176 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
177 port_xmit_constraint_errors);
178 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
179 port_rcv_constraint_errors);
180 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
181 link_overrun_errors);
182 MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
186 static int process_pma_cmd(struct ib_device *ibdev, u8 port_num,
187 const struct ib_mad *in_mad, struct ib_mad *out_mad)
189 struct mlx5_ib_dev *dev = to_mdev(ibdev);
193 /* Decalring support of extended counters */
194 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
195 struct ib_class_port_info cpi = {};
197 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
198 memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
199 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
202 if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
203 struct ib_pma_portcounters_ext *pma_cnt_ext =
204 (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
205 int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
207 out_cnt = mlx5_vzalloc(sz);
209 return IB_MAD_RESULT_FAILURE;
211 err = mlx5_core_query_vport_counter(dev->mdev, 0, 0,
212 port_num, out_cnt, sz);
214 pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
216 struct ib_pma_portcounters *pma_cnt =
217 (struct ib_pma_portcounters *)(out_mad->data + 40);
218 int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
220 out_cnt = mlx5_vzalloc(sz);
222 return IB_MAD_RESULT_FAILURE;
224 err = mlx5_core_query_ib_ppcnt(dev->mdev, port_num,
227 pma_cnt_assign(pma_cnt, out_cnt);
232 return IB_MAD_RESULT_FAILURE;
234 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
237 int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
238 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
239 const struct ib_mad_hdr *in, size_t in_mad_size,
240 struct ib_mad_hdr *out, size_t *out_mad_size,
241 u16 *out_mad_pkey_index)
243 struct mlx5_ib_dev *dev = to_mdev(ibdev);
244 struct mlx5_core_dev *mdev = dev->mdev;
245 const struct ib_mad *in_mad = (const struct ib_mad *)in;
246 struct ib_mad *out_mad = (struct ib_mad *)out;
248 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
249 *out_mad_size != sizeof(*out_mad)))
250 return IB_MAD_RESULT_FAILURE;
252 memset(out_mad->data, 0, sizeof(out_mad->data));
254 if (MLX5_CAP_GEN(mdev, vport_counters) &&
255 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
256 in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
257 return process_pma_cmd(ibdev, port_num, in_mad, out_mad);
259 return process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
264 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
266 struct ib_smp *in_mad = NULL;
267 struct ib_smp *out_mad = NULL;
271 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
272 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
273 if (!in_mad || !out_mad)
276 init_query_mad(in_mad);
277 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
278 in_mad->attr_mod = cpu_to_be32(port);
280 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
282 packet_error = be16_to_cpu(out_mad->status);
284 dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
285 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
293 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
294 struct ib_smp *out_mad)
296 struct ib_smp *in_mad = NULL;
299 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
303 init_query_mad(in_mad);
304 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
306 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
313 int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
314 __be64 *sys_image_guid)
316 struct ib_smp *out_mad = NULL;
319 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
323 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
327 memcpy(sys_image_guid, out_mad->data + 4, 8);
335 int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
338 struct ib_smp *out_mad = NULL;
341 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
345 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
349 *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
357 int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
360 struct ib_smp *out_mad = NULL;
363 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
367 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
371 *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
379 int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
381 struct ib_smp *in_mad = NULL;
382 struct ib_smp *out_mad = NULL;
385 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
386 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
387 if (!in_mad || !out_mad)
390 init_query_mad(in_mad);
391 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
393 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
397 memcpy(node_desc, out_mad->data, 64);
404 int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
406 struct ib_smp *in_mad = NULL;
407 struct ib_smp *out_mad = NULL;
410 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
411 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
412 if (!in_mad || !out_mad)
415 init_query_mad(in_mad);
416 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
418 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
422 memcpy(node_guid, out_mad->data + 12, 8);
429 int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
432 struct ib_smp *in_mad = NULL;
433 struct ib_smp *out_mad = NULL;
436 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
437 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
438 if (!in_mad || !out_mad)
441 init_query_mad(in_mad);
442 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
443 in_mad->attr_mod = cpu_to_be32(index / 32);
445 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
450 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
458 int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
461 struct ib_smp *in_mad = NULL;
462 struct ib_smp *out_mad = NULL;
465 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
466 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
467 if (!in_mad || !out_mad)
470 init_query_mad(in_mad);
471 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
472 in_mad->attr_mod = cpu_to_be32(port);
474 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
479 memcpy(gid->raw, out_mad->data + 8, 8);
481 init_query_mad(in_mad);
482 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
483 in_mad->attr_mod = cpu_to_be32(index / 8);
485 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
490 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
498 int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
499 struct ib_port_attr *props)
501 struct mlx5_ib_dev *dev = to_mdev(ibdev);
502 struct mlx5_core_dev *mdev = dev->mdev;
503 struct ib_smp *in_mad = NULL;
504 struct ib_smp *out_mad = NULL;
505 int ext_active_speed;
508 if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) {
509 mlx5_ib_warn(dev, "invalid port number %d\n", port);
513 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
514 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
515 if (!in_mad || !out_mad)
518 memset(props, 0, sizeof(*props));
520 init_query_mad(in_mad);
521 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
522 in_mad->attr_mod = cpu_to_be32(port);
524 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
526 mlx5_ib_warn(dev, "err %d\n", err);
530 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
531 props->lmc = out_mad->data[34] & 0x7;
532 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
533 props->sm_sl = out_mad->data[36] & 0xf;
534 props->state = out_mad->data[32] & 0xf;
535 props->phys_state = out_mad->data[33] >> 4;
536 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
537 props->gid_tbl_len = out_mad->data[50];
538 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
539 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
540 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
541 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
542 props->active_width = out_mad->data[31] & 0xf;
543 props->active_speed = out_mad->data[35] >> 4;
544 props->max_mtu = out_mad->data[41] & 0xf;
545 props->active_mtu = out_mad->data[36] >> 4;
546 props->subnet_timeout = out_mad->data[51] & 0x1f;
547 props->max_vl_num = out_mad->data[37] >> 4;
548 props->init_type_reply = out_mad->data[41] >> 4;
550 /* Check if extended speeds (EDR/FDR/...) are supported */
551 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
552 ext_active_speed = out_mad->data[62] >> 4;
554 switch (ext_active_speed) {
556 props->active_speed = 16; /* FDR */
559 props->active_speed = 32; /* EDR */
564 /* If reported active speed is QDR, check if is FDR-10 */
565 if (props->active_speed == 4) {
566 if (mdev->port_caps[port - 1].ext_port_cap &
567 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
568 init_query_mad(in_mad);
569 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
570 in_mad->attr_mod = cpu_to_be32(port);
572 err = mlx5_MAD_IFC(dev, 1, 1, port,
573 NULL, NULL, in_mad, out_mad);
577 /* Checking LinkSpeedActive for FDR-10 */
578 if (out_mad->data[15] & 0x1)
579 props->active_speed = 8;