drivers/infiniband/hw/hfi1/verbs.c

   1 /*
   2  * Copyright(c) 2015 - 2018 Intel Corporation.
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * BSD LICENSE
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions
  22  * are met:
  23  *
  24  *  - Redistributions of source code must retain the above copyright
  25  *    notice, this list of conditions and the following disclaimer.
  26  *  - Redistributions in binary form must reproduce the above copyright
  27  *    notice, this list of conditions and the following disclaimer in
  28  *    the documentation and/or other materials provided with the
  29  *    distribution.
  30  *  - Neither the name of Intel Corporation nor the names of its
  31  *    contributors may be used to endorse or promote products derived
  32  *    from this software without specific prior written permission.
  33  *
  34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45  *
  46  */
  47
  48 #include <rdma/ib_mad.h>
  49 #include <rdma/ib_user_verbs.h>
  50 #include <linux/io.h>
  51 #include <linux/module.h>
  52 #include <linux/utsname.h>
  53 #include <linux/rculist.h>
  54 #include <linux/mm.h>
  55 #include <linux/vmalloc.h>
  56 #include <rdma/opa_addr.h>
  57
  58 #include "hfi.h"
  59 #include "common.h"
  60 #include "device.h"
  61 #include "trace.h"
  62 #include "qp.h"
  63 #include "verbs_txreq.h"
  64 #include "debugfs.h"
  65 #include "vnic.h"
  66 #include "fault.h"
  67 #include "affinity.h"
  68
  69 static unsigned int hfi1_lkey_table_size = 16;
  70 module_param_named(lkey_table_size, hfi1_lkey_table_size, uint,
  71                    S_IRUGO);
  72 MODULE_PARM_DESC(lkey_table_size,
  73                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
  74
  75 static unsigned int hfi1_max_pds = 0xFFFF;
  76 module_param_named(max_pds, hfi1_max_pds, uint, S_IRUGO);
  77 MODULE_PARM_DESC(max_pds,
  78                  "Maximum number of protection domains to support");
  79
  80 static unsigned int hfi1_max_ahs = 0xFFFF;
  81 module_param_named(max_ahs, hfi1_max_ahs, uint, S_IRUGO);
  82 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
  83
  84 unsigned int hfi1_max_cqes = 0x2FFFFF;
  85 module_param_named(max_cqes, hfi1_max_cqes, uint, S_IRUGO);
  86 MODULE_PARM_DESC(max_cqes,
  87                  "Maximum number of completion queue entries to support");
  88
  89 unsigned int hfi1_max_cqs = 0x1FFFF;
  90 module_param_named(max_cqs, hfi1_max_cqs, uint, S_IRUGO);
  91 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
  92
  93 unsigned int hfi1_max_qp_wrs = 0x3FFF;
  94 module_param_named(max_qp_wrs, hfi1_max_qp_wrs, uint, S_IRUGO);
  95 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
  96
  97 unsigned int hfi1_max_qps = 32768;
  98 module_param_named(max_qps, hfi1_max_qps, uint, S_IRUGO);
  99 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
 100
 101 unsigned int hfi1_max_sges = 0x60;
 102 module_param_named(max_sges, hfi1_max_sges, uint, S_IRUGO);
 103 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
 104
 105 unsigned int hfi1_max_mcast_grps = 16384;
 106 module_param_named(max_mcast_grps, hfi1_max_mcast_grps, uint, S_IRUGO);
 107 MODULE_PARM_DESC(max_mcast_grps,
 108                  "Maximum number of multicast groups to support");
 109
 110 unsigned int hfi1_max_mcast_qp_attached = 16;
 111 module_param_named(max_mcast_qp_attached, hfi1_max_mcast_qp_attached,
 112                    uint, S_IRUGO);
 113 MODULE_PARM_DESC(max_mcast_qp_attached,
 114                  "Maximum number of attached QPs to support");
 115
 116 unsigned int hfi1_max_srqs = 1024;
 117 module_param_named(max_srqs, hfi1_max_srqs, uint, S_IRUGO);
 118 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
 119
 120 unsigned int hfi1_max_srq_sges = 128;
 121 module_param_named(max_srq_sges, hfi1_max_srq_sges, uint, S_IRUGO);
 122 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
 123
 124 unsigned int hfi1_max_srq_wrs = 0x1FFFF;
 125 module_param_named(max_srq_wrs, hfi1_max_srq_wrs, uint, S_IRUGO);
 126 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
 127
 128 unsigned short piothreshold = 256;
 129 module_param(piothreshold, ushort, S_IRUGO);
 130 MODULE_PARM_DESC(piothreshold, "size used to determine sdma vs. pio");
 131
 132 static unsigned int sge_copy_mode;
 133 module_param(sge_copy_mode, uint, S_IRUGO);
 134 MODULE_PARM_DESC(sge_copy_mode,
 135                  "Verbs copy mode: 0 use memcpy, 1 use cacheless copy, 2 adapt based on WSS");
 136
 137 static void verbs_sdma_complete(
 138         struct sdma_txreq *cookie,
 139         int status);
 140
 141 static int pio_wait(struct rvt_qp *qp,
 142                     struct send_context *sc,
 143                     struct hfi1_pkt_state *ps,
 144                     u32 flag);
 145
 146 /* Length of buffer to create verbs txreq cache name */
 147 #define TXREQ_NAME_LEN 24
 148
 149 /* 16B trailing buffer */
 150 static const u8 trail_buf[MAX_16B_PADDING];
 151
 152 static uint wss_threshold = 80;
 153 module_param(wss_threshold, uint, S_IRUGO);
 154 MODULE_PARM_DESC(wss_threshold, "Percentage (1-100) of LLC to use as a threshold for a cacheless copy");
 155 static uint wss_clean_period = 256;
 156 module_param(wss_clean_period, uint, S_IRUGO);
 157 MODULE_PARM_DESC(wss_clean_period, "Count of verbs copies before an entry in the page copy table is cleaned");
 158
 159 /*
 160  * Translate ib_wr_opcode into ib_wc_opcode.
 161  */
 162 const enum ib_wc_opcode ib_hfi1_wc_opcode[] = {
 163         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
 164         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
 165         [IB_WR_SEND] = IB_WC_SEND,
 166         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
 167         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
 168         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
 169         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD,
 170         [IB_WR_SEND_WITH_INV] = IB_WC_SEND,
 171         [IB_WR_LOCAL_INV] = IB_WC_LOCAL_INV,
 172         [IB_WR_REG_MR] = IB_WC_REG_MR
 173 };
 174
 175 /*
 176  * Length of header by opcode, 0 --> not supported
 177  */
 178 const u8 hdr_len_by_opcode[256] = {
 179         /* RC */
 180         [IB_OPCODE_RC_SEND_FIRST]                     = 12 + 8,
 181         [IB_OPCODE_RC_SEND_MIDDLE]                    = 12 + 8,
 182         [IB_OPCODE_RC_SEND_LAST]                      = 12 + 8,
 183         [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
 184         [IB_OPCODE_RC_SEND_ONLY]                      = 12 + 8,
 185         [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
 186         [IB_OPCODE_RC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
 187         [IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = 12 + 8,
 188         [IB_OPCODE_RC_RDMA_WRITE_LAST]                = 12 + 8,
 189         [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
 190         [IB_OPCODE_RC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
 191         [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
 192         [IB_OPCODE_RC_RDMA_READ_REQUEST]              = 12 + 8 + 16,
 193         [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = 12 + 8 + 4,
 194         [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = 12 + 8,
 195         [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = 12 + 8 + 4,
 196         [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = 12 + 8 + 4,
 197         [IB_OPCODE_RC_ACKNOWLEDGE]                    = 12 + 8 + 4,
 198         [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = 12 + 8 + 4 + 8,
 199         [IB_OPCODE_RC_COMPARE_SWAP]                   = 12 + 8 + 28,
 200         [IB_OPCODE_RC_FETCH_ADD]                      = 12 + 8 + 28,
 201         [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = 12 + 8 + 4,
 202         [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = 12 + 8 + 4,
 203         /* UC */
 204         [IB_OPCODE_UC_SEND_FIRST]                     = 12 + 8,
 205         [IB_OPCODE_UC_SEND_MIDDLE]                    = 12 + 8,
 206         [IB_OPCODE_UC_SEND_LAST]                      = 12 + 8,
 207         [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
 208         [IB_OPCODE_UC_SEND_ONLY]                      = 12 + 8,
 209         [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
 210         [IB_OPCODE_UC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
 211         [IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = 12 + 8,
 212         [IB_OPCODE_UC_RDMA_WRITE_LAST]                = 12 + 8,
 213         [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
 214         [IB_OPCODE_UC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
 215         [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
 216         /* UD */
 217         [IB_OPCODE_UD_SEND_ONLY]                      = 12 + 8 + 8,
 218         [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 12
 219 };
 220
 221 static const opcode_handler opcode_handler_tbl[256] = {
 222         /* RC */
 223         [IB_OPCODE_RC_SEND_FIRST]                     = &hfi1_rc_rcv,
 224         [IB_OPCODE_RC_SEND_MIDDLE]                    = &hfi1_rc_rcv,
 225         [IB_OPCODE_RC_SEND_LAST]                      = &hfi1_rc_rcv,
 226         [IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
 227         [IB_OPCODE_RC_SEND_ONLY]                      = &hfi1_rc_rcv,
 228         [IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
 229         [IB_OPCODE_RC_RDMA_WRITE_FIRST]               = &hfi1_rc_rcv,
 230         [IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = &hfi1_rc_rcv,
 231         [IB_OPCODE_RC_RDMA_WRITE_LAST]                = &hfi1_rc_rcv,
 232         [IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_rc_rcv,
 233         [IB_OPCODE_RC_RDMA_WRITE_ONLY]                = &hfi1_rc_rcv,
 234         [IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_rc_rcv,
 235         [IB_OPCODE_RC_RDMA_READ_REQUEST]              = &hfi1_rc_rcv,
 236         [IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = &hfi1_rc_rcv,
 237         [IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = &hfi1_rc_rcv,
 238         [IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = &hfi1_rc_rcv,
 239         [IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = &hfi1_rc_rcv,
 240         [IB_OPCODE_RC_ACKNOWLEDGE]                    = &hfi1_rc_rcv,
 241         [IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = &hfi1_rc_rcv,
 242         [IB_OPCODE_RC_COMPARE_SWAP]                   = &hfi1_rc_rcv,
 243         [IB_OPCODE_RC_FETCH_ADD]                      = &hfi1_rc_rcv,
 244         [IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = &hfi1_rc_rcv,
 245         [IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = &hfi1_rc_rcv,
 246         /* UC */
 247         [IB_OPCODE_UC_SEND_FIRST]                     = &hfi1_uc_rcv,
 248         [IB_OPCODE_UC_SEND_MIDDLE]                    = &hfi1_uc_rcv,
 249         [IB_OPCODE_UC_SEND_LAST]                      = &hfi1_uc_rcv,
 250         [IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
 251         [IB_OPCODE_UC_SEND_ONLY]                      = &hfi1_uc_rcv,
 252         [IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
 253         [IB_OPCODE_UC_RDMA_WRITE_FIRST]               = &hfi1_uc_rcv,
 254         [IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = &hfi1_uc_rcv,
 255         [IB_OPCODE_UC_RDMA_WRITE_LAST]                = &hfi1_uc_rcv,
 256         [IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_uc_rcv,
 257         [IB_OPCODE_UC_RDMA_WRITE_ONLY]                = &hfi1_uc_rcv,
 258         [IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_uc_rcv,
 259         /* UD */
 260         [IB_OPCODE_UD_SEND_ONLY]                      = &hfi1_ud_rcv,
 261         [IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_ud_rcv,
 262         /* CNP */
 263         [IB_OPCODE_CNP]                               = &hfi1_cnp_rcv
 264 };
 265
 266 #define OPMASK 0x1f
 267
 268 static const u32 pio_opmask[BIT(3)] = {
 269         /* RC */
 270         [IB_OPCODE_RC >> 5] =
 271                 BIT(RC_OP(SEND_ONLY) & OPMASK) |
 272                 BIT(RC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
 273                 BIT(RC_OP(RDMA_WRITE_ONLY) & OPMASK) |
 274                 BIT(RC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK) |
 275                 BIT(RC_OP(RDMA_READ_REQUEST) & OPMASK) |
 276                 BIT(RC_OP(ACKNOWLEDGE) & OPMASK) |
 277                 BIT(RC_OP(ATOMIC_ACKNOWLEDGE) & OPMASK) |
 278                 BIT(RC_OP(COMPARE_SWAP) & OPMASK) |
 279                 BIT(RC_OP(FETCH_ADD) & OPMASK),
 280         /* UC */
 281         [IB_OPCODE_UC >> 5] =
 282                 BIT(UC_OP(SEND_ONLY) & OPMASK) |
 283                 BIT(UC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
 284                 BIT(UC_OP(RDMA_WRITE_ONLY) & OPMASK) |
 285                 BIT(UC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK),
 286 };
 287
 288 /*
 289  * System image GUID.
 290  */
 291 __be64 ib_hfi1_sys_image_guid;
 292
 293 /*
 294  * Make sure the QP is ready and able to accept the given opcode.
 295  */
 296 static inline opcode_handler qp_ok(struct hfi1_packet *packet)
 297 {
 298         if (!(ib_rvt_state_ops[packet->qp->state] & RVT_PROCESS_RECV_OK))
 299                 return NULL;
 300         if (((packet->opcode & RVT_OPCODE_QP_MASK) ==
 301              packet->qp->allowed_ops) ||
 302             (packet->opcode == IB_OPCODE_CNP))
 303                 return opcode_handler_tbl[packet->opcode];
 304
 305         return NULL;
 306 }
 307
 308 static u64 hfi1_fault_tx(struct rvt_qp *qp, u8 opcode, u64 pbc)
 309 {
 310 #ifdef CONFIG_FAULT_INJECTION
 311         if ((opcode & IB_OPCODE_MSP) == IB_OPCODE_MSP)
 312                 /*
 313                  * In order to drop non-IB traffic we
 314                  * set PbcInsertHrc to NONE (0x2).
 315                  * The packet will still be delivered
 316                  * to the receiving node but a
 317                  * KHdrHCRCErr (KDETH packet with a bad
 318                  * HCRC) will be triggered and the
 319                  * packet will not be delivered to the
 320                  * correct context.
 321                  */
 322                 pbc |= (u64)PBC_IHCRC_NONE << PBC_INSERT_HCRC_SHIFT;
 323         else
 324                 /*
 325                  * In order to drop regular verbs
 326                  * traffic we set the PbcTestEbp
 327                  * flag. The packet will still be
 328                  * delivered to the receiving node but
 329                  * a 'late ebp error' will be
 330                  * triggered and will be dropped.
 331                  */
 332                 pbc |= PBC_TEST_EBP;
 333 #endif
 334         return pbc;
 335 }
 336
 337 static int hfi1_do_pkey_check(struct hfi1_packet *packet)
 338 {
 339         struct hfi1_ctxtdata *rcd = packet->rcd;
 340         struct hfi1_pportdata *ppd = rcd->ppd;
 341         struct hfi1_16b_header *hdr = packet->hdr;
 342         u16 pkey;
 343
 344         /* Pkey check needed only for bypass packets */
 345         if (packet->etype != RHF_RCV_TYPE_BYPASS)
 346                 return 0;
 347
 348         /* Perform pkey check */
 349         pkey = hfi1_16B_get_pkey(hdr);
 350         return ingress_pkey_check(ppd, pkey, packet->sc,
 351                                   packet->qp->s_pkey_index,
 352                                   packet->slid, true);
 353 }
 354
 355 static inline void hfi1_handle_packet(struct hfi1_packet *packet,
 356                                       bool is_mcast)
 357 {
 358         u32 qp_num;
 359         struct hfi1_ctxtdata *rcd = packet->rcd;
 360         struct hfi1_pportdata *ppd = rcd->ppd;
 361         struct hfi1_ibport *ibp = rcd_to_iport(rcd);
 362         struct rvt_dev_info *rdi = &ppd->dd->verbs_dev.rdi;
 363         opcode_handler packet_handler;
 364         unsigned long flags;
 365
 366         inc_opstats(packet->tlen, &rcd->opstats->stats[packet->opcode]);
 367
 368         if (unlikely(is_mcast)) {
 369                 struct rvt_mcast *mcast;
 370                 struct rvt_mcast_qp *p;
 371
 372                 if (!packet->grh)
 373                         goto drop;
 374                 mcast = rvt_mcast_find(&ibp->rvp,
 375                                        &packet->grh->dgid,
 376                                        opa_get_lid(packet->dlid, 9B));
 377                 if (!mcast)
 378                         goto drop;
 379                 list_for_each_entry_rcu(p, &mcast->qp_list, list) {
 380                         packet->qp = p->qp;
 381                         if (hfi1_do_pkey_check(packet))
 382                                 goto drop;
 383                         spin_lock_irqsave(&packet->qp->r_lock, flags);
 384                         packet_handler = qp_ok(packet);
 385                         if (likely(packet_handler))
 386                                 packet_handler(packet);
 387                         else
 388                                 ibp->rvp.n_pkt_drops++;
 389                         spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 390                 }
 391                 /*
 392                  * Notify rvt_multicast_detach() if it is waiting for us
 393                  * to finish.
 394                  */
 395                 if (atomic_dec_return(&mcast->refcount) <= 1)
 396                         wake_up(&mcast->wait);
 397         } else {
 398                 /* Get the destination QP number. */
 399                 if (packet->etype == RHF_RCV_TYPE_BYPASS &&
 400                     hfi1_16B_get_l4(packet->hdr) == OPA_16B_L4_FM)
 401                         qp_num = hfi1_16B_get_dest_qpn(packet->mgmt);
 402                 else
 403                         qp_num = ib_bth_get_qpn(packet->ohdr);
 404
 405                 rcu_read_lock();
 406                 packet->qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
 407                 if (!packet->qp)
 408                         goto unlock_drop;
 409
 410                 if (hfi1_do_pkey_check(packet))
 411                         goto unlock_drop;
 412
 413                 spin_lock_irqsave(&packet->qp->r_lock, flags);
 414                 packet_handler = qp_ok(packet);
 415                 if (likely(packet_handler))
 416                         packet_handler(packet);
 417                 else
 418                         ibp->rvp.n_pkt_drops++;
 419                 spin_unlock_irqrestore(&packet->qp->r_lock, flags);
 420                 rcu_read_unlock();
 421         }
 422         return;
 423 unlock_drop:
 424         rcu_read_unlock();
 425 drop:
 426         ibp->rvp.n_pkt_drops++;
 427 }
 428
 429 /**
 430  * hfi1_ib_rcv - process an incoming packet
 431  * @packet: data packet information
 432  *
 433  * This is called to process an incoming packet at interrupt level.
 434  */
 435 void hfi1_ib_rcv(struct hfi1_packet *packet)
 436 {
 437         struct hfi1_ctxtdata *rcd = packet->rcd;
 438
 439         trace_input_ibhdr(rcd->dd, packet, !!(rhf_dc_info(packet->rhf)));
 440         hfi1_handle_packet(packet, hfi1_check_mcast(packet->dlid));
 441 }
 442
 443 void hfi1_16B_rcv(struct hfi1_packet *packet)
 444 {
 445         struct hfi1_ctxtdata *rcd = packet->rcd;
 446
 447         trace_input_ibhdr(rcd->dd, packet, false);
 448         hfi1_handle_packet(packet, hfi1_check_mcast(packet->dlid));
 449 }
 450
 451 /*
 452  * This is called from a timer to check for QPs
 453  * which need kernel memory in order to send a packet.
 454  */
 455 static void mem_timer(struct timer_list *t)
 456 {
 457         struct hfi1_ibdev *dev = from_timer(dev, t, mem_timer);
 458         struct list_head *list = &dev->memwait;
 459         struct rvt_qp *qp = NULL;
 460         struct iowait *wait;
 461         unsigned long flags;
 462         struct hfi1_qp_priv *priv;
 463
 464         write_seqlock_irqsave(&dev->iowait_lock, flags);
 465         if (!list_empty(list)) {
 466                 wait = list_first_entry(list, struct iowait, list);
 467                 qp = iowait_to_qp(wait);
 468                 priv = qp->priv;
 469                 list_del_init(&priv->s_iowait.list);
 470                 priv->s_iowait.lock = NULL;
 471                 /* refcount held until actual wake up */
 472                 if (!list_empty(list))
 473                         mod_timer(&dev->mem_timer, jiffies + 1);
 474         }
 475         write_sequnlock_irqrestore(&dev->iowait_lock, flags);
 476
 477         if (qp)
 478                 hfi1_qp_wakeup(qp, RVT_S_WAIT_KMEM);
 479 }
 480
 481 /*
 482  * This is called with progress side lock held.
 483  */
 484 /* New API */
 485 static void verbs_sdma_complete(
 486         struct sdma_txreq *cookie,
 487         int status)
 488 {
 489         struct verbs_txreq *tx =
 490                 container_of(cookie, struct verbs_txreq, txreq);
 491         struct rvt_qp *qp = tx->qp;
 492
 493         spin_lock(&qp->s_lock);
 494         if (tx->wqe) {
 495                 rvt_send_complete(qp, tx->wqe, IB_WC_SUCCESS);
 496         } else if (qp->ibqp.qp_type == IB_QPT_RC) {
 497                 struct hfi1_opa_header *hdr;
 498
 499                 hdr = &tx->phdr.hdr;
 500                 hfi1_rc_send_complete(qp, hdr);
 501         }
 502         spin_unlock(&qp->s_lock);
 503
 504         hfi1_put_txreq(tx);
 505 }
 506
 507 static int wait_kmem(struct hfi1_ibdev *dev,
 508                      struct rvt_qp *qp,
 509                      struct hfi1_pkt_state *ps)
 510 {
 511         struct hfi1_qp_priv *priv = qp->priv;
 512         unsigned long flags;
 513         int ret = 0;
 514
 515         spin_lock_irqsave(&qp->s_lock, flags);
 516         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 517                 write_seqlock(&dev->iowait_lock);
 518                 list_add_tail(&ps->s_txreq->txreq.list,
 519                               &ps->wait->tx_head);
 520                 if (list_empty(&priv->s_iowait.list)) {
 521                         if (list_empty(&dev->memwait))
 522                                 mod_timer(&dev->mem_timer, jiffies + 1);
 523                         qp->s_flags |= RVT_S_WAIT_KMEM;
 524                         list_add_tail(&priv->s_iowait.list, &dev->memwait);
 525                         priv->s_iowait.lock = &dev->iowait_lock;
 526                         trace_hfi1_qpsleep(qp, RVT_S_WAIT_KMEM);
 527                         rvt_get_qp(qp);
 528                 }
 529                 write_sequnlock(&dev->iowait_lock);
 530                 hfi1_qp_unbusy(qp, ps->wait);
 531                 ret = -EBUSY;
 532         }
 533         spin_unlock_irqrestore(&qp->s_lock, flags);
 534
 535         return ret;
 536 }
 537
 538 /*
 539  * This routine calls txadds for each sg entry.
 540  *
 541  * Add failures will revert the sge cursor
 542  */
 543 static noinline int build_verbs_ulp_payload(
 544         struct sdma_engine *sde,
 545         u32 length,
 546         struct verbs_txreq *tx)
 547 {
 548         struct rvt_sge_state *ss = tx->ss;
 549         struct rvt_sge *sg_list = ss->sg_list;
 550         struct rvt_sge sge = ss->sge;
 551         u8 num_sge = ss->num_sge;
 552         u32 len;
 553         int ret = 0;
 554
 555         while (length) {
 556                 len = ss->sge.length;
 557                 if (len > length)
 558                         len = length;
 559                 if (len > ss->sge.sge_length)
 560                         len = ss->sge.sge_length;
 561                 WARN_ON_ONCE(len == 0);
 562                 ret = sdma_txadd_kvaddr(
 563                         sde->dd,
 564                         &tx->txreq,
 565                         ss->sge.vaddr,
 566                         len);
 567                 if (ret)
 568                         goto bail_txadd;
 569                 rvt_update_sge(ss, len, false);
 570                 length -= len;
 571         }
 572         return ret;
 573 bail_txadd:
 574         /* unwind cursor */
 575         ss->sge = sge;
 576         ss->num_sge = num_sge;
 577         ss->sg_list = sg_list;
 578         return ret;
 579 }
 580
 581 /**
 582  * update_tx_opstats - record stats by opcode
 583  * @qp; the qp
 584  * @ps: transmit packet state
 585  * @plen: the plen in dwords
 586  *
 587  * This is a routine to record the tx opstats after a
 588  * packet has been presented to the egress mechanism.
 589  */
 590 static void update_tx_opstats(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 591                               u32 plen)
 592 {
 593 #ifdef CONFIG_DEBUG_FS
 594         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
 595         struct hfi1_opcode_stats_perctx *s = get_cpu_ptr(dd->tx_opstats);
 596
 597         inc_opstats(plen * 4, &s->stats[ps->opcode]);
 598         put_cpu_ptr(s);
 599 #endif
 600 }
 601
 602 /*
 603  * Build the number of DMA descriptors needed to send length bytes of data.
 604  *
 605  * NOTE: DMA mapping is held in the tx until completed in the ring or
 606  *       the tx desc is freed without having been submitted to the ring
 607  *
 608  * This routine ensures all the helper routine calls succeed.
 609  */
 610 /* New API */
 611 static int build_verbs_tx_desc(
 612         struct sdma_engine *sde,
 613         u32 length,
 614         struct verbs_txreq *tx,
 615         struct hfi1_ahg_info *ahg_info,
 616         u64 pbc)
 617 {
 618         int ret = 0;
 619         struct hfi1_sdma_header *phdr = &tx->phdr;
 620         u16 hdrbytes = (tx->hdr_dwords + sizeof(pbc) / 4) << 2;
 621         u8 extra_bytes = 0;
 622
 623         if (tx->phdr.hdr.hdr_type) {
 624                 /*
 625                  * hdrbytes accounts for PBC. Need to subtract 8 bytes
 626                  * before calculating padding.
 627                  */
 628                 extra_bytes = hfi1_get_16b_padding(hdrbytes - 8, length) +
 629                               (SIZE_OF_CRC << 2) + SIZE_OF_LT;
 630         }
 631         if (!ahg_info->ahgcount) {
 632                 ret = sdma_txinit_ahg(
 633                         &tx->txreq,
 634                         ahg_info->tx_flags,
 635                         hdrbytes + length +
 636                         extra_bytes,
 637                         ahg_info->ahgidx,
 638                         0,
 639                         NULL,
 640                         0,
 641                         verbs_sdma_complete);
 642                 if (ret)
 643                         goto bail_txadd;
 644                 phdr->pbc = cpu_to_le64(pbc);
 645                 ret = sdma_txadd_kvaddr(
 646                         sde->dd,
 647                         &tx->txreq,
 648                         phdr,
 649                         hdrbytes);
 650                 if (ret)
 651                         goto bail_txadd;
 652         } else {
 653                 ret = sdma_txinit_ahg(
 654                         &tx->txreq,
 655                         ahg_info->tx_flags,
 656                         length,
 657                         ahg_info->ahgidx,
 658                         ahg_info->ahgcount,
 659                         ahg_info->ahgdesc,
 660                         hdrbytes,
 661                         verbs_sdma_complete);
 662                 if (ret)
 663                         goto bail_txadd;
 664         }
 665         /* add the ulp payload - if any. tx->ss can be NULL for acks */
 666         if (tx->ss) {
 667                 ret = build_verbs_ulp_payload(sde, length, tx);
 668                 if (ret)
 669                         goto bail_txadd;
 670         }
 671
 672         /* add icrc, lt byte, and padding to flit */
 673         if (extra_bytes)
 674                 ret = sdma_txadd_kvaddr(sde->dd, &tx->txreq,
 675                                         (void *)trail_buf, extra_bytes);
 676
 677 bail_txadd:
 678         return ret;
 679 }
 680
 681 int hfi1_verbs_send_dma(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 682                         u64 pbc)
 683 {
 684         struct hfi1_qp_priv *priv = qp->priv;
 685         struct hfi1_ahg_info *ahg_info = priv->s_ahg;
 686         u32 hdrwords = ps->s_txreq->hdr_dwords;
 687         u32 len = ps->s_txreq->s_cur_size;
 688         u32 plen;
 689         struct hfi1_ibdev *dev = ps->dev;
 690         struct hfi1_pportdata *ppd = ps->ppd;
 691         struct verbs_txreq *tx;
 692         u8 sc5 = priv->s_sc;
 693         int ret;
 694         u32 dwords;
 695
 696         if (ps->s_txreq->phdr.hdr.hdr_type) {
 697                 u8 extra_bytes = hfi1_get_16b_padding((hdrwords << 2), len);
 698
 699                 dwords = (len + extra_bytes + (SIZE_OF_CRC << 2) +
 700                           SIZE_OF_LT) >> 2;
 701         } else {
 702                 dwords = (len + 3) >> 2;
 703         }
 704         plen = hdrwords + dwords + sizeof(pbc) / 4;
 705
 706         tx = ps->s_txreq;
 707         if (!sdma_txreq_built(&tx->txreq)) {
 708                 if (likely(pbc == 0)) {
 709                         u32 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
 710
 711                         /* No vl15 here */
 712                         /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
 713                         if (ps->s_txreq->phdr.hdr.hdr_type)
 714                                 pbc |= PBC_PACKET_BYPASS |
 715                                        PBC_INSERT_BYPASS_ICRC;
 716                         else
 717                                 pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
 718
 719                         if (unlikely(hfi1_dbg_should_fault_tx(qp, ps->opcode)))
 720                                 pbc = hfi1_fault_tx(qp, ps->opcode, pbc);
 721                         pbc = create_pbc(ppd,
 722                                          pbc,
 723                                          qp->srate_mbps,
 724                                          vl,
 725                                          plen);
 726                 }
 727                 tx->wqe = qp->s_wqe;
 728                 ret = build_verbs_tx_desc(tx->sde, len, tx, ahg_info, pbc);
 729                 if (unlikely(ret))
 730                         goto bail_build;
 731         }
 732         ret =  sdma_send_txreq(tx->sde, ps->wait, &tx->txreq, ps->pkts_sent);
 733         if (unlikely(ret < 0)) {
 734                 if (ret == -ECOMM)
 735                         goto bail_ecomm;
 736                 return ret;
 737         }
 738
 739         update_tx_opstats(qp, ps, plen);
 740         trace_sdma_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
 741                                 &ps->s_txreq->phdr.hdr, ib_is_sc5(sc5));
 742         return ret;
 743
 744 bail_ecomm:
 745         /* The current one got "sent" */
 746         return 0;
 747 bail_build:
 748         ret = wait_kmem(dev, qp, ps);
 749         if (!ret) {
 750                 /* free txreq - bad state */
 751                 hfi1_put_txreq(ps->s_txreq);
 752                 ps->s_txreq = NULL;
 753         }
 754         return ret;
 755 }
 756
 757 /*
 758  * If we are now in the error state, return zero to flush the
 759  * send work request.
 760  */
 761 static int pio_wait(struct rvt_qp *qp,
 762                     struct send_context *sc,
 763                     struct hfi1_pkt_state *ps,
 764                     u32 flag)
 765 {
 766         struct hfi1_qp_priv *priv = qp->priv;
 767         struct hfi1_devdata *dd = sc->dd;
 768         struct hfi1_ibdev *dev = &dd->verbs_dev;
 769         unsigned long flags;
 770         int ret = 0;
 771
 772         /*
 773          * Note that as soon as want_buffer() is called and
 774          * possibly before it returns, sc_piobufavail()
 775          * could be called. Therefore, put QP on the I/O wait list before
 776          * enabling the PIO avail interrupt.
 777          */
 778         spin_lock_irqsave(&qp->s_lock, flags);
 779         if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
 780                 write_seqlock(&dev->iowait_lock);
 781                 list_add_tail(&ps->s_txreq->txreq.list,
 782                               &ps->wait->tx_head);
 783                 if (list_empty(&priv->s_iowait.list)) {
 784                         struct hfi1_ibdev *dev = &dd->verbs_dev;
 785                         int was_empty;
 786
 787                         dev->n_piowait += !!(flag & RVT_S_WAIT_PIO);
 788                         dev->n_piodrain += !!(flag & HFI1_S_WAIT_PIO_DRAIN);
 789                         qp->s_flags |= flag;
 790                         was_empty = list_empty(&sc->piowait);
 791                         iowait_queue(ps->pkts_sent, &priv->s_iowait,
 792                                      &sc->piowait);
 793                         priv->s_iowait.lock = &dev->iowait_lock;
 794                         trace_hfi1_qpsleep(qp, RVT_S_WAIT_PIO);
 795                         rvt_get_qp(qp);
 796                         /* counting: only call wantpiobuf_intr if first user */
 797                         if (was_empty)
 798                                 hfi1_sc_wantpiobuf_intr(sc, 1);
 799                 }
 800                 write_sequnlock(&dev->iowait_lock);
 801                 hfi1_qp_unbusy(qp, ps->wait);
 802                 ret = -EBUSY;
 803         }
 804         spin_unlock_irqrestore(&qp->s_lock, flags);
 805         return ret;
 806 }
 807
 808 static void verbs_pio_complete(void *arg, int code)
 809 {
 810         struct rvt_qp *qp = (struct rvt_qp *)arg;
 811         struct hfi1_qp_priv *priv = qp->priv;
 812
 813         if (iowait_pio_dec(&priv->s_iowait))
 814                 iowait_drain_wakeup(&priv->s_iowait);
 815 }
 816
 817 int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
 818                         u64 pbc)
 819 {
 820         struct hfi1_qp_priv *priv = qp->priv;
 821         u32 hdrwords = ps->s_txreq->hdr_dwords;
 822         struct rvt_sge_state *ss = ps->s_txreq->ss;
 823         u32 len = ps->s_txreq->s_cur_size;
 824         u32 dwords;
 825         u32 plen;
 826         struct hfi1_pportdata *ppd = ps->ppd;
 827         u32 *hdr;
 828         u8 sc5;
 829         unsigned long flags = 0;
 830         struct send_context *sc;
 831         struct pio_buf *pbuf;
 832         int wc_status = IB_WC_SUCCESS;
 833         int ret = 0;
 834         pio_release_cb cb = NULL;
 835         u8 extra_bytes = 0;
 836
 837         if (ps->s_txreq->phdr.hdr.hdr_type) {
 838                 u8 pad_size = hfi1_get_16b_padding((hdrwords << 2), len);
 839
 840                 extra_bytes = pad_size + (SIZE_OF_CRC << 2) + SIZE_OF_LT;
 841                 dwords = (len + extra_bytes) >> 2;
 842                 hdr = (u32 *)&ps->s_txreq->phdr.hdr.opah;
 843         } else {
 844                 dwords = (len + 3) >> 2;
 845                 hdr = (u32 *)&ps->s_txreq->phdr.hdr.ibh;
 846         }
 847         plen = hdrwords + dwords + sizeof(pbc) / 4;
 848
 849         /* only RC/UC use complete */
 850         switch (qp->ibqp.qp_type) {
 851         case IB_QPT_RC:
 852         case IB_QPT_UC:
 853                 cb = verbs_pio_complete;
 854                 break;
 855         default:
 856                 break;
 857         }
 858
 859         /* vl15 special case taken care of in ud.c */
 860         sc5 = priv->s_sc;
 861         sc = ps->s_txreq->psc;
 862
 863         if (likely(pbc == 0)) {
 864                 u8 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
 865
 866                 /* set PBC_DC_INFO bit (aka SC[4]) in pbc */
 867                 if (ps->s_txreq->phdr.hdr.hdr_type)
 868                         pbc |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
 869                 else
 870                         pbc |= (ib_is_sc5(sc5) << PBC_DC_INFO_SHIFT);
 871
 872                 if (unlikely(hfi1_dbg_should_fault_tx(qp, ps->opcode)))
 873                         pbc = hfi1_fault_tx(qp, ps->opcode, pbc);
 874                 pbc = create_pbc(ppd, pbc, qp->srate_mbps, vl, plen);
 875         }
 876         if (cb)
 877                 iowait_pio_inc(&priv->s_iowait);
 878         pbuf = sc_buffer_alloc(sc, plen, cb, qp);
 879         if (unlikely(!pbuf)) {
 880                 if (cb)
 881                         verbs_pio_complete(qp, 0);
 882                 if (ppd->host_link_state != HLS_UP_ACTIVE) {
 883                         /*
 884                          * If we have filled the PIO buffers to capacity and are
 885                          * not in an active state this request is not going to
 886                          * go out to so just complete it with an error or else a
 887                          * ULP or the core may be stuck waiting.
 888                          */
 889                         hfi1_cdbg(
 890                                 PIO,
 891                                 "alloc failed. state not active, completing");
 892                         wc_status = IB_WC_GENERAL_ERR;
 893                         goto pio_bail;
 894                 } else {
 895                         /*
 896                          * This is a normal occurrence. The PIO buffs are full
 897                          * up but we are still happily sending, well we could be
 898                          * so lets continue to queue the request.
 899                          */
 900                         hfi1_cdbg(PIO, "alloc failed. state active, queuing");
 901                         ret = pio_wait(qp, sc, ps, RVT_S_WAIT_PIO);
 902                         if (!ret)
 903                                 /* txreq not queued - free */
 904                                 goto bail;
 905                         /* tx consumed in wait */
 906                         return ret;
 907                 }
 908         }
 909
 910         if (dwords == 0) {
 911                 pio_copy(ppd->dd, pbuf, pbc, hdr, hdrwords);
 912         } else {
 913                 seg_pio_copy_start(pbuf, pbc,
 914                                    hdr, hdrwords * 4);
 915                 if (ss) {
 916                         while (len) {
 917                                 void *addr = ss->sge.vaddr;
 918                                 u32 slen = ss->sge.length;
 919
 920                                 if (slen > len)
 921                                         slen = len;
 922                                 if (slen > ss->sge.sge_length)
 923                                         slen = ss->sge.sge_length;
 924                                 rvt_update_sge(ss, slen, false);
 925                                 seg_pio_copy_mid(pbuf, addr, slen);
 926                                 len -= slen;
 927                         }
 928                 }
 929                 /* add icrc, lt byte, and padding to flit */
 930                 if (extra_bytes)
 931                         seg_pio_copy_mid(pbuf, trail_buf, extra_bytes);
 932
 933                 seg_pio_copy_end(pbuf);
 934         }
 935
 936         update_tx_opstats(qp, ps, plen);
 937         trace_pio_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
 938                                &ps->s_txreq->phdr.hdr, ib_is_sc5(sc5));
 939
 940 pio_bail:
 941         if (qp->s_wqe) {
 942                 spin_lock_irqsave(&qp->s_lock, flags);
 943                 rvt_send_complete(qp, qp->s_wqe, wc_status);
 944                 spin_unlock_irqrestore(&qp->s_lock, flags);
 945         } else if (qp->ibqp.qp_type == IB_QPT_RC) {
 946                 spin_lock_irqsave(&qp->s_lock, flags);
 947                 hfi1_rc_send_complete(qp, &ps->s_txreq->phdr.hdr);
 948                 spin_unlock_irqrestore(&qp->s_lock, flags);
 949         }
 950
 951         ret = 0;
 952
 953 bail:
 954         hfi1_put_txreq(ps->s_txreq);
 955         return ret;
 956 }
 957
 958 /*
 959  * egress_pkey_matches_entry - return 1 if the pkey matches ent (ent
 960  * being an entry from the partition key table), return 0
 961  * otherwise. Use the matching criteria for egress partition keys
 962  * specified in the OPAv1 spec., section 9.1l.7.
 963  */
 964 static inline int egress_pkey_matches_entry(u16 pkey, u16 ent)
 965 {
 966         u16 mkey = pkey & PKEY_LOW_15_MASK;
 967         u16 mentry = ent & PKEY_LOW_15_MASK;
 968
 969         if (mkey == mentry) {
 970                 /*
 971                  * If pkey[15] is set (full partition member),
 972                  * is bit 15 in the corresponding table element
 973                  * clear (limited member)?
 974                  */
 975                 if (pkey & PKEY_MEMBER_MASK)
 976                         return !!(ent & PKEY_MEMBER_MASK);
 977                 return 1;
 978         }
 979         return 0;
 980 }
 981
 982 /**
 983  * egress_pkey_check - check P_KEY of a packet
 984  * @ppd:  Physical IB port data
 985  * @slid: SLID for packet
 986  * @bkey: PKEY for header
 987  * @sc5:  SC for packet
 988  * @s_pkey_index: It will be used for look up optimization for kernel contexts
 989  * only. If it is negative value, then it means user contexts is calling this
 990  * function.
 991  *
 992  * It checks if hdr's pkey is valid.
 993  *
 994  * Return: 0 on success, otherwise, 1
 995  */
 996 int egress_pkey_check(struct hfi1_pportdata *ppd, u32 slid, u16 pkey,
 997                       u8 sc5, int8_t s_pkey_index)
 998 {
 999         struct hfi1_devdata *dd;
1000         int i;
1001         int is_user_ctxt_mechanism = (s_pkey_index < 0);
1002
1003         if (!(ppd->part_enforce & HFI1_PART_ENFORCE_OUT))
1004                 return 0;
1005
1006         /* If SC15, pkey[0:14] must be 0x7fff */
1007         if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK))
1008                 goto bad;
1009
1010         /* Is the pkey = 0x0, or 0x8000? */
1011         if ((pkey & PKEY_LOW_15_MASK) == 0)
1012                 goto bad;
1013
1014         /*
1015          * For the kernel contexts only, if a qp is passed into the function,
1016          * the most likely matching pkey has index qp->s_pkey_index
1017          */
1018         if (!is_user_ctxt_mechanism &&
1019             egress_pkey_matches_entry(pkey, ppd->pkeys[s_pkey_index])) {
1020                 return 0;
1021         }
1022
1023         for (i = 0; i < MAX_PKEY_VALUES; i++) {
1024                 if (egress_pkey_matches_entry(pkey, ppd->pkeys[i]))
1025                         return 0;
1026         }
1027 bad:
1028         /*
1029          * For the user-context mechanism, the P_KEY check would only happen
1030          * once per SDMA request, not once per packet.  Therefore, there's no
1031          * need to increment the counter for the user-context mechanism.
1032          */
1033         if (!is_user_ctxt_mechanism) {
1034                 incr_cntr64(&ppd->port_xmit_constraint_errors);
1035                 dd = ppd->dd;
1036                 if (!(dd->err_info_xmit_constraint.status &
1037                       OPA_EI_STATUS_SMASK)) {
1038                         dd->err_info_xmit_constraint.status |=
1039                                 OPA_EI_STATUS_SMASK;
1040                         dd->err_info_xmit_constraint.slid = slid;
1041                         dd->err_info_xmit_constraint.pkey = pkey;
1042                 }
1043         }
1044         return 1;
1045 }
1046
1047 /**
1048  * get_send_routine - choose an egress routine
1049  *
1050  * Choose an egress routine based on QP type
1051  * and size
1052  */
1053 static inline send_routine get_send_routine(struct rvt_qp *qp,
1054                                             struct hfi1_pkt_state *ps)
1055 {
1056         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1057         struct hfi1_qp_priv *priv = qp->priv;
1058         struct verbs_txreq *tx = ps->s_txreq;
1059
1060         if (unlikely(!(dd->flags & HFI1_HAS_SEND_DMA)))
1061                 return dd->process_pio_send;
1062         switch (qp->ibqp.qp_type) {
1063         case IB_QPT_SMI:
1064                 return dd->process_pio_send;
1065         case IB_QPT_GSI:
1066         case IB_QPT_UD:
1067                 break;
1068         case IB_QPT_UC:
1069         case IB_QPT_RC: {
1070                 if (piothreshold &&
1071                     tx->s_cur_size <= min(piothreshold, qp->pmtu) &&
1072                     (BIT(ps->opcode & OPMASK) & pio_opmask[ps->opcode >> 5]) &&
1073                     iowait_sdma_pending(&priv->s_iowait) == 0 &&
1074                     !sdma_txreq_built(&tx->txreq))
1075                         return dd->process_pio_send;
1076                 break;
1077         }
1078         default:
1079                 break;
1080         }
1081         return dd->process_dma_send;
1082 }
1083
1084 /**
1085  * hfi1_verbs_send - send a packet
1086  * @qp: the QP to send on
1087  * @ps: the state of the packet to send
1088  *
1089  * Return zero if packet is sent or queued OK.
1090  * Return non-zero and clear qp->s_flags RVT_S_BUSY otherwise.
1091  */
1092 int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
1093 {
1094         struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1095         struct hfi1_qp_priv *priv = qp->priv;
1096         struct ib_other_headers *ohdr = NULL;
1097         send_routine sr;
1098         int ret;
1099         u16 pkey;
1100         u32 slid;
1101         u8 l4 = 0;
1102
1103         /* locate the pkey within the headers */
1104         if (ps->s_txreq->phdr.hdr.hdr_type) {
1105                 struct hfi1_16b_header *hdr = &ps->s_txreq->phdr.hdr.opah;
1106
1107                 l4 = hfi1_16B_get_l4(hdr);
1108                 if (l4 == OPA_16B_L4_IB_LOCAL)
1109                         ohdr = &hdr->u.oth;
1110                 else if (l4 == OPA_16B_L4_IB_GLOBAL)
1111                         ohdr = &hdr->u.l.oth;
1112
1113                 slid = hfi1_16B_get_slid(hdr);
1114                 pkey = hfi1_16B_get_pkey(hdr);
1115         } else {
1116                 struct ib_header *hdr = &ps->s_txreq->phdr.hdr.ibh;
1117                 u8 lnh = ib_get_lnh(hdr);
1118
1119                 if (lnh == HFI1_LRH_GRH)
1120                         ohdr = &hdr->u.l.oth;
1121                 else
1122                         ohdr = &hdr->u.oth;
1123                 slid = ib_get_slid(hdr);
1124                 pkey = ib_bth_get_pkey(ohdr);
1125         }
1126
1127         if (likely(l4 != OPA_16B_L4_FM))
1128                 ps->opcode = ib_bth_get_opcode(ohdr);
1129         else
1130                 ps->opcode = IB_OPCODE_UD_SEND_ONLY;
1131
1132         sr = get_send_routine(qp, ps);
1133         ret = egress_pkey_check(dd->pport, slid, pkey,
1134                                 priv->s_sc, qp->s_pkey_index);
1135         if (unlikely(ret)) {
1136                 /*
1137                  * The value we are returning here does not get propagated to
1138                  * the verbs caller. Thus we need to complete the request with
1139                  * error otherwise the caller could be sitting waiting on the
1140                  * completion event. Only do this for PIO. SDMA has its own
1141                  * mechanism for handling the errors. So for SDMA we can just
1142                  * return.
1143                  */
1144                 if (sr == dd->process_pio_send) {
1145                         unsigned long flags;
1146
1147                         hfi1_cdbg(PIO, "%s() Failed. Completing with err",
1148                                   __func__);
1149                         spin_lock_irqsave(&qp->s_lock, flags);
1150                         rvt_send_complete(qp, qp->s_wqe, IB_WC_GENERAL_ERR);
1151                         spin_unlock_irqrestore(&qp->s_lock, flags);
1152                 }
1153                 return -EINVAL;
1154         }
1155         if (sr == dd->process_dma_send && iowait_pio_pending(&priv->s_iowait))
1156                 return pio_wait(qp,
1157                                 ps->s_txreq->psc,
1158                                 ps,
1159                                 HFI1_S_WAIT_PIO_DRAIN);
1160         return sr(qp, ps, 0);
1161 }
1162
1163 /**
1164  * hfi1_fill_device_attr - Fill in rvt dev info device attributes.
1165  * @dd: the device data structure
1166  */
1167 static void hfi1_fill_device_attr(struct hfi1_devdata *dd)
1168 {
1169         struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
1170         u32 ver = dd->dc8051_ver;
1171
1172         memset(&rdi->dparms.props, 0, sizeof(rdi->dparms.props));
1173
1174         rdi->dparms.props.fw_ver = ((u64)(dc8051_ver_maj(ver)) << 32) |
1175                 ((u64)(dc8051_ver_min(ver)) << 16) |
1176                 (u64)dc8051_ver_patch(ver);
1177
1178         rdi->dparms.props.device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1179                         IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1180                         IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN |
1181                         IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE |
1182                         IB_DEVICE_MEM_MGT_EXTENSIONS |
1183                         IB_DEVICE_RDMA_NETDEV_OPA_VNIC;
1184         rdi->dparms.props.page_size_cap = PAGE_SIZE;
1185         rdi->dparms.props.vendor_id = dd->oui1 << 16 | dd->oui2 << 8 | dd->oui3;
1186         rdi->dparms.props.vendor_part_id = dd->pcidev->device;
1187         rdi->dparms.props.hw_ver = dd->minrev;
1188         rdi->dparms.props.sys_image_guid = ib_hfi1_sys_image_guid;
1189         rdi->dparms.props.max_mr_size = U64_MAX;
1190         rdi->dparms.props.max_fast_reg_page_list_len = UINT_MAX;
1191         rdi->dparms.props.max_qp = hfi1_max_qps;
1192         rdi->dparms.props.max_qp_wr = hfi1_max_qp_wrs;
1193         rdi->dparms.props.max_send_sge = hfi1_max_sges;
1194         rdi->dparms.props.max_recv_sge = hfi1_max_sges;
1195         rdi->dparms.props.max_sge_rd = hfi1_max_sges;
1196         rdi->dparms.props.max_cq = hfi1_max_cqs;
1197         rdi->dparms.props.max_ah = hfi1_max_ahs;
1198         rdi->dparms.props.max_cqe = hfi1_max_cqes;
1199         rdi->dparms.props.max_mr = rdi->lkey_table.max;
1200         rdi->dparms.props.max_fmr = rdi->lkey_table.max;
1201         rdi->dparms.props.max_map_per_fmr = 32767;
1202         rdi->dparms.props.max_pd = hfi1_max_pds;
1203         rdi->dparms.props.max_qp_rd_atom = HFI1_MAX_RDMA_ATOMIC;
1204         rdi->dparms.props.max_qp_init_rd_atom = 255;
1205         rdi->dparms.props.max_srq = hfi1_max_srqs;
1206         rdi->dparms.props.max_srq_wr = hfi1_max_srq_wrs;
1207         rdi->dparms.props.max_srq_sge = hfi1_max_srq_sges;
1208         rdi->dparms.props.atomic_cap = IB_ATOMIC_GLOB;
1209         rdi->dparms.props.max_pkeys = hfi1_get_npkeys(dd);
1210         rdi->dparms.props.max_mcast_grp = hfi1_max_mcast_grps;
1211         rdi->dparms.props.max_mcast_qp_attach = hfi1_max_mcast_qp_attached;
1212         rdi->dparms.props.max_total_mcast_qp_attach =
1213                                         rdi->dparms.props.max_mcast_qp_attach *
1214                                         rdi->dparms.props.max_mcast_grp;
1215 }
1216
1217 static inline u16 opa_speed_to_ib(u16 in)
1218 {
1219         u16 out = 0;
1220
1221         if (in & OPA_LINK_SPEED_25G)
1222                 out |= IB_SPEED_EDR;
1223         if (in & OPA_LINK_SPEED_12_5G)
1224                 out |= IB_SPEED_FDR;
1225
1226         return out;
1227 }
1228
1229 /*
1230  * Convert a single OPA link width (no multiple flags) to an IB value.
1231  * A zero OPA link width means link down, which means the IB width value
1232  * is a don't care.
1233  */
1234 static inline u16 opa_width_to_ib(u16 in)
1235 {
1236         switch (in) {
1237         case OPA_LINK_WIDTH_1X:
1238         /* map 2x and 3x to 1x as they don't exist in IB */
1239         case OPA_LINK_WIDTH_2X:
1240         case OPA_LINK_WIDTH_3X:
1241                 return IB_WIDTH_1X;
1242         default: /* link down or unknown, return our largest width */
1243         case OPA_LINK_WIDTH_4X:
1244                 return IB_WIDTH_4X;
1245         }
1246 }
1247
1248 static int query_port(struct rvt_dev_info *rdi, u8 port_num,
1249                       struct ib_port_attr *props)
1250 {
1251         struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
1252         struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
1253         struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
1254         u32 lid = ppd->lid;
1255
1256         /* props being zeroed by the caller, avoid zeroing it here */
1257         props->lid = lid ? lid : 0;
1258         props->lmc = ppd->lmc;
1259         /* OPA logical states match IB logical states */
1260         props->state = driver_lstate(ppd);
1261         props->phys_state = driver_pstate(ppd);
1262         props->gid_tbl_len = HFI1_GUIDS_PER_PORT;
1263         props->active_width = (u8)opa_width_to_ib(ppd->link_width_active);
1264         /* see rate_show() in ib core/sysfs.c */
1265         props->active_speed = (u8)opa_speed_to_ib(ppd->link_speed_active);
1266         props->max_vl_num = ppd->vls_supported;
1267
1268         /* Once we are a "first class" citizen and have added the OPA MTUs to
1269          * the core we can advertise the larger MTU enum to the ULPs, for now
1270          * advertise only 4K.
1271          *
1272          * Those applications which are either OPA aware or pass the MTU enum
1273          * from the Path Records to us will get the new 8k MTU.  Those that
1274          * attempt to process the MTU enum may fail in various ways.
1275          */
1276         props->max_mtu = mtu_to_enum((!valid_ib_mtu(hfi1_max_mtu) ?
1277                                       4096 : hfi1_max_mtu), IB_MTU_4096);
1278         props->active_mtu = !valid_ib_mtu(ppd->ibmtu) ? props->max_mtu :
1279                 mtu_to_enum(ppd->ibmtu, IB_MTU_4096);
1280
1281         return 0;
1282 }
1283
1284 static int modify_device(struct ib_device *device,
1285                          int device_modify_mask,
1286                          struct ib_device_modify *device_modify)
1287 {
1288         struct hfi1_devdata *dd = dd_from_ibdev(device);
1289         unsigned i;
1290         int ret;
1291
1292         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1293                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1294                 ret = -EOPNOTSUPP;
1295                 goto bail;
1296         }
1297
1298         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC) {
1299                 memcpy(device->node_desc, device_modify->node_desc,
1300                        IB_DEVICE_NODE_DESC_MAX);
1301                 for (i = 0; i < dd->num_pports; i++) {
1302                         struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;
1303
1304                         hfi1_node_desc_chg(ibp);
1305                 }
1306         }
1307
1308         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID) {
1309                 ib_hfi1_sys_image_guid =
1310                         cpu_to_be64(device_modify->sys_image_guid);
1311                 for (i = 0; i < dd->num_pports; i++) {
1312                         struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;
1313
1314                         hfi1_sys_guid_chg(ibp);
1315                 }
1316         }
1317
1318         ret = 0;
1319
1320 bail:
1321         return ret;
1322 }
1323
1324 static int shut_down_port(struct rvt_dev_info *rdi, u8 port_num)
1325 {
1326         struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
1327         struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
1328         struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
1329         int ret;
1330
1331         set_link_down_reason(ppd, OPA_LINKDOWN_REASON_UNKNOWN, 0,
1332                              OPA_LINKDOWN_REASON_UNKNOWN);
1333         ret = set_link_state(ppd, HLS_DN_DOWNDEF);
1334         return ret;
1335 }
1336
1337 static int hfi1_get_guid_be(struct rvt_dev_info *rdi, struct rvt_ibport *rvp,
1338                             int guid_index, __be64 *guid)
1339 {
1340         struct hfi1_ibport *ibp = container_of(rvp, struct hfi1_ibport, rvp);
1341
1342         if (guid_index >= HFI1_GUIDS_PER_PORT)
1343                 return -EINVAL;
1344
1345         *guid = get_sguid(ibp, guid_index);
1346         return 0;
1347 }
1348
1349 /*
1350  * convert ah port,sl to sc
1351  */
1352 u8 ah_to_sc(struct ib_device *ibdev, struct rdma_ah_attr *ah)
1353 {
1354         struct hfi1_ibport *ibp = to_iport(ibdev, rdma_ah_get_port_num(ah));
1355
1356         return ibp->sl_to_sc[rdma_ah_get_sl(ah)];
1357 }
1358
1359 static int hfi1_check_ah(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr)
1360 {
1361         struct hfi1_ibport *ibp;
1362         struct hfi1_pportdata *ppd;
1363         struct hfi1_devdata *dd;
1364         u8 sc5;
1365         u8 sl;
1366
1367         if (hfi1_check_mcast(rdma_ah_get_dlid(ah_attr)) &&
1368             !(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH))
1369                 return -EINVAL;
1370
1371         /* test the mapping for validity */
1372         ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
1373         ppd = ppd_from_ibp(ibp);
1374         dd = dd_from_ppd(ppd);
1375
1376         sl = rdma_ah_get_sl(ah_attr);
1377         if (sl >= ARRAY_SIZE(ibp->sl_to_sc))
1378                 return -EINVAL;
1379
1380         sc5 = ibp->sl_to_sc[sl];
1381         if (sc_to_vlt(dd, sc5) > num_vls && sc_to_vlt(dd, sc5) != 0xf)
1382                 return -EINVAL;
1383         return 0;
1384 }
1385
1386 static void hfi1_notify_new_ah(struct ib_device *ibdev,
1387                                struct rdma_ah_attr *ah_attr,
1388                                struct rvt_ah *ah)
1389 {
1390         struct hfi1_ibport *ibp;
1391         struct hfi1_pportdata *ppd;
1392         struct hfi1_devdata *dd;
1393         u8 sc5;
1394         struct rdma_ah_attr *attr = &ah->attr;
1395
1396         /*
1397          * Do not trust reading anything from rvt_ah at this point as it is not
1398          * done being setup. We can however modify things which we need to set.
1399          */
1400
1401         ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
1402         ppd = ppd_from_ibp(ibp);
1403         sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)];
1404         hfi1_update_ah_attr(ibdev, attr);
1405         hfi1_make_opa_lid(attr);
1406         dd = dd_from_ppd(ppd);
1407         ah->vl = sc_to_vlt(dd, sc5);
1408         if (ah->vl < num_vls || ah->vl == 15)
1409                 ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu);
1410 }
1411
1412 /**
1413  * hfi1_get_npkeys - return the size of the PKEY table for context 0
1414  * @dd: the hfi1_ib device
1415  */
1416 unsigned hfi1_get_npkeys(struct hfi1_devdata *dd)
1417 {
1418         return ARRAY_SIZE(dd->pport[0].pkeys);
1419 }
1420
1421 static void init_ibport(struct hfi1_pportdata *ppd)
1422 {
1423         struct hfi1_ibport *ibp = &ppd->ibport_data;
1424         size_t sz = ARRAY_SIZE(ibp->sl_to_sc);
1425         int i;
1426
1427         for (i = 0; i < sz; i++) {
1428                 ibp->sl_to_sc[i] = i;
1429                 ibp->sc_to_sl[i] = i;
1430         }
1431
1432         for (i = 0; i < RVT_MAX_TRAP_LISTS ; i++)
1433                 INIT_LIST_HEAD(&ibp->rvp.trap_lists[i].list);
1434         timer_setup(&ibp->rvp.trap_timer, hfi1_handle_trap_timer, 0);
1435
1436         spin_lock_init(&ibp->rvp.lock);
1437         /* Set the prefix to the default value (see ch. 4.1.1) */
1438         ibp->rvp.gid_prefix = IB_DEFAULT_GID_PREFIX;
1439         ibp->rvp.sm_lid = 0;
1440         /*
1441          * Below should only set bits defined in OPA PortInfo.CapabilityMask
1442          * and PortInfo.CapabilityMask3
1443          */
1444         ibp->rvp.port_cap_flags = IB_PORT_AUTO_MIGR_SUP |
1445                 IB_PORT_CAP_MASK_NOTICE_SUP;
1446         ibp->rvp.port_cap3_flags = OPA_CAP_MASK3_IsSharedSpaceSupported;
1447         ibp->rvp.pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1448         ibp->rvp.pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1449         ibp->rvp.pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1450         ibp->rvp.pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1451         ibp->rvp.pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1452
1453         RCU_INIT_POINTER(ibp->rvp.qp[0], NULL);
1454         RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
1455 }
1456
1457 static void hfi1_get_dev_fw_str(struct ib_device *ibdev, char *str)
1458 {
1459         struct rvt_dev_info *rdi = ib_to_rvt(ibdev);
1460         struct hfi1_ibdev *dev = dev_from_rdi(rdi);
1461         u32 ver = dd_from_dev(dev)->dc8051_ver;
1462
1463         snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u.%u", dc8051_ver_maj(ver),
1464                  dc8051_ver_min(ver), dc8051_ver_patch(ver));
1465 }
1466
1467 static const char * const driver_cntr_names[] = {
1468         /* must be element 0*/
1469         "DRIVER_KernIntr",
1470         "DRIVER_ErrorIntr",
1471         "DRIVER_Tx_Errs",
1472         "DRIVER_Rcv_Errs",
1473         "DRIVER_HW_Errs",
1474         "DRIVER_NoPIOBufs",
1475         "DRIVER_CtxtsOpen",
1476         "DRIVER_RcvLen_Errs",
1477         "DRIVER_EgrBufFull",
1478         "DRIVER_EgrHdrFull"
1479 };
1480
1481 static DEFINE_MUTEX(cntr_names_lock); /* protects the *_cntr_names bufers */
1482 static const char **dev_cntr_names;
1483 static const char **port_cntr_names;
1484 static int num_driver_cntrs = ARRAY_SIZE(driver_cntr_names);
1485 static int num_dev_cntrs;
1486 static int num_port_cntrs;
1487 static int cntr_names_initialized;
1488
1489 /*
1490  * Convert a list of names separated by '\n' into an array of NULL terminated
1491  * strings. Optionally some entries can be reserved in the array to hold extra
1492  * external strings.
1493  */
1494 static int init_cntr_names(const char *names_in,
1495                            const size_t names_len,
1496                            int num_extra_names,
1497                            int *num_cntrs,
1498                            const char ***cntr_names)
1499 {
1500         char *names_out, *p, **q;
1501         int i, n;
1502
1503         n = 0;
1504         for (i = 0; i < names_len; i++)
1505                 if (names_in[i] == '\n')
1506                         n++;
1507
1508         names_out = kmalloc((n + num_extra_names) * sizeof(char *) + names_len,
1509                             GFP_KERNEL);
1510         if (!names_out) {
1511                 *num_cntrs = 0;
1512                 *cntr_names = NULL;
1513                 return -ENOMEM;
1514         }
1515
1516         p = names_out + (n + num_extra_names) * sizeof(char *);
1517         memcpy(p, names_in, names_len);
1518
1519         q = (char **)names_out;
1520         for (i = 0; i < n; i++) {
1521                 q[i] = p;
1522                 p = strchr(p, '\n');
1523                 *p++ = '\0';
1524         }
1525
1526         *num_cntrs = n;
1527         *cntr_names = (const char **)names_out;
1528         return 0;
1529 }
1530
1531 static struct rdma_hw_stats *alloc_hw_stats(struct ib_device *ibdev,
1532                                             u8 port_num)
1533 {
1534         int i, err;
1535
1536         mutex_lock(&cntr_names_lock);
1537         if (!cntr_names_initialized) {
1538                 struct hfi1_devdata *dd = dd_from_ibdev(ibdev);
1539
1540                 err = init_cntr_names(dd->cntrnames,
1541                                       dd->cntrnameslen,
1542                                       num_driver_cntrs,
1543                                       &num_dev_cntrs,
1544                                       &dev_cntr_names);
1545                 if (err) {
1546                         mutex_unlock(&cntr_names_lock);
1547                         return NULL;
1548                 }
1549
1550                 for (i = 0; i < num_driver_cntrs; i++)
1551                         dev_cntr_names[num_dev_cntrs + i] =
1552                                 driver_cntr_names[i];
1553
1554                 err = init_cntr_names(dd->portcntrnames,
1555                                       dd->portcntrnameslen,
1556                                       0,
1557                                       &num_port_cntrs,
1558                                       &port_cntr_names);
1559                 if (err) {
1560                         kfree(dev_cntr_names);
1561                         dev_cntr_names = NULL;
1562                         mutex_unlock(&cntr_names_lock);
1563                         return NULL;
1564                 }
1565                 cntr_names_initialized = 1;
1566         }
1567         mutex_unlock(&cntr_names_lock);
1568
1569         if (!port_num)
1570                 return rdma_alloc_hw_stats_struct(
1571                                 dev_cntr_names,
1572                                 num_dev_cntrs + num_driver_cntrs,
1573                                 RDMA_HW_STATS_DEFAULT_LIFESPAN);
1574         else
1575                 return rdma_alloc_hw_stats_struct(
1576                                 port_cntr_names,
1577                                 num_port_cntrs,
1578                                 RDMA_HW_STATS_DEFAULT_LIFESPAN);
1579 }
1580
1581 static u64 hfi1_sps_ints(void)
1582 {
1583         unsigned long flags;
1584         struct hfi1_devdata *dd;
1585         u64 sps_ints = 0;
1586
1587         spin_lock_irqsave(&hfi1_devs_lock, flags);
1588         list_for_each_entry(dd, &hfi1_dev_list, list) {
1589                 sps_ints += get_all_cpu_total(dd->int_counter);
1590         }
1591         spin_unlock_irqrestore(&hfi1_devs_lock, flags);
1592         return sps_ints;
1593 }
1594
1595 static int get_hw_stats(struct ib_device *ibdev, struct rdma_hw_stats *stats,
1596                         u8 port, int index)
1597 {
1598         u64 *values;
1599         int count;
1600
1601         if (!port) {
1602                 u64 *stats = (u64 *)&hfi1_stats;
1603                 int i;
1604
1605                 hfi1_read_cntrs(dd_from_ibdev(ibdev), NULL, &values);
1606                 values[num_dev_cntrs] = hfi1_sps_ints();
1607                 for (i = 1; i < num_driver_cntrs; i++)
1608                         values[num_dev_cntrs + i] = stats[i];
1609                 count = num_dev_cntrs + num_driver_cntrs;
1610         } else {
1611                 struct hfi1_ibport *ibp = to_iport(ibdev, port);
1612
1613                 hfi1_read_portcntrs(ppd_from_ibp(ibp), NULL, &values);
1614                 count = num_port_cntrs;
1615         }
1616
1617         memcpy(stats->value, values, count * sizeof(u64));
1618         return count;
1619 }
1620
1621 /**
1622  * hfi1_register_ib_device - register our device with the infiniband core
1623  * @dd: the device data structure
1624  * Return 0 if successful, errno if unsuccessful.
1625  */
1626 int hfi1_register_ib_device(struct hfi1_devdata *dd)
1627 {
1628         struct hfi1_ibdev *dev = &dd->verbs_dev;
1629         struct ib_device *ibdev = &dev->rdi.ibdev;
1630         struct hfi1_pportdata *ppd = dd->pport;
1631         struct hfi1_ibport *ibp = &ppd->ibport_data;
1632         unsigned i;
1633         int ret;
1634
1635         for (i = 0; i < dd->num_pports; i++)
1636                 init_ibport(ppd + i);
1637
1638         /* Only need to initialize non-zero fields. */
1639
1640         timer_setup(&dev->mem_timer, mem_timer, 0);
1641
1642         seqlock_init(&dev->iowait_lock);
1643         seqlock_init(&dev->txwait_lock);
1644         INIT_LIST_HEAD(&dev->txwait);
1645         INIT_LIST_HEAD(&dev->memwait);
1646
1647         ret = verbs_txreq_init(dev);
1648         if (ret)
1649                 goto err_verbs_txreq;
1650
1651         /* Use first-port GUID as node guid */
1652         ibdev->node_guid = get_sguid(ibp, HFI1_PORT_GUID_INDEX);
1653
1654         /*
1655          * The system image GUID is supposed to be the same for all
1656          * HFIs in a single system but since there can be other
1657          * device types in the system, we can't be sure this is unique.
1658          */
1659         if (!ib_hfi1_sys_image_guid)
1660                 ib_hfi1_sys_image_guid = ibdev->node_guid;
1661         ibdev->owner = THIS_MODULE;
1662         ibdev->phys_port_cnt = dd->num_pports;
1663         ibdev->dev.parent = &dd->pcidev->dev;
1664         ibdev->modify_device = modify_device;
1665         ibdev->alloc_hw_stats = alloc_hw_stats;
1666         ibdev->get_hw_stats = get_hw_stats;
1667         ibdev->alloc_rdma_netdev = hfi1_vnic_alloc_rn;
1668
1669         /* keep process mad in the driver */
1670         ibdev->process_mad = hfi1_process_mad;
1671         ibdev->get_dev_fw_str = hfi1_get_dev_fw_str;
1672
1673         strlcpy(ibdev->node_desc, init_utsname()->nodename,
1674                 sizeof(ibdev->node_desc));
1675
1676         /*
1677          * Fill in rvt info object.
1678          */
1679         dd->verbs_dev.rdi.driver_f.port_callback = hfi1_create_port_files;
1680         dd->verbs_dev.rdi.driver_f.get_pci_dev = get_pci_dev;
1681         dd->verbs_dev.rdi.driver_f.check_ah = hfi1_check_ah;
1682         dd->verbs_dev.rdi.driver_f.notify_new_ah = hfi1_notify_new_ah;
1683         dd->verbs_dev.rdi.driver_f.get_guid_be = hfi1_get_guid_be;
1684         dd->verbs_dev.rdi.driver_f.query_port_state = query_port;
1685         dd->verbs_dev.rdi.driver_f.shut_down_port = shut_down_port;
1686         dd->verbs_dev.rdi.driver_f.cap_mask_chg = hfi1_cap_mask_chg;
1687         /*
1688          * Fill in rvt info device attributes.
1689          */
1690         hfi1_fill_device_attr(dd);
1691
1692         /* queue pair */
1693         dd->verbs_dev.rdi.dparms.qp_table_size = hfi1_qp_table_size;
1694         dd->verbs_dev.rdi.dparms.qpn_start = 0;
1695         dd->verbs_dev.rdi.dparms.qpn_inc = 1;
1696         dd->verbs_dev.rdi.dparms.qos_shift = dd->qos_shift;
1697         dd->verbs_dev.rdi.dparms.qpn_res_start = kdeth_qp << 16;
1698         dd->verbs_dev.rdi.dparms.qpn_res_end =
1699         dd->verbs_dev.rdi.dparms.qpn_res_start + 65535;
1700         dd->verbs_dev.rdi.dparms.max_rdma_atomic = HFI1_MAX_RDMA_ATOMIC;
1701         dd->verbs_dev.rdi.dparms.psn_mask = PSN_MASK;
1702         dd->verbs_dev.rdi.dparms.psn_shift = PSN_SHIFT;
1703         dd->verbs_dev.rdi.dparms.psn_modify_mask = PSN_MODIFY_MASK;
1704         dd->verbs_dev.rdi.dparms.core_cap_flags = RDMA_CORE_PORT_INTEL_OPA |
1705                                                 RDMA_CORE_CAP_OPA_AH;
1706         dd->verbs_dev.rdi.dparms.max_mad_size = OPA_MGMT_MAD_SIZE;
1707
1708         dd->verbs_dev.rdi.driver_f.qp_priv_alloc = qp_priv_alloc;
1709         dd->verbs_dev.rdi.driver_f.qp_priv_init = hfi1_qp_priv_init;
1710         dd->verbs_dev.rdi.driver_f.qp_priv_free = qp_priv_free;
1711         dd->verbs_dev.rdi.driver_f.free_all_qps = free_all_qps;
1712         dd->verbs_dev.rdi.driver_f.notify_qp_reset = notify_qp_reset;
1713         dd->verbs_dev.rdi.driver_f.do_send = hfi1_do_send_from_rvt;
1714         dd->verbs_dev.rdi.driver_f.schedule_send = hfi1_schedule_send;
1715         dd->verbs_dev.rdi.driver_f.schedule_send_no_lock = _hfi1_schedule_send;
1716         dd->verbs_dev.rdi.driver_f.get_pmtu_from_attr = get_pmtu_from_attr;
1717         dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
1718         dd->verbs_dev.rdi.driver_f.flush_qp_waiters = flush_qp_waiters;
1719         dd->verbs_dev.rdi.driver_f.stop_send_queue = stop_send_queue;
1720         dd->verbs_dev.rdi.driver_f.quiesce_qp = quiesce_qp;
1721         dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
1722         dd->verbs_dev.rdi.driver_f.mtu_from_qp = mtu_from_qp;
1723         dd->verbs_dev.rdi.driver_f.mtu_to_path_mtu = mtu_to_path_mtu;
1724         dd->verbs_dev.rdi.driver_f.check_modify_qp = hfi1_check_modify_qp;
1725         dd->verbs_dev.rdi.driver_f.modify_qp = hfi1_modify_qp;
1726         dd->verbs_dev.rdi.driver_f.notify_restart_rc = hfi1_restart_rc;
1727         dd->verbs_dev.rdi.driver_f.setup_wqe = hfi1_setup_wqe;
1728         dd->verbs_dev.rdi.driver_f.comp_vect_cpu_lookup =
1729                                                 hfi1_comp_vect_mappings_lookup;
1730
1731         /* completeion queue */
1732         dd->verbs_dev.rdi.ibdev.num_comp_vectors = dd->comp_vect_possible_cpus;
1733         dd->verbs_dev.rdi.dparms.node = dd->node;
1734
1735         /* misc settings */
1736         dd->verbs_dev.rdi.flags = 0; /* Let rdmavt handle it all */
1737         dd->verbs_dev.rdi.dparms.lkey_table_size = hfi1_lkey_table_size;
1738         dd->verbs_dev.rdi.dparms.nports = dd->num_pports;
1739         dd->verbs_dev.rdi.dparms.npkeys = hfi1_get_npkeys(dd);
1740         dd->verbs_dev.rdi.dparms.sge_copy_mode = sge_copy_mode;
1741         dd->verbs_dev.rdi.dparms.wss_threshold = wss_threshold;
1742         dd->verbs_dev.rdi.dparms.wss_clean_period = wss_clean_period;
1743
1744         /* post send table */
1745         dd->verbs_dev.rdi.post_parms = hfi1_post_parms;
1746
1747         /* opcode translation table */
1748         dd->verbs_dev.rdi.wc_opcode = ib_hfi1_wc_opcode;
1749
1750         ppd = dd->pport;
1751         for (i = 0; i < dd->num_pports; i++, ppd++)
1752                 rvt_init_port(&dd->verbs_dev.rdi,
1753                               &ppd->ibport_data.rvp,
1754                               i,
1755                               ppd->pkeys);
1756
1757         rdma_set_device_sysfs_group(&dd->verbs_dev.rdi.ibdev,
1758                                     &ib_hfi1_attr_group);
1759
1760         ret = rvt_register_device(&dd->verbs_dev.rdi, RDMA_DRIVER_HFI1);
1761         if (ret)
1762                 goto err_verbs_txreq;
1763
1764         ret = hfi1_verbs_register_sysfs(dd);
1765         if (ret)
1766                 goto err_class;
1767
1768         return ret;
1769
1770 err_class:
1771         rvt_unregister_device(&dd->verbs_dev.rdi);
1772 err_verbs_txreq:
1773         verbs_txreq_exit(dev);
1774         dd_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1775         return ret;
1776 }
1777
1778 void hfi1_unregister_ib_device(struct hfi1_devdata *dd)
1779 {
1780         struct hfi1_ibdev *dev = &dd->verbs_dev;
1781
1782         hfi1_verbs_unregister_sysfs(dd);
1783
1784         rvt_unregister_device(&dd->verbs_dev.rdi);
1785
1786         if (!list_empty(&dev->txwait))
1787                 dd_dev_err(dd, "txwait list not empty!\n");
1788         if (!list_empty(&dev->memwait))
1789                 dd_dev_err(dd, "memwait list not empty!\n");
1790
1791         del_timer_sync(&dev->mem_timer);
1792         verbs_txreq_exit(dev);
1793
1794         mutex_lock(&cntr_names_lock);
1795         kfree(dev_cntr_names);
1796         kfree(port_cntr_names);
1797         dev_cntr_names = NULL;
1798         port_cntr_names = NULL;
1799         cntr_names_initialized = 0;
1800         mutex_unlock(&cntr_names_lock);
1801 }
1802
1803 void hfi1_cnp_rcv(struct hfi1_packet *packet)
1804 {
1805         struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
1806         struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1807         struct ib_header *hdr = packet->hdr;
1808         struct rvt_qp *qp = packet->qp;
1809         u32 lqpn, rqpn = 0;
1810         u16 rlid = 0;
1811         u8 sl, sc5, svc_type;
1812
1813         switch (packet->qp->ibqp.qp_type) {
1814         case IB_QPT_UC:
1815                 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr);
1816                 rqpn = qp->remote_qpn;
1817                 svc_type = IB_CC_SVCTYPE_UC;
1818                 break;
1819         case IB_QPT_RC:
1820                 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr);
1821                 rqpn = qp->remote_qpn;
1822                 svc_type = IB_CC_SVCTYPE_RC;
1823                 break;
1824         case IB_QPT_SMI:
1825         case IB_QPT_GSI:
1826         case IB_QPT_UD:
1827                 svc_type = IB_CC_SVCTYPE_UD;
1828                 break;
1829         default:
1830                 ibp->rvp.n_pkt_drops++;
1831                 return;
1832         }
1833
1834         sc5 = hfi1_9B_get_sc5(hdr, packet->rhf);
1835         sl = ibp->sc_to_sl[sc5];
1836         lqpn = qp->ibqp.qp_num;
1837
1838         process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
1839 }