2 * Copyright(c) 2015 - 2017 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
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44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 #include <linux/types.h>
49 #include <linux/device.h>
50 #include <linux/dmapool.h>
51 #include <linux/slab.h>
52 #include <linux/list.h>
53 #include <linux/highmem.h>
55 #include <linux/uio.h>
56 #include <linux/rbtree.h>
57 #include <linux/spinlock.h>
58 #include <linux/delay.h>
59 #include <linux/kthread.h>
60 #include <linux/mmu_context.h>
61 #include <linux/module.h>
62 #include <linux/vmalloc.h>
63 #include <linux/string.h>
67 #include "user_sdma.h"
68 #include "verbs.h" /* for the headers */
69 #include "common.h" /* for struct hfi1_tid_info */
73 static uint hfi1_sdma_comp_ring_size = 128;
74 module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO);
75 MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128");
77 /* The maximum number of Data io vectors per message/request */
78 #define MAX_VECTORS_PER_REQ 8
80 * Maximum number of packet to send from each message/request
81 * before moving to the next one.
83 #define MAX_PKTS_PER_QUEUE 16
85 #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
87 #define req_opcode(x) \
88 (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
89 #define req_version(x) \
90 (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
91 #define req_iovcnt(x) \
92 (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
94 /* Number of BTH.PSN bits used for sequence number in expected rcvs */
95 #define BTH_SEQ_MASK 0x7ffull
98 * Define fields in the KDETH header so we can update the header
101 #define KDETH_OFFSET_SHIFT 0
102 #define KDETH_OFFSET_MASK 0x7fff
103 #define KDETH_OM_SHIFT 15
104 #define KDETH_OM_MASK 0x1
105 #define KDETH_TID_SHIFT 16
106 #define KDETH_TID_MASK 0x3ff
107 #define KDETH_TIDCTRL_SHIFT 26
108 #define KDETH_TIDCTRL_MASK 0x3
109 #define KDETH_INTR_SHIFT 28
110 #define KDETH_INTR_MASK 0x1
111 #define KDETH_SH_SHIFT 29
112 #define KDETH_SH_MASK 0x1
113 #define KDETH_HCRC_UPPER_SHIFT 16
114 #define KDETH_HCRC_UPPER_MASK 0xff
115 #define KDETH_HCRC_LOWER_SHIFT 24
116 #define KDETH_HCRC_LOWER_MASK 0xff
118 #define AHG_KDETH_INTR_SHIFT 12
119 #define AHG_KDETH_SH_SHIFT 13
121 #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
122 #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
124 #define KDETH_GET(val, field) \
125 (((le32_to_cpu((val))) >> KDETH_##field##_SHIFT) & KDETH_##field##_MASK)
126 #define KDETH_SET(dw, field, val) do { \
127 u32 dwval = le32_to_cpu(dw); \
128 dwval &= ~(KDETH_##field##_MASK << KDETH_##field##_SHIFT); \
129 dwval |= (((val) & KDETH_##field##_MASK) << \
130 KDETH_##field##_SHIFT); \
131 dw = cpu_to_le32(dwval); \
134 #define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
136 if ((idx) < ARRAY_SIZE((arr))) \
137 (arr)[(idx++)] = sdma_build_ahg_descriptor( \
138 (__force u16)(value), (dw), (bit), \
144 /* KDETH OM multipliers and switch over point */
145 #define KDETH_OM_SMALL 4
146 #define KDETH_OM_SMALL_SHIFT 2
147 #define KDETH_OM_LARGE 64
148 #define KDETH_OM_LARGE_SHIFT 6
149 #define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1))
151 /* Tx request flag bits */
152 #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
153 #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
155 /* SDMA request flag bits */
156 #define SDMA_REQ_FOR_THREAD 1
157 #define SDMA_REQ_SEND_DONE 2
158 #define SDMA_REQ_HAS_ERROR 3
159 #define SDMA_REQ_DONE_ERROR 4
161 #define SDMA_PKT_Q_INACTIVE BIT(0)
162 #define SDMA_PKT_Q_ACTIVE BIT(1)
163 #define SDMA_PKT_Q_DEFERRED BIT(2)
166 * Maximum retry attempts to submit a TX request
167 * before putting the process to sleep.
169 #define MAX_DEFER_RETRY_COUNT 1
171 static unsigned initial_pkt_count = 8;
173 #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
175 struct sdma_mmu_node;
177 struct user_sdma_iovec {
178 struct list_head list;
180 /* number of pages in this vector */
182 /* array of pinned pages for this vector */
185 * offset into the virtual address space of the vector at
186 * which we last left off.
189 struct sdma_mmu_node *node;
192 struct sdma_mmu_node {
193 struct mmu_rb_node rb;
194 struct hfi1_user_sdma_pkt_q *pq;
200 /* evict operation argument */
202 u32 cleared; /* count evicted so far */
203 u32 target; /* target count to evict */
206 struct user_sdma_request {
207 struct sdma_req_info info;
208 struct hfi1_user_sdma_pkt_q *pq;
209 struct hfi1_user_sdma_comp_q *cq;
210 /* This is the original header from user space */
211 struct hfi1_pkt_header hdr;
213 * Pointer to the SDMA engine for this request.
214 * Since different request could be on different VLs,
215 * each request will need it's own engine pointer.
217 struct sdma_engine *sde;
221 * KDETH.Offset (Eager) field
222 * We need to remember the initial value so the headers
223 * can be updated properly.
227 * KDETH.OFFSET (TID) field
228 * The offset can cover multiple packets, depending on the
229 * size of the TID entry.
233 * We copy the iovs for this request (based on
234 * info.iovcnt). These are only the data vectors
237 /* total length of the data in the request */
239 /* progress index moving along the iovs array */
241 struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
242 /* number of elements copied to the tids array */
244 /* TID array values copied from the tid_iov vector */
251 struct list_head txps;
253 /* status of the last txreq completed */
258 * A single txreq could span up to 3 physical pages when the MTU
259 * is sufficiently large (> 4K). Each of the IOV pointers also
260 * needs it's own set of flags so the vector has been handled
261 * independently of each other.
263 struct user_sdma_txreq {
264 /* Packet header for the txreq */
265 struct hfi1_pkt_header hdr;
266 struct sdma_txreq txreq;
267 struct list_head list;
268 struct user_sdma_request *req;
274 #define SDMA_DBG(req, fmt, ...) \
275 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
276 (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
278 #define SDMA_Q_DBG(pq, fmt, ...) \
279 hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \
280 (pq)->subctxt, ##__VA_ARGS__)
282 static int user_sdma_send_pkts(struct user_sdma_request *req,
284 static int num_user_pages(const struct iovec *iov);
285 static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status);
286 static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq);
287 static void user_sdma_free_request(struct user_sdma_request *req, bool unpin);
288 static int pin_vector_pages(struct user_sdma_request *req,
289 struct user_sdma_iovec *iovec);
290 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
291 unsigned start, unsigned npages);
292 static int check_header_template(struct user_sdma_request *req,
293 struct hfi1_pkt_header *hdr, u32 lrhlen,
295 static int set_txreq_header(struct user_sdma_request *req,
296 struct user_sdma_txreq *tx, u32 datalen);
297 static int set_txreq_header_ahg(struct user_sdma_request *req,
298 struct user_sdma_txreq *tx, u32 len);
299 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
300 struct hfi1_user_sdma_comp_q *cq,
301 u16 idx, enum hfi1_sdma_comp_state state,
303 static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags);
304 static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len);
306 static int defer_packet_queue(
307 struct sdma_engine *sde,
309 struct sdma_txreq *txreq,
311 static void activate_packet_queue(struct iowait *wait, int reason);
312 static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
314 static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode);
315 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
316 void *arg2, bool *stop);
317 static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode);
318 static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode);
320 static struct mmu_rb_ops sdma_rb_ops = {
321 .filter = sdma_rb_filter,
322 .insert = sdma_rb_insert,
323 .evict = sdma_rb_evict,
324 .remove = sdma_rb_remove,
325 .invalidate = sdma_rb_invalidate
328 static int defer_packet_queue(
329 struct sdma_engine *sde,
331 struct sdma_txreq *txreq,
334 struct hfi1_user_sdma_pkt_q *pq =
335 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
336 struct hfi1_ibdev *dev = &pq->dd->verbs_dev;
337 struct user_sdma_txreq *tx =
338 container_of(txreq, struct user_sdma_txreq, txreq);
340 if (sdma_progress(sde, seq, txreq)) {
341 if (tx->busycount++ < MAX_DEFER_RETRY_COUNT)
345 * We are assuming that if the list is enqueued somewhere, it
346 * is to the dmawait list since that is the only place where
347 * it is supposed to be enqueued.
349 xchg(&pq->state, SDMA_PKT_Q_DEFERRED);
350 write_seqlock(&dev->iowait_lock);
351 if (list_empty(&pq->busy.list))
352 list_add_tail(&pq->busy.list, &sde->dmawait);
353 write_sequnlock(&dev->iowait_lock);
359 static void activate_packet_queue(struct iowait *wait, int reason)
361 struct hfi1_user_sdma_pkt_q *pq =
362 container_of(wait, struct hfi1_user_sdma_pkt_q, busy);
363 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
364 wake_up(&wait->wait_dma);
367 static void sdma_kmem_cache_ctor(void *obj)
369 struct user_sdma_txreq *tx = obj;
371 memset(tx, 0, sizeof(*tx));
374 int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
375 struct hfi1_filedata *fd)
379 struct hfi1_devdata *dd;
380 struct hfi1_user_sdma_comp_q *cq;
381 struct hfi1_user_sdma_pkt_q *pq;
387 if (!hfi1_sdma_comp_ring_size)
392 pq = kzalloc(sizeof(*pq), GFP_KERNEL);
396 INIT_LIST_HEAD(&pq->list);
398 pq->ctxt = uctxt->ctxt;
399 pq->subctxt = fd->subctxt;
400 pq->n_max_reqs = hfi1_sdma_comp_ring_size;
401 pq->state = SDMA_PKT_Q_INACTIVE;
402 atomic_set(&pq->n_reqs, 0);
403 init_waitqueue_head(&pq->wait);
404 atomic_set(&pq->n_locked, 0);
407 iowait_init(&pq->busy, 0, NULL, defer_packet_queue,
408 activate_packet_queue, NULL);
411 pq->reqs = kcalloc(hfi1_sdma_comp_ring_size,
417 pq->req_in_use = kcalloc(BITS_TO_LONGS(hfi1_sdma_comp_ring_size),
418 sizeof(*pq->req_in_use),
421 goto pq_reqs_no_in_use;
423 snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt,
425 pq->txreq_cache = kmem_cache_create(buf,
426 sizeof(struct user_sdma_txreq),
429 sdma_kmem_cache_ctor);
430 if (!pq->txreq_cache) {
431 dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n",
436 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
440 cq->comps = vmalloc_user(PAGE_ALIGN(sizeof(*cq->comps)
441 * hfi1_sdma_comp_ring_size));
445 cq->nentries = hfi1_sdma_comp_ring_size;
447 ret = hfi1_mmu_rb_register(pq, pq->mm, &sdma_rb_ops, dd->pport->hfi1_wq,
450 dd_dev_err(dd, "Failed to register with MMU %d", ret);
457 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
458 list_add(&pq->list, &uctxt->sdma_queues);
459 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
468 kmem_cache_destroy(pq->txreq_cache);
470 kfree(pq->req_in_use);
479 int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd)
481 struct hfi1_ctxtdata *uctxt = fd->uctxt;
482 struct hfi1_user_sdma_pkt_q *pq;
485 hfi1_cdbg(SDMA, "[%u:%u:%u] Freeing user SDMA queues", uctxt->dd->unit,
486 uctxt->ctxt, fd->subctxt);
490 hfi1_mmu_rb_unregister(pq->handler);
491 spin_lock_irqsave(&uctxt->sdma_qlock, flags);
492 if (!list_empty(&pq->list))
493 list_del_init(&pq->list);
494 spin_unlock_irqrestore(&uctxt->sdma_qlock, flags);
495 iowait_sdma_drain(&pq->busy);
496 /* Wait until all requests have been freed. */
497 wait_event_interruptible(
499 (ACCESS_ONCE(pq->state) == SDMA_PKT_Q_INACTIVE));
501 kfree(pq->req_in_use);
502 kmem_cache_destroy(pq->txreq_cache);
507 vfree(fd->cq->comps);
514 static u8 dlid_to_selector(u16 dlid)
516 static u8 mapping[256];
517 static int initialized;
522 memset(mapping, 0xFF, 256);
526 hash = ((dlid >> 8) ^ dlid) & 0xFF;
527 if (mapping[hash] == 0xFF) {
528 mapping[hash] = next;
529 next = (next + 1) & 0x7F;
532 return mapping[hash];
535 int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
536 struct iovec *iovec, unsigned long dim,
537 unsigned long *count)
540 struct hfi1_ctxtdata *uctxt = fd->uctxt;
541 struct hfi1_user_sdma_pkt_q *pq = fd->pq;
542 struct hfi1_user_sdma_comp_q *cq = fd->cq;
543 struct hfi1_devdata *dd = pq->dd;
544 unsigned long idx = 0;
545 u8 pcount = initial_pkt_count;
546 struct sdma_req_info info;
547 struct user_sdma_request *req;
553 if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) {
556 "[%u:%u:%u] First vector not big enough for header %lu/%lu",
557 dd->unit, uctxt->ctxt, fd->subctxt,
558 iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr));
561 ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info));
563 hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)",
564 dd->unit, uctxt->ctxt, fd->subctxt, ret);
568 trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt,
571 if (info.comp_idx >= hfi1_sdma_comp_ring_size) {
573 "[%u:%u:%u:%u] Invalid comp index",
574 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
579 * Sanity check the header io vector count. Need at least 1 vector
580 * (header) and cannot be larger than the actual io vector count.
582 if (req_iovcnt(info.ctrl) < 1 || req_iovcnt(info.ctrl) > dim) {
584 "[%u:%u:%u:%u] Invalid iov count %d, dim %ld",
585 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx,
586 req_iovcnt(info.ctrl), dim);
590 if (!info.fragsize) {
592 "[%u:%u:%u:%u] Request does not specify fragsize",
593 dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx);
597 /* Try to claim the request. */
598 if (test_and_set_bit(info.comp_idx, pq->req_in_use)) {
599 hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in use",
600 dd->unit, uctxt->ctxt, fd->subctxt,
605 * All safety checks have been done and this request has been claimed.
607 hfi1_cdbg(SDMA, "[%u:%u:%u] Using req/comp entry %u\n", dd->unit,
608 uctxt->ctxt, fd->subctxt, info.comp_idx);
609 req = pq->reqs + info.comp_idx;
610 memset(req, 0, sizeof(*req));
611 req->data_iovs = req_iovcnt(info.ctrl) - 1; /* subtract header vector */
616 INIT_LIST_HEAD(&req->txps);
618 memcpy(&req->info, &info, sizeof(info));
620 if (req_opcode(info.ctrl) == EXPECTED) {
621 /* expected must have a TID info and at least one data vector */
622 if (req->data_iovs < 2) {
624 "Not enough vectors for expected request");
631 if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) {
632 SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs,
633 MAX_VECTORS_PER_REQ);
637 /* Copy the header from the user buffer */
638 ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info),
641 SDMA_DBG(req, "Failed to copy header template (%d)", ret);
646 /* If Static rate control is not enabled, sanitize the header. */
647 if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL))
650 /* Validate the opcode. Do not trust packets from user space blindly. */
651 opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff;
652 if ((opcode & USER_OPCODE_CHECK_MASK) !=
653 USER_OPCODE_CHECK_VAL) {
654 SDMA_DBG(req, "Invalid opcode (%d)", opcode);
659 * Validate the vl. Do not trust packets from user space blindly.
660 * VL comes from PBC, SC comes from LRH, and the VL needs to
661 * match the SC look up.
663 vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF;
664 sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) |
665 (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4));
666 if (vl >= dd->pport->vls_operational ||
667 vl != sc_to_vlt(dd, sc)) {
668 SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl);
673 /* Checking P_KEY for requests from user-space */
674 if (egress_pkey_check(dd->pport, req->hdr.lrh, req->hdr.bth, sc,
675 PKEY_CHECK_INVALID)) {
681 * Also should check the BTH.lnh. If it says the next header is GRH then
682 * the RXE parsing will be off and will land in the middle of the KDETH
683 * or miss it entirely.
685 if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) {
686 SDMA_DBG(req, "User tried to pass in a GRH");
691 req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]);
693 * Calculate the initial TID offset based on the values of
694 * KDETH.OFFSET and KDETH.OM that are passed in.
696 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
697 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
698 KDETH_OM_LARGE : KDETH_OM_SMALL);
699 SDMA_DBG(req, "Initial TID offset %u", req->tidoffset);
702 /* Save all the IO vector structures */
703 for (i = 0; i < req->data_iovs; i++) {
704 INIT_LIST_HEAD(&req->iovs[i].list);
705 memcpy(&req->iovs[i].iov,
707 sizeof(req->iovs[i].iov));
708 ret = pin_vector_pages(req, &req->iovs[i]);
713 req->data_len += req->iovs[i].iov.iov_len;
715 SDMA_DBG(req, "total data length %u", req->data_len);
717 if (pcount > req->info.npkts)
718 pcount = req->info.npkts;
721 * User space will provide the TID info only when the
722 * request type is EXPECTED. This is true even if there is
723 * only one packet in the request and the header is already
724 * setup. The reason for the singular TID case is that the
725 * driver needs to perform safety checks.
727 if (req_opcode(req->info.ctrl) == EXPECTED) {
728 u16 ntids = iovec[idx].iov_len / sizeof(*req->tids);
731 if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) {
737 * We have to copy all of the tids because they may vary
738 * in size and, therefore, the TID count might not be
739 * equal to the pkt count. However, there is no way to
740 * tell at this point.
742 tmp = memdup_user(iovec[idx].iov_base,
743 ntids * sizeof(*req->tids));
746 SDMA_DBG(req, "Failed to copy %d TIDs (%d)",
755 dlid = be16_to_cpu(req->hdr.lrh[1]);
756 selector = dlid_to_selector(dlid);
757 selector += uctxt->ctxt + fd->subctxt;
758 req->sde = sdma_select_user_engine(dd, selector, vl);
760 if (!req->sde || !sdma_running(req->sde)) {
765 /* We don't need an AHG entry if the request contains only one packet */
766 if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG))
767 req->ahg_idx = sdma_ahg_alloc(req->sde);
769 set_comp_state(pq, cq, info.comp_idx, QUEUED, 0);
770 atomic_inc(&pq->n_reqs);
772 /* Send the first N packets in the request to buy us some time */
773 ret = user_sdma_send_pkts(req, pcount);
774 if (unlikely(ret < 0 && ret != -EBUSY)) {
780 * It is possible that the SDMA engine would have processed all the
781 * submitted packets by the time we get here. Therefore, only set
782 * packet queue state to ACTIVE if there are still uncompleted
785 if (atomic_read(&pq->n_reqs))
786 xchg(&pq->state, SDMA_PKT_Q_ACTIVE);
789 * This is a somewhat blocking send implementation.
790 * The driver will block the caller until all packets of the
791 * request have been submitted to the SDMA engine. However, it
792 * will not wait for send completions.
794 while (!test_bit(SDMA_REQ_SEND_DONE, &req->flags)) {
795 ret = user_sdma_send_pkts(req, pcount);
799 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
800 if (ACCESS_ONCE(req->seqcomp) ==
801 req->seqsubmitted - 1)
805 wait_event_interruptible_timeout(
807 (pq->state == SDMA_PKT_Q_ACTIVE),
809 SDMA_IOWAIT_TIMEOUT));
815 user_sdma_free_request(req, true);
818 set_comp_state(pq, cq, info.comp_idx, ERROR, req->status);
822 static inline u32 compute_data_length(struct user_sdma_request *req,
823 struct user_sdma_txreq *tx)
826 * Determine the proper size of the packet data.
827 * The size of the data of the first packet is in the header
828 * template. However, it includes the header and ICRC, which need
830 * The minimum representable packet data length in a header is 4 bytes,
831 * therefore, when the data length request is less than 4 bytes, there's
832 * only one packet, and the packet data length is equal to that of the
833 * request data length.
834 * The size of the remaining packets is the minimum of the frag
835 * size (MTU) or remaining data in the request.
840 if (req->data_len < sizeof(u32))
843 len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) -
844 (sizeof(tx->hdr) - 4));
845 } else if (req_opcode(req->info.ctrl) == EXPECTED) {
846 u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) *
849 * Get the data length based on the remaining space in the
852 len = min(tidlen - req->tidoffset, (u32)req->info.fragsize);
853 /* If we've filled up the TID pair, move to the next one. */
854 if (unlikely(!len) && ++req->tididx < req->n_tids &&
855 req->tids[req->tididx]) {
856 tidlen = EXP_TID_GET(req->tids[req->tididx],
859 len = min_t(u32, tidlen, req->info.fragsize);
862 * Since the TID pairs map entire pages, make sure that we
863 * are not going to try to send more data that we have
866 len = min(len, req->data_len - req->sent);
868 len = min(req->data_len - req->sent, (u32)req->info.fragsize);
870 SDMA_DBG(req, "Data Length = %u", len);
874 static inline u32 pad_len(u32 len)
876 if (len & (sizeof(u32) - 1))
877 len += sizeof(u32) - (len & (sizeof(u32) - 1));
881 static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len)
883 /* (Size of complete header - size of PBC) + 4B ICRC + data length */
884 return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len);
887 static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts)
891 struct user_sdma_txreq *tx = NULL;
892 struct hfi1_user_sdma_pkt_q *pq = NULL;
893 struct user_sdma_iovec *iovec = NULL;
900 /* If tx completion has reported an error, we are done. */
901 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
902 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
907 * Check if we might have sent the entire request already
909 if (unlikely(req->seqnum == req->info.npkts)) {
910 if (!list_empty(&req->txps))
915 if (!maxpkts || maxpkts > req->info.npkts - req->seqnum)
916 maxpkts = req->info.npkts - req->seqnum;
918 while (npkts < maxpkts) {
919 u32 datalen = 0, queued = 0, data_sent = 0;
923 * Check whether any of the completions have come back
924 * with errors. If so, we are not going to process any
925 * more packets from this request.
927 if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) {
928 set_bit(SDMA_REQ_DONE_ERROR, &req->flags);
932 tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL);
939 INIT_LIST_HEAD(&tx->list);
942 * For the last packet set the ACK request
943 * and disable header suppression.
945 if (req->seqnum == req->info.npkts - 1)
946 tx->flags |= (TXREQ_FLAGS_REQ_ACK |
947 TXREQ_FLAGS_REQ_DISABLE_SH);
950 * Calculate the payload size - this is min of the fragment
951 * (MTU) size or the remaining bytes in the request but only
952 * if we have payload data.
955 iovec = &req->iovs[req->iov_idx];
956 if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) {
957 if (++req->iov_idx == req->data_iovs) {
961 iovec = &req->iovs[req->iov_idx];
962 WARN_ON(iovec->offset);
965 datalen = compute_data_length(req, tx);
968 * Disable header suppression for the payload <= 8DWS.
969 * If there is an uncorrectable error in the receive
970 * data FIFO when the received payload size is less than
971 * or equal to 8DWS then the RxDmaDataFifoRdUncErr is
972 * not reported.There is set RHF.EccErr if the header
977 "Request has data but pkt len is 0");
980 } else if (datalen <= 32) {
981 tx->flags |= TXREQ_FLAGS_REQ_DISABLE_SH;
985 if (req->ahg_idx >= 0) {
987 u16 pbclen = le16_to_cpu(req->hdr.pbc[0]);
988 u32 lrhlen = get_lrh_len(req->hdr,
991 * Copy the request header into the tx header
992 * because the HW needs a cacheline-aligned
994 * This copy can be optimized out if the hdr
995 * member of user_sdma_request were also
998 memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr));
999 if (PBC2LRH(pbclen) != lrhlen) {
1000 pbclen = (pbclen & 0xf000) |
1002 tx->hdr.pbc[0] = cpu_to_le16(pbclen);
1004 ret = check_header_template(req, &tx->hdr,
1008 ret = sdma_txinit_ahg(&tx->txreq,
1009 SDMA_TXREQ_F_AHG_COPY,
1010 sizeof(tx->hdr) + datalen,
1011 req->ahg_idx, 0, NULL, 0,
1012 user_sdma_txreq_cb);
1015 ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq,
1023 changes = set_txreq_header_ahg(req, tx,
1027 sdma_txinit_ahg(&tx->txreq,
1028 SDMA_TXREQ_F_USE_AHG,
1029 datalen, req->ahg_idx, changes,
1030 req->ahg, sizeof(req->hdr),
1031 user_sdma_txreq_cb);
1034 ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) +
1035 datalen, user_sdma_txreq_cb);
1039 * Modify the header for this packet. This only needs
1040 * to be done if we are not going to use AHG. Otherwise,
1041 * the HW will do it based on the changes we gave it
1042 * during sdma_txinit_ahg().
1044 ret = set_txreq_header(req, tx, datalen);
1050 * If the request contains any data vectors, add up to
1051 * fragsize bytes to the descriptor.
1053 while (queued < datalen &&
1054 (req->sent + data_sent) < req->data_len) {
1055 unsigned long base, offset;
1056 unsigned pageidx, len;
1058 base = (unsigned long)iovec->iov.iov_base;
1059 offset = offset_in_page(base + iovec->offset +
1061 pageidx = (((iovec->offset + iov_offset +
1062 base) - (base & PAGE_MASK)) >> PAGE_SHIFT);
1063 len = offset + req->info.fragsize > PAGE_SIZE ?
1064 PAGE_SIZE - offset : req->info.fragsize;
1065 len = min((datalen - queued), len);
1066 ret = sdma_txadd_page(pq->dd, &tx->txreq,
1067 iovec->pages[pageidx],
1070 SDMA_DBG(req, "SDMA txreq add page failed %d\n",
1077 if (unlikely(queued < datalen &&
1078 pageidx == iovec->npages &&
1079 req->iov_idx < req->data_iovs - 1)) {
1080 iovec->offset += iov_offset;
1081 iovec = &req->iovs[++req->iov_idx];
1086 * The txreq was submitted successfully so we can update
1089 req->koffset += datalen;
1090 if (req_opcode(req->info.ctrl) == EXPECTED)
1091 req->tidoffset += datalen;
1092 req->sent += data_sent;
1094 iovec->offset += iov_offset;
1095 list_add_tail(&tx->txreq.list, &req->txps);
1097 * It is important to increment this here as it is used to
1098 * generate the BTH.PSN and, therefore, can't be bulk-updated
1099 * outside of the loop.
1101 tx->seqnum = req->seqnum++;
1105 ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps, &count);
1106 req->seqsubmitted += count;
1107 if (req->seqsubmitted == req->info.npkts) {
1108 set_bit(SDMA_REQ_SEND_DONE, &req->flags);
1110 * The txreq has already been submitted to the HW queue
1111 * so we can free the AHG entry now. Corruption will not
1112 * happen due to the sequential manner in which
1113 * descriptors are processed.
1115 if (req->ahg_idx >= 0)
1116 sdma_ahg_free(req->sde, req->ahg_idx);
1121 sdma_txclean(pq->dd, &tx->txreq);
1123 kmem_cache_free(pq->txreq_cache, tx);
1128 * How many pages in this iovec element?
1130 static inline int num_user_pages(const struct iovec *iov)
1132 const unsigned long addr = (unsigned long)iov->iov_base;
1133 const unsigned long len = iov->iov_len;
1134 const unsigned long spage = addr & PAGE_MASK;
1135 const unsigned long epage = (addr + len - 1) & PAGE_MASK;
1137 return 1 + ((epage - spage) >> PAGE_SHIFT);
1140 static u32 sdma_cache_evict(struct hfi1_user_sdma_pkt_q *pq, u32 npages)
1142 struct evict_data evict_data;
1144 evict_data.cleared = 0;
1145 evict_data.target = npages;
1146 hfi1_mmu_rb_evict(pq->handler, &evict_data);
1147 return evict_data.cleared;
1150 static int pin_vector_pages(struct user_sdma_request *req,
1151 struct user_sdma_iovec *iovec)
1153 int ret = 0, pinned, npages, cleared;
1154 struct page **pages;
1155 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1156 struct sdma_mmu_node *node = NULL;
1157 struct mmu_rb_node *rb_node;
1159 rb_node = hfi1_mmu_rb_extract(pq->handler,
1160 (unsigned long)iovec->iov.iov_base,
1161 iovec->iov.iov_len);
1163 node = container_of(rb_node, struct sdma_mmu_node, rb);
1168 node = kzalloc(sizeof(*node), GFP_KERNEL);
1172 node->rb.addr = (unsigned long)iovec->iov.iov_base;
1174 atomic_set(&node->refcount, 0);
1177 npages = num_user_pages(&iovec->iov);
1178 if (node->npages < npages) {
1179 pages = kcalloc(npages, sizeof(*pages), GFP_KERNEL);
1181 SDMA_DBG(req, "Failed page array alloc");
1185 memcpy(pages, node->pages, node->npages * sizeof(*pages));
1187 npages -= node->npages;
1190 if (!hfi1_can_pin_pages(pq->dd, pq->mm,
1191 atomic_read(&pq->n_locked), npages)) {
1192 cleared = sdma_cache_evict(pq, npages);
1193 if (cleared >= npages)
1196 pinned = hfi1_acquire_user_pages(pq->mm,
1197 ((unsigned long)iovec->iov.iov_base +
1198 (node->npages * PAGE_SIZE)), npages, 0,
1199 pages + node->npages);
1205 if (pinned != npages) {
1206 unpin_vector_pages(pq->mm, pages, node->npages,
1212 node->rb.len = iovec->iov.iov_len;
1213 node->pages = pages;
1214 node->npages += pinned;
1215 npages = node->npages;
1216 atomic_add(pinned, &pq->n_locked);
1218 iovec->pages = node->pages;
1219 iovec->npages = npages;
1222 ret = hfi1_mmu_rb_insert(req->pq->handler, &node->rb);
1224 atomic_sub(node->npages, &pq->n_locked);
1231 unpin_vector_pages(pq->mm, node->pages, 0, node->npages);
1236 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
1237 unsigned start, unsigned npages)
1239 hfi1_release_user_pages(mm, pages + start, npages, false);
1243 static int check_header_template(struct user_sdma_request *req,
1244 struct hfi1_pkt_header *hdr, u32 lrhlen,
1248 * Perform safety checks for any type of packet:
1249 * - transfer size is multiple of 64bytes
1250 * - packet length is multiple of 4 bytes
1251 * - packet length is not larger than MTU size
1253 * These checks are only done for the first packet of the
1254 * transfer since the header is "given" to us by user space.
1255 * For the remainder of the packets we compute the values.
1257 if (req->info.fragsize % PIO_BLOCK_SIZE || lrhlen & 0x3 ||
1258 lrhlen > get_lrh_len(*hdr, req->info.fragsize))
1261 if (req_opcode(req->info.ctrl) == EXPECTED) {
1263 * The header is checked only on the first packet. Furthermore,
1264 * we ensure that at least one TID entry is copied when the
1265 * request is submitted. Therefore, we don't have to verify that
1266 * tididx points to something sane.
1268 u32 tidval = req->tids[req->tididx],
1269 tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE,
1270 tididx = EXP_TID_GET(tidval, IDX),
1271 tidctrl = EXP_TID_GET(tidval, CTRL),
1273 __le32 kval = hdr->kdeth.ver_tid_offset;
1275 tidoff = KDETH_GET(kval, OFFSET) *
1276 (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ?
1277 KDETH_OM_LARGE : KDETH_OM_SMALL);
1279 * Expected receive packets have the following
1280 * additional checks:
1281 * - offset is not larger than the TID size
1282 * - TIDCtrl values match between header and TID array
1283 * - TID indexes match between header and TID array
1285 if ((tidoff + datalen > tidlen) ||
1286 KDETH_GET(kval, TIDCTRL) != tidctrl ||
1287 KDETH_GET(kval, TID) != tididx)
1294 * Correctly set the BTH.PSN field based on type of
1295 * transfer - eager packets can just increment the PSN but
1296 * expected packets encode generation and sequence in the
1297 * BTH.PSN field so just incrementing will result in errors.
1299 static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags)
1301 u32 val = be32_to_cpu(bthpsn),
1302 mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull :
1306 psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);
1312 static int set_txreq_header(struct user_sdma_request *req,
1313 struct user_sdma_txreq *tx, u32 datalen)
1315 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1316 struct hfi1_pkt_header *hdr = &tx->hdr;
1317 u8 omfactor; /* KDETH.OM */
1320 u32 tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(datalen));
1322 /* Copy the header template to the request before modification */
1323 memcpy(hdr, &req->hdr, sizeof(*hdr));
1326 * Check if the PBC and LRH length are mismatched. If so
1327 * adjust both in the header.
1329 pbclen = le16_to_cpu(hdr->pbc[0]);
1330 if (PBC2LRH(pbclen) != lrhlen) {
1331 pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen);
1332 hdr->pbc[0] = cpu_to_le16(pbclen);
1333 hdr->lrh[2] = cpu_to_be16(lrhlen >> 2);
1336 * This is the first packet in the sequence that has
1337 * a "static" size that can be used for the rest of
1338 * the packets (besides the last one).
1340 if (unlikely(req->seqnum == 2)) {
1342 * From this point on the lengths in both the
1343 * PBC and LRH are the same until the last
1345 * Adjust the template so we don't have to update
1348 req->hdr.pbc[0] = hdr->pbc[0];
1349 req->hdr.lrh[2] = hdr->lrh[2];
1353 * We only have to modify the header if this is not the
1354 * first packet in the request. Otherwise, we use the
1355 * header given to us.
1357 if (unlikely(!req->seqnum)) {
1358 ret = check_header_template(req, hdr, lrhlen, datalen);
1364 hdr->bth[2] = cpu_to_be32(
1365 set_pkt_bth_psn(hdr->bth[2],
1366 (req_opcode(req->info.ctrl) == EXPECTED),
1369 /* Set ACK request on last packet */
1370 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1371 hdr->bth[2] |= cpu_to_be32(1UL << 31);
1373 /* Set the new offset */
1374 hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset);
1375 /* Expected packets have to fill in the new TID information */
1376 if (req_opcode(req->info.ctrl) == EXPECTED) {
1377 tidval = req->tids[req->tididx];
1379 * If the offset puts us at the end of the current TID,
1380 * advance everything.
1382 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1386 * Since we don't copy all the TIDs, all at once,
1387 * we have to check again.
1389 if (++req->tididx > req->n_tids - 1 ||
1390 !req->tids[req->tididx]) {
1393 tidval = req->tids[req->tididx];
1395 omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >=
1396 KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE_SHIFT :
1397 KDETH_OM_SMALL_SHIFT;
1398 /* Set KDETH.TIDCtrl based on value for this TID. */
1399 KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL,
1400 EXP_TID_GET(tidval, CTRL));
1401 /* Set KDETH.TID based on value for this TID */
1402 KDETH_SET(hdr->kdeth.ver_tid_offset, TID,
1403 EXP_TID_GET(tidval, IDX));
1404 /* Clear KDETH.SH when DISABLE_SH flag is set */
1405 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH))
1406 KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0);
1408 * Set the KDETH.OFFSET and KDETH.OM based on size of
1411 SDMA_DBG(req, "TID offset %ubytes %uunits om%u",
1412 req->tidoffset, req->tidoffset >> omfactor,
1413 omfactor != KDETH_OM_SMALL_SHIFT);
1414 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1415 req->tidoffset >> omfactor);
1416 KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1417 omfactor != KDETH_OM_SMALL_SHIFT);
1420 trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,
1421 req->info.comp_idx, hdr, tidval);
1422 return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr));
1425 static int set_txreq_header_ahg(struct user_sdma_request *req,
1426 struct user_sdma_txreq *tx, u32 len)
1429 u8 omfactor; /* KDETH.OM */
1430 struct hfi1_user_sdma_pkt_q *pq = req->pq;
1431 struct hfi1_pkt_header *hdr = &req->hdr;
1432 u16 pbclen = le16_to_cpu(hdr->pbc[0]);
1433 u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, pad_len(len));
1435 if (PBC2LRH(pbclen) != lrhlen) {
1436 /* PBC.PbcLengthDWs */
1437 AHG_HEADER_SET(req->ahg, diff, 0, 0, 12,
1438 cpu_to_le16(LRH2PBC(lrhlen)));
1439 /* LRH.PktLen (we need the full 16 bits due to byte swap) */
1440 AHG_HEADER_SET(req->ahg, diff, 3, 0, 16,
1441 cpu_to_be16(lrhlen >> 2));
1445 * Do the common updates
1447 /* BTH.PSN and BTH.A */
1448 val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) &
1449 (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff);
1450 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_ACK))
1452 AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16));
1453 AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff));
1455 AHG_HEADER_SET(req->ahg, diff, 15, 0, 16,
1456 cpu_to_le16(req->koffset & 0xffff));
1457 AHG_HEADER_SET(req->ahg, diff, 15, 16, 16,
1458 cpu_to_le16(req->koffset >> 16));
1459 if (req_opcode(req->info.ctrl) == EXPECTED) {
1462 tidval = req->tids[req->tididx];
1465 * If the offset puts us at the end of the current TID,
1466 * advance everything.
1468 if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) *
1472 * Since we don't copy all the TIDs, all at once,
1473 * we have to check again.
1475 if (++req->tididx > req->n_tids - 1 ||
1476 !req->tids[req->tididx]) {
1479 tidval = req->tids[req->tididx];
1481 omfactor = ((EXP_TID_GET(tidval, LEN) *
1483 KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE_SHIFT :
1484 KDETH_OM_SMALL_SHIFT;
1485 /* KDETH.OM and KDETH.OFFSET (TID) */
1486 AHG_HEADER_SET(req->ahg, diff, 7, 0, 16,
1487 ((!!(omfactor - KDETH_OM_SMALL_SHIFT)) << 15 |
1488 ((req->tidoffset >> omfactor)
1490 /* KDETH.TIDCtrl, KDETH.TID, KDETH.Intr, KDETH.SH */
1491 val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) |
1492 (EXP_TID_GET(tidval, IDX) & 0x3ff));
1494 if (unlikely(tx->flags & TXREQ_FLAGS_REQ_DISABLE_SH)) {
1495 val |= cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1497 AHG_KDETH_INTR_SHIFT));
1499 val |= KDETH_GET(hdr->kdeth.ver_tid_offset, SH) ?
1500 cpu_to_le16(0x1 << AHG_KDETH_SH_SHIFT) :
1501 cpu_to_le16((KDETH_GET(hdr->kdeth.ver_tid_offset,
1503 AHG_KDETH_INTR_SHIFT));
1506 AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val);
1509 trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt,
1510 req->info.comp_idx, req->sde->this_idx,
1511 req->ahg_idx, req->ahg, diff, tidval);
1516 * SDMA tx request completion callback. Called when the SDMA progress
1517 * state machine gets notification that the SDMA descriptors for this
1518 * tx request have been processed by the DMA engine. Called in
1519 * interrupt context.
1521 static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status)
1523 struct user_sdma_txreq *tx =
1524 container_of(txreq, struct user_sdma_txreq, txreq);
1525 struct user_sdma_request *req;
1526 struct hfi1_user_sdma_pkt_q *pq;
1527 struct hfi1_user_sdma_comp_q *cq;
1537 if (status != SDMA_TXREQ_S_OK) {
1538 SDMA_DBG(req, "SDMA completion with error %d",
1540 set_bit(SDMA_REQ_HAS_ERROR, &req->flags);
1543 req->seqcomp = tx->seqnum;
1544 kmem_cache_free(pq->txreq_cache, tx);
1547 idx = req->info.comp_idx;
1548 if (req->status == -1 && status == SDMA_TXREQ_S_OK) {
1549 if (req->seqcomp == req->info.npkts - 1) {
1551 user_sdma_free_request(req, false);
1553 set_comp_state(pq, cq, idx, COMPLETE, 0);
1556 if (status != SDMA_TXREQ_S_OK)
1557 req->status = status;
1558 if (req->seqcomp == (ACCESS_ONCE(req->seqsubmitted) - 1) &&
1559 (test_bit(SDMA_REQ_SEND_DONE, &req->flags) ||
1560 test_bit(SDMA_REQ_DONE_ERROR, &req->flags))) {
1561 user_sdma_free_request(req, false);
1563 set_comp_state(pq, cq, idx, ERROR, req->status);
1568 static inline void pq_update(struct hfi1_user_sdma_pkt_q *pq)
1570 if (atomic_dec_and_test(&pq->n_reqs)) {
1571 xchg(&pq->state, SDMA_PKT_Q_INACTIVE);
1576 static void user_sdma_free_request(struct user_sdma_request *req, bool unpin)
1578 if (!list_empty(&req->txps)) {
1579 struct sdma_txreq *t, *p;
1581 list_for_each_entry_safe(t, p, &req->txps, list) {
1582 struct user_sdma_txreq *tx =
1583 container_of(t, struct user_sdma_txreq, txreq);
1584 list_del_init(&t->list);
1585 sdma_txclean(req->pq->dd, t);
1586 kmem_cache_free(req->pq->txreq_cache, tx);
1589 if (req->data_iovs) {
1590 struct sdma_mmu_node *node;
1593 for (i = 0; i < req->data_iovs; i++) {
1594 node = req->iovs[i].node;
1599 hfi1_mmu_rb_remove(req->pq->handler,
1602 atomic_dec(&node->refcount);
1606 clear_bit(req->info.comp_idx, req->pq->req_in_use);
1609 static inline void set_comp_state(struct hfi1_user_sdma_pkt_q *pq,
1610 struct hfi1_user_sdma_comp_q *cq,
1611 u16 idx, enum hfi1_sdma_comp_state state,
1614 hfi1_cdbg(SDMA, "[%u:%u:%u:%u] Setting completion status %u %d",
1615 pq->dd->unit, pq->ctxt, pq->subctxt, idx, state, ret);
1617 cq->comps[idx].errcode = -ret;
1618 smp_wmb(); /* make sure errcode is visible first */
1619 cq->comps[idx].status = state;
1620 trace_hfi1_sdma_user_completion(pq->dd, pq->ctxt, pq->subctxt,
1624 static bool sdma_rb_filter(struct mmu_rb_node *node, unsigned long addr,
1627 return (bool)(node->addr == addr);
1630 static int sdma_rb_insert(void *arg, struct mmu_rb_node *mnode)
1632 struct sdma_mmu_node *node =
1633 container_of(mnode, struct sdma_mmu_node, rb);
1635 atomic_inc(&node->refcount);
1640 * Return 1 to remove the node from the rb tree and call the remove op.
1642 * Called with the rb tree lock held.
1644 static int sdma_rb_evict(void *arg, struct mmu_rb_node *mnode,
1645 void *evict_arg, bool *stop)
1647 struct sdma_mmu_node *node =
1648 container_of(mnode, struct sdma_mmu_node, rb);
1649 struct evict_data *evict_data = evict_arg;
1651 /* is this node still being used? */
1652 if (atomic_read(&node->refcount))
1653 return 0; /* keep this node */
1655 /* this node will be evicted, add its pages to our count */
1656 evict_data->cleared += node->npages;
1658 /* have enough pages been cleared? */
1659 if (evict_data->cleared >= evict_data->target)
1662 return 1; /* remove this node */
1665 static void sdma_rb_remove(void *arg, struct mmu_rb_node *mnode)
1667 struct sdma_mmu_node *node =
1668 container_of(mnode, struct sdma_mmu_node, rb);
1670 atomic_sub(node->npages, &node->pq->n_locked);
1672 unpin_vector_pages(node->pq->mm, node->pages, 0, node->npages);
1677 static int sdma_rb_invalidate(void *arg, struct mmu_rb_node *mnode)
1679 struct sdma_mmu_node *node =
1680 container_of(mnode, struct sdma_mmu_node, rb);
1682 if (!atomic_read(&node->refcount))