drivers/infiniband/hw/cxgb4/ev.c

   1 /*
   2  * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32 #include <linux/slab.h>
  33 #include <linux/mman.h>
  34 #include <net/sock.h>
  35
  36 #include "iw_cxgb4.h"
  37
  38 static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp,
  39                           struct c4iw_qp *qhp,
  40                           struct t4_cqe *err_cqe,
  41                           enum ib_event_type ib_event)
  42 {
  43         struct ib_event event;
  44         struct c4iw_qp_attributes attrs;
  45         unsigned long flag;
  46
  47         if ((qhp->attr.state == C4IW_QP_STATE_ERROR) ||
  48             (qhp->attr.state == C4IW_QP_STATE_TERMINATE)) {
  49                 PDBG("%s AE received after RTS - "
  50                      "qp state %d qpid 0x%x status 0x%x\n", __func__,
  51                      qhp->attr.state, qhp->wq.sq.qid, CQE_STATUS(err_cqe));
  52                 return;
  53         }
  54
  55         printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "
  56                "type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  57                CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),
  58                CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),
  59                CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));
  60
  61         if (qhp->attr.state == C4IW_QP_STATE_RTS) {
  62                 attrs.next_state = C4IW_QP_STATE_TERMINATE;
  63                 c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,
  64                                &attrs, 0);
  65         }
  66
  67         event.event = ib_event;
  68         event.device = chp->ibcq.device;
  69         if (ib_event == IB_EVENT_CQ_ERR)
  70                 event.element.cq = &chp->ibcq;
  71         else
  72                 event.element.qp = &qhp->ibqp;
  73         if (qhp->ibqp.event_handler)
  74                 (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);
  75
  76         spin_lock_irqsave(&chp->comp_handler_lock, flag);
  77         (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
  78         spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
  79 }
  80
  81 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)
  82 {
  83         struct c4iw_cq *chp;
  84         struct c4iw_qp *qhp;
  85         u32 cqid;
  86
  87         spin_lock_irq(&dev->lock);
  88         qhp = get_qhp(dev, CQE_QPID(err_cqe));
  89         if (!qhp) {
  90                 printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "
  91                        "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  92                        CQE_QPID(err_cqe),
  93                        CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
  94                        CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
  95                        CQE_WRID_LOW(err_cqe));
  96                 spin_unlock_irq(&dev->lock);
  97                 goto out;
  98         }
  99
 100         if (SQ_TYPE(err_cqe))
 101                 cqid = qhp->attr.scq;
 102         else
 103                 cqid = qhp->attr.rcq;
 104         chp = get_chp(dev, cqid);
 105         if (!chp) {
 106                 printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "
 107                        "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
 108                        cqid, CQE_QPID(err_cqe),
 109                        CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
 110                        CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
 111                        CQE_WRID_LOW(err_cqe));
 112                 spin_unlock_irq(&dev->lock);
 113                 goto out;
 114         }
 115
 116         c4iw_qp_add_ref(&qhp->ibqp);
 117         atomic_inc(&chp->refcnt);
 118         spin_unlock_irq(&dev->lock);
 119
 120         /* Bad incoming write */
 121         if (RQ_TYPE(err_cqe) &&
 122             (CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {
 123                 post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);
 124                 goto done;
 125         }
 126
 127         switch (CQE_STATUS(err_cqe)) {
 128
 129         /* Completion Events */
 130         case T4_ERR_SUCCESS:
 131                 printk(KERN_ERR MOD "AE with status 0!\n");
 132                 break;
 133
 134         case T4_ERR_STAG:
 135         case T4_ERR_PDID:
 136         case T4_ERR_QPID:
 137         case T4_ERR_ACCESS:
 138         case T4_ERR_WRAP:
 139         case T4_ERR_BOUND:
 140         case T4_ERR_INVALIDATE_SHARED_MR:
 141         case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
 142                 post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);
 143                 break;
 144
 145         /* Device Fatal Errors */
 146         case T4_ERR_ECC:
 147         case T4_ERR_ECC_PSTAG:
 148         case T4_ERR_INTERNAL_ERR:
 149                 post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);
 150                 break;
 151
 152         /* QP Fatal Errors */
 153         case T4_ERR_OUT_OF_RQE:
 154         case T4_ERR_PBL_ADDR_BOUND:
 155         case T4_ERR_CRC:
 156         case T4_ERR_MARKER:
 157         case T4_ERR_PDU_LEN_ERR:
 158         case T4_ERR_DDP_VERSION:
 159         case T4_ERR_RDMA_VERSION:
 160         case T4_ERR_OPCODE:
 161         case T4_ERR_DDP_QUEUE_NUM:
 162         case T4_ERR_MSN:
 163         case T4_ERR_TBIT:
 164         case T4_ERR_MO:
 165         case T4_ERR_MSN_GAP:
 166         case T4_ERR_MSN_RANGE:
 167         case T4_ERR_RQE_ADDR_BOUND:
 168         case T4_ERR_IRD_OVERFLOW:
 169                 post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
 170                 break;
 171
 172         default:
 173                 printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",
 174                        CQE_STATUS(err_cqe), qhp->wq.sq.qid);
 175                 post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
 176                 break;
 177         }
 178 done:
 179         if (atomic_dec_and_test(&chp->refcnt))
 180                 wake_up(&chp->wait);
 181         c4iw_qp_rem_ref(&qhp->ibqp);
 182 out:
 183         return;
 184 }
 185
 186 int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
 187 {
 188         struct c4iw_cq *chp;
 189         unsigned long flag;
 190
 191         chp = get_chp(dev, qid);
 192         if (chp) {
 193                 spin_lock_irqsave(&chp->comp_handler_lock, flag);
 194                 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
 195                 spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
 196         } else
 197                 PDBG("%s unknown cqid 0x%x\n", __func__, qid);
 198         return 0;
 199 }