Merge 6.4-rc5 into usb-next
[platform/kernel/linux-starfive.git] / drivers / infiniband / hw / bnxt_re / main.c
1 /*
2  * Broadcom NetXtreme-E RoCE driver.
3  *
4  * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
5  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  *
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in
21  *    the documentation and/or other materials provided with the
22  *    distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *
36  * Description: Main component of the bnxt_re driver
37  */
38
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
48 #include <net/ipv6.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
51 #include <linux/auxiliary_bus.h>
52
53 #include <rdma/ib_verbs.h>
54 #include <rdma/ib_user_verbs.h>
55 #include <rdma/ib_umem.h>
56 #include <rdma/ib_addr.h>
57
58 #include "bnxt_ulp.h"
59 #include "roce_hsi.h"
60 #include "qplib_res.h"
61 #include "qplib_sp.h"
62 #include "qplib_fp.h"
63 #include "qplib_rcfw.h"
64 #include "bnxt_re.h"
65 #include "ib_verbs.h"
66 #include <rdma/bnxt_re-abi.h>
67 #include "bnxt.h"
68 #include "hw_counters.h"
69
70 static char version[] =
71                 BNXT_RE_DESC "\n";
72
73 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
74 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
75 MODULE_LICENSE("Dual BSD/GPL");
76
77 /* globals */
78 static DEFINE_MUTEX(bnxt_re_mutex);
79
80 static void bnxt_re_stop_irq(void *handle);
81 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev);
82 static int bnxt_re_netdev_event(struct notifier_block *notifier,
83                                 unsigned long event, void *ptr);
84 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev);
85 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev);
86
87 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
88 {
89         struct bnxt_qplib_chip_ctx *cctx;
90
91         cctx = rdev->chip_ctx;
92         cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
93                                mode : BNXT_QPLIB_WQE_MODE_STATIC;
94 }
95
96 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
97 {
98         struct bnxt_qplib_chip_ctx *chip_ctx;
99
100         if (!rdev->chip_ctx)
101                 return;
102         chip_ctx = rdev->chip_ctx;
103         rdev->chip_ctx = NULL;
104         rdev->rcfw.res = NULL;
105         rdev->qplib_res.cctx = NULL;
106         rdev->qplib_res.pdev = NULL;
107         rdev->qplib_res.netdev = NULL;
108         kfree(chip_ctx);
109 }
110
111 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
112 {
113         struct bnxt_qplib_chip_ctx *chip_ctx;
114         struct bnxt_en_dev *en_dev;
115
116         en_dev = rdev->en_dev;
117
118         chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
119         if (!chip_ctx)
120                 return -ENOMEM;
121         chip_ctx->chip_num = en_dev->chip_num;
122         chip_ctx->hw_stats_size = en_dev->hw_ring_stats_size;
123
124         rdev->chip_ctx = chip_ctx;
125         /* rest members to follow eventually */
126
127         rdev->qplib_res.cctx = rdev->chip_ctx;
128         rdev->rcfw.res = &rdev->qplib_res;
129         rdev->qplib_res.dattr = &rdev->dev_attr;
130         rdev->qplib_res.is_vf = BNXT_EN_VF(en_dev);
131
132         bnxt_re_set_drv_mode(rdev, wqe_mode);
133         if (bnxt_qplib_determine_atomics(en_dev->pdev))
134                 ibdev_info(&rdev->ibdev,
135                            "platform doesn't support global atomics.");
136         return 0;
137 }
138
139 /* SR-IOV helper functions */
140
141 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
142 {
143         if (BNXT_EN_VF(rdev->en_dev))
144                 rdev->is_virtfn = 1;
145 }
146
147 /* Set the maximum number of each resource that the driver actually wants
148  * to allocate. This may be up to the maximum number the firmware has
149  * reserved for the function. The driver may choose to allocate fewer
150  * resources than the firmware maximum.
151  */
152 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
153 {
154         struct bnxt_qplib_dev_attr *attr;
155         struct bnxt_qplib_ctx *ctx;
156         int i;
157
158         attr = &rdev->dev_attr;
159         ctx = &rdev->qplib_ctx;
160
161         ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
162                                attr->max_qp);
163         ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
164         /* Use max_mr from fw since max_mrw does not get set */
165         ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr);
166         ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
167                                 attr->max_srq);
168         ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
169         if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
170                 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
171                         rdev->qplib_ctx.tqm_ctx.qcount[i] =
172                         rdev->dev_attr.tqm_alloc_reqs[i];
173 }
174
175 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf)
176 {
177         struct bnxt_qplib_vf_res *vf_res;
178         u32 mrws = 0;
179         u32 vf_pct;
180         u32 nvfs;
181
182         vf_res = &qplib_ctx->vf_res;
183         /*
184          * Reserve a set of resources for the PF. Divide the remaining
185          * resources among the VFs
186          */
187         vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
188         nvfs = num_vf;
189         num_vf = 100 * num_vf;
190         vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf;
191         vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf;
192         vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf;
193         /*
194          * The driver allows many more MRs than other resources. If the
195          * firmware does also, then reserve a fixed amount for the PF and
196          * divide the rest among VFs. VFs may use many MRs for NFS
197          * mounts, ISER, NVME applications, etc. If the firmware severely
198          * restricts the number of MRs, then let PF have half and divide
199          * the rest among VFs, as for the other resource types.
200          */
201         if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) {
202                 mrws = qplib_ctx->mrw_count * vf_pct;
203                 nvfs = num_vf;
204         } else {
205                 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF;
206         }
207         vf_res->max_mrw_per_vf = (mrws / nvfs);
208         vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF;
209 }
210
211 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
212 {
213         u32 num_vfs;
214
215         memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
216         bnxt_re_limit_pf_res(rdev);
217
218         num_vfs =  bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
219                         BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
220         if (num_vfs)
221                 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
222 }
223
224 static void bnxt_re_vf_res_config(struct bnxt_re_dev *rdev)
225 {
226
227         if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
228                 return;
229         rdev->num_vfs = pci_sriov_get_totalvfs(rdev->en_dev->pdev);
230         if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
231                 bnxt_re_set_resource_limits(rdev);
232                 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
233                                               &rdev->qplib_ctx);
234         }
235 }
236
237 static void bnxt_re_shutdown(struct auxiliary_device *adev)
238 {
239         struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
240
241         if (!rdev)
242                 return;
243         ib_unregister_device(&rdev->ibdev);
244         bnxt_re_dev_uninit(rdev);
245 }
246
247 static void bnxt_re_stop_irq(void *handle)
248 {
249         struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
250         struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
251         struct bnxt_qplib_nq *nq;
252         int indx;
253
254         for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
255                 nq = &rdev->nq[indx - 1];
256                 bnxt_qplib_nq_stop_irq(nq, false);
257         }
258
259         bnxt_qplib_rcfw_stop_irq(rcfw, false);
260 }
261
262 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
263 {
264         struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
265         struct bnxt_msix_entry *msix_ent = rdev->en_dev->msix_entries;
266         struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
267         struct bnxt_qplib_nq *nq;
268         int indx, rc;
269
270         if (!ent) {
271                 /* Not setting the f/w timeout bit in rcfw.
272                  * During the driver unload the first command
273                  * to f/w will timeout and that will set the
274                  * timeout bit.
275                  */
276                 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n");
277                 return;
278         }
279
280         /* Vectors may change after restart, so update with new vectors
281          * in device sctructure.
282          */
283         for (indx = 0; indx < rdev->num_msix; indx++)
284                 rdev->en_dev->msix_entries[indx].vector = ent[indx].vector;
285
286         bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
287                                   false);
288         for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
289                 nq = &rdev->nq[indx - 1];
290                 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
291                                              msix_ent[indx].vector, false);
292                 if (rc)
293                         ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n",
294                                    indx - 1);
295         }
296 }
297
298 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
299         .ulp_irq_stop = bnxt_re_stop_irq,
300         .ulp_irq_restart = bnxt_re_start_irq
301 };
302
303 /* RoCE -> Net driver */
304
305 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
306 {
307         struct bnxt_en_dev *en_dev;
308         int rc = 0;
309
310         en_dev = rdev->en_dev;
311
312         rc = bnxt_register_dev(en_dev, &bnxt_re_ulp_ops, rdev);
313         if (!rc)
314                 rdev->qplib_res.pdev = rdev->en_dev->pdev;
315         return rc;
316 }
317
318 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
319                                   u16 opcd, u16 crid, u16 trid)
320 {
321         hdr->req_type = cpu_to_le16(opcd);
322         hdr->cmpl_ring = cpu_to_le16(crid);
323         hdr->target_id = cpu_to_le16(trid);
324 }
325
326 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
327                                 int msg_len, void *resp, int resp_max_len,
328                                 int timeout)
329 {
330         fw_msg->msg = msg;
331         fw_msg->msg_len = msg_len;
332         fw_msg->resp = resp;
333         fw_msg->resp_max_len = resp_max_len;
334         fw_msg->timeout = timeout;
335 }
336
337 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
338                                  u16 fw_ring_id, int type)
339 {
340         struct bnxt_en_dev *en_dev;
341         struct hwrm_ring_free_input req = {0};
342         struct hwrm_ring_free_output resp;
343         struct bnxt_fw_msg fw_msg;
344         int rc = -EINVAL;
345
346         if (!rdev)
347                 return rc;
348
349         en_dev = rdev->en_dev;
350
351         if (!en_dev)
352                 return rc;
353
354         if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
355                 return 0;
356
357         memset(&fw_msg, 0, sizeof(fw_msg));
358
359         bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
360         req.ring_type = type;
361         req.ring_id = cpu_to_le16(fw_ring_id);
362         bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
363                             sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
364         rc = bnxt_send_msg(en_dev, &fw_msg);
365         if (rc)
366                 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x",
367                           req.ring_id, rc);
368         return rc;
369 }
370
371 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev,
372                                   struct bnxt_re_ring_attr *ring_attr,
373                                   u16 *fw_ring_id)
374 {
375         struct bnxt_en_dev *en_dev = rdev->en_dev;
376         struct hwrm_ring_alloc_input req = {0};
377         struct hwrm_ring_alloc_output resp;
378         struct bnxt_fw_msg fw_msg;
379         int rc = -EINVAL;
380
381         if (!en_dev)
382                 return rc;
383
384         memset(&fw_msg, 0, sizeof(fw_msg));
385         bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
386         req.enables = 0;
387         req.page_tbl_addr =  cpu_to_le64(ring_attr->dma_arr[0]);
388         if (ring_attr->pages > 1) {
389                 /* Page size is in log2 units */
390                 req.page_size = BNXT_PAGE_SHIFT;
391                 req.page_tbl_depth = 1;
392         }
393         req.fbo = 0;
394         /* Association of ring index with doorbell index and MSIX number */
395         req.logical_id = cpu_to_le16(ring_attr->lrid);
396         req.length = cpu_to_le32(ring_attr->depth + 1);
397         req.ring_type = ring_attr->type;
398         req.int_mode = ring_attr->mode;
399         bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
400                             sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
401         rc = bnxt_send_msg(en_dev, &fw_msg);
402         if (!rc)
403                 *fw_ring_id = le16_to_cpu(resp.ring_id);
404
405         return rc;
406 }
407
408 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
409                                       u32 fw_stats_ctx_id)
410 {
411         struct bnxt_en_dev *en_dev = rdev->en_dev;
412         struct hwrm_stat_ctx_free_input req = {};
413         struct hwrm_stat_ctx_free_output resp = {};
414         struct bnxt_fw_msg fw_msg;
415         int rc = -EINVAL;
416
417         if (!en_dev)
418                 return rc;
419
420         if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags))
421                 return 0;
422
423         memset(&fw_msg, 0, sizeof(fw_msg));
424
425         bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
426         req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
427         bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
428                             sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
429         rc = bnxt_send_msg(en_dev, &fw_msg);
430         if (rc)
431                 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x",
432                           rc);
433
434         return rc;
435 }
436
437 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
438                                        dma_addr_t dma_map,
439                                        u32 *fw_stats_ctx_id)
440 {
441         struct bnxt_qplib_chip_ctx *chip_ctx = rdev->chip_ctx;
442         struct hwrm_stat_ctx_alloc_output resp = {0};
443         struct hwrm_stat_ctx_alloc_input req = {0};
444         struct bnxt_en_dev *en_dev = rdev->en_dev;
445         struct bnxt_fw_msg fw_msg;
446         int rc = -EINVAL;
447
448         *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
449
450         if (!en_dev)
451                 return rc;
452
453         memset(&fw_msg, 0, sizeof(fw_msg));
454
455         bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
456         req.update_period_ms = cpu_to_le32(1000);
457         req.stats_dma_addr = cpu_to_le64(dma_map);
458         req.stats_dma_length = cpu_to_le16(chip_ctx->hw_stats_size);
459         req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
460         bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
461                             sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
462         rc = bnxt_send_msg(en_dev, &fw_msg);
463         if (!rc)
464                 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
465
466         return rc;
467 }
468
469 /* Device */
470
471 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
472 {
473         struct ib_device *ibdev =
474                 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE);
475         if (!ibdev)
476                 return NULL;
477
478         return container_of(ibdev, struct bnxt_re_dev, ibdev);
479 }
480
481 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
482                            char *buf)
483 {
484         struct bnxt_re_dev *rdev =
485                 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
486
487         return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
488 }
489 static DEVICE_ATTR_RO(hw_rev);
490
491 static ssize_t hca_type_show(struct device *device,
492                              struct device_attribute *attr, char *buf)
493 {
494         struct bnxt_re_dev *rdev =
495                 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
496
497         return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
498 }
499 static DEVICE_ATTR_RO(hca_type);
500
501 static struct attribute *bnxt_re_attributes[] = {
502         &dev_attr_hw_rev.attr,
503         &dev_attr_hca_type.attr,
504         NULL
505 };
506
507 static const struct attribute_group bnxt_re_dev_attr_group = {
508         .attrs = bnxt_re_attributes,
509 };
510
511 static const struct ib_device_ops bnxt_re_dev_ops = {
512         .owner = THIS_MODULE,
513         .driver_id = RDMA_DRIVER_BNXT_RE,
514         .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
515
516         .add_gid = bnxt_re_add_gid,
517         .alloc_hw_port_stats = bnxt_re_ib_alloc_hw_port_stats,
518         .alloc_mr = bnxt_re_alloc_mr,
519         .alloc_pd = bnxt_re_alloc_pd,
520         .alloc_ucontext = bnxt_re_alloc_ucontext,
521         .create_ah = bnxt_re_create_ah,
522         .create_cq = bnxt_re_create_cq,
523         .create_qp = bnxt_re_create_qp,
524         .create_srq = bnxt_re_create_srq,
525         .create_user_ah = bnxt_re_create_ah,
526         .dealloc_pd = bnxt_re_dealloc_pd,
527         .dealloc_ucontext = bnxt_re_dealloc_ucontext,
528         .del_gid = bnxt_re_del_gid,
529         .dereg_mr = bnxt_re_dereg_mr,
530         .destroy_ah = bnxt_re_destroy_ah,
531         .destroy_cq = bnxt_re_destroy_cq,
532         .destroy_qp = bnxt_re_destroy_qp,
533         .destroy_srq = bnxt_re_destroy_srq,
534         .device_group = &bnxt_re_dev_attr_group,
535         .get_dev_fw_str = bnxt_re_query_fw_str,
536         .get_dma_mr = bnxt_re_get_dma_mr,
537         .get_hw_stats = bnxt_re_ib_get_hw_stats,
538         .get_link_layer = bnxt_re_get_link_layer,
539         .get_port_immutable = bnxt_re_get_port_immutable,
540         .map_mr_sg = bnxt_re_map_mr_sg,
541         .mmap = bnxt_re_mmap,
542         .modify_qp = bnxt_re_modify_qp,
543         .modify_srq = bnxt_re_modify_srq,
544         .poll_cq = bnxt_re_poll_cq,
545         .post_recv = bnxt_re_post_recv,
546         .post_send = bnxt_re_post_send,
547         .post_srq_recv = bnxt_re_post_srq_recv,
548         .query_ah = bnxt_re_query_ah,
549         .query_device = bnxt_re_query_device,
550         .query_pkey = bnxt_re_query_pkey,
551         .query_port = bnxt_re_query_port,
552         .query_qp = bnxt_re_query_qp,
553         .query_srq = bnxt_re_query_srq,
554         .reg_user_mr = bnxt_re_reg_user_mr,
555         .req_notify_cq = bnxt_re_req_notify_cq,
556         .resize_cq = bnxt_re_resize_cq,
557         INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
558         INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
559         INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
560         INIT_RDMA_OBJ_SIZE(ib_qp, bnxt_re_qp, ib_qp),
561         INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
562         INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
563 };
564
565 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
566 {
567         struct ib_device *ibdev = &rdev->ibdev;
568         int ret;
569
570         /* ib device init */
571         ibdev->node_type = RDMA_NODE_IB_CA;
572         strscpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
573                 strlen(BNXT_RE_DESC) + 5);
574         ibdev->phys_port_cnt = 1;
575
576         addrconf_addr_eui48((u8 *)&ibdev->node_guid, rdev->netdev->dev_addr);
577
578         ibdev->num_comp_vectors = rdev->num_msix - 1;
579         ibdev->dev.parent = &rdev->en_dev->pdev->dev;
580         ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
581
582         ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
583         ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
584         if (ret)
585                 return ret;
586
587         dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX);
588         ibdev->uverbs_cmd_mask |= BIT_ULL(IB_USER_VERBS_CMD_POLL_CQ);
589         return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev);
590 }
591
592 static struct bnxt_re_dev *bnxt_re_dev_add(struct bnxt_aux_priv *aux_priv,
593                                            struct bnxt_en_dev *en_dev)
594 {
595         struct bnxt_re_dev *rdev;
596
597         /* Allocate bnxt_re_dev instance here */
598         rdev = ib_alloc_device(bnxt_re_dev, ibdev);
599         if (!rdev) {
600                 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!",
601                           ROCE_DRV_MODULE_NAME);
602                 return NULL;
603         }
604         /* Default values */
605         rdev->nb.notifier_call = NULL;
606         rdev->netdev = en_dev->net;
607         rdev->en_dev = en_dev;
608         rdev->id = rdev->en_dev->pdev->devfn;
609         INIT_LIST_HEAD(&rdev->qp_list);
610         mutex_init(&rdev->qp_lock);
611         atomic_set(&rdev->qp_count, 0);
612         atomic_set(&rdev->cq_count, 0);
613         atomic_set(&rdev->srq_count, 0);
614         atomic_set(&rdev->mr_count, 0);
615         atomic_set(&rdev->mw_count, 0);
616         atomic_set(&rdev->ah_count, 0);
617         atomic_set(&rdev->pd_count, 0);
618         rdev->cosq[0] = 0xFFFF;
619         rdev->cosq[1] = 0xFFFF;
620
621         return rdev;
622 }
623
624 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
625                                              *unaffi_async)
626 {
627         switch (unaffi_async->event) {
628         case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
629                 break;
630         case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
631                 break;
632         case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
633                 break;
634         case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
635                 break;
636         case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
637                 break;
638         case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
639                 break;
640         case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
641                 break;
642         case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
643                 break;
644         case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
645                 break;
646         case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
647                 break;
648         case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
649                 break;
650         default:
651                 return -EINVAL;
652         }
653         return 0;
654 }
655
656 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
657                                          struct bnxt_re_qp *qp)
658 {
659         struct ib_event event;
660         unsigned int flags;
661
662         if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
663             rdma_is_kernel_res(&qp->ib_qp.res)) {
664                 flags = bnxt_re_lock_cqs(qp);
665                 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
666                 bnxt_re_unlock_cqs(qp, flags);
667         }
668
669         memset(&event, 0, sizeof(event));
670         if (qp->qplib_qp.srq) {
671                 event.device = &qp->rdev->ibdev;
672                 event.element.qp = &qp->ib_qp;
673                 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
674         }
675
676         if (event.device && qp->ib_qp.event_handler)
677                 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
678
679         return 0;
680 }
681
682 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
683                                            void *obj)
684 {
685         int rc = 0;
686         u8 event;
687
688         if (!obj)
689                 return rc; /* QP was already dead, still return success */
690
691         event = affi_async->event;
692         if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
693                 struct bnxt_qplib_qp *lib_qp = obj;
694                 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
695                                                      qplib_qp);
696                 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
697         }
698         return rc;
699 }
700
701 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
702                                void *aeqe, void *obj)
703 {
704         struct creq_qp_event *affi_async;
705         struct creq_func_event *unaffi_async;
706         u8 type;
707         int rc;
708
709         type = ((struct creq_base *)aeqe)->type;
710         if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
711                 unaffi_async = aeqe;
712                 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
713         } else {
714                 affi_async = aeqe;
715                 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
716         }
717
718         return rc;
719 }
720
721 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
722                                 struct bnxt_qplib_srq *handle, u8 event)
723 {
724         struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
725                                                qplib_srq);
726         struct ib_event ib_event;
727
728         ib_event.device = &srq->rdev->ibdev;
729         ib_event.element.srq = &srq->ib_srq;
730         if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
731                 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
732         else
733                 ib_event.event = IB_EVENT_SRQ_ERR;
734
735         if (srq->ib_srq.event_handler) {
736                 /* Lock event_handler? */
737                 (*srq->ib_srq.event_handler)(&ib_event,
738                                              srq->ib_srq.srq_context);
739         }
740         return 0;
741 }
742
743 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
744                                struct bnxt_qplib_cq *handle)
745 {
746         struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
747                                              qplib_cq);
748
749         if (cq->ib_cq.comp_handler) {
750                 /* Lock comp_handler? */
751                 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
752         }
753
754         return 0;
755 }
756
757 #define BNXT_RE_GEN_P5_PF_NQ_DB         0x10000
758 #define BNXT_RE_GEN_P5_VF_NQ_DB         0x4000
759 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
760 {
761         return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
762                 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
763                                    BNXT_RE_GEN_P5_PF_NQ_DB) :
764                                    rdev->en_dev->msix_entries[indx].db_offset;
765 }
766
767 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
768 {
769         int i;
770
771         for (i = 1; i < rdev->num_msix; i++)
772                 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
773
774         if (rdev->qplib_res.rcfw)
775                 bnxt_qplib_cleanup_res(&rdev->qplib_res);
776 }
777
778 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
779 {
780         int num_vec_enabled = 0;
781         int rc = 0, i;
782         u32 db_offt;
783
784         bnxt_qplib_init_res(&rdev->qplib_res);
785
786         for (i = 1; i < rdev->num_msix ; i++) {
787                 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
788                 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
789                                           i - 1, rdev->en_dev->msix_entries[i].vector,
790                                           db_offt, &bnxt_re_cqn_handler,
791                                           &bnxt_re_srqn_handler);
792                 if (rc) {
793                         ibdev_err(&rdev->ibdev,
794                                   "Failed to enable NQ with rc = 0x%x", rc);
795                         goto fail;
796                 }
797                 num_vec_enabled++;
798         }
799         return 0;
800 fail:
801         for (i = num_vec_enabled; i >= 0; i--)
802                 bnxt_qplib_disable_nq(&rdev->nq[i]);
803         return rc;
804 }
805
806 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
807 {
808         u8 type;
809         int i;
810
811         for (i = 0; i < rdev->num_msix - 1; i++) {
812                 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
813                 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
814                 bnxt_qplib_free_nq(&rdev->nq[i]);
815                 rdev->nq[i].res = NULL;
816         }
817 }
818
819 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
820 {
821         bnxt_re_free_nq_res(rdev);
822
823         if (rdev->qplib_res.dpi_tbl.max) {
824                 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
825                                        &rdev->qplib_res.dpi_tbl,
826                                        &rdev->dpi_privileged);
827         }
828         if (rdev->qplib_res.rcfw) {
829                 bnxt_qplib_free_res(&rdev->qplib_res);
830                 rdev->qplib_res.rcfw = NULL;
831         }
832 }
833
834 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
835 {
836         struct bnxt_re_ring_attr rattr = {};
837         int num_vec_created = 0;
838         int rc = 0, i;
839         u8 type;
840
841         /* Configure and allocate resources for qplib */
842         rdev->qplib_res.rcfw = &rdev->rcfw;
843         rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
844                                      rdev->is_virtfn);
845         if (rc)
846                 goto fail;
847
848         rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
849                                   rdev->netdev, &rdev->dev_attr);
850         if (rc)
851                 goto fail;
852
853         rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
854                                   &rdev->dpi_privileged,
855                                   rdev);
856         if (rc)
857                 goto dealloc_res;
858
859         for (i = 0; i < rdev->num_msix - 1; i++) {
860                 struct bnxt_qplib_nq *nq;
861
862                 nq = &rdev->nq[i];
863                 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
864                 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
865                 if (rc) {
866                         ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",
867                                   i, rc);
868                         goto free_nq;
869                 }
870                 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
871                 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr;
872                 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count;
873                 rattr.type = type;
874                 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
875                 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
876                 rattr.lrid = rdev->en_dev->msix_entries[i + 1].ring_idx;
877                 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
878                 if (rc) {
879                         ibdev_err(&rdev->ibdev,
880                                   "Failed to allocate NQ fw id with rc = 0x%x",
881                                   rc);
882                         bnxt_qplib_free_nq(&rdev->nq[i]);
883                         goto free_nq;
884                 }
885                 num_vec_created++;
886         }
887         return 0;
888 free_nq:
889         for (i = num_vec_created - 1; i >= 0; i--) {
890                 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
891                 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
892                 bnxt_qplib_free_nq(&rdev->nq[i]);
893         }
894         bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
895                                &rdev->qplib_res.dpi_tbl,
896                                &rdev->dpi_privileged);
897 dealloc_res:
898         bnxt_qplib_free_res(&rdev->qplib_res);
899
900 fail:
901         rdev->qplib_res.rcfw = NULL;
902         return rc;
903 }
904
905 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
906                                    u8 port_num, enum ib_event_type event)
907 {
908         struct ib_event ib_event;
909
910         ib_event.device = ibdev;
911         if (qp) {
912                 ib_event.element.qp = qp;
913                 ib_event.event = event;
914                 if (qp->event_handler)
915                         qp->event_handler(&ib_event, qp->qp_context);
916
917         } else {
918                 ib_event.element.port_num = port_num;
919                 ib_event.event = event;
920                 ib_dispatch_event(&ib_event);
921         }
922 }
923
924 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
925                                         struct bnxt_re_qp *qp)
926 {
927         return (qp->ib_qp.qp_type == IB_QPT_GSI) ||
928                (qp == rdev->gsi_ctx.gsi_sqp);
929 }
930
931 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
932 {
933         int mask = IB_QP_STATE;
934         struct ib_qp_attr qp_attr;
935         struct bnxt_re_qp *qp;
936
937         qp_attr.qp_state = IB_QPS_ERR;
938         mutex_lock(&rdev->qp_lock);
939         list_for_each_entry(qp, &rdev->qp_list, list) {
940                 /* Modify the state of all QPs except QP1/Shadow QP */
941                 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
942                         if (qp->qplib_qp.state !=
943                             CMDQ_MODIFY_QP_NEW_STATE_RESET &&
944                             qp->qplib_qp.state !=
945                             CMDQ_MODIFY_QP_NEW_STATE_ERR) {
946                                 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
947                                                        1, IB_EVENT_QP_FATAL);
948                                 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
949                                                   NULL);
950                         }
951                 }
952         }
953         mutex_unlock(&rdev->qp_lock);
954 }
955
956 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
957 {
958         struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
959         struct bnxt_qplib_gid gid;
960         u16 gid_idx, index;
961         int rc = 0;
962
963         if (!ib_device_try_get(&rdev->ibdev))
964                 return 0;
965
966         if (!sgid_tbl) {
967                 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated");
968                 rc = -EINVAL;
969                 goto out;
970         }
971
972         for (index = 0; index < sgid_tbl->active; index++) {
973                 gid_idx = sgid_tbl->hw_id[index];
974
975                 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
976                             sizeof(bnxt_qplib_gid_zero)))
977                         continue;
978                 /* need to modify the VLAN enable setting of non VLAN GID only
979                  * as setting is done for VLAN GID while adding GID
980                  */
981                 if (sgid_tbl->vlan[index])
982                         continue;
983
984                 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
985
986                 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
987                                             rdev->qplib_res.netdev->dev_addr);
988         }
989 out:
990         ib_device_put(&rdev->ibdev);
991         return rc;
992 }
993
994 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
995 {
996         u32 prio_map = 0, tmp_map = 0;
997         struct net_device *netdev;
998         struct dcb_app app;
999
1000         netdev = rdev->netdev;
1001
1002         memset(&app, 0, sizeof(app));
1003         app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1004         app.protocol = ETH_P_IBOE;
1005         tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1006         prio_map = tmp_map;
1007
1008         app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1009         app.protocol = ROCE_V2_UDP_DPORT;
1010         tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1011         prio_map |= tmp_map;
1012
1013         return prio_map;
1014 }
1015
1016 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1017 {
1018         u8 prio_map = 0;
1019
1020         /* Get priority for roce */
1021         prio_map = bnxt_re_get_priority_mask(rdev);
1022
1023         if (prio_map == rdev->cur_prio_map)
1024                 return 0;
1025         rdev->cur_prio_map = prio_map;
1026         /* Actual priorities are not programmed as they are already
1027          * done by L2 driver; just enable or disable priority vlan tagging
1028          */
1029         if ((prio_map == 0 && rdev->qplib_res.prio) ||
1030             (prio_map != 0 && !rdev->qplib_res.prio)) {
1031                 rdev->qplib_res.prio = prio_map ? true : false;
1032
1033                 bnxt_re_update_gid(rdev);
1034         }
1035
1036         return 0;
1037 }
1038
1039 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1040 {
1041         struct bnxt_en_dev *en_dev = rdev->en_dev;
1042         struct hwrm_ver_get_output resp = {0};
1043         struct hwrm_ver_get_input req = {0};
1044         struct bnxt_fw_msg fw_msg;
1045         int rc = 0;
1046
1047         memset(&fw_msg, 0, sizeof(fw_msg));
1048         bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1049                               HWRM_VER_GET, -1, -1);
1050         req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1051         req.hwrm_intf_min = HWRM_VERSION_MINOR;
1052         req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1053         bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1054                             sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1055         rc = bnxt_send_msg(en_dev, &fw_msg);
1056         if (rc) {
1057                 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x",
1058                           rc);
1059                 return;
1060         }
1061         rdev->qplib_ctx.hwrm_intf_ver =
1062                 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 |
1063                 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 |
1064                 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 |
1065                 le16_to_cpu(resp.hwrm_intf_patch);
1066 }
1067
1068 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev)
1069 {
1070         int rc = 0;
1071         u32 event;
1072
1073         /* Register ib dev */
1074         rc = bnxt_re_register_ib(rdev);
1075         if (rc) {
1076                 pr_err("Failed to register with IB: %#x\n", rc);
1077                 return rc;
1078         }
1079         dev_info(rdev_to_dev(rdev), "Device registered with IB successfully");
1080         ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1081                          &rdev->active_width);
1082         set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1083
1084         event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ?
1085                 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
1086
1087         bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event);
1088
1089         return rc;
1090 }
1091
1092 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev)
1093 {
1094         u8 type;
1095         int rc;
1096
1097         if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1098                 cancel_delayed_work_sync(&rdev->worker);
1099
1100         if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1101                                &rdev->flags))
1102                 bnxt_re_cleanup_res(rdev);
1103         if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1104                 bnxt_re_free_res(rdev);
1105
1106         if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1107                 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1108                 if (rc)
1109                         ibdev_warn(&rdev->ibdev,
1110                                    "Failed to deinitialize RCFW: %#x", rc);
1111                 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1112                 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1113                 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1114                 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1115                 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1116                 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1117         }
1118         if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags))
1119                 rdev->num_msix = 0;
1120
1121         bnxt_re_destroy_chip_ctx(rdev);
1122         if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags))
1123                 bnxt_unregister_dev(rdev->en_dev);
1124 }
1125
1126 /* worker thread for polling periodic events. Now used for QoS programming*/
1127 static void bnxt_re_worker(struct work_struct *work)
1128 {
1129         struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1130                                                 worker.work);
1131
1132         bnxt_re_setup_qos(rdev);
1133         schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1134 }
1135
1136 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
1137 {
1138         struct bnxt_qplib_creq_ctx *creq;
1139         struct bnxt_re_ring_attr rattr;
1140         u32 db_offt;
1141         int vid;
1142         u8 type;
1143         int rc;
1144
1145         /* Registered a new RoCE device instance to netdev */
1146         memset(&rattr, 0, sizeof(rattr));
1147         rc = bnxt_re_register_netdev(rdev);
1148         if (rc) {
1149                 ibdev_err(&rdev->ibdev,
1150                           "Failed to register with netedev: %#x\n", rc);
1151                 return -EINVAL;
1152         }
1153         set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1154
1155         rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
1156         if (rc) {
1157                 ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
1158                 return -EINVAL;
1159         }
1160
1161         /* Check whether VF or PF */
1162         bnxt_re_get_sriov_func_type(rdev);
1163
1164         if (!rdev->en_dev->ulp_tbl->msix_requested) {
1165                 ibdev_err(&rdev->ibdev,
1166                           "Failed to get MSI-X vectors: %#x\n", rc);
1167                 rc = -EINVAL;
1168                 goto fail;
1169         }
1170         ibdev_dbg(&rdev->ibdev, "Got %d MSI-X vectors\n",
1171                   rdev->en_dev->ulp_tbl->msix_requested);
1172         rdev->num_msix = rdev->en_dev->ulp_tbl->msix_requested;
1173         set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1174
1175         bnxt_re_query_hwrm_intf_version(rdev);
1176
1177         /* Establish RCFW Communication Channel to initialize the context
1178          * memory for the function and all child VFs
1179          */
1180         rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
1181                                            &rdev->qplib_ctx,
1182                                            BNXT_RE_MAX_QPC_COUNT);
1183         if (rc) {
1184                 ibdev_err(&rdev->ibdev,
1185                           "Failed to allocate RCFW Channel: %#x\n", rc);
1186                 goto fail;
1187         }
1188
1189         type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1190         creq = &rdev->rcfw.creq;
1191         rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1192         rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count;
1193         rattr.type = type;
1194         rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1195         rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
1196         rattr.lrid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1197         rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
1198         if (rc) {
1199                 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
1200                 goto free_rcfw;
1201         }
1202         db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1203         vid = rdev->en_dev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1204         rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
1205                                             vid, db_offt, rdev->is_virtfn,
1206                                             &bnxt_re_aeq_handler);
1207         if (rc) {
1208                 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n",
1209                           rc);
1210                 goto free_ring;
1211         }
1212
1213         rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1214                                      rdev->is_virtfn);
1215         if (rc)
1216                 goto disable_rcfw;
1217
1218         bnxt_re_set_resource_limits(rdev);
1219
1220         rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,
1221                                   bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
1222         if (rc) {
1223                 ibdev_err(&rdev->ibdev,
1224                           "Failed to allocate QPLIB context: %#x\n", rc);
1225                 goto disable_rcfw;
1226         }
1227         rc = bnxt_re_net_stats_ctx_alloc(rdev,
1228                                          rdev->qplib_ctx.stats.dma_map,
1229                                          &rdev->qplib_ctx.stats.fw_id);
1230         if (rc) {
1231                 ibdev_err(&rdev->ibdev,
1232                           "Failed to allocate stats context: %#x\n", rc);
1233                 goto free_ctx;
1234         }
1235
1236         rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1237                                   rdev->is_virtfn);
1238         if (rc) {
1239                 ibdev_err(&rdev->ibdev,
1240                           "Failed to initialize RCFW: %#x\n", rc);
1241                 goto free_sctx;
1242         }
1243         set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1244
1245         /* Resources based on the 'new' device caps */
1246         rc = bnxt_re_alloc_res(rdev);
1247         if (rc) {
1248                 ibdev_err(&rdev->ibdev,
1249                           "Failed to allocate resources: %#x\n", rc);
1250                 goto fail;
1251         }
1252         set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1253         rc = bnxt_re_init_res(rdev);
1254         if (rc) {
1255                 ibdev_err(&rdev->ibdev,
1256                           "Failed to initialize resources: %#x\n", rc);
1257                 goto fail;
1258         }
1259
1260         set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1261
1262         if (!rdev->is_virtfn) {
1263                 rc = bnxt_re_setup_qos(rdev);
1264                 if (rc)
1265                         ibdev_info(&rdev->ibdev,
1266                                    "RoCE priority not yet configured\n");
1267
1268                 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1269                 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1270                 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1271                 /*
1272                  * Use the total VF count since the actual VF count may not be
1273                  * available at this point.
1274                  */
1275                 bnxt_re_vf_res_config(rdev);
1276         }
1277
1278         return 0;
1279 free_sctx:
1280         bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1281 free_ctx:
1282         bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1283 disable_rcfw:
1284         bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1285 free_ring:
1286         type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1287         bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1288 free_rcfw:
1289         bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1290 fail:
1291         bnxt_re_dev_uninit(rdev);
1292
1293         return rc;
1294 }
1295
1296 static int bnxt_re_add_device(struct auxiliary_device *adev, u8 wqe_mode)
1297 {
1298         struct bnxt_aux_priv *aux_priv =
1299                 container_of(adev, struct bnxt_aux_priv, aux_dev);
1300         struct bnxt_en_dev *en_dev;
1301         struct bnxt_re_dev *rdev;
1302         int rc = 0;
1303
1304         /* en_dev should never be NULL as long as adev and aux_dev are valid. */
1305         en_dev = aux_priv->edev;
1306
1307         rdev = bnxt_re_dev_add(aux_priv, en_dev);
1308         if (!rdev || !rdev_to_dev(rdev)) {
1309                 rc = -ENOMEM;
1310                 goto exit;
1311         }
1312
1313         rc = bnxt_re_dev_init(rdev, wqe_mode);
1314         if (rc)
1315                 goto re_dev_dealloc;
1316
1317         rc = bnxt_re_ib_init(rdev);
1318         if (rc) {
1319                 pr_err("Failed to register with IB: %s",
1320                         aux_priv->aux_dev.name);
1321                 goto re_dev_uninit;
1322         }
1323         auxiliary_set_drvdata(adev, rdev);
1324
1325         return 0;
1326
1327 re_dev_uninit:
1328         bnxt_re_dev_uninit(rdev);
1329 re_dev_dealloc:
1330         ib_dealloc_device(&rdev->ibdev);
1331 exit:
1332         return rc;
1333 }
1334
1335 static void bnxt_re_setup_cc(struct bnxt_re_dev *rdev, bool enable)
1336 {
1337         struct bnxt_qplib_cc_param cc_param = {};
1338
1339         /* Do not enable congestion control on VFs */
1340         if (rdev->is_virtfn)
1341                 return;
1342
1343         /* Currently enabling only for GenP5 adapters */
1344         if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
1345                 return;
1346
1347         if (enable) {
1348                 cc_param.enable  = 1;
1349                 cc_param.cc_mode = CMDQ_MODIFY_ROCE_CC_CC_MODE_PROBABILISTIC_CC_MODE;
1350         }
1351
1352         cc_param.mask = (CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_CC_MODE |
1353                          CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ENABLE_CC |
1354                          CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_ECN);
1355
1356         if (bnxt_qplib_modify_cc(&rdev->qplib_res, &cc_param))
1357                 ibdev_err(&rdev->ibdev, "Failed to setup CC enable = %d\n", enable);
1358 }
1359
1360 /*
1361  * "Notifier chain callback can be invoked for the same chain from
1362  * different CPUs at the same time".
1363  *
1364  * For cases when the netdev is already present, our call to the
1365  * register_netdevice_notifier() will actually get the rtnl_lock()
1366  * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1367  * events.
1368  *
1369  * But for cases when the netdev is not already present, the notifier
1370  * chain is subjected to be invoked from different CPUs simultaneously.
1371  *
1372  * This is protected by the netdev_mutex.
1373  */
1374 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1375                                 unsigned long event, void *ptr)
1376 {
1377         struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1378         struct bnxt_re_dev *rdev;
1379
1380         real_dev = rdma_vlan_dev_real_dev(netdev);
1381         if (!real_dev)
1382                 real_dev = netdev;
1383
1384         if (real_dev != netdev)
1385                 goto exit;
1386
1387         rdev = bnxt_re_from_netdev(real_dev);
1388         if (!rdev)
1389                 return NOTIFY_DONE;
1390
1391
1392         switch (event) {
1393         case NETDEV_UP:
1394         case NETDEV_DOWN:
1395         case NETDEV_CHANGE:
1396                 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1397                                         netif_carrier_ok(real_dev) ?
1398                                         IB_EVENT_PORT_ACTIVE :
1399                                         IB_EVENT_PORT_ERR);
1400                 break;
1401         default:
1402                 break;
1403         }
1404         ib_device_put(&rdev->ibdev);
1405 exit:
1406         return NOTIFY_DONE;
1407 }
1408
1409 #define BNXT_ADEV_NAME "bnxt_en"
1410
1411 static void bnxt_re_remove(struct auxiliary_device *adev)
1412 {
1413         struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1414
1415         if (!rdev)
1416                 return;
1417
1418         mutex_lock(&bnxt_re_mutex);
1419         if (rdev->nb.notifier_call) {
1420                 unregister_netdevice_notifier(&rdev->nb);
1421                 rdev->nb.notifier_call = NULL;
1422         } else {
1423                 /* If notifier is null, we should have already done a
1424                  * clean up before coming here.
1425                  */
1426                 goto skip_remove;
1427         }
1428         bnxt_re_setup_cc(rdev, false);
1429         ib_unregister_device(&rdev->ibdev);
1430         ib_dealloc_device(&rdev->ibdev);
1431         bnxt_re_dev_uninit(rdev);
1432 skip_remove:
1433         mutex_unlock(&bnxt_re_mutex);
1434 }
1435
1436 static int bnxt_re_probe(struct auxiliary_device *adev,
1437                          const struct auxiliary_device_id *id)
1438 {
1439         struct bnxt_re_dev *rdev;
1440         int rc;
1441
1442         mutex_lock(&bnxt_re_mutex);
1443         rc = bnxt_re_add_device(adev, BNXT_QPLIB_WQE_MODE_STATIC);
1444         if (rc) {
1445                 mutex_unlock(&bnxt_re_mutex);
1446                 return rc;
1447         }
1448
1449         rdev = auxiliary_get_drvdata(adev);
1450
1451         rdev->nb.notifier_call = bnxt_re_netdev_event;
1452         rc = register_netdevice_notifier(&rdev->nb);
1453         if (rc) {
1454                 rdev->nb.notifier_call = NULL;
1455                 pr_err("%s: Cannot register to netdevice_notifier",
1456                        ROCE_DRV_MODULE_NAME);
1457                 goto err;
1458         }
1459
1460         bnxt_re_setup_cc(rdev, true);
1461         mutex_unlock(&bnxt_re_mutex);
1462         return 0;
1463
1464 err:
1465         mutex_unlock(&bnxt_re_mutex);
1466         bnxt_re_remove(adev);
1467
1468         return rc;
1469 }
1470
1471 static int bnxt_re_suspend(struct auxiliary_device *adev, pm_message_t state)
1472 {
1473         struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1474
1475         if (!rdev)
1476                 return 0;
1477
1478         mutex_lock(&bnxt_re_mutex);
1479         /* L2 driver may invoke this callback during device error/crash or device
1480          * reset. Current RoCE driver doesn't recover the device in case of
1481          * error. Handle the error by dispatching fatal events to all qps
1482          * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
1483          * L2 driver want to modify the MSIx table.
1484          */
1485
1486         ibdev_info(&rdev->ibdev, "Handle device suspend call");
1487         /* Check the current device state from bnxt_en_dev and move the
1488          * device to detached state if FW_FATAL_COND is set.
1489          * This prevents more commands to HW during clean-up,
1490          * in case the device is already in error.
1491          */
1492         if (test_bit(BNXT_STATE_FW_FATAL_COND, &rdev->en_dev->en_state))
1493                 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
1494
1495         bnxt_re_dev_stop(rdev);
1496         bnxt_re_stop_irq(rdev);
1497         /* Move the device states to detached and  avoid sending any more
1498          * commands to HW
1499          */
1500         set_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);
1501         set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags);
1502         mutex_unlock(&bnxt_re_mutex);
1503
1504         return 0;
1505 }
1506
1507 static int bnxt_re_resume(struct auxiliary_device *adev)
1508 {
1509         struct bnxt_re_dev *rdev = auxiliary_get_drvdata(adev);
1510
1511         if (!rdev)
1512                 return 0;
1513
1514         mutex_lock(&bnxt_re_mutex);
1515         /* L2 driver may invoke this callback during device recovery, resume.
1516          * reset. Current RoCE driver doesn't recover the device in case of
1517          * error. Handle the error by dispatching fatal events to all qps
1518          * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as
1519          * L2 driver want to modify the MSIx table.
1520          */
1521
1522         ibdev_info(&rdev->ibdev, "Handle device resume call");
1523         mutex_unlock(&bnxt_re_mutex);
1524
1525         return 0;
1526 }
1527
1528 static const struct auxiliary_device_id bnxt_re_id_table[] = {
1529         { .name = BNXT_ADEV_NAME ".rdma", },
1530         {},
1531 };
1532
1533 MODULE_DEVICE_TABLE(auxiliary, bnxt_re_id_table);
1534
1535 static struct auxiliary_driver bnxt_re_driver = {
1536         .name = "rdma",
1537         .probe = bnxt_re_probe,
1538         .remove = bnxt_re_remove,
1539         .shutdown = bnxt_re_shutdown,
1540         .suspend = bnxt_re_suspend,
1541         .resume = bnxt_re_resume,
1542         .id_table = bnxt_re_id_table,
1543 };
1544
1545 static int __init bnxt_re_mod_init(void)
1546 {
1547         int rc = 0;
1548
1549         pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1550         rc = auxiliary_driver_register(&bnxt_re_driver);
1551         if (rc) {
1552                 pr_err("%s: Failed to register auxiliary driver\n",
1553                         ROCE_DRV_MODULE_NAME);
1554                 return rc;
1555         }
1556         return 0;
1557 }
1558
1559 static void __exit bnxt_re_mod_exit(void)
1560 {
1561         auxiliary_driver_unregister(&bnxt_re_driver);
1562 }
1563
1564 module_init(bnxt_re_mod_init);
1565 module_exit(bnxt_re_mod_exit);