1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Invensense, Inc.
6 #include <linux/module.h>
7 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
19 #include "inv_mpu_iio.h"
20 #include "inv_mpu_magn.h"
23 * this is the gyro scale translated from dynamic range plus/minus
24 * {250, 500, 1000, 2000} to rad/s
26 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
29 * this is the accel scale translated from dynamic range plus/minus
30 * {2, 4, 8, 16} to m/s^2
32 static const int accel_scale[] = {598, 1196, 2392, 4785};
34 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
35 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
36 .lpf = INV_MPU6050_REG_CONFIG,
37 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
38 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
39 .fifo_en = INV_MPU6050_REG_FIFO_EN,
40 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
41 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
42 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
43 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
44 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
45 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
46 .temperature = INV_MPU6050_REG_TEMPERATURE,
47 .int_enable = INV_MPU6050_REG_INT_ENABLE,
48 .int_status = INV_MPU6050_REG_INT_STATUS,
49 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
50 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
51 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
52 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
53 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
54 .i2c_if = INV_ICM20602_REG_I2C_IF,
57 static const struct inv_mpu6050_reg_map reg_set_6500 = {
58 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
59 .lpf = INV_MPU6050_REG_CONFIG,
60 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
61 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
62 .fifo_en = INV_MPU6050_REG_FIFO_EN,
63 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
64 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
65 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
66 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
67 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
68 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
69 .temperature = INV_MPU6050_REG_TEMPERATURE,
70 .int_enable = INV_MPU6050_REG_INT_ENABLE,
71 .int_status = INV_MPU6050_REG_INT_STATUS,
72 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
73 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
74 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
75 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
76 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
80 static const struct inv_mpu6050_reg_map reg_set_6050 = {
81 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
82 .lpf = INV_MPU6050_REG_CONFIG,
83 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
84 .fifo_en = INV_MPU6050_REG_FIFO_EN,
85 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
86 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
87 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
88 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
89 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
90 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
91 .temperature = INV_MPU6050_REG_TEMPERATURE,
92 .int_enable = INV_MPU6050_REG_INT_ENABLE,
93 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
94 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
95 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
96 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
97 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
101 static const struct inv_mpu6050_chip_config chip_config_6050 = {
102 .fsr = INV_MPU6050_FSR_2000DPS,
103 .lpf = INV_MPU6050_FILTER_20HZ,
104 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE),
105 .gyro_fifo_enable = false,
106 .accl_fifo_enable = false,
107 .magn_fifo_enable = false,
108 .accl_fs = INV_MPU6050_FS_02G,
112 /* Indexed by enum inv_devices */
113 static const struct inv_mpu6050_hw hw_info[] = {
115 .whoami = INV_MPU6050_WHOAMI_VALUE,
117 .reg = ®_set_6050,
118 .config = &chip_config_6050,
120 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
123 .whoami = INV_MPU6500_WHOAMI_VALUE,
125 .reg = ®_set_6500,
126 .config = &chip_config_6050,
128 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
131 .whoami = INV_MPU6515_WHOAMI_VALUE,
133 .reg = ®_set_6500,
134 .config = &chip_config_6050,
136 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
139 .whoami = INV_MPU6000_WHOAMI_VALUE,
141 .reg = ®_set_6050,
142 .config = &chip_config_6050,
144 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
147 .whoami = INV_MPU9150_WHOAMI_VALUE,
149 .reg = ®_set_6050,
150 .config = &chip_config_6050,
152 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
155 .whoami = INV_MPU9250_WHOAMI_VALUE,
157 .reg = ®_set_6500,
158 .config = &chip_config_6050,
160 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
163 .whoami = INV_MPU9255_WHOAMI_VALUE,
165 .reg = ®_set_6500,
166 .config = &chip_config_6050,
168 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
171 .whoami = INV_ICM20608_WHOAMI_VALUE,
173 .reg = ®_set_6500,
174 .config = &chip_config_6050,
176 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
179 .whoami = INV_ICM20602_WHOAMI_VALUE,
181 .reg = ®_set_icm20602,
182 .config = &chip_config_6050,
184 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
188 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
190 unsigned int d, mgmt_1;
193 * switch clock needs to be careful. Only when gyro is on, can
194 * clock source be switched to gyro. Otherwise, it must be set to
197 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
198 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
202 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
205 if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) {
207 * turning off gyro requires switch to internal clock first.
208 * Then turn off gyro engine
210 mgmt_1 |= INV_CLK_INTERNAL;
211 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
216 result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
223 result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
228 /* Wait for output to stabilize */
229 msleep(INV_MPU6050_TEMP_UP_TIME);
230 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) {
231 /* switch internal clock to PLL */
232 mgmt_1 |= INV_CLK_PLL;
233 result = regmap_write(st->map,
234 st->reg->pwr_mgmt_1, mgmt_1);
243 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
248 if (!st->powerup_count) {
249 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
252 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
253 INV_MPU6050_REG_UP_TIME_MAX);
257 if (st->powerup_count == 1) {
258 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
259 INV_MPU6050_BIT_SLEEP);
266 dev_dbg(regmap_get_device(st->map), "set power %d, count=%u\n",
267 power_on, st->powerup_count);
271 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
274 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
276 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
277 * MPU6500 and above have a dedicated register for accelerometer
279 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
280 enum inv_mpu6050_filter_e val)
284 result = regmap_write(st->map, st->reg->lpf, val);
288 switch (st->chip_type) {
292 /* old chips, nothing to do */
297 result = regmap_write(st->map, st->reg->accel_lpf, val);
305 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
307 * Initial configuration:
311 * Clock source: Gyro PLL
313 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
317 struct inv_mpu6050_state *st = iio_priv(indio_dev);
319 result = inv_mpu6050_set_power_itg(st, true);
322 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
323 result = regmap_write(st->map, st->reg->gyro_config, d);
325 goto error_power_off;
327 result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
329 goto error_power_off;
331 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(INV_MPU6050_INIT_FIFO_RATE);
332 result = regmap_write(st->map, st->reg->sample_rate_div, d);
334 goto error_power_off;
336 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
337 result = regmap_write(st->map, st->reg->accl_config, d);
339 goto error_power_off;
341 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
345 memcpy(&st->chip_config, hw_info[st->chip_type].config,
346 sizeof(struct inv_mpu6050_chip_config));
349 * Internal chip period is 1ms (1kHz).
350 * Let's use at the beginning the theorical value before measuring
351 * with interrupt timestamps.
353 st->chip_period = NSEC_PER_MSEC;
355 /* magn chip init, noop if not present in the chip */
356 result = inv_mpu_magn_probe(st);
358 goto error_power_off;
360 return inv_mpu6050_set_power_itg(st, false);
363 inv_mpu6050_set_power_itg(st, false);
367 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
371 __be16 d = cpu_to_be16(val);
373 ind = (axis - IIO_MOD_X) * 2;
374 result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2);
381 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
387 ind = (axis - IIO_MOD_X) * 2;
388 result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
391 *val = (short)be16_to_cpup(&d);
396 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
397 struct iio_chan_spec const *chan,
400 struct inv_mpu6050_state *st = iio_priv(indio_dev);
404 result = inv_mpu6050_set_power_itg(st, true);
408 switch (chan->type) {
410 result = inv_mpu6050_switch_engine(st, true,
411 INV_MPU6050_BIT_PWR_GYRO_STBY);
413 goto error_power_off;
414 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
415 chan->channel2, val);
416 result = inv_mpu6050_switch_engine(st, false,
417 INV_MPU6050_BIT_PWR_GYRO_STBY);
419 goto error_power_off;
422 result = inv_mpu6050_switch_engine(st, true,
423 INV_MPU6050_BIT_PWR_ACCL_STBY);
425 goto error_power_off;
426 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
427 chan->channel2, val);
428 result = inv_mpu6050_switch_engine(st, false,
429 INV_MPU6050_BIT_PWR_ACCL_STBY);
431 goto error_power_off;
434 /* wait for stablization */
435 msleep(INV_MPU6050_SENSOR_UP_TIME);
436 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
440 ret = inv_mpu_magn_read(st, chan->channel2, val);
447 result = inv_mpu6050_set_power_itg(st, false);
449 goto error_power_off;
454 inv_mpu6050_set_power_itg(st, false);
459 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
460 struct iio_chan_spec const *chan,
461 int *val, int *val2, long mask)
463 struct inv_mpu6050_state *st = iio_priv(indio_dev);
467 case IIO_CHAN_INFO_RAW:
468 ret = iio_device_claim_direct_mode(indio_dev);
471 mutex_lock(&st->lock);
472 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
473 mutex_unlock(&st->lock);
474 iio_device_release_direct_mode(indio_dev);
476 case IIO_CHAN_INFO_SCALE:
477 switch (chan->type) {
479 mutex_lock(&st->lock);
481 *val2 = gyro_scale_6050[st->chip_config.fsr];
482 mutex_unlock(&st->lock);
484 return IIO_VAL_INT_PLUS_NANO;
486 mutex_lock(&st->lock);
488 *val2 = accel_scale[st->chip_config.accl_fs];
489 mutex_unlock(&st->lock);
491 return IIO_VAL_INT_PLUS_MICRO;
493 *val = st->hw->temp.scale / 1000000;
494 *val2 = st->hw->temp.scale % 1000000;
495 return IIO_VAL_INT_PLUS_MICRO;
497 return inv_mpu_magn_get_scale(st, chan, val, val2);
501 case IIO_CHAN_INFO_OFFSET:
502 switch (chan->type) {
504 *val = st->hw->temp.offset;
509 case IIO_CHAN_INFO_CALIBBIAS:
510 switch (chan->type) {
512 mutex_lock(&st->lock);
513 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
514 chan->channel2, val);
515 mutex_unlock(&st->lock);
518 mutex_lock(&st->lock);
519 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
520 chan->channel2, val);
521 mutex_unlock(&st->lock);
532 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
537 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
538 if (gyro_scale_6050[i] == val) {
539 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
540 result = regmap_write(st->map, st->reg->gyro_config, d);
544 st->chip_config.fsr = i;
552 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
553 struct iio_chan_spec const *chan, long mask)
556 case IIO_CHAN_INFO_SCALE:
557 switch (chan->type) {
559 return IIO_VAL_INT_PLUS_NANO;
561 return IIO_VAL_INT_PLUS_MICRO;
564 return IIO_VAL_INT_PLUS_MICRO;
570 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
575 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
576 if (accel_scale[i] == val) {
577 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
578 result = regmap_write(st->map, st->reg->accl_config, d);
582 st->chip_config.accl_fs = i;
590 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
591 struct iio_chan_spec const *chan,
592 int val, int val2, long mask)
594 struct inv_mpu6050_state *st = iio_priv(indio_dev);
598 * we should only update scale when the chip is disabled, i.e.
601 result = iio_device_claim_direct_mode(indio_dev);
605 mutex_lock(&st->lock);
606 result = inv_mpu6050_set_power_itg(st, true);
608 goto error_write_raw_unlock;
611 case IIO_CHAN_INFO_SCALE:
612 switch (chan->type) {
614 result = inv_mpu6050_write_gyro_scale(st, val2);
617 result = inv_mpu6050_write_accel_scale(st, val2);
624 case IIO_CHAN_INFO_CALIBBIAS:
625 switch (chan->type) {
627 result = inv_mpu6050_sensor_set(st,
628 st->reg->gyro_offset,
629 chan->channel2, val);
632 result = inv_mpu6050_sensor_set(st,
633 st->reg->accl_offset,
634 chan->channel2, val);
646 result |= inv_mpu6050_set_power_itg(st, false);
647 error_write_raw_unlock:
648 mutex_unlock(&st->lock);
649 iio_device_release_direct_mode(indio_dev);
655 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
657 * Based on the Nyquist principle, the sampling rate must
658 * exceed twice of the bandwidth of the signal, or there
659 * would be alising. This function basically search for the
660 * correct low pass parameters based on the fifo rate, e.g,
661 * sampling frequency.
663 * lpf is set automatically when setting sampling rate to avoid any aliases.
665 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
667 static const int hz[] = {188, 98, 42, 20, 10, 5};
668 static const int d[] = {
669 INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
670 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
671 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
678 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
681 result = inv_mpu6050_set_lpf_regs(st, data);
684 st->chip_config.lpf = data;
690 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
693 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
694 const char *buf, size_t count)
699 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
700 struct inv_mpu6050_state *st = iio_priv(indio_dev);
702 if (kstrtoint(buf, 10, &fifo_rate))
704 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
705 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
708 result = iio_device_claim_direct_mode(indio_dev);
712 /* compute the chip sample rate divider */
713 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
714 /* compute back the fifo rate to handle truncation cases */
715 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
717 mutex_lock(&st->lock);
718 if (d == st->chip_config.divider) {
720 goto fifo_rate_fail_unlock;
722 result = inv_mpu6050_set_power_itg(st, true);
724 goto fifo_rate_fail_unlock;
726 result = regmap_write(st->map, st->reg->sample_rate_div, d);
728 goto fifo_rate_fail_power_off;
729 st->chip_config.divider = d;
731 result = inv_mpu6050_set_lpf(st, fifo_rate);
733 goto fifo_rate_fail_power_off;
735 /* update rate for magn, noop if not present in chip */
736 result = inv_mpu_magn_set_rate(st, fifo_rate);
738 goto fifo_rate_fail_power_off;
740 fifo_rate_fail_power_off:
741 result |= inv_mpu6050_set_power_itg(st, false);
742 fifo_rate_fail_unlock:
743 mutex_unlock(&st->lock);
744 iio_device_release_direct_mode(indio_dev);
752 * inv_fifo_rate_show() - Get the current sampling rate.
755 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
758 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
761 mutex_lock(&st->lock);
762 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
763 mutex_unlock(&st->lock);
765 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
769 * inv_attr_show() - calling this function will show current
772 * Deprecated in favor of IIO mounting matrix API.
774 * See inv_get_mount_matrix()
776 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
779 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
780 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
783 switch (this_attr->address) {
785 * In MPU6050, the two matrix are the same because gyro and accel
786 * are integrated in one chip
788 case ATTR_GYRO_MATRIX:
789 case ATTR_ACCL_MATRIX:
790 m = st->plat_data.orientation;
792 return scnprintf(buf, PAGE_SIZE,
793 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
794 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
801 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
803 * @indio_dev: The IIO device
804 * @trig: The new trigger
806 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
807 * device, -EINVAL otherwise.
809 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
810 struct iio_trigger *trig)
812 struct inv_mpu6050_state *st = iio_priv(indio_dev);
814 if (st->trig != trig)
820 static const struct iio_mount_matrix *
821 inv_get_mount_matrix(const struct iio_dev *indio_dev,
822 const struct iio_chan_spec *chan)
824 struct inv_mpu6050_state *data = iio_priv(indio_dev);
825 const struct iio_mount_matrix *matrix;
827 if (chan->type == IIO_MAGN)
828 matrix = &data->magn_orient;
830 matrix = &data->orientation;
835 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
836 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
840 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
844 .channel2 = _channel2, \
845 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
846 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
847 BIT(IIO_CHAN_INFO_CALIBBIAS), \
848 .scan_index = _index, \
854 .endianness = IIO_BE, \
856 .ext_info = inv_ext_info, \
859 static const struct iio_chan_spec inv_mpu_channels[] = {
860 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
862 * Note that temperature should only be via polled reading only,
863 * not the final scan elements output.
867 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
868 | BIT(IIO_CHAN_INFO_OFFSET)
869 | BIT(IIO_CHAN_INFO_SCALE),
872 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
873 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
874 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
876 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
877 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
878 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
881 static const unsigned long inv_mpu_scan_masks[] = {
883 BIT(INV_MPU6050_SCAN_ACCL_X)
884 | BIT(INV_MPU6050_SCAN_ACCL_Y)
885 | BIT(INV_MPU6050_SCAN_ACCL_Z),
887 BIT(INV_MPU6050_SCAN_GYRO_X)
888 | BIT(INV_MPU6050_SCAN_GYRO_Y)
889 | BIT(INV_MPU6050_SCAN_GYRO_Z),
890 /* 6-axis accel + gyro */
891 BIT(INV_MPU6050_SCAN_ACCL_X)
892 | BIT(INV_MPU6050_SCAN_ACCL_Y)
893 | BIT(INV_MPU6050_SCAN_ACCL_Z)
894 | BIT(INV_MPU6050_SCAN_GYRO_X)
895 | BIT(INV_MPU6050_SCAN_GYRO_Y)
896 | BIT(INV_MPU6050_SCAN_GYRO_Z),
900 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
904 .channel2 = _chan2, \
905 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
906 BIT(IIO_CHAN_INFO_RAW), \
907 .scan_index = _index, \
913 .endianness = IIO_BE, \
915 .ext_info = inv_ext_info, \
918 static const struct iio_chan_spec inv_mpu9250_channels[] = {
919 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
921 * Note that temperature should only be via polled reading only,
922 * not the final scan elements output.
926 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
927 | BIT(IIO_CHAN_INFO_OFFSET)
928 | BIT(IIO_CHAN_INFO_SCALE),
931 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
932 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
933 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
935 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
936 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
937 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
939 /* Magnetometer resolution is 16 bits */
940 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
941 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
942 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
945 static const unsigned long inv_mpu9x50_scan_masks[] = {
947 BIT(INV_MPU6050_SCAN_ACCL_X)
948 | BIT(INV_MPU6050_SCAN_ACCL_Y)
949 | BIT(INV_MPU6050_SCAN_ACCL_Z),
951 BIT(INV_MPU6050_SCAN_GYRO_X)
952 | BIT(INV_MPU6050_SCAN_GYRO_Y)
953 | BIT(INV_MPU6050_SCAN_GYRO_Z),
955 BIT(INV_MPU9X50_SCAN_MAGN_X)
956 | BIT(INV_MPU9X50_SCAN_MAGN_Y)
957 | BIT(INV_MPU9X50_SCAN_MAGN_Z),
958 /* 6-axis accel + gyro */
959 BIT(INV_MPU6050_SCAN_ACCL_X)
960 | BIT(INV_MPU6050_SCAN_ACCL_Y)
961 | BIT(INV_MPU6050_SCAN_ACCL_Z)
962 | BIT(INV_MPU6050_SCAN_GYRO_X)
963 | BIT(INV_MPU6050_SCAN_GYRO_Y)
964 | BIT(INV_MPU6050_SCAN_GYRO_Z),
965 /* 6-axis accel + magn */
966 BIT(INV_MPU6050_SCAN_ACCL_X)
967 | BIT(INV_MPU6050_SCAN_ACCL_Y)
968 | BIT(INV_MPU6050_SCAN_ACCL_Z)
969 | BIT(INV_MPU9X50_SCAN_MAGN_X)
970 | BIT(INV_MPU9X50_SCAN_MAGN_Y)
971 | BIT(INV_MPU9X50_SCAN_MAGN_Z),
972 /* 6-axis gyro + magn */
973 BIT(INV_MPU6050_SCAN_GYRO_X)
974 | BIT(INV_MPU6050_SCAN_GYRO_Y)
975 | BIT(INV_MPU6050_SCAN_GYRO_Z)
976 | BIT(INV_MPU9X50_SCAN_MAGN_X)
977 | BIT(INV_MPU9X50_SCAN_MAGN_Y)
978 | BIT(INV_MPU9X50_SCAN_MAGN_Z),
979 /* 9-axis accel + gyro + magn */
980 BIT(INV_MPU6050_SCAN_ACCL_X)
981 | BIT(INV_MPU6050_SCAN_ACCL_Y)
982 | BIT(INV_MPU6050_SCAN_ACCL_Z)
983 | BIT(INV_MPU6050_SCAN_GYRO_X)
984 | BIT(INV_MPU6050_SCAN_GYRO_Y)
985 | BIT(INV_MPU6050_SCAN_GYRO_Z)
986 | BIT(INV_MPU9X50_SCAN_MAGN_X)
987 | BIT(INV_MPU9X50_SCAN_MAGN_Y)
988 | BIT(INV_MPU9X50_SCAN_MAGN_Z),
992 static const struct iio_chan_spec inv_icm20602_channels[] = {
993 IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
996 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
997 | BIT(IIO_CHAN_INFO_OFFSET)
998 | BIT(IIO_CHAN_INFO_SCALE),
999 .scan_index = INV_ICM20602_SCAN_TEMP,
1005 .endianness = IIO_BE,
1009 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_ICM20602_SCAN_GYRO_X),
1010 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_ICM20602_SCAN_GYRO_Y),
1011 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_ICM20602_SCAN_GYRO_Z),
1013 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_ICM20602_SCAN_ACCL_Y),
1014 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_ICM20602_SCAN_ACCL_X),
1015 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
1018 static const unsigned long inv_icm20602_scan_masks[] = {
1019 /* 3-axis accel + temp (mandatory) */
1020 BIT(INV_ICM20602_SCAN_ACCL_X)
1021 | BIT(INV_ICM20602_SCAN_ACCL_Y)
1022 | BIT(INV_ICM20602_SCAN_ACCL_Z)
1023 | BIT(INV_ICM20602_SCAN_TEMP),
1024 /* 3-axis gyro + temp (mandatory) */
1025 BIT(INV_ICM20602_SCAN_GYRO_X)
1026 | BIT(INV_ICM20602_SCAN_GYRO_Y)
1027 | BIT(INV_ICM20602_SCAN_GYRO_Z)
1028 | BIT(INV_ICM20602_SCAN_TEMP),
1029 /* 6-axis accel + gyro + temp (mandatory) */
1030 BIT(INV_ICM20602_SCAN_ACCL_X)
1031 | BIT(INV_ICM20602_SCAN_ACCL_Y)
1032 | BIT(INV_ICM20602_SCAN_ACCL_Z)
1033 | BIT(INV_ICM20602_SCAN_GYRO_X)
1034 | BIT(INV_ICM20602_SCAN_GYRO_Y)
1035 | BIT(INV_ICM20602_SCAN_GYRO_Z)
1036 | BIT(INV_ICM20602_SCAN_TEMP),
1041 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1042 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1043 * low-pass filter. Specifically, each of these sampling rates are about twice
1044 * the bandwidth of a corresponding low-pass filter, which should eliminate
1045 * aliasing following the Nyquist principle. By picking a frequency different
1046 * from these, the user risks aliasing effects.
1048 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1049 static IIO_CONST_ATTR(in_anglvel_scale_available,
1050 "0.000133090 0.000266181 0.000532362 0.001064724");
1051 static IIO_CONST_ATTR(in_accel_scale_available,
1052 "0.000598 0.001196 0.002392 0.004785");
1053 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1054 inv_mpu6050_fifo_rate_store);
1056 /* Deprecated: kept for userspace backward compatibility. */
1057 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1059 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1062 static struct attribute *inv_attributes[] = {
1063 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1064 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1065 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1066 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1067 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1068 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1072 static const struct attribute_group inv_attribute_group = {
1073 .attrs = inv_attributes
1076 static const struct iio_info mpu_info = {
1077 .read_raw = &inv_mpu6050_read_raw,
1078 .write_raw = &inv_mpu6050_write_raw,
1079 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1080 .attrs = &inv_attribute_group,
1081 .validate_trigger = inv_mpu6050_validate_trigger,
1085 * inv_check_and_setup_chip() - check and setup chip.
1087 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1090 unsigned int regval;
1093 st->hw = &hw_info[st->chip_type];
1094 st->reg = hw_info[st->chip_type].reg;
1096 /* check chip self-identification */
1097 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1100 if (regval != st->hw->whoami) {
1101 /* check whoami against all possible values */
1102 for (i = 0; i < INV_NUM_PARTS; ++i) {
1103 if (regval == hw_info[i].whoami) {
1104 dev_warn(regmap_get_device(st->map),
1105 "whoami mismatch got %#02x (%s)"
1106 "expected %#02hhx (%s)\n",
1107 regval, hw_info[i].name,
1108 st->hw->whoami, st->hw->name);
1112 if (i >= INV_NUM_PARTS) {
1113 dev_err(regmap_get_device(st->map),
1114 "invalid whoami %#02x expected %#02hhx (%s)\n",
1115 regval, st->hw->whoami, st->hw->name);
1120 /* reset to make sure previous state are not there */
1121 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1122 INV_MPU6050_BIT_H_RESET);
1125 msleep(INV_MPU6050_POWER_UP_TIME);
1128 * Turn power on. After reset, the sleep bit could be on
1129 * or off depending on the OTP settings. Turning power on
1130 * make it in a definite state as well as making the hardware
1131 * state align with the software state
1133 result = inv_mpu6050_set_power_itg(st, true);
1137 result = inv_mpu6050_switch_engine(st, false,
1138 INV_MPU6050_BIT_PWR_ACCL_STBY);
1140 goto error_power_off;
1141 result = inv_mpu6050_switch_engine(st, false,
1142 INV_MPU6050_BIT_PWR_GYRO_STBY);
1144 goto error_power_off;
1146 return inv_mpu6050_set_power_itg(st, false);
1149 inv_mpu6050_set_power_itg(st, false);
1153 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1157 result = regulator_enable(st->vddio_supply);
1159 dev_err(regmap_get_device(st->map),
1160 "Failed to enable vddio regulator: %d\n", result);
1162 /* Give the device a little bit of time to start up. */
1163 usleep_range(35000, 70000);
1169 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1173 result = regulator_disable(st->vddio_supply);
1175 dev_err(regmap_get_device(st->map),
1176 "Failed to disable vddio regulator: %d\n", result);
1181 static void inv_mpu_core_disable_regulator_action(void *_data)
1183 struct inv_mpu6050_state *st = _data;
1186 result = regulator_disable(st->vdd_supply);
1188 dev_err(regmap_get_device(st->map),
1189 "Failed to disable vdd regulator: %d\n", result);
1191 inv_mpu_core_disable_regulator_vddio(st);
1194 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1195 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1197 struct inv_mpu6050_state *st;
1198 struct iio_dev *indio_dev;
1199 struct inv_mpu6050_platform_data *pdata;
1200 struct device *dev = regmap_get_device(regmap);
1202 struct irq_data *desc;
1205 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1209 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1210 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1211 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1215 st = iio_priv(indio_dev);
1216 mutex_init(&st->lock);
1217 st->chip_type = chip_type;
1218 st->powerup_count = 0;
1222 pdata = dev_get_platdata(dev);
1224 result = iio_read_mount_matrix(dev, "mount-matrix",
1227 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1232 st->plat_data = *pdata;
1235 desc = irq_get_irq_data(irq);
1237 dev_err(dev, "Could not find IRQ %d\n", irq);
1241 irq_type = irqd_get_trigger_type(desc);
1243 irq_type = IRQF_TRIGGER_RISING;
1244 if (irq_type == IRQF_TRIGGER_RISING)
1245 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1246 else if (irq_type == IRQF_TRIGGER_FALLING)
1247 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1248 else if (irq_type == IRQF_TRIGGER_HIGH)
1249 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1250 INV_MPU6050_LATCH_INT_EN;
1251 else if (irq_type == IRQF_TRIGGER_LOW)
1252 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1253 INV_MPU6050_LATCH_INT_EN;
1255 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1260 st->vdd_supply = devm_regulator_get(dev, "vdd");
1261 if (IS_ERR(st->vdd_supply)) {
1262 if (PTR_ERR(st->vdd_supply) != -EPROBE_DEFER)
1263 dev_err(dev, "Failed to get vdd regulator %d\n",
1264 (int)PTR_ERR(st->vdd_supply));
1266 return PTR_ERR(st->vdd_supply);
1269 st->vddio_supply = devm_regulator_get(dev, "vddio");
1270 if (IS_ERR(st->vddio_supply)) {
1271 if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
1272 dev_err(dev, "Failed to get vddio regulator %d\n",
1273 (int)PTR_ERR(st->vddio_supply));
1275 return PTR_ERR(st->vddio_supply);
1278 result = regulator_enable(st->vdd_supply);
1280 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1284 result = inv_mpu_core_enable_regulator_vddio(st);
1286 regulator_disable(st->vdd_supply);
1290 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1293 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1298 /* fill magnetometer orientation */
1299 result = inv_mpu_magn_set_orient(st);
1303 /* power is turned on inside check chip type*/
1304 result = inv_check_and_setup_chip(st);
1308 result = inv_mpu6050_init_config(indio_dev);
1310 dev_err(dev, "Could not initialize device.\n");
1314 dev_set_drvdata(dev, indio_dev);
1315 indio_dev->dev.parent = dev;
1316 /* name will be NULL when enumerated via ACPI */
1318 indio_dev->name = name;
1320 indio_dev->name = dev_name(dev);
1322 /* requires parent device set in indio_dev */
1323 if (inv_mpu_bus_setup)
1324 inv_mpu_bus_setup(indio_dev);
1326 switch (chip_type) {
1330 * Use magnetometer inside the chip only if there is no i2c
1331 * auxiliary device in use.
1333 if (!st->magn_disabled) {
1334 indio_dev->channels = inv_mpu9250_channels;
1335 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1336 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1338 indio_dev->channels = inv_mpu_channels;
1339 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1340 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1344 indio_dev->channels = inv_icm20602_channels;
1345 indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
1346 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1349 indio_dev->channels = inv_mpu_channels;
1350 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1351 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1355 indio_dev->info = &mpu_info;
1356 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1358 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1359 iio_pollfunc_store_time,
1360 inv_mpu6050_read_fifo,
1363 dev_err(dev, "configure buffer fail %d\n", result);
1366 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1368 dev_err(dev, "trigger probe fail %d\n", result);
1372 result = devm_iio_device_register(dev, indio_dev);
1374 dev_err(dev, "IIO register fail %d\n", result);
1380 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1382 #ifdef CONFIG_PM_SLEEP
1384 static int inv_mpu_resume(struct device *dev)
1386 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1389 mutex_lock(&st->lock);
1390 result = inv_mpu_core_enable_regulator_vddio(st);
1394 result = inv_mpu6050_set_power_itg(st, true);
1396 mutex_unlock(&st->lock);
1401 static int inv_mpu_suspend(struct device *dev)
1403 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1406 mutex_lock(&st->lock);
1407 result = inv_mpu6050_set_power_itg(st, false);
1408 inv_mpu_core_disable_regulator_vddio(st);
1409 mutex_unlock(&st->lock);
1413 #endif /* CONFIG_PM_SLEEP */
1415 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
1416 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1418 MODULE_AUTHOR("Invensense Corporation");
1419 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1420 MODULE_LICENSE("GPL");