1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
5 * Copyright (C) 2013, Angelo Compagnucci
6 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
8 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
9 * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
12 * This driver exports the value of analog input voltage to sysfs, the
16 #include <linux/err.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/sysfs.h>
22 #include <asm/unaligned.h>
24 #include <linux/iio/iio.h>
25 #include <linux/iio/sysfs.h>
28 #define MCP3422_CHANNEL_MASK 0x60
29 #define MCP3422_PGA_MASK 0x03
30 #define MCP3422_SRATE_MASK 0x0C
31 #define MCP3422_SRATE_240 0x0
32 #define MCP3422_SRATE_60 0x1
33 #define MCP3422_SRATE_15 0x2
34 #define MCP3422_SRATE_3 0x3
35 #define MCP3422_PGA_1 0
36 #define MCP3422_PGA_2 1
37 #define MCP3422_PGA_4 2
38 #define MCP3422_PGA_8 3
39 #define MCP3422_CONT_SAMPLING 0x10
41 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
42 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
43 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
45 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
46 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
47 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
49 #define MCP3422_CHAN(_index) \
51 .type = IIO_VOLTAGE, \
54 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
55 | BIT(IIO_CHAN_INFO_SCALE), \
56 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
59 static const int mcp3422_scales[4][4] = {
60 { 1000000, 500000, 250000, 125000 },
61 { 250000, 125000, 62500, 31250 },
62 { 62500, 31250, 15625, 7812 },
63 { 15625, 7812, 3906, 1953 } };
65 /* Constant msleep times for data acquisitions */
66 static const int mcp3422_read_times[4] = {
67 [MCP3422_SRATE_240] = 1000 / 240,
68 [MCP3422_SRATE_60] = 1000 / 60,
69 [MCP3422_SRATE_15] = 1000 / 15,
70 [MCP3422_SRATE_3] = 1000 / 3 };
72 /* sample rates to integer conversion table */
73 static const int mcp3422_sample_rates[4] = {
74 [MCP3422_SRATE_240] = 240,
75 [MCP3422_SRATE_60] = 60,
76 [MCP3422_SRATE_15] = 15,
77 [MCP3422_SRATE_3] = 3 };
79 /* sample rates to sign extension table */
80 static const int mcp3422_sign_extend[4] = {
81 [MCP3422_SRATE_240] = 11,
82 [MCP3422_SRATE_60] = 13,
83 [MCP3422_SRATE_15] = 15,
84 [MCP3422_SRATE_3] = 17 };
86 /* Client data (each client gets its own) */
88 struct i2c_client *i2c;
95 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
99 mutex_lock(&adc->lock);
101 ret = i2c_master_send(adc->i2c, &newconfig, 1);
103 adc->config = newconfig;
107 mutex_unlock(&adc->lock);
112 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
115 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
116 u8 buf[4] = {0, 0, 0, 0};
119 if (sample_rate == MCP3422_SRATE_3) {
120 ret = i2c_master_recv(adc->i2c, buf, 4);
121 temp = get_unaligned_be24(&buf[0]);
124 ret = i2c_master_recv(adc->i2c, buf, 3);
125 temp = get_unaligned_be16(&buf[0]);
129 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
134 static int mcp3422_read_channel(struct mcp3422 *adc,
135 struct iio_chan_spec const *channel, int *value)
139 u8 req_channel = channel->channel;
141 if (req_channel != MCP3422_CHANNEL(adc->config)) {
142 config = adc->config;
143 config &= ~MCP3422_CHANNEL_MASK;
144 config |= MCP3422_CHANNEL_VALUE(req_channel);
145 config &= ~MCP3422_PGA_MASK;
146 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
147 ret = mcp3422_update_config(adc, config);
150 msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
153 return mcp3422_read(adc, value, &config);
156 static int mcp3422_read_raw(struct iio_dev *iio,
157 struct iio_chan_spec const *channel, int *val1,
158 int *val2, long mask)
160 struct mcp3422 *adc = iio_priv(iio);
163 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
164 u8 pga = MCP3422_PGA(adc->config);
167 case IIO_CHAN_INFO_RAW:
168 err = mcp3422_read_channel(adc, channel, val1);
173 case IIO_CHAN_INFO_SCALE:
176 *val2 = mcp3422_scales[sample_rate][pga];
177 return IIO_VAL_INT_PLUS_NANO;
179 case IIO_CHAN_INFO_SAMP_FREQ:
180 *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
190 static int mcp3422_write_raw(struct iio_dev *iio,
191 struct iio_chan_spec const *channel, int val1,
194 struct mcp3422 *adc = iio_priv(iio);
196 u8 config = adc->config;
197 u8 req_channel = channel->channel;
198 u8 sample_rate = MCP3422_SAMPLE_RATE(config);
202 case IIO_CHAN_INFO_SCALE:
206 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
207 if (val2 == mcp3422_scales[sample_rate][i]) {
208 adc->pga[req_channel] = i;
210 config &= ~MCP3422_CHANNEL_MASK;
211 config |= MCP3422_CHANNEL_VALUE(req_channel);
212 config &= ~MCP3422_PGA_MASK;
213 config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
215 return mcp3422_update_config(adc, config);
220 case IIO_CHAN_INFO_SAMP_FREQ:
223 temp = MCP3422_SRATE_240;
226 temp = MCP3422_SRATE_60;
229 temp = MCP3422_SRATE_15;
234 temp = MCP3422_SRATE_3;
240 config &= ~MCP3422_CHANNEL_MASK;
241 config |= MCP3422_CHANNEL_VALUE(req_channel);
242 config &= ~MCP3422_SRATE_MASK;
243 config |= MCP3422_SAMPLE_RATE_VALUE(temp);
245 return mcp3422_update_config(adc, config);
254 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
255 struct iio_chan_spec const *chan, long mask)
258 case IIO_CHAN_INFO_SCALE:
259 return IIO_VAL_INT_PLUS_NANO;
260 case IIO_CHAN_INFO_SAMP_FREQ:
261 return IIO_VAL_INT_PLUS_MICRO;
267 static ssize_t mcp3422_show_samp_freqs(struct device *dev,
268 struct device_attribute *attr, char *buf)
270 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
273 return sprintf(buf, "240 60 15\n");
275 return sprintf(buf, "240 60 15 3\n");
278 static ssize_t mcp3422_show_scales(struct device *dev,
279 struct device_attribute *attr, char *buf)
281 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
282 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
284 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
285 mcp3422_scales[sample_rate][0],
286 mcp3422_scales[sample_rate][1],
287 mcp3422_scales[sample_rate][2],
288 mcp3422_scales[sample_rate][3]);
291 static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
292 mcp3422_show_samp_freqs, NULL, 0);
293 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
294 mcp3422_show_scales, NULL, 0);
296 static struct attribute *mcp3422_attributes[] = {
297 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
298 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
302 static const struct attribute_group mcp3422_attribute_group = {
303 .attrs = mcp3422_attributes,
306 static const struct iio_chan_spec mcp3421_channels[] = {
310 static const struct iio_chan_spec mcp3422_channels[] = {
315 static const struct iio_chan_spec mcp3424_channels[] = {
322 static const struct iio_info mcp3422_info = {
323 .read_raw = mcp3422_read_raw,
324 .write_raw = mcp3422_write_raw,
325 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
326 .attrs = &mcp3422_attribute_group,
329 static int mcp3422_probe(struct i2c_client *client,
330 const struct i2c_device_id *id)
332 struct iio_dev *indio_dev;
337 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
340 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
344 adc = iio_priv(indio_dev);
346 adc->id = (u8)(id->driver_data);
348 mutex_init(&adc->lock);
350 indio_dev->name = dev_name(&client->dev);
351 indio_dev->modes = INDIO_DIRECT_MODE;
352 indio_dev->info = &mcp3422_info;
357 indio_dev->channels = mcp3421_channels;
358 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
364 indio_dev->channels = mcp3422_channels;
365 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
369 indio_dev->channels = mcp3424_channels;
370 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
374 /* meaningful default configuration */
375 config = (MCP3422_CONT_SAMPLING
376 | MCP3422_CHANNEL_VALUE(0)
377 | MCP3422_PGA_VALUE(MCP3422_PGA_1)
378 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
379 err = mcp3422_update_config(adc, config);
383 err = devm_iio_device_register(&client->dev, indio_dev);
387 i2c_set_clientdata(client, indio_dev);
392 static const struct i2c_device_id mcp3422_id[] = {
403 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
406 static const struct of_device_id mcp3422_of_match[] = {
407 { .compatible = "mcp3422" },
410 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
413 static struct i2c_driver mcp3422_driver = {
416 .of_match_table = of_match_ptr(mcp3422_of_match),
418 .probe = mcp3422_probe,
419 .id_table = mcp3422_id,
421 module_i2c_driver(mcp3422_driver);
423 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
424 MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
425 MODULE_LICENSE("GPL v2");