2 * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
4 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
10 * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
12 * TODO: orientation / freefall events, autosleep
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19 #include <linux/iio/trigger_consumer.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/triggered_buffer.h>
22 #include <linux/iio/events.h>
23 #include <linux/delay.h>
25 #define MMA8452_STATUS 0x00
26 #define MMA8452_OUT_X 0x01 /* MSB first, 12-bit */
27 #define MMA8452_OUT_Y 0x03
28 #define MMA8452_OUT_Z 0x05
29 #define MMA8452_INT_SRC 0x0c
30 #define MMA8452_WHO_AM_I 0x0d
31 #define MMA8452_DATA_CFG 0x0e
32 #define MMA8452_TRANSIENT_CFG 0x1d
33 #define MMA8452_TRANSIENT_CFG_ELE BIT(4)
34 #define MMA8452_TRANSIENT_CFG_CHAN(chan) BIT(chan + 1)
35 #define MMA8452_TRANSIENT_SRC 0x1e
36 #define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1)
37 #define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3)
38 #define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5)
39 #define MMA8452_TRANSIENT_THS 0x1f
40 #define MMA8452_TRANSIENT_THS_MASK 0x7f
41 #define MMA8452_TRANSIENT_COUNT 0x20
42 #define MMA8452_OFF_X 0x2f
43 #define MMA8452_OFF_Y 0x30
44 #define MMA8452_OFF_Z 0x31
45 #define MMA8452_CTRL_REG1 0x2a
46 #define MMA8452_CTRL_REG2 0x2b
47 #define MMA8452_CTRL_REG2_RST BIT(6)
48 #define MMA8452_CTRL_REG4 0x2d
49 #define MMA8452_CTRL_REG5 0x2e
51 #define MMA8452_MAX_REG 0x31
53 #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
55 #define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
56 #define MMA8452_CTRL_DR_SHIFT 3
57 #define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
58 #define MMA8452_CTRL_ACTIVE BIT(0)
60 #define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
61 #define MMA8452_DATA_CFG_FS_2G 0
62 #define MMA8452_DATA_CFG_FS_4G 1
63 #define MMA8452_DATA_CFG_FS_8G 2
65 #define MMA8452_INT_TRANS BIT(5)
67 #define MMA8452_DEVICE_ID 0x2a
70 struct i2c_client *client;
76 static int mma8452_drdy(struct mma8452_data *data)
81 int ret = i2c_smbus_read_byte_data(data->client,
85 if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
90 dev_err(&data->client->dev, "data not ready\n");
94 static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
96 int ret = mma8452_drdy(data);
99 return i2c_smbus_read_i2c_block_data(data->client,
100 MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
103 static ssize_t mma8452_show_int_plus_micros(char *buf,
104 const int (*vals)[2], int n)
109 len += scnprintf(buf + len, PAGE_SIZE - len,
110 "%d.%06d ", vals[n][0], vals[n][1]);
112 /* replace trailing space by newline */
118 static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
122 if (val == vals[n][0] && val2 == vals[n][1])
128 static int mma8452_get_odr_index(struct mma8452_data *data)
130 return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
131 MMA8452_CTRL_DR_SHIFT;
134 static const int mma8452_samp_freq[8][2] = {
135 {800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
136 {6, 250000}, {1, 560000}
140 * Hardware has fullscale of -2G, -4G, -8G corresponding to raw value -2048
141 * The userspace interface uses m/s^2 and we declare micro units
142 * So scale factor is given by:
143 * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
145 static const int mma8452_scales[3][2] = {
146 {0, 9577}, {0, 19154}, {0, 38307}
149 /* Datasheet table 35 (step time vs sample frequency) */
150 static const int mma8452_transient_time_step_us[8] = {
161 static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
162 struct device_attribute *attr, char *buf)
164 return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
165 ARRAY_SIZE(mma8452_samp_freq));
168 static ssize_t mma8452_show_scale_avail(struct device *dev,
169 struct device_attribute *attr, char *buf)
171 return mma8452_show_int_plus_micros(buf, mma8452_scales,
172 ARRAY_SIZE(mma8452_scales));
175 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
176 static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
177 mma8452_show_scale_avail, NULL, 0);
179 static int mma8452_get_samp_freq_index(struct mma8452_data *data,
182 return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
183 ARRAY_SIZE(mma8452_samp_freq), val, val2);
186 static int mma8452_get_scale_index(struct mma8452_data *data,
189 return mma8452_get_int_plus_micros_index(mma8452_scales,
190 ARRAY_SIZE(mma8452_scales), val, val2);
193 static int mma8452_read_raw(struct iio_dev *indio_dev,
194 struct iio_chan_spec const *chan,
195 int *val, int *val2, long mask)
197 struct mma8452_data *data = iio_priv(indio_dev);
202 case IIO_CHAN_INFO_RAW:
203 if (iio_buffer_enabled(indio_dev))
206 mutex_lock(&data->lock);
207 ret = mma8452_read(data, buffer);
208 mutex_unlock(&data->lock);
211 *val = sign_extend32(
212 be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
214 case IIO_CHAN_INFO_SCALE:
215 i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
216 *val = mma8452_scales[i][0];
217 *val2 = mma8452_scales[i][1];
218 return IIO_VAL_INT_PLUS_MICRO;
219 case IIO_CHAN_INFO_SAMP_FREQ:
220 i = mma8452_get_odr_index(data);
221 *val = mma8452_samp_freq[i][0];
222 *val2 = mma8452_samp_freq[i][1];
223 return IIO_VAL_INT_PLUS_MICRO;
224 case IIO_CHAN_INFO_CALIBBIAS:
225 ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
229 *val = sign_extend32(ret, 7);
235 static int mma8452_standby(struct mma8452_data *data)
237 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
238 data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
241 static int mma8452_active(struct mma8452_data *data)
243 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
247 static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
251 mutex_lock(&data->lock);
253 /* config can only be changed when in standby */
254 ret = mma8452_standby(data);
258 ret = i2c_smbus_write_byte_data(data->client, reg, val);
262 ret = mma8452_active(data);
268 mutex_unlock(&data->lock);
272 static int mma8452_write_raw(struct iio_dev *indio_dev,
273 struct iio_chan_spec const *chan,
274 int val, int val2, long mask)
276 struct mma8452_data *data = iio_priv(indio_dev);
279 if (iio_buffer_enabled(indio_dev))
283 case IIO_CHAN_INFO_SAMP_FREQ:
284 i = mma8452_get_samp_freq_index(data, val, val2);
288 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
289 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
290 return mma8452_change_config(data, MMA8452_CTRL_REG1,
292 case IIO_CHAN_INFO_SCALE:
293 i = mma8452_get_scale_index(data, val, val2);
296 data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
298 return mma8452_change_config(data, MMA8452_DATA_CFG,
300 case IIO_CHAN_INFO_CALIBBIAS:
301 if (val < -128 || val > 127)
303 return mma8452_change_config(data, MMA8452_OFF_X +
304 chan->scan_index, val);
310 static int mma8452_read_thresh(struct iio_dev *indio_dev,
311 const struct iio_chan_spec *chan,
312 enum iio_event_type type,
313 enum iio_event_direction dir,
314 enum iio_event_info info,
317 struct mma8452_data *data = iio_priv(indio_dev);
321 case IIO_EV_INFO_VALUE:
322 ret = i2c_smbus_read_byte_data(data->client,
323 MMA8452_TRANSIENT_THS);
327 *val = ret & MMA8452_TRANSIENT_THS_MASK;
330 case IIO_EV_INFO_PERIOD:
331 ret = i2c_smbus_read_byte_data(data->client,
332 MMA8452_TRANSIENT_COUNT);
336 us = ret * mma8452_transient_time_step_us[
337 mma8452_get_odr_index(data)];
338 *val = us / USEC_PER_SEC;
339 *val2 = us % USEC_PER_SEC;
340 return IIO_VAL_INT_PLUS_MICRO;
347 static int mma8452_write_thresh(struct iio_dev *indio_dev,
348 const struct iio_chan_spec *chan,
349 enum iio_event_type type,
350 enum iio_event_direction dir,
351 enum iio_event_info info,
354 struct mma8452_data *data = iio_priv(indio_dev);
358 case IIO_EV_INFO_VALUE:
359 return mma8452_change_config(data, MMA8452_TRANSIENT_THS,
360 val & MMA8452_TRANSIENT_THS_MASK);
362 case IIO_EV_INFO_PERIOD:
363 steps = (val * USEC_PER_SEC + val2) /
364 mma8452_transient_time_step_us[
365 mma8452_get_odr_index(data)];
370 return mma8452_change_config(data, MMA8452_TRANSIENT_COUNT,
377 static int mma8452_read_event_config(struct iio_dev *indio_dev,
378 const struct iio_chan_spec *chan,
379 enum iio_event_type type,
380 enum iio_event_direction dir)
382 struct mma8452_data *data = iio_priv(indio_dev);
385 ret = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_CFG);
389 return ret & MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index) ? 1 : 0;
392 static int mma8452_write_event_config(struct iio_dev *indio_dev,
393 const struct iio_chan_spec *chan,
394 enum iio_event_type type,
395 enum iio_event_direction dir,
398 struct mma8452_data *data = iio_priv(indio_dev);
401 val = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_CFG);
406 val |= MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index);
408 val &= ~MMA8452_TRANSIENT_CFG_CHAN(chan->scan_index);
410 val |= MMA8452_TRANSIENT_CFG_ELE;
412 return mma8452_change_config(data, MMA8452_TRANSIENT_CFG, val);
415 static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
417 struct mma8452_data *data = iio_priv(indio_dev);
418 s64 ts = iio_get_time_ns();
421 src = i2c_smbus_read_byte_data(data->client, MMA8452_TRANSIENT_SRC);
425 if (src & MMA8452_TRANSIENT_SRC_XTRANSE)
426 iio_push_event(indio_dev,
427 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
432 if (src & MMA8452_TRANSIENT_SRC_YTRANSE)
433 iio_push_event(indio_dev,
434 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
439 if (src & MMA8452_TRANSIENT_SRC_ZTRANSE)
440 iio_push_event(indio_dev,
441 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
447 static irqreturn_t mma8452_interrupt(int irq, void *p)
449 struct iio_dev *indio_dev = p;
450 struct mma8452_data *data = iio_priv(indio_dev);
453 src = i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC);
457 if (src & MMA8452_INT_TRANS) {
458 mma8452_transient_interrupt(indio_dev);
465 static irqreturn_t mma8452_trigger_handler(int irq, void *p)
467 struct iio_poll_func *pf = p;
468 struct iio_dev *indio_dev = pf->indio_dev;
469 struct mma8452_data *data = iio_priv(indio_dev);
470 u8 buffer[16]; /* 3 16-bit channels + padding + ts */
473 ret = mma8452_read(data, (__be16 *) buffer);
477 iio_push_to_buffers_with_timestamp(indio_dev, buffer,
481 iio_trigger_notify_done(indio_dev->trig);
485 static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
486 unsigned reg, unsigned writeval,
490 struct mma8452_data *data = iio_priv(indio_dev);
492 if (reg > MMA8452_MAX_REG)
496 return mma8452_change_config(data, reg, writeval);
498 ret = i2c_smbus_read_byte_data(data->client, reg);
507 static const struct iio_event_spec mma8452_transient_event[] = {
509 .type = IIO_EV_TYPE_THRESH,
510 .dir = IIO_EV_DIR_RISING,
511 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
512 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
513 BIT(IIO_EV_INFO_PERIOD)
518 * Threshold is configured in fixed 8G/127 steps regardless of
519 * currently selected scale for measurement.
521 static IIO_CONST_ATTR_NAMED(accel_transient_scale, in_accel_scale, "0.617742");
523 static struct attribute *mma8452_event_attributes[] = {
524 &iio_const_attr_accel_transient_scale.dev_attr.attr,
528 static struct attribute_group mma8452_event_attribute_group = {
529 .attrs = mma8452_event_attributes,
533 #define MMA8452_CHANNEL(axis, idx) { \
536 .channel2 = IIO_MOD_##axis, \
537 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
538 BIT(IIO_CHAN_INFO_CALIBBIAS), \
539 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
540 BIT(IIO_CHAN_INFO_SCALE), \
547 .endianness = IIO_BE, \
549 .event_spec = mma8452_transient_event, \
550 .num_event_specs = ARRAY_SIZE(mma8452_transient_event), \
553 static const struct iio_chan_spec mma8452_channels[] = {
554 MMA8452_CHANNEL(X, 0),
555 MMA8452_CHANNEL(Y, 1),
556 MMA8452_CHANNEL(Z, 2),
557 IIO_CHAN_SOFT_TIMESTAMP(3),
560 static struct attribute *mma8452_attributes[] = {
561 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
562 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
566 static const struct attribute_group mma8452_group = {
567 .attrs = mma8452_attributes,
570 static const struct iio_info mma8452_info = {
571 .attrs = &mma8452_group,
572 .read_raw = &mma8452_read_raw,
573 .write_raw = &mma8452_write_raw,
574 .event_attrs = &mma8452_event_attribute_group,
575 .read_event_value = &mma8452_read_thresh,
576 .write_event_value = &mma8452_write_thresh,
577 .read_event_config = &mma8452_read_event_config,
578 .write_event_config = &mma8452_write_event_config,
579 .debugfs_reg_access = &mma8452_reg_access_dbg,
580 .driver_module = THIS_MODULE,
583 static const unsigned long mma8452_scan_masks[] = {0x7, 0};
585 static int mma8452_reset(struct i2c_client *client)
590 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
591 MMA8452_CTRL_REG2_RST);
595 for (i = 0; i < 10; i++) {
596 usleep_range(100, 200);
597 ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
599 continue; /* I2C comm reset */
602 if (!(ret & MMA8452_CTRL_REG2_RST))
609 static int mma8452_probe(struct i2c_client *client,
610 const struct i2c_device_id *id)
612 struct mma8452_data *data;
613 struct iio_dev *indio_dev;
616 ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
619 if (ret != MMA8452_DEVICE_ID)
622 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
626 data = iio_priv(indio_dev);
627 data->client = client;
628 mutex_init(&data->lock);
630 i2c_set_clientdata(client, indio_dev);
631 indio_dev->info = &mma8452_info;
632 indio_dev->name = id->name;
633 indio_dev->dev.parent = &client->dev;
634 indio_dev->modes = INDIO_DIRECT_MODE;
635 indio_dev->channels = mma8452_channels;
636 indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
637 indio_dev->available_scan_masks = mma8452_scan_masks;
639 ret = mma8452_reset(client);
643 data->data_cfg = MMA8452_DATA_CFG_FS_2G;
644 ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
650 * By default set transient threshold to max to avoid events if
651 * enabling without configuring threshold.
653 ret = i2c_smbus_write_byte_data(client, MMA8452_TRANSIENT_THS,
654 MMA8452_TRANSIENT_THS_MASK);
660 * Although we enable the transient interrupt source once and
661 * for all here the transient event detection itself is not
662 * enabled until userspace asks for it by
663 * mma8452_write_event_config()
665 int supported_interrupts = MMA8452_INT_TRANS;
667 /* Assume wired to INT1 pin */
668 ret = i2c_smbus_write_byte_data(client,
670 supported_interrupts);
674 ret = i2c_smbus_write_byte_data(client,
676 supported_interrupts);
681 data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
682 (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
683 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
688 ret = iio_triggered_buffer_setup(indio_dev, NULL,
689 mma8452_trigger_handler, NULL);
694 ret = devm_request_threaded_irq(&client->dev,
696 NULL, mma8452_interrupt,
697 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
698 client->name, indio_dev);
703 ret = iio_device_register(indio_dev);
710 iio_triggered_buffer_cleanup(indio_dev);
714 static int mma8452_remove(struct i2c_client *client)
716 struct iio_dev *indio_dev = i2c_get_clientdata(client);
718 iio_device_unregister(indio_dev);
719 iio_triggered_buffer_cleanup(indio_dev);
720 mma8452_standby(iio_priv(indio_dev));
725 #ifdef CONFIG_PM_SLEEP
726 static int mma8452_suspend(struct device *dev)
728 return mma8452_standby(iio_priv(i2c_get_clientdata(
729 to_i2c_client(dev))));
732 static int mma8452_resume(struct device *dev)
734 return mma8452_active(iio_priv(i2c_get_clientdata(
735 to_i2c_client(dev))));
738 static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
739 #define MMA8452_PM_OPS (&mma8452_pm_ops)
741 #define MMA8452_PM_OPS NULL
744 static const struct i2c_device_id mma8452_id[] = {
748 MODULE_DEVICE_TABLE(i2c, mma8452_id);
750 static const struct of_device_id mma8452_dt_ids[] = {
751 { .compatible = "fsl,mma8452" },
755 static struct i2c_driver mma8452_driver = {
758 .of_match_table = of_match_ptr(mma8452_dt_ids),
759 .pm = MMA8452_PM_OPS,
761 .probe = mma8452_probe,
762 .remove = mma8452_remove,
763 .id_table = mma8452_id,
765 module_i2c_driver(mma8452_driver);
767 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
768 MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
769 MODULE_LICENSE("GPL");