2 * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
4 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
10 * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
12 * TODO: interrupt, thresholding, orientation / freefall events, autosleep
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19 #include <linux/iio/trigger_consumer.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/triggered_buffer.h>
22 #include <linux/delay.h>
24 #define MMA8452_STATUS 0x00
25 #define MMA8452_OUT_X 0x01 /* MSB first, 12-bit */
26 #define MMA8452_OUT_Y 0x03
27 #define MMA8452_OUT_Z 0x05
28 #define MMA8452_WHO_AM_I 0x0d
29 #define MMA8452_DATA_CFG 0x0e
30 #define MMA8452_OFF_X 0x2f
31 #define MMA8452_OFF_Y 0x30
32 #define MMA8452_OFF_Z 0x31
33 #define MMA8452_CTRL_REG1 0x2a
34 #define MMA8452_CTRL_REG2 0x2b
35 #define MMA8452_CTRL_REG2_RST BIT(6)
37 #define MMA8452_MAX_REG 0x31
39 #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
41 #define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
42 #define MMA8452_CTRL_DR_SHIFT 3
43 #define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
44 #define MMA8452_CTRL_ACTIVE BIT(0)
46 #define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
47 #define MMA8452_DATA_CFG_FS_2G 0
48 #define MMA8452_DATA_CFG_FS_4G 1
49 #define MMA8452_DATA_CFG_FS_8G 2
51 #define MMA8452_DEVICE_ID 0x2a
54 struct i2c_client *client;
60 static int mma8452_drdy(struct mma8452_data *data)
65 int ret = i2c_smbus_read_byte_data(data->client,
69 if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
74 dev_err(&data->client->dev, "data not ready\n");
78 static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
80 int ret = mma8452_drdy(data);
83 return i2c_smbus_read_i2c_block_data(data->client,
84 MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
87 static ssize_t mma8452_show_int_plus_micros(char *buf,
88 const int (*vals)[2], int n)
93 len += scnprintf(buf + len, PAGE_SIZE - len,
94 "%d.%06d ", vals[n][0], vals[n][1]);
96 /* replace trailing space by newline */
102 static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
106 if (val == vals[n][0] && val2 == vals[n][1])
112 static const int mma8452_samp_freq[8][2] = {
113 {800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
114 {6, 250000}, {1, 560000}
118 * Hardware has fullscale of -2G, -4G, -8G corresponding to raw value -2048
119 * The userspace interface uses m/s^2 and we declare micro units
120 * So scale factor is given by:
121 * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
123 static const int mma8452_scales[3][2] = {
124 {0, 9577}, {0, 19154}, {0, 38307}
127 static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
128 struct device_attribute *attr, char *buf)
130 return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
131 ARRAY_SIZE(mma8452_samp_freq));
134 static ssize_t mma8452_show_scale_avail(struct device *dev,
135 struct device_attribute *attr, char *buf)
137 return mma8452_show_int_plus_micros(buf, mma8452_scales,
138 ARRAY_SIZE(mma8452_scales));
141 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
142 static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
143 mma8452_show_scale_avail, NULL, 0);
145 static int mma8452_get_samp_freq_index(struct mma8452_data *data,
148 return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
149 ARRAY_SIZE(mma8452_samp_freq), val, val2);
152 static int mma8452_get_scale_index(struct mma8452_data *data,
155 return mma8452_get_int_plus_micros_index(mma8452_scales,
156 ARRAY_SIZE(mma8452_scales), val, val2);
159 static int mma8452_read_raw(struct iio_dev *indio_dev,
160 struct iio_chan_spec const *chan,
161 int *val, int *val2, long mask)
163 struct mma8452_data *data = iio_priv(indio_dev);
168 case IIO_CHAN_INFO_RAW:
169 if (iio_buffer_enabled(indio_dev))
172 mutex_lock(&data->lock);
173 ret = mma8452_read(data, buffer);
174 mutex_unlock(&data->lock);
177 *val = sign_extend32(
178 be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
180 case IIO_CHAN_INFO_SCALE:
181 i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
182 *val = mma8452_scales[i][0];
183 *val2 = mma8452_scales[i][1];
184 return IIO_VAL_INT_PLUS_MICRO;
185 case IIO_CHAN_INFO_SAMP_FREQ:
186 i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
187 MMA8452_CTRL_DR_SHIFT;
188 *val = mma8452_samp_freq[i][0];
189 *val2 = mma8452_samp_freq[i][1];
190 return IIO_VAL_INT_PLUS_MICRO;
191 case IIO_CHAN_INFO_CALIBBIAS:
192 ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
196 *val = sign_extend32(ret, 7);
202 static int mma8452_standby(struct mma8452_data *data)
204 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
205 data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
208 static int mma8452_active(struct mma8452_data *data)
210 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
214 static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
218 mutex_lock(&data->lock);
220 /* config can only be changed when in standby */
221 ret = mma8452_standby(data);
225 ret = i2c_smbus_write_byte_data(data->client, reg, val);
229 ret = mma8452_active(data);
235 mutex_unlock(&data->lock);
239 static int mma8452_write_raw(struct iio_dev *indio_dev,
240 struct iio_chan_spec const *chan,
241 int val, int val2, long mask)
243 struct mma8452_data *data = iio_priv(indio_dev);
246 if (iio_buffer_enabled(indio_dev))
250 case IIO_CHAN_INFO_SAMP_FREQ:
251 i = mma8452_get_samp_freq_index(data, val, val2);
255 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
256 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
257 return mma8452_change_config(data, MMA8452_CTRL_REG1,
259 case IIO_CHAN_INFO_SCALE:
260 i = mma8452_get_scale_index(data, val, val2);
263 data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
265 return mma8452_change_config(data, MMA8452_DATA_CFG,
267 case IIO_CHAN_INFO_CALIBBIAS:
268 if (val < -128 || val > 127)
270 return mma8452_change_config(data, MMA8452_OFF_X +
271 chan->scan_index, val);
277 static irqreturn_t mma8452_trigger_handler(int irq, void *p)
279 struct iio_poll_func *pf = p;
280 struct iio_dev *indio_dev = pf->indio_dev;
281 struct mma8452_data *data = iio_priv(indio_dev);
282 u8 buffer[16]; /* 3 16-bit channels + padding + ts */
285 ret = mma8452_read(data, (__be16 *) buffer);
289 iio_push_to_buffers_with_timestamp(indio_dev, buffer,
293 iio_trigger_notify_done(indio_dev->trig);
297 static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
298 unsigned reg, unsigned writeval,
302 struct mma8452_data *data = iio_priv(indio_dev);
304 if (reg > MMA8452_MAX_REG)
308 return mma8452_change_config(data, reg, writeval);
310 ret = i2c_smbus_read_byte_data(data->client, reg);
319 #define MMA8452_CHANNEL(axis, idx) { \
322 .channel2 = IIO_MOD_##axis, \
323 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
324 BIT(IIO_CHAN_INFO_CALIBBIAS), \
325 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
326 BIT(IIO_CHAN_INFO_SCALE), \
333 .endianness = IIO_BE, \
337 static const struct iio_chan_spec mma8452_channels[] = {
338 MMA8452_CHANNEL(X, 0),
339 MMA8452_CHANNEL(Y, 1),
340 MMA8452_CHANNEL(Z, 2),
341 IIO_CHAN_SOFT_TIMESTAMP(3),
344 static struct attribute *mma8452_attributes[] = {
345 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
346 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
350 static const struct attribute_group mma8452_group = {
351 .attrs = mma8452_attributes,
354 static const struct iio_info mma8452_info = {
355 .attrs = &mma8452_group,
356 .read_raw = &mma8452_read_raw,
357 .write_raw = &mma8452_write_raw,
358 .debugfs_reg_access = &mma8452_reg_access_dbg,
359 .driver_module = THIS_MODULE,
362 static const unsigned long mma8452_scan_masks[] = {0x7, 0};
364 static int mma8452_reset(struct i2c_client *client)
369 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
370 MMA8452_CTRL_REG2_RST);
374 for (i = 0; i < 10; i++) {
375 usleep_range(100, 200);
376 ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
378 continue; /* I2C comm reset */
381 if (!(ret & MMA8452_CTRL_REG2_RST))
388 static int mma8452_probe(struct i2c_client *client,
389 const struct i2c_device_id *id)
391 struct mma8452_data *data;
392 struct iio_dev *indio_dev;
395 ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
398 if (ret != MMA8452_DEVICE_ID)
401 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
405 data = iio_priv(indio_dev);
406 data->client = client;
407 mutex_init(&data->lock);
409 i2c_set_clientdata(client, indio_dev);
410 indio_dev->info = &mma8452_info;
411 indio_dev->name = id->name;
412 indio_dev->dev.parent = &client->dev;
413 indio_dev->modes = INDIO_DIRECT_MODE;
414 indio_dev->channels = mma8452_channels;
415 indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
416 indio_dev->available_scan_masks = mma8452_scan_masks;
418 ret = mma8452_reset(client);
422 data->data_cfg = MMA8452_DATA_CFG_FS_2G;
423 ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
428 data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
429 (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
430 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
435 ret = iio_triggered_buffer_setup(indio_dev, NULL,
436 mma8452_trigger_handler, NULL);
440 ret = iio_device_register(indio_dev);
446 iio_triggered_buffer_cleanup(indio_dev);
450 static int mma8452_remove(struct i2c_client *client)
452 struct iio_dev *indio_dev = i2c_get_clientdata(client);
454 iio_device_unregister(indio_dev);
455 iio_triggered_buffer_cleanup(indio_dev);
456 mma8452_standby(iio_priv(indio_dev));
461 #ifdef CONFIG_PM_SLEEP
462 static int mma8452_suspend(struct device *dev)
464 return mma8452_standby(iio_priv(i2c_get_clientdata(
465 to_i2c_client(dev))));
468 static int mma8452_resume(struct device *dev)
470 return mma8452_active(iio_priv(i2c_get_clientdata(
471 to_i2c_client(dev))));
474 static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
475 #define MMA8452_PM_OPS (&mma8452_pm_ops)
477 #define MMA8452_PM_OPS NULL
480 static const struct i2c_device_id mma8452_id[] = {
484 MODULE_DEVICE_TABLE(i2c, mma8452_id);
486 static const struct of_device_id mma8452_dt_ids[] = {
487 { .compatible = "fsl,mma8452" },
491 static struct i2c_driver mma8452_driver = {
494 .of_match_table = of_match_ptr(mma8452_dt_ids),
495 .pm = MMA8452_PM_OPS,
497 .probe = mma8452_probe,
498 .remove = mma8452_remove,
499 .id_table = mma8452_id,
501 module_i2c_driver(mma8452_driver);
503 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
504 MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
505 MODULE_LICENSE("GPL");