2 * mma8452.c - Support for Freescale MMA8452Q 3-axis 12-bit accelerometer
4 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
10 * 7-bit I2C slave address 0x1c/0x1d (pin selectable)
12 * TODO: interrupt, thresholding, orientation / freefall events, autosleep
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19 #include <linux/iio/trigger_consumer.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/triggered_buffer.h>
22 #include <linux/delay.h>
24 #define MMA8452_STATUS 0x00
25 #define MMA8452_OUT_X 0x01 /* MSB first, 12-bit */
26 #define MMA8452_OUT_Y 0x03
27 #define MMA8452_OUT_Z 0x05
28 #define MMA8452_WHO_AM_I 0x0d
29 #define MMA8452_DATA_CFG 0x0e
30 #define MMA8452_OFF_X 0x2f
31 #define MMA8452_OFF_Y 0x30
32 #define MMA8452_OFF_Z 0x31
33 #define MMA8452_CTRL_REG1 0x2a
34 #define MMA8452_CTRL_REG2 0x2b
35 #define MMA8452_CTRL_REG2_RST BIT(6)
37 #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
39 #define MMA8452_CTRL_DR_MASK (BIT(5) | BIT(4) | BIT(3))
40 #define MMA8452_CTRL_DR_SHIFT 3
41 #define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
42 #define MMA8452_CTRL_ACTIVE BIT(0)
44 #define MMA8452_DATA_CFG_FS_MASK (BIT(1) | BIT(0))
45 #define MMA8452_DATA_CFG_FS_2G 0
46 #define MMA8452_DATA_CFG_FS_4G 1
47 #define MMA8452_DATA_CFG_FS_8G 2
49 #define MMA8452_DEVICE_ID 0x2a
52 struct i2c_client *client;
58 static int mma8452_drdy(struct mma8452_data *data)
63 int ret = i2c_smbus_read_byte_data(data->client,
67 if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
72 dev_err(&data->client->dev, "data not ready\n");
76 static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
78 int ret = mma8452_drdy(data);
81 return i2c_smbus_read_i2c_block_data(data->client,
82 MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *) buf);
85 static ssize_t mma8452_show_int_plus_micros(char *buf,
86 const int (*vals)[2], int n)
91 len += scnprintf(buf + len, PAGE_SIZE - len,
92 "%d.%06d ", vals[n][0], vals[n][1]);
94 /* replace trailing space by newline */
100 static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
104 if (val == vals[n][0] && val2 == vals[n][1])
110 static const int mma8452_samp_freq[8][2] = {
111 {800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
112 {6, 250000}, {1, 560000}
116 * Hardware has fullscale of -2G, -4G, -8G corresponding to raw value -2048
117 * The userspace interface uses m/s^2 and we declare micro units
118 * So scale factor is given by:
119 * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
121 static const int mma8452_scales[3][2] = {
122 {0, 9577}, {0, 19154}, {0, 38307}
125 static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
126 struct device_attribute *attr, char *buf)
128 return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
129 ARRAY_SIZE(mma8452_samp_freq));
132 static ssize_t mma8452_show_scale_avail(struct device *dev,
133 struct device_attribute *attr, char *buf)
135 return mma8452_show_int_plus_micros(buf, mma8452_scales,
136 ARRAY_SIZE(mma8452_scales));
139 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
140 static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
141 mma8452_show_scale_avail, NULL, 0);
143 static int mma8452_get_samp_freq_index(struct mma8452_data *data,
146 return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
147 ARRAY_SIZE(mma8452_samp_freq), val, val2);
150 static int mma8452_get_scale_index(struct mma8452_data *data,
153 return mma8452_get_int_plus_micros_index(mma8452_scales,
154 ARRAY_SIZE(mma8452_scales), val, val2);
157 static int mma8452_read_raw(struct iio_dev *indio_dev,
158 struct iio_chan_spec const *chan,
159 int *val, int *val2, long mask)
161 struct mma8452_data *data = iio_priv(indio_dev);
166 case IIO_CHAN_INFO_RAW:
167 if (iio_buffer_enabled(indio_dev))
170 mutex_lock(&data->lock);
171 ret = mma8452_read(data, buffer);
172 mutex_unlock(&data->lock);
175 *val = sign_extend32(
176 be16_to_cpu(buffer[chan->scan_index]) >> 4, 11);
178 case IIO_CHAN_INFO_SCALE:
179 i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
180 *val = mma8452_scales[i][0];
181 *val2 = mma8452_scales[i][1];
182 return IIO_VAL_INT_PLUS_MICRO;
183 case IIO_CHAN_INFO_SAMP_FREQ:
184 i = (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
185 MMA8452_CTRL_DR_SHIFT;
186 *val = mma8452_samp_freq[i][0];
187 *val2 = mma8452_samp_freq[i][1];
188 return IIO_VAL_INT_PLUS_MICRO;
189 case IIO_CHAN_INFO_CALIBBIAS:
190 ret = i2c_smbus_read_byte_data(data->client, MMA8452_OFF_X +
194 *val = sign_extend32(ret, 7);
200 static int mma8452_standby(struct mma8452_data *data)
202 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
203 data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
206 static int mma8452_active(struct mma8452_data *data)
208 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
212 static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
216 mutex_lock(&data->lock);
218 /* config can only be changed when in standby */
219 ret = mma8452_standby(data);
223 ret = i2c_smbus_write_byte_data(data->client, reg, val);
227 ret = mma8452_active(data);
233 mutex_unlock(&data->lock);
237 static int mma8452_write_raw(struct iio_dev *indio_dev,
238 struct iio_chan_spec const *chan,
239 int val, int val2, long mask)
241 struct mma8452_data *data = iio_priv(indio_dev);
244 if (iio_buffer_enabled(indio_dev))
248 case IIO_CHAN_INFO_SAMP_FREQ:
249 i = mma8452_get_samp_freq_index(data, val, val2);
253 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
254 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
255 return mma8452_change_config(data, MMA8452_CTRL_REG1,
257 case IIO_CHAN_INFO_SCALE:
258 i = mma8452_get_scale_index(data, val, val2);
261 data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
263 return mma8452_change_config(data, MMA8452_DATA_CFG,
265 case IIO_CHAN_INFO_CALIBBIAS:
266 if (val < -128 || val > 127)
268 return mma8452_change_config(data, MMA8452_OFF_X +
269 chan->scan_index, val);
275 static irqreturn_t mma8452_trigger_handler(int irq, void *p)
277 struct iio_poll_func *pf = p;
278 struct iio_dev *indio_dev = pf->indio_dev;
279 struct mma8452_data *data = iio_priv(indio_dev);
280 u8 buffer[16]; /* 3 16-bit channels + padding + ts */
283 ret = mma8452_read(data, (__be16 *) buffer);
287 iio_push_to_buffers_with_timestamp(indio_dev, buffer,
291 iio_trigger_notify_done(indio_dev->trig);
295 #define MMA8452_CHANNEL(axis, idx) { \
298 .channel2 = IIO_MOD_##axis, \
299 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
300 BIT(IIO_CHAN_INFO_CALIBBIAS), \
301 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
302 BIT(IIO_CHAN_INFO_SCALE), \
309 .endianness = IIO_BE, \
313 static const struct iio_chan_spec mma8452_channels[] = {
314 MMA8452_CHANNEL(X, 0),
315 MMA8452_CHANNEL(Y, 1),
316 MMA8452_CHANNEL(Z, 2),
317 IIO_CHAN_SOFT_TIMESTAMP(3),
320 static struct attribute *mma8452_attributes[] = {
321 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
322 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
326 static const struct attribute_group mma8452_group = {
327 .attrs = mma8452_attributes,
330 static const struct iio_info mma8452_info = {
331 .attrs = &mma8452_group,
332 .read_raw = &mma8452_read_raw,
333 .write_raw = &mma8452_write_raw,
334 .driver_module = THIS_MODULE,
337 static const unsigned long mma8452_scan_masks[] = {0x7, 0};
339 static int mma8452_reset(struct i2c_client *client)
344 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
345 MMA8452_CTRL_REG2_RST);
349 for (i = 0; i < 10; i++) {
350 usleep_range(100, 200);
351 ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
353 continue; /* I2C comm reset */
356 if (!(ret & MMA8452_CTRL_REG2_RST))
363 static int mma8452_probe(struct i2c_client *client,
364 const struct i2c_device_id *id)
366 struct mma8452_data *data;
367 struct iio_dev *indio_dev;
370 ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
373 if (ret != MMA8452_DEVICE_ID)
376 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
380 data = iio_priv(indio_dev);
381 data->client = client;
382 mutex_init(&data->lock);
384 i2c_set_clientdata(client, indio_dev);
385 indio_dev->info = &mma8452_info;
386 indio_dev->name = id->name;
387 indio_dev->dev.parent = &client->dev;
388 indio_dev->modes = INDIO_DIRECT_MODE;
389 indio_dev->channels = mma8452_channels;
390 indio_dev->num_channels = ARRAY_SIZE(mma8452_channels);
391 indio_dev->available_scan_masks = mma8452_scan_masks;
393 ret = mma8452_reset(client);
397 data->data_cfg = MMA8452_DATA_CFG_FS_2G;
398 ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
403 data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
404 (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
405 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
410 ret = iio_triggered_buffer_setup(indio_dev, NULL,
411 mma8452_trigger_handler, NULL);
415 ret = iio_device_register(indio_dev);
421 iio_triggered_buffer_cleanup(indio_dev);
425 static int mma8452_remove(struct i2c_client *client)
427 struct iio_dev *indio_dev = i2c_get_clientdata(client);
429 iio_device_unregister(indio_dev);
430 iio_triggered_buffer_cleanup(indio_dev);
431 mma8452_standby(iio_priv(indio_dev));
436 #ifdef CONFIG_PM_SLEEP
437 static int mma8452_suspend(struct device *dev)
439 return mma8452_standby(iio_priv(i2c_get_clientdata(
440 to_i2c_client(dev))));
443 static int mma8452_resume(struct device *dev)
445 return mma8452_active(iio_priv(i2c_get_clientdata(
446 to_i2c_client(dev))));
449 static SIMPLE_DEV_PM_OPS(mma8452_pm_ops, mma8452_suspend, mma8452_resume);
450 #define MMA8452_PM_OPS (&mma8452_pm_ops)
452 #define MMA8452_PM_OPS NULL
455 static const struct i2c_device_id mma8452_id[] = {
459 MODULE_DEVICE_TABLE(i2c, mma8452_id);
461 static const struct of_device_id mma8452_dt_ids[] = {
462 { .compatible = "fsl,mma8452" },
466 static struct i2c_driver mma8452_driver = {
469 .of_match_table = of_match_ptr(mma8452_dt_ids),
470 .pm = MMA8452_PM_OPS,
472 .probe = mma8452_probe,
473 .remove = mma8452_remove,
474 .id_table = mma8452_id,
476 module_i2c_driver(mma8452_driver);
478 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
479 MODULE_DESCRIPTION("Freescale MMA8452 accelerometer driver");
480 MODULE_LICENSE("GPL");