drivers/idle/intel_idle.c

   1 /*
   2  * intel_idle.c - native hardware idle loop for modern Intel processors
   3  *
   4  * Copyright (c) 2010, Intel Corporation.
   5  * Len Brown <len.brown@intel.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 /*
  22  * intel_idle is a cpuidle driver that loads on specific Intel processors
  23  * in lieu of the legacy ACPI processor_idle driver.  The intent is to
  24  * make Linux more efficient on these processors, as intel_idle knows
  25  * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
  26  */
  27
  28 /*
  29  * Design Assumptions
  30  *
  31  * All CPUs have same idle states as boot CPU
  32  *
  33  * Chipset BM_STS (bus master status) bit is a NOP
  34  *      for preventing entry into deep C-stats
  35  */
  36
  37 /*
  38  * Known limitations
  39  *
  40  * The driver currently initializes for_each_online_cpu() upon modprobe.
  41  * It it unaware of subsequent processors hot-added to the system.
  42  * This means that if you boot with maxcpus=n and later online
  43  * processors above n, those processors will use C1 only.
  44  *
  45  * ACPI has a .suspend hack to turn off deep c-statees during suspend
  46  * to avoid complications with the lapic timer workaround.
  47  * Have not seen issues with suspend, but may need same workaround here.
  48  *
  49  * There is currently no kernel-based automatic probing/loading mechanism
  50  * if the driver is built as a module.
  51  */
  52
  53 /* un-comment DEBUG to enable pr_debug() statements */
  54 #define DEBUG
  55
  56 #include <linux/kernel.h>
  57 #include <linux/cpuidle.h>
  58 #include <linux/clockchips.h>
  59 #include <linux/hrtimer.h>      /* ktime_get_real() */
  60 #include <trace/events/power.h>
  61 #include <linux/sched.h>
  62 #include <linux/notifier.h>
  63 #include <linux/cpu.h>
  64 #include <linux/module.h>
  65 #include <asm/cpu_device_id.h>
  66 #include <asm/mwait.h>
  67 #include <asm/msr.h>
  68
  69 #define INTEL_IDLE_VERSION "0.4"
  70 #define PREFIX "intel_idle: "
  71
  72 static struct cpuidle_driver intel_idle_driver = {
  73         .name = "intel_idle",
  74         .owner = THIS_MODULE,
  75 };
  76 /* intel_idle.max_cstate=0 disables driver */
  77 static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1;
  78
  79 static unsigned int mwait_substates;
  80
  81 #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
  82 /* Reliable LAPIC Timer States, bit 1 for C1 etc.  */
  83 static unsigned int lapic_timer_reliable_states = (1 << 1);      /* Default to only C1 */
  84
  85 struct idle_cpu {
  86         struct cpuidle_state *state_table;
  87
  88         /*
  89          * Hardware C-state auto-demotion may not always be optimal.
  90          * Indicate which enable bits to clear here.
  91          */
  92         unsigned long auto_demotion_disable_flags;
  93 };
  94
  95 static const struct idle_cpu *icpu;
  96 static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
  97 static int intel_idle(struct cpuidle_device *dev,
  98                         struct cpuidle_driver *drv, int index);
  99
 100 static struct cpuidle_state *cpuidle_state_table;
 101
 102 /*
 103  * Set this flag for states where the HW flushes the TLB for us
 104  * and so we don't need cross-calls to keep it consistent.
 105  * If this flag is set, SW flushes the TLB, so even if the
 106  * HW doesn't do the flushing, this flag is safe to use.
 107  */
 108 #define CPUIDLE_FLAG_TLB_FLUSHED        0x10000
 109
 110 /*
 111  * States are indexed by the cstate number,
 112  * which is also the index into the MWAIT hint array.
 113  * Thus C0 is a dummy.
 114  */
 115 static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = {
 116         { /* MWAIT C0 */ },
 117         { /* MWAIT C1 */
 118                 .name = "C1-NHM",
 119                 .desc = "MWAIT 0x00",
 120                 .flags = CPUIDLE_FLAG_TIME_VALID,
 121                 .exit_latency = 3,
 122                 .target_residency = 6,
 123                 .enter = &intel_idle },
 124         { /* MWAIT C2 */
 125                 .name = "C3-NHM",
 126                 .desc = "MWAIT 0x10",
 127                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 128                 .exit_latency = 20,
 129                 .target_residency = 80,
 130                 .enter = &intel_idle },
 131         { /* MWAIT C3 */
 132                 .name = "C6-NHM",
 133                 .desc = "MWAIT 0x20",
 134                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 135                 .exit_latency = 200,
 136                 .target_residency = 800,
 137                 .enter = &intel_idle },
 138 };
 139
 140 static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
 141         { /* MWAIT C0 */ },
 142         { /* MWAIT C1 */
 143                 .name = "C1-SNB",
 144                 .desc = "MWAIT 0x00",
 145                 .flags = CPUIDLE_FLAG_TIME_VALID,
 146                 .exit_latency = 1,
 147                 .target_residency = 1,
 148                 .enter = &intel_idle },
 149         { /* MWAIT C2 */
 150                 .name = "C3-SNB",
 151                 .desc = "MWAIT 0x10",
 152                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 153                 .exit_latency = 80,
 154                 .target_residency = 211,
 155                 .enter = &intel_idle },
 156         { /* MWAIT C3 */
 157                 .name = "C6-SNB",
 158                 .desc = "MWAIT 0x20",
 159                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 160                 .exit_latency = 104,
 161                 .target_residency = 345,
 162                 .enter = &intel_idle },
 163         { /* MWAIT C4 */
 164                 .name = "C7-SNB",
 165                 .desc = "MWAIT 0x30",
 166                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 167                 .exit_latency = 109,
 168                 .target_residency = 345,
 169                 .enter = &intel_idle },
 170 };
 171
 172 static struct cpuidle_state ivb_cstates[MWAIT_MAX_NUM_CSTATES] = {
 173         { /* MWAIT C0 */ },
 174         { /* MWAIT C1 */
 175                 .name = "C1-IVB",
 176                 .desc = "MWAIT 0x00",
 177                 .flags = CPUIDLE_FLAG_TIME_VALID,
 178                 .exit_latency = 1,
 179                 .target_residency = 1,
 180                 .enter = &intel_idle },
 181         { /* MWAIT C2 */
 182                 .name = "C3-IVB",
 183                 .desc = "MWAIT 0x10",
 184                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 185                 .exit_latency = 59,
 186                 .target_residency = 156,
 187                 .enter = &intel_idle },
 188         { /* MWAIT C3 */
 189                 .name = "C6-IVB",
 190                 .desc = "MWAIT 0x20",
 191                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 192                 .exit_latency = 80,
 193                 .target_residency = 300,
 194                 .enter = &intel_idle },
 195         { /* MWAIT C4 */
 196                 .name = "C7-IVB",
 197                 .desc = "MWAIT 0x30",
 198                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 199                 .exit_latency = 87,
 200                 .target_residency = 300,
 201                 .enter = &intel_idle },
 202 };
 203
 204 static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
 205         { /* MWAIT C0 */ },
 206         { /* MWAIT C1 */
 207                 .name = "C1-ATM",
 208                 .desc = "MWAIT 0x00",
 209                 .flags = CPUIDLE_FLAG_TIME_VALID,
 210                 .exit_latency = 1,
 211                 .target_residency = 4,
 212                 .enter = &intel_idle },
 213         { /* MWAIT C2 */
 214                 .name = "C2-ATM",
 215                 .desc = "MWAIT 0x10",
 216                 .flags = CPUIDLE_FLAG_TIME_VALID,
 217                 .exit_latency = 20,
 218                 .target_residency = 80,
 219                 .enter = &intel_idle },
 220         { /* MWAIT C3 */ },
 221         { /* MWAIT C4 */
 222                 .name = "C4-ATM",
 223                 .desc = "MWAIT 0x30",
 224                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 225                 .exit_latency = 100,
 226                 .target_residency = 400,
 227                 .enter = &intel_idle },
 228         { /* MWAIT C5 */ },
 229         { /* MWAIT C6 */
 230                 .name = "C6-ATM",
 231                 .desc = "MWAIT 0x52",
 232                 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
 233                 .exit_latency = 140,
 234                 .target_residency = 560,
 235                 .enter = &intel_idle },
 236 };
 237
 238 static long get_driver_data(int cstate)
 239 {
 240         int driver_data;
 241         switch (cstate) {
 242
 243         case 1: /* MWAIT C1 */
 244                 driver_data = 0x00;
 245                 break;
 246         case 2: /* MWAIT C2 */
 247                 driver_data = 0x10;
 248                 break;
 249         case 3: /* MWAIT C3 */
 250                 driver_data = 0x20;
 251                 break;
 252         case 4: /* MWAIT C4 */
 253                 driver_data = 0x30;
 254                 break;
 255         case 5: /* MWAIT C5 */
 256                 driver_data = 0x40;
 257                 break;
 258         case 6: /* MWAIT C6 */
 259                 driver_data = 0x52;
 260                 break;
 261         default:
 262                 driver_data = 0x00;
 263         }
 264         return driver_data;
 265 }
 266
 267 /**
 268  * intel_idle
 269  * @dev: cpuidle_device
 270  * @drv: cpuidle driver
 271  * @index: index of cpuidle state
 272  *
 273  * Must be called under local_irq_disable().
 274  */
 275 static int intel_idle(struct cpuidle_device *dev,
 276                 struct cpuidle_driver *drv, int index)
 277 {
 278         unsigned long ecx = 1; /* break on interrupt flag */
 279         struct cpuidle_state *state = &drv->states[index];
 280         struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
 281         unsigned long eax = (unsigned long)cpuidle_get_statedata(state_usage);
 282         unsigned int cstate;
 283         ktime_t kt_before, kt_after;
 284         s64 usec_delta;
 285         int cpu = smp_processor_id();
 286
 287         cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
 288
 289         /*
 290          * leave_mm() to avoid costly and often unnecessary wakeups
 291          * for flushing the user TLB's associated with the active mm.
 292          */
 293         if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
 294                 leave_mm(cpu);
 295
 296         if (!(lapic_timer_reliable_states & (1 << (cstate))))
 297                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 298
 299         kt_before = ktime_get_real();
 300
 301         stop_critical_timings();
 302         if (!need_resched()) {
 303
 304                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 305                 smp_mb();
 306                 if (!need_resched())
 307                         __mwait(eax, ecx);
 308         }
 309
 310         start_critical_timings();
 311
 312         kt_after = ktime_get_real();
 313         usec_delta = ktime_to_us(ktime_sub(kt_after, kt_before));
 314
 315         local_irq_enable();
 316
 317         if (!(lapic_timer_reliable_states & (1 << (cstate))))
 318                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 319
 320         /* Update cpuidle counters */
 321         dev->last_residency = (int)usec_delta;
 322
 323         return index;
 324 }
 325
 326 static void __setup_broadcast_timer(void *arg)
 327 {
 328         unsigned long reason = (unsigned long)arg;
 329         int cpu = smp_processor_id();
 330
 331         reason = reason ?
 332                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
 333
 334         clockevents_notify(reason, &cpu);
 335 }
 336
 337 static int setup_broadcast_cpuhp_notify(struct notifier_block *n,
 338                 unsigned long action, void *hcpu)
 339 {
 340         int hotcpu = (unsigned long)hcpu;
 341
 342         switch (action & 0xf) {
 343         case CPU_ONLINE:
 344                 smp_call_function_single(hotcpu, __setup_broadcast_timer,
 345                         (void *)true, 1);
 346                 break;
 347         }
 348         return NOTIFY_OK;
 349 }
 350
 351 static struct notifier_block setup_broadcast_notifier = {
 352         .notifier_call = setup_broadcast_cpuhp_notify,
 353 };
 354
 355 static void auto_demotion_disable(void *dummy)
 356 {
 357         unsigned long long msr_bits;
 358
 359         rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
 360         msr_bits &= ~(icpu->auto_demotion_disable_flags);
 361         wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
 362 }
 363
 364 static const struct idle_cpu idle_cpu_nehalem = {
 365         .state_table = nehalem_cstates,
 366         .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
 367 };
 368
 369 static const struct idle_cpu idle_cpu_atom = {
 370         .state_table = atom_cstates,
 371 };
 372
 373 static const struct idle_cpu idle_cpu_lincroft = {
 374         .state_table = atom_cstates,
 375         .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
 376 };
 377
 378 static const struct idle_cpu idle_cpu_snb = {
 379         .state_table = snb_cstates,
 380 };
 381
 382 static const struct idle_cpu idle_cpu_ivb = {
 383         .state_table = ivb_cstates,
 384 };
 385
 386 #define ICPU(model, cpu) \
 387         { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
 388
 389 static const struct x86_cpu_id intel_idle_ids[] = {
 390         ICPU(0x1a, idle_cpu_nehalem),
 391         ICPU(0x1e, idle_cpu_nehalem),
 392         ICPU(0x1f, idle_cpu_nehalem),
 393         ICPU(0x25, idle_cpu_nehalem),
 394         ICPU(0x2c, idle_cpu_nehalem),
 395         ICPU(0x2e, idle_cpu_nehalem),
 396         ICPU(0x1c, idle_cpu_atom),
 397         ICPU(0x26, idle_cpu_lincroft),
 398         ICPU(0x2f, idle_cpu_nehalem),
 399         ICPU(0x2a, idle_cpu_snb),
 400         ICPU(0x2d, idle_cpu_snb),
 401         ICPU(0x3a, idle_cpu_ivb),
 402         {}
 403 };
 404 MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
 405
 406 /*
 407  * intel_idle_probe()
 408  */
 409 static int intel_idle_probe(void)
 410 {
 411         unsigned int eax, ebx, ecx;
 412         const struct x86_cpu_id *id;
 413
 414         if (max_cstate == 0) {
 415                 pr_debug(PREFIX "disabled\n");
 416                 return -EPERM;
 417         }
 418
 419         id = x86_match_cpu(intel_idle_ids);
 420         if (!id) {
 421                 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
 422                     boot_cpu_data.x86 == 6)
 423                         pr_debug(PREFIX "does not run on family %d model %d\n",
 424                                 boot_cpu_data.x86, boot_cpu_data.x86_model);
 425                 return -ENODEV;
 426         }
 427
 428         if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
 429                 return -ENODEV;
 430
 431         cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
 432
 433         if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
 434             !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
 435             !mwait_substates)
 436                         return -ENODEV;
 437
 438         pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
 439
 440         icpu = (const struct idle_cpu *)id->driver_data;
 441         cpuidle_state_table = icpu->state_table;
 442
 443         if (boot_cpu_has(X86_FEATURE_ARAT))     /* Always Reliable APIC Timer */
 444                 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
 445         else {
 446                 on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
 447                 register_cpu_notifier(&setup_broadcast_notifier);
 448         }
 449
 450         pr_debug(PREFIX "v" INTEL_IDLE_VERSION
 451                 " model 0x%X\n", boot_cpu_data.x86_model);
 452
 453         pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
 454                 lapic_timer_reliable_states);
 455         return 0;
 456 }
 457
 458 /*
 459  * intel_idle_cpuidle_devices_uninit()
 460  * unregister, free cpuidle_devices
 461  */
 462 static void intel_idle_cpuidle_devices_uninit(void)
 463 {
 464         int i;
 465         struct cpuidle_device *dev;
 466
 467         for_each_online_cpu(i) {
 468                 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
 469                 cpuidle_unregister_device(dev);
 470         }
 471
 472         free_percpu(intel_idle_cpuidle_devices);
 473         return;
 474 }
 475 /*
 476  * intel_idle_cpuidle_driver_init()
 477  * allocate, initialize cpuidle_states
 478  */
 479 static int intel_idle_cpuidle_driver_init(void)
 480 {
 481         int cstate;
 482         struct cpuidle_driver *drv = &intel_idle_driver;
 483
 484         drv->state_count = 1;
 485
 486         for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) {
 487                 int num_substates;
 488
 489                 if (cstate > max_cstate) {
 490                         printk(PREFIX "max_cstate %d reached\n",
 491                                 max_cstate);
 492                         break;
 493                 }
 494
 495                 /* does the state exist in CPUID.MWAIT? */
 496                 num_substates = (mwait_substates >> ((cstate) * 4))
 497                                         & MWAIT_SUBSTATE_MASK;
 498                 if (num_substates == 0)
 499                         continue;
 500                 /* is the state not enabled? */
 501                 if (cpuidle_state_table[cstate].enter == NULL) {
 502                         /* does the driver not know about the state? */
 503                         if (*cpuidle_state_table[cstate].name == '\0')
 504                                 pr_debug(PREFIX "unaware of model 0x%x"
 505                                         " MWAIT %d please"
 506                                         " contact lenb@kernel.org",
 507                                 boot_cpu_data.x86_model, cstate);
 508                         continue;
 509                 }
 510
 511                 if ((cstate > 2) &&
 512                         !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 513                         mark_tsc_unstable("TSC halts in idle"
 514                                         " states deeper than C2");
 515
 516                 drv->states[drv->state_count] = /* structure copy */
 517                         cpuidle_state_table[cstate];
 518
 519                 drv->state_count += 1;
 520         }
 521
 522         if (icpu->auto_demotion_disable_flags)
 523                 on_each_cpu(auto_demotion_disable, NULL, 1);
 524
 525         return 0;
 526 }
 527
 528
 529 /*
 530  * intel_idle_cpu_init()
 531  * allocate, initialize, register cpuidle_devices
 532  * @cpu: cpu/core to initialize
 533  */
 534 int intel_idle_cpu_init(int cpu)
 535 {
 536         int cstate;
 537         struct cpuidle_device *dev;
 538
 539         dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
 540
 541         dev->state_count = 1;
 542
 543         for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) {
 544                 int num_substates;
 545
 546                 if (cstate > max_cstate) {
 547                         printk(PREFIX "max_cstate %d reached\n", max_cstate);
 548                         break;
 549                 }
 550
 551                 /* does the state exist in CPUID.MWAIT? */
 552                 num_substates = (mwait_substates >> ((cstate) * 4))
 553                         & MWAIT_SUBSTATE_MASK;
 554                 if (num_substates == 0)
 555                         continue;
 556                 /* is the state not enabled? */
 557                 if (cpuidle_state_table[cstate].enter == NULL)
 558                         continue;
 559
 560                 dev->states_usage[dev->state_count].driver_data =
 561                         (void *)get_driver_data(cstate);
 562
 563                 dev->state_count += 1;
 564         }
 565
 566         dev->cpu = cpu;
 567
 568         if (cpuidle_register_device(dev)) {
 569                 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
 570                 intel_idle_cpuidle_devices_uninit();
 571                 return -EIO;
 572         }
 573
 574         if (icpu->auto_demotion_disable_flags)
 575                 smp_call_function_single(cpu, auto_demotion_disable, NULL, 1);
 576
 577         return 0;
 578 }
 579 EXPORT_SYMBOL_GPL(intel_idle_cpu_init);
 580
 581 static int __init intel_idle_init(void)
 582 {
 583         int retval, i;
 584
 585         /* Do not load intel_idle at all for now if idle= is passed */
 586         if (boot_option_idle_override != IDLE_NO_OVERRIDE)
 587                 return -ENODEV;
 588
 589         retval = intel_idle_probe();
 590         if (retval)
 591                 return retval;
 592
 593         intel_idle_cpuidle_driver_init();
 594         retval = cpuidle_register_driver(&intel_idle_driver);
 595         if (retval) {
 596                 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
 597                         cpuidle_get_driver()->name);
 598                 return retval;
 599         }
 600
 601         intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
 602         if (intel_idle_cpuidle_devices == NULL)
 603                 return -ENOMEM;
 604
 605         for_each_online_cpu(i) {
 606                 retval = intel_idle_cpu_init(i);
 607                 if (retval) {
 608                         cpuidle_unregister_driver(&intel_idle_driver);
 609                         return retval;
 610                 }
 611         }
 612
 613         return 0;
 614 }
 615
 616 static void __exit intel_idle_exit(void)
 617 {
 618         intel_idle_cpuidle_devices_uninit();
 619         cpuidle_unregister_driver(&intel_idle_driver);
 620
 621         if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) {
 622                 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
 623                 unregister_cpu_notifier(&setup_broadcast_notifier);
 624         }
 625
 626         return;
 627 }
 628
 629 module_init(intel_idle_init);
 630 module_exit(intel_idle_exit);
 631
 632 module_param(max_cstate, int, 0444);
 633
 634 MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
 635 MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
 636 MODULE_LICENSE("GPL");