2 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
3 * Portions (C) Copyright 2002 Red Hat Inc
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * For the avoidance of doubt the "preferred form" of this code is one which
16 * is in an open non patent encumbered format. Where cryptographic key signing
17 * forms part of the process of creating an executable the information
18 * including keys needed to generate an equivalently functional executable
19 * are deemed to be part of the source code.
22 #include <linux/types.h>
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/ide.h>
27 #include <linux/init.h>
29 #define DRV_NAME "ide_pci_generic"
31 static bool ide_generic_all; /* Set to claim all devices */
33 module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
34 MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
36 static void netcell_quirkproc(ide_drive_t *drive)
38 /* mark words 85-87 as valid */
39 drive->id[ATA_ID_CSF_DEFAULT] |= 0x4000;
42 static const struct ide_port_ops netcell_port_ops = {
43 .quirkproc = netcell_quirkproc,
46 #define DECLARE_GENERIC_PCI_DEV(extra_flags) \
49 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
51 .swdma_mask = ATA_SWDMA2, \
52 .mwdma_mask = ATA_MWDMA2, \
53 .udma_mask = ATA_UDMA6, \
56 static const struct ide_port_info generic_chipsets[] = {
58 DECLARE_GENERIC_PCI_DEV(0),
62 .enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} },
63 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
64 .swdma_mask = ATA_SWDMA2,
65 .mwdma_mask = ATA_MWDMA2,
66 .udma_mask = ATA_UDMA6,
69 /* 2: SAMURAI / HT6565 / HINT_IDE */
70 DECLARE_GENERIC_PCI_DEV(0),
71 /* 3: UM8673F / UM8886A / UM8886BF */
72 DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_DMA),
73 /* 4: VIA_IDE / OPTI621V / Piccolo010{2,3,5} */
74 DECLARE_GENERIC_PCI_DEV(IDE_HFLAG_NO_AUTODMA),
76 { /* 5: VIA8237SATA */
78 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
80 .swdma_mask = ATA_SWDMA2,
81 .mwdma_mask = ATA_MWDMA2,
82 .udma_mask = ATA_UDMA6,
87 .port_ops = &netcell_port_ops,
88 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
89 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
91 .swdma_mask = ATA_SWDMA2,
92 .mwdma_mask = ATA_MWDMA2,
93 .udma_mask = ATA_UDMA6,
98 * generic_init_one - called when a PIIX is found
99 * @dev: the generic device
100 * @id: the matching pci id
102 * Called when the PCI registration layer (or the IDE initialization)
103 * finds a device matching our IDE device tables.
106 static int generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
108 const struct ide_port_info *d = &generic_chipsets[id->driver_data];
111 /* Don't use the generic entry unless instructed to do so */
112 if (id->driver_data == 0 && ide_generic_all == 0)
115 switch (dev->vendor) {
116 case PCI_VENDOR_ID_UMC:
117 if (dev->device == PCI_DEVICE_ID_UMC_UM8886A &&
118 !(PCI_FUNC(dev->devfn) & 1))
119 goto out; /* UM8886A/BF pair */
121 case PCI_VENDOR_ID_OPTI:
122 if (dev->device == PCI_DEVICE_ID_OPTI_82C558 &&
123 !(PCI_FUNC(dev->devfn) & 1))
126 case PCI_VENDOR_ID_JMICRON:
127 if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 &&
128 PCI_FUNC(dev->devfn) != 1)
131 case PCI_VENDOR_ID_NS:
132 if (dev->device == PCI_DEVICE_ID_NS_87410 &&
133 (dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
138 if (dev->vendor != PCI_VENDOR_ID_JMICRON) {
140 pci_read_config_word(dev, PCI_COMMAND, &command);
141 if (!(command & PCI_COMMAND_IO)) {
142 printk(KERN_INFO "%s %s: skipping disabled "
143 "controller\n", d->name, pci_name(dev));
147 ret = ide_pci_init_one(dev, d, NULL);
152 static const struct pci_device_id generic_pci_tbl[] = {
153 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), 1 },
154 { PCI_VDEVICE(PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), 2 },
155 { PCI_VDEVICE(HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), 2 },
156 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8673F), 3 },
157 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886A), 3 },
158 { PCI_VDEVICE(UMC, PCI_DEVICE_ID_UMC_UM8886BF), 3 },
159 { PCI_VDEVICE(HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), 2 },
160 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C561), 4 },
161 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C558), 4 },
162 #ifdef CONFIG_BLK_DEV_IDE_SATA
163 { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8237_SATA), 5 },
165 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), 4 },
166 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), 4 },
167 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_3), 4 },
168 { PCI_VDEVICE(TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO_5), 4 },
169 { PCI_VDEVICE(NETCELL, PCI_DEVICE_ID_REVOLUTION), 6 },
171 * Must come last. If you add entries adjust
172 * this table and generic_chipsets[] appropriately.
174 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0 },
177 MODULE_DEVICE_TABLE(pci, generic_pci_tbl);
179 static struct pci_driver generic_pci_driver = {
181 .id_table = generic_pci_tbl,
182 .probe = generic_init_one,
183 .remove = ide_pci_remove,
184 .suspend = ide_pci_suspend,
185 .resume = ide_pci_resume,
188 static int __init generic_ide_init(void)
190 return ide_pci_register_driver(&generic_pci_driver);
193 static void __exit generic_ide_exit(void)
195 pci_unregister_driver(&generic_pci_driver);
198 module_init(generic_ide_init);
199 module_exit(generic_ide_exit);
201 MODULE_AUTHOR("Andre Hedrick");
202 MODULE_DESCRIPTION("PCI driver module for generic PCI IDE");
203 MODULE_LICENSE("GPL");