1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
28 * @bus: I3C bus to take the lock on
30 * This function takes the bus lock so that no other operations can occur on
31 * the bus. This is needed for all kind of bus maintenance operation, like
32 * - enabling/disabling slave events
34 * - changing the dynamic address of a device
35 * - relinquishing mastership
38 * The reason for this kind of locking is that we don't want drivers and core
39 * logic to rely on I3C device information that could be changed behind their
42 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
44 down_write(&bus->lock);
48 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
50 * @bus: I3C bus to release the lock on
52 * Should be called when the bus maintenance operation is done. See
53 * i3c_bus_maintenance_lock() for more details on what these maintenance
56 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
62 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
63 * @bus: I3C bus to take the lock on
65 * This function takes the bus lock for any operation that is not a maintenance
66 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
67 * maintenance operations). Basically all communications with I3C devices are
68 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
69 * state or I3C dynamic address).
71 * Note that this lock is not guaranteeing serialization of normal operations.
72 * In other words, transfer requests passed to the I3C master can be submitted
73 * in parallel and I3C master drivers have to use their own locking to make
74 * sure two different communications are not inter-mixed, or access to the
75 * output/input queue is not done while the engine is busy.
77 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
79 down_read(&bus->lock);
83 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
84 * @bus: I3C bus to release the lock on
86 * Should be called when a normal operation is done. See
87 * i3c_bus_normaluse_lock() for more details on what these normal operations
90 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
95 static struct i3c_master_controller *
96 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
98 return container_of(i3cbus, struct i3c_master_controller, bus);
101 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
103 return container_of(dev, struct i3c_master_controller, dev);
106 static const struct device_type i3c_device_type;
108 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
110 struct i3c_master_controller *master;
112 if (dev->type == &i3c_device_type)
113 return dev_to_i3cdev(dev)->bus;
115 master = dev_to_i3cmaster(dev);
120 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
122 struct i3c_master_controller *master;
124 if (dev->type == &i3c_device_type)
125 return dev_to_i3cdev(dev)->desc;
127 master = dev_to_i3cmaster(dev);
132 static ssize_t bcr_show(struct device *dev,
133 struct device_attribute *da,
136 struct i3c_bus *bus = dev_to_i3cbus(dev);
137 struct i3c_dev_desc *desc;
140 i3c_bus_normaluse_lock(bus);
141 desc = dev_to_i3cdesc(dev);
142 ret = sprintf(buf, "%x\n", desc->info.bcr);
143 i3c_bus_normaluse_unlock(bus);
147 static DEVICE_ATTR_RO(bcr);
149 static ssize_t dcr_show(struct device *dev,
150 struct device_attribute *da,
153 struct i3c_bus *bus = dev_to_i3cbus(dev);
154 struct i3c_dev_desc *desc;
157 i3c_bus_normaluse_lock(bus);
158 desc = dev_to_i3cdesc(dev);
159 ret = sprintf(buf, "%x\n", desc->info.dcr);
160 i3c_bus_normaluse_unlock(bus);
164 static DEVICE_ATTR_RO(dcr);
166 static ssize_t pid_show(struct device *dev,
167 struct device_attribute *da,
170 struct i3c_bus *bus = dev_to_i3cbus(dev);
171 struct i3c_dev_desc *desc;
174 i3c_bus_normaluse_lock(bus);
175 desc = dev_to_i3cdesc(dev);
176 ret = sprintf(buf, "%llx\n", desc->info.pid);
177 i3c_bus_normaluse_unlock(bus);
181 static DEVICE_ATTR_RO(pid);
183 static ssize_t dynamic_address_show(struct device *dev,
184 struct device_attribute *da,
187 struct i3c_bus *bus = dev_to_i3cbus(dev);
188 struct i3c_dev_desc *desc;
191 i3c_bus_normaluse_lock(bus);
192 desc = dev_to_i3cdesc(dev);
193 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
194 i3c_bus_normaluse_unlock(bus);
198 static DEVICE_ATTR_RO(dynamic_address);
200 static const char * const hdrcap_strings[] = {
201 "hdr-ddr", "hdr-tsp", "hdr-tsl",
204 static ssize_t hdrcap_show(struct device *dev,
205 struct device_attribute *da,
208 struct i3c_bus *bus = dev_to_i3cbus(dev);
209 struct i3c_dev_desc *desc;
210 ssize_t offset = 0, ret;
214 i3c_bus_normaluse_lock(bus);
215 desc = dev_to_i3cdesc(dev);
216 caps = desc->info.hdr_cap;
217 for_each_set_bit(mode, &caps, 8) {
218 if (mode >= ARRAY_SIZE(hdrcap_strings))
221 if (!hdrcap_strings[mode])
224 ret = sprintf(buf + offset, offset ? " %s" : "%s",
225 hdrcap_strings[mode]);
232 ret = sprintf(buf + offset, "\n");
239 i3c_bus_normaluse_unlock(bus);
243 static DEVICE_ATTR_RO(hdrcap);
245 static ssize_t modalias_show(struct device *dev,
246 struct device_attribute *da, char *buf)
248 struct i3c_device *i3c = dev_to_i3cdev(dev);
249 struct i3c_device_info devinfo;
250 u16 manuf, part, ext;
252 i3c_device_get_info(i3c, &devinfo);
253 manuf = I3C_PID_MANUF_ID(devinfo.pid);
254 part = I3C_PID_PART_ID(devinfo.pid);
255 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
257 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
258 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
261 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
262 devinfo.dcr, manuf, part, ext);
264 static DEVICE_ATTR_RO(modalias);
266 static struct attribute *i3c_device_attrs[] = {
270 &dev_attr_dynamic_address.attr,
271 &dev_attr_hdrcap.attr,
272 &dev_attr_modalias.attr,
275 ATTRIBUTE_GROUPS(i3c_device);
277 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
279 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
280 struct i3c_device_info devinfo;
281 u16 manuf, part, ext;
283 i3c_device_get_info(i3cdev, &devinfo);
284 manuf = I3C_PID_MANUF_ID(devinfo.pid);
285 part = I3C_PID_PART_ID(devinfo.pid);
286 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
288 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
289 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
292 return add_uevent_var(env,
293 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
294 devinfo.dcr, manuf, part, ext);
297 static const struct device_type i3c_device_type = {
298 .groups = i3c_device_groups,
299 .uevent = i3c_device_uevent,
302 static int i3c_device_match(struct device *dev, struct device_driver *drv)
304 struct i3c_device *i3cdev;
305 struct i3c_driver *i3cdrv;
307 if (dev->type != &i3c_device_type)
310 i3cdev = dev_to_i3cdev(dev);
311 i3cdrv = drv_to_i3cdrv(drv);
312 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
318 static int i3c_device_probe(struct device *dev)
320 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
321 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
323 return driver->probe(i3cdev);
326 static void i3c_device_remove(struct device *dev)
328 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
329 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
332 driver->remove(i3cdev);
334 i3c_device_free_ibi(i3cdev);
337 struct bus_type i3c_bus_type = {
339 .match = i3c_device_match,
340 .probe = i3c_device_probe,
341 .remove = i3c_device_remove,
344 static enum i3c_addr_slot_status
345 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
347 unsigned long status;
348 int bitpos = addr * 2;
350 if (addr > I2C_MAX_ADDR)
351 return I3C_ADDR_SLOT_RSVD;
353 status = bus->addrslots[bitpos / BITS_PER_LONG];
354 status >>= bitpos % BITS_PER_LONG;
356 return status & I3C_ADDR_SLOT_STATUS_MASK;
359 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
360 enum i3c_addr_slot_status status)
362 int bitpos = addr * 2;
365 if (addr > I2C_MAX_ADDR)
368 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
369 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
370 (bitpos % BITS_PER_LONG));
371 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
374 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
376 enum i3c_addr_slot_status status;
378 status = i3c_bus_get_addr_slot_status(bus, addr);
380 return status == I3C_ADDR_SLOT_FREE;
383 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
385 enum i3c_addr_slot_status status;
388 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
389 status = i3c_bus_get_addr_slot_status(bus, addr);
390 if (status == I3C_ADDR_SLOT_FREE)
397 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
401 /* Addresses 0 to 7 are reserved. */
402 for (i = 0; i < 8; i++)
403 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
406 * Reserve broadcast address and all addresses that might collide
407 * with the broadcast address when facing a single bit error.
409 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
411 for (i = 0; i < 7; i++)
412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
416 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
418 mutex_lock(&i3c_core_lock);
419 idr_remove(&i3c_bus_idr, i3cbus->id);
420 mutex_unlock(&i3c_core_lock);
423 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
425 int ret, start, end, id = -1;
427 init_rwsem(&i3cbus->lock);
428 INIT_LIST_HEAD(&i3cbus->devs.i2c);
429 INIT_LIST_HEAD(&i3cbus->devs.i3c);
430 i3c_bus_init_addrslots(i3cbus);
431 i3cbus->mode = I3C_BUS_MODE_PURE;
434 id = of_alias_get_id(np, "i3c");
436 mutex_lock(&i3c_core_lock);
441 start = __i3c_first_dynamic_bus_num;
445 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
446 mutex_unlock(&i3c_core_lock);
456 static const char * const i3c_bus_mode_strings[] = {
457 [I3C_BUS_MODE_PURE] = "pure",
458 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
459 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
460 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
463 static ssize_t mode_show(struct device *dev,
464 struct device_attribute *da,
467 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
470 i3c_bus_normaluse_lock(i3cbus);
471 if (i3cbus->mode < 0 ||
472 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
473 !i3c_bus_mode_strings[i3cbus->mode])
474 ret = sprintf(buf, "unknown\n");
476 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
477 i3c_bus_normaluse_unlock(i3cbus);
481 static DEVICE_ATTR_RO(mode);
483 static ssize_t current_master_show(struct device *dev,
484 struct device_attribute *da,
487 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
490 i3c_bus_normaluse_lock(i3cbus);
491 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
492 i3cbus->cur_master->info.pid);
493 i3c_bus_normaluse_unlock(i3cbus);
497 static DEVICE_ATTR_RO(current_master);
499 static ssize_t i3c_scl_frequency_show(struct device *dev,
500 struct device_attribute *da,
503 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
506 i3c_bus_normaluse_lock(i3cbus);
507 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
508 i3c_bus_normaluse_unlock(i3cbus);
512 static DEVICE_ATTR_RO(i3c_scl_frequency);
514 static ssize_t i2c_scl_frequency_show(struct device *dev,
515 struct device_attribute *da,
518 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
521 i3c_bus_normaluse_lock(i3cbus);
522 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
523 i3c_bus_normaluse_unlock(i3cbus);
527 static DEVICE_ATTR_RO(i2c_scl_frequency);
529 static struct attribute *i3c_masterdev_attrs[] = {
531 &dev_attr_current_master.attr,
532 &dev_attr_i3c_scl_frequency.attr,
533 &dev_attr_i2c_scl_frequency.attr,
537 &dev_attr_dynamic_address.attr,
538 &dev_attr_hdrcap.attr,
541 ATTRIBUTE_GROUPS(i3c_masterdev);
543 static void i3c_masterdev_release(struct device *dev)
545 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
546 struct i3c_bus *bus = dev_to_i3cbus(dev);
549 destroy_workqueue(master->wq);
551 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
552 i3c_bus_cleanup(bus);
554 of_node_put(dev->of_node);
557 static const struct device_type i3c_masterdev_type = {
558 .groups = i3c_masterdev_groups,
561 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
562 unsigned long max_i2c_scl_rate)
564 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
568 switch (i3cbus->mode) {
569 case I3C_BUS_MODE_PURE:
570 if (!i3cbus->scl_rate.i3c)
571 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
573 case I3C_BUS_MODE_MIXED_FAST:
574 case I3C_BUS_MODE_MIXED_LIMITED:
575 if (!i3cbus->scl_rate.i3c)
576 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
577 if (!i3cbus->scl_rate.i2c)
578 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
580 case I3C_BUS_MODE_MIXED_SLOW:
581 if (!i3cbus->scl_rate.i2c)
582 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
583 if (!i3cbus->scl_rate.i3c ||
584 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
585 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
591 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
592 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
595 * I3C/I2C frequency may have been overridden, check that user-provided
596 * values are not exceeding max possible frequency.
598 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
599 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
605 static struct i3c_master_controller *
606 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
608 return container_of(adap, struct i3c_master_controller, i2c);
611 static struct i2c_adapter *
612 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
617 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
622 static struct i2c_dev_desc *
623 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
626 struct i2c_dev_desc *dev;
628 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
630 return ERR_PTR(-ENOMEM);
632 dev->common.master = master;
639 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
643 dest->payload.len = payloadlen;
645 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
647 dest->payload.data = NULL;
649 return dest->payload.data;
652 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
654 kfree(dest->payload.data);
657 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
658 struct i3c_ccc_cmd_dest *dests,
661 cmd->rnw = rnw ? 1 : 0;
664 cmd->ndests = ndests;
665 cmd->err = I3C_ERROR_UNKNOWN;
668 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
669 struct i3c_ccc_cmd *cmd)
676 if (WARN_ON(master->init_done &&
677 !rwsem_is_locked(&master->bus.lock)))
680 if (!master->ops->send_ccc_cmd)
683 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
686 if (master->ops->supports_ccc_cmd &&
687 !master->ops->supports_ccc_cmd(master, cmd))
690 ret = master->ops->send_ccc_cmd(master, cmd);
692 if (cmd->err != I3C_ERROR_UNKNOWN)
701 static struct i2c_dev_desc *
702 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
705 struct i2c_dev_desc *dev;
707 i3c_bus_for_each_i2cdev(&master->bus, dev) {
708 if (dev->addr == addr)
716 * i3c_master_get_free_addr() - get a free address on the bus
717 * @master: I3C master object
718 * @start_addr: where to start searching
720 * This function must be called with the bus lock held in write mode.
722 * Return: the first free address starting at @start_addr (included) or -ENOMEM
723 * if there's no more address available.
725 int i3c_master_get_free_addr(struct i3c_master_controller *master,
728 return i3c_bus_get_free_addr(&master->bus, start_addr);
730 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
732 static void i3c_device_release(struct device *dev)
734 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
736 WARN_ON(i3cdev->desc);
738 of_node_put(i3cdev->dev.of_node);
742 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
747 static struct i3c_dev_desc *
748 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
749 const struct i3c_device_info *info)
751 struct i3c_dev_desc *dev;
753 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
755 return ERR_PTR(-ENOMEM);
757 dev->common.master = master;
759 mutex_init(&dev->ibi_lock);
764 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
767 enum i3c_addr_slot_status addrstat;
768 struct i3c_ccc_cmd_dest dest;
769 struct i3c_ccc_cmd cmd;
775 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
776 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
779 i3c_ccc_cmd_dest_init(&dest, addr, 0);
780 i3c_ccc_cmd_init(&cmd, false,
781 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
783 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
784 i3c_ccc_cmd_dest_cleanup(&dest);
790 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
792 * @master: master used to send frames on the bus
794 * Send a ENTDAA CCC command to start a DAA procedure.
796 * Note that this function only sends the ENTDAA CCC command, all the logic
797 * behind dynamic address assignment has to be handled in the I3C master
800 * This function must be called with the bus lock held in write mode.
802 * Return: 0 in case of success, a positive I3C error code if the error is
803 * one of the official Mx error codes, and a negative error code otherwise.
805 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
807 struct i3c_ccc_cmd_dest dest;
808 struct i3c_ccc_cmd cmd;
811 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
812 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
813 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
814 i3c_ccc_cmd_dest_cleanup(&dest);
818 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
820 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
821 u8 addr, bool enable, u8 evts)
823 struct i3c_ccc_events *events;
824 struct i3c_ccc_cmd_dest dest;
825 struct i3c_ccc_cmd cmd;
828 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
832 events->events = evts;
833 i3c_ccc_cmd_init(&cmd, false,
835 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
836 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
838 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
839 i3c_ccc_cmd_dest_cleanup(&dest);
845 * i3c_master_disec_locked() - send a DISEC CCC command
846 * @master: master used to send frames on the bus
847 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
848 * @evts: events to disable
850 * Send a DISEC CCC command to disable some or all events coming from a
851 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
853 * This function must be called with the bus lock held in write mode.
855 * Return: 0 in case of success, a positive I3C error code if the error is
856 * one of the official Mx error codes, and a negative error code otherwise.
858 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
861 return i3c_master_enec_disec_locked(master, addr, false, evts);
863 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
866 * i3c_master_enec_locked() - send an ENEC CCC command
867 * @master: master used to send frames on the bus
868 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
869 * @evts: events to disable
871 * Sends an ENEC CCC command to enable some or all events coming from a
872 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
874 * This function must be called with the bus lock held in write mode.
876 * Return: 0 in case of success, a positive I3C error code if the error is
877 * one of the official Mx error codes, and a negative error code otherwise.
879 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
882 return i3c_master_enec_disec_locked(master, addr, true, evts);
884 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
887 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
888 * @master: master used to send frames on the bus
890 * Send a DEFSLVS CCC command containing all the devices known to the @master.
891 * This is useful when you have secondary masters on the bus to propagate
892 * device information.
894 * This should be called after all I3C devices have been discovered (in other
895 * words, after the DAA procedure has finished) and instantiated in
896 * &i3c_master_controller_ops->bus_init().
897 * It should also be called if a master ACKed an Hot-Join request and assigned
898 * a dynamic address to the device joining the bus.
900 * This function must be called with the bus lock held in write mode.
902 * Return: 0 in case of success, a positive I3C error code if the error is
903 * one of the official Mx error codes, and a negative error code otherwise.
905 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
907 struct i3c_ccc_defslvs *defslvs;
908 struct i3c_ccc_dev_desc *desc;
909 struct i3c_ccc_cmd_dest dest;
910 struct i3c_dev_desc *i3cdev;
911 struct i2c_dev_desc *i2cdev;
912 struct i3c_ccc_cmd cmd;
920 bus = i3c_master_get_bus(master);
921 i3c_bus_for_each_i3cdev(bus, i3cdev) {
924 if (i3cdev == master->this)
927 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
932 /* No other master on the bus, skip DEFSLVS. */
936 i3c_bus_for_each_i2cdev(bus, i2cdev)
939 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
940 struct_size(defslvs, slaves,
945 defslvs->count = ndevs;
946 defslvs->master.bcr = master->this->info.bcr;
947 defslvs->master.dcr = master->this->info.dcr;
948 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
949 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
951 desc = defslvs->slaves;
952 i3c_bus_for_each_i2cdev(bus, i2cdev) {
953 desc->lvr = i2cdev->lvr;
954 desc->static_addr = i2cdev->addr << 1;
958 i3c_bus_for_each_i3cdev(bus, i3cdev) {
959 /* Skip the I3C dev representing this master. */
960 if (i3cdev == master->this)
963 desc->bcr = i3cdev->info.bcr;
964 desc->dcr = i3cdev->info.dcr;
965 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
966 desc->static_addr = i3cdev->info.static_addr << 1;
970 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
971 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
972 i3c_ccc_cmd_dest_cleanup(&dest);
976 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
978 static int i3c_master_setda_locked(struct i3c_master_controller *master,
979 u8 oldaddr, u8 newaddr, bool setdasa)
981 struct i3c_ccc_cmd_dest dest;
982 struct i3c_ccc_setda *setda;
983 struct i3c_ccc_cmd cmd;
986 if (!oldaddr || !newaddr)
989 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
993 setda->addr = newaddr << 1;
994 i3c_ccc_cmd_init(&cmd, false,
995 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
997 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
998 i3c_ccc_cmd_dest_cleanup(&dest);
1003 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1004 u8 static_addr, u8 dyn_addr)
1006 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1009 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1010 u8 oldaddr, u8 newaddr)
1012 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1015 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1016 struct i3c_device_info *info)
1018 struct i3c_ccc_cmd_dest dest;
1019 struct i3c_ccc_mrl *mrl;
1020 struct i3c_ccc_cmd cmd;
1023 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1028 * When the device does not have IBI payload GETMRL only returns 2
1031 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1032 dest.payload.len -= 1;
1034 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1035 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1039 switch (dest.payload.len) {
1041 info->max_ibi_len = mrl->ibi_len;
1044 info->max_read_len = be16_to_cpu(mrl->read_len);
1052 i3c_ccc_cmd_dest_cleanup(&dest);
1057 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1058 struct i3c_device_info *info)
1060 struct i3c_ccc_cmd_dest dest;
1061 struct i3c_ccc_mwl *mwl;
1062 struct i3c_ccc_cmd cmd;
1065 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1069 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1070 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1074 if (dest.payload.len != sizeof(*mwl)) {
1079 info->max_write_len = be16_to_cpu(mwl->len);
1082 i3c_ccc_cmd_dest_cleanup(&dest);
1087 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1088 struct i3c_device_info *info)
1090 struct i3c_ccc_getmxds *getmaxds;
1091 struct i3c_ccc_cmd_dest dest;
1092 struct i3c_ccc_cmd cmd;
1095 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1100 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1101 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1105 if (dest.payload.len != 2 && dest.payload.len != 5) {
1110 info->max_read_ds = getmaxds->maxrd;
1111 info->max_write_ds = getmaxds->maxwr;
1112 if (dest.payload.len == 5)
1113 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1114 ((u32)getmaxds->maxrdturn[1] << 8) |
1115 ((u32)getmaxds->maxrdturn[2] << 16);
1118 i3c_ccc_cmd_dest_cleanup(&dest);
1123 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1124 struct i3c_device_info *info)
1126 struct i3c_ccc_gethdrcap *gethdrcap;
1127 struct i3c_ccc_cmd_dest dest;
1128 struct i3c_ccc_cmd cmd;
1131 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1132 sizeof(*gethdrcap));
1136 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1137 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1141 if (dest.payload.len != 1) {
1146 info->hdr_cap = gethdrcap->modes;
1149 i3c_ccc_cmd_dest_cleanup(&dest);
1154 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1155 struct i3c_device_info *info)
1157 struct i3c_ccc_getpid *getpid;
1158 struct i3c_ccc_cmd_dest dest;
1159 struct i3c_ccc_cmd cmd;
1162 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1166 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1167 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1172 for (i = 0; i < sizeof(getpid->pid); i++) {
1173 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1175 info->pid |= (u64)getpid->pid[i] << sft;
1179 i3c_ccc_cmd_dest_cleanup(&dest);
1184 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1185 struct i3c_device_info *info)
1187 struct i3c_ccc_getbcr *getbcr;
1188 struct i3c_ccc_cmd_dest dest;
1189 struct i3c_ccc_cmd cmd;
1192 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1196 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1197 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1201 info->bcr = getbcr->bcr;
1204 i3c_ccc_cmd_dest_cleanup(&dest);
1209 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1210 struct i3c_device_info *info)
1212 struct i3c_ccc_getdcr *getdcr;
1213 struct i3c_ccc_cmd_dest dest;
1214 struct i3c_ccc_cmd cmd;
1217 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1221 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1222 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1226 info->dcr = getdcr->dcr;
1229 i3c_ccc_cmd_dest_cleanup(&dest);
1234 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1236 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1237 enum i3c_addr_slot_status slot_status;
1240 if (!dev->info.dyn_addr)
1243 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1244 dev->info.dyn_addr);
1245 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1246 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1249 ret = i3c_master_getpid_locked(master, &dev->info);
1253 ret = i3c_master_getbcr_locked(master, &dev->info);
1257 ret = i3c_master_getdcr_locked(master, &dev->info);
1261 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1262 ret = i3c_master_getmxds_locked(master, &dev->info);
1267 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1268 dev->info.max_ibi_len = 1;
1270 i3c_master_getmrl_locked(master, &dev->info);
1271 i3c_master_getmwl_locked(master, &dev->info);
1273 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1274 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1282 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1284 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1286 if (dev->info.static_addr)
1287 i3c_bus_set_addr_slot_status(&master->bus,
1288 dev->info.static_addr,
1289 I3C_ADDR_SLOT_FREE);
1291 if (dev->info.dyn_addr)
1292 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1293 I3C_ADDR_SLOT_FREE);
1295 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1296 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1297 I3C_ADDR_SLOT_FREE);
1300 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1302 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1303 enum i3c_addr_slot_status status;
1305 if (!dev->info.static_addr && !dev->info.dyn_addr)
1308 if (dev->info.static_addr) {
1309 status = i3c_bus_get_addr_slot_status(&master->bus,
1310 dev->info.static_addr);
1311 if (status != I3C_ADDR_SLOT_FREE)
1314 i3c_bus_set_addr_slot_status(&master->bus,
1315 dev->info.static_addr,
1316 I3C_ADDR_SLOT_I3C_DEV);
1320 * ->init_dyn_addr should have been reserved before that, so, if we're
1321 * trying to apply a pre-reserved dynamic address, we should not try
1322 * to reserve the address slot a second time.
1324 if (dev->info.dyn_addr &&
1326 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1327 status = i3c_bus_get_addr_slot_status(&master->bus,
1328 dev->info.dyn_addr);
1329 if (status != I3C_ADDR_SLOT_FREE)
1330 goto err_release_static_addr;
1332 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1333 I3C_ADDR_SLOT_I3C_DEV);
1338 err_release_static_addr:
1339 if (dev->info.static_addr)
1340 i3c_bus_set_addr_slot_status(&master->bus,
1341 dev->info.static_addr,
1342 I3C_ADDR_SLOT_FREE);
1347 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1348 struct i3c_dev_desc *dev)
1353 * We don't attach devices to the controller until they are
1354 * addressable on the bus.
1356 if (!dev->info.static_addr && !dev->info.dyn_addr)
1359 ret = i3c_master_get_i3c_addrs(dev);
1363 /* Do not attach the master device itself. */
1364 if (master->this != dev && master->ops->attach_i3c_dev) {
1365 ret = master->ops->attach_i3c_dev(dev);
1367 i3c_master_put_i3c_addrs(dev);
1372 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1377 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1380 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1381 enum i3c_addr_slot_status status;
1384 if (dev->info.dyn_addr != old_dyn_addr &&
1386 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1387 status = i3c_bus_get_addr_slot_status(&master->bus,
1388 dev->info.dyn_addr);
1389 if (status != I3C_ADDR_SLOT_FREE)
1391 i3c_bus_set_addr_slot_status(&master->bus,
1393 I3C_ADDR_SLOT_I3C_DEV);
1395 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1396 I3C_ADDR_SLOT_FREE);
1399 if (master->ops->reattach_i3c_dev) {
1400 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1402 i3c_master_put_i3c_addrs(dev);
1410 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1412 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1414 /* Do not detach the master device itself. */
1415 if (master->this != dev && master->ops->detach_i3c_dev)
1416 master->ops->detach_i3c_dev(dev);
1418 i3c_master_put_i3c_addrs(dev);
1419 list_del(&dev->common.node);
1422 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1423 struct i2c_dev_desc *dev)
1427 if (master->ops->attach_i2c_dev) {
1428 ret = master->ops->attach_i2c_dev(dev);
1433 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1438 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1440 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1442 list_del(&dev->common.node);
1444 if (master->ops->detach_i2c_dev)
1445 master->ops->detach_i2c_dev(dev);
1448 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1449 struct i3c_dev_boardinfo *boardinfo)
1451 struct i3c_device_info info = {
1452 .static_addr = boardinfo->static_addr,
1453 .pid = boardinfo->pid,
1455 struct i3c_dev_desc *i3cdev;
1458 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1462 i3cdev->boardinfo = boardinfo;
1464 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1468 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1469 i3cdev->boardinfo->init_dyn_addr);
1471 goto err_detach_dev;
1473 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1474 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1478 ret = i3c_master_retrieve_dev_info(i3cdev);
1485 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1487 i3c_master_detach_i3c_dev(i3cdev);
1489 i3c_master_free_i3c_dev(i3cdev);
1495 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1497 struct i3c_dev_desc *desc;
1500 if (!master->init_done)
1503 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1504 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1507 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1511 desc->dev->bus = &master->bus;
1512 desc->dev->desc = desc;
1513 desc->dev->dev.parent = &master->dev;
1514 desc->dev->dev.type = &i3c_device_type;
1515 desc->dev->dev.bus = &i3c_bus_type;
1516 desc->dev->dev.release = i3c_device_release;
1517 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1520 if (desc->boardinfo)
1521 desc->dev->dev.of_node = desc->boardinfo->of_node;
1523 ret = device_register(&desc->dev->dev);
1525 dev_err(&master->dev,
1526 "Failed to add I3C device (err = %d)\n", ret);
1531 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1532 * @master: master doing the DAA
1534 * This function is instantiating an I3C device object and adding it to the
1535 * I3C device list. All device information are automatically retrieved using
1536 * standard CCC commands.
1538 * The I3C device object is returned in case the master wants to attach
1539 * private data to it using i3c_dev_set_master_data().
1541 * This function must be called with the bus lock held in write mode.
1543 * Return: a 0 in case of success, an negative error code otherwise.
1545 int i3c_master_do_daa(struct i3c_master_controller *master)
1549 i3c_bus_maintenance_lock(&master->bus);
1550 ret = master->ops->do_daa(master);
1551 i3c_bus_maintenance_unlock(&master->bus);
1556 i3c_bus_normaluse_lock(&master->bus);
1557 i3c_master_register_new_i3c_devs(master);
1558 i3c_bus_normaluse_unlock(&master->bus);
1562 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1565 * i3c_master_set_info() - set master device information
1566 * @master: master used to send frames on the bus
1567 * @info: I3C device information
1569 * Set master device info. This should be called from
1570 * &i3c_master_controller_ops->bus_init().
1572 * Not all &i3c_device_info fields are meaningful for a master device.
1573 * Here is a list of fields that should be properly filled:
1575 * - &i3c_device_info->dyn_addr
1576 * - &i3c_device_info->bcr
1577 * - &i3c_device_info->dcr
1578 * - &i3c_device_info->pid
1579 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1580 * &i3c_device_info->bcr
1582 * This function must be called with the bus lock held in maintenance mode.
1584 * Return: 0 if @info contains valid information (not every piece of
1585 * information can be checked, but we can at least make sure @info->dyn_addr
1586 * and @info->bcr are correct), -EINVAL otherwise.
1588 int i3c_master_set_info(struct i3c_master_controller *master,
1589 const struct i3c_device_info *info)
1591 struct i3c_dev_desc *i3cdev;
1594 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1597 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1604 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1606 return PTR_ERR(i3cdev);
1608 master->this = i3cdev;
1609 master->bus.cur_master = master->this;
1611 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1618 i3c_master_free_i3c_dev(i3cdev);
1622 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1624 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1626 struct i3c_dev_desc *i3cdev, *i3ctmp;
1627 struct i2c_dev_desc *i2cdev, *i2ctmp;
1629 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1631 i3c_master_detach_i3c_dev(i3cdev);
1633 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1634 i3c_bus_set_addr_slot_status(&master->bus,
1635 i3cdev->boardinfo->init_dyn_addr,
1636 I3C_ADDR_SLOT_FREE);
1638 i3c_master_free_i3c_dev(i3cdev);
1641 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1643 i3c_master_detach_i2c_dev(i2cdev);
1644 i3c_bus_set_addr_slot_status(&master->bus,
1646 I3C_ADDR_SLOT_FREE);
1647 i3c_master_free_i2c_dev(i2cdev);
1652 * i3c_master_bus_init() - initialize an I3C bus
1653 * @master: main master initializing the bus
1655 * This function is following all initialisation steps described in the I3C
1658 * 1. Attach I2C devs to the master so that the master can fill its internal
1659 * device table appropriately
1661 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1662 * the master controller. That's usually where the bus mode is selected
1663 * (pure bus or mixed fast/slow bus)
1665 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1666 * particularly important when the bus was previously configured by someone
1667 * else (for example the bootloader)
1669 * 4. Disable all slave events.
1671 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1672 * also have static_addr, try to pre-assign dynamic addresses requested by
1673 * the FW with SETDASA and attach corresponding statically defined I3C
1674 * devices to the master.
1676 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1677 * remaining I3C devices
1679 * Once this is done, all I3C and I2C devices should be usable.
1681 * Return: a 0 in case of success, an negative error code otherwise.
1683 static int i3c_master_bus_init(struct i3c_master_controller *master)
1685 enum i3c_addr_slot_status status;
1686 struct i2c_dev_boardinfo *i2cboardinfo;
1687 struct i3c_dev_boardinfo *i3cboardinfo;
1688 struct i2c_dev_desc *i2cdev;
1692 * First attach all devices with static definitions provided by the
1695 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1696 status = i3c_bus_get_addr_slot_status(&master->bus,
1697 i2cboardinfo->base.addr);
1698 if (status != I3C_ADDR_SLOT_FREE) {
1700 goto err_detach_devs;
1703 i3c_bus_set_addr_slot_status(&master->bus,
1704 i2cboardinfo->base.addr,
1705 I3C_ADDR_SLOT_I2C_DEV);
1707 i2cdev = i3c_master_alloc_i2c_dev(master,
1708 i2cboardinfo->base.addr,
1710 if (IS_ERR(i2cdev)) {
1711 ret = PTR_ERR(i2cdev);
1712 goto err_detach_devs;
1715 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1717 i3c_master_free_i2c_dev(i2cdev);
1718 goto err_detach_devs;
1723 * Now execute the controller specific ->bus_init() routine, which
1724 * might configure its internal logic to match the bus limitations.
1726 ret = master->ops->bus_init(master);
1728 goto err_detach_devs;
1731 * The master device should have been instantiated in ->bus_init(),
1732 * complain if this was not the case.
1734 if (!master->this) {
1735 dev_err(&master->dev,
1736 "master_set_info() was not called in ->bus_init()\n");
1738 goto err_bus_cleanup;
1742 * Reset all dynamic address that may have been assigned before
1743 * (assigned by the bootloader for example).
1745 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1746 if (ret && ret != I3C_ERROR_M2)
1747 goto err_bus_cleanup;
1749 /* Disable all slave events before starting DAA. */
1750 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1751 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1753 if (ret && ret != I3C_ERROR_M2)
1754 goto err_bus_cleanup;
1757 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1758 * address and retrieve device information if needed.
1759 * In case pre-assign dynamic address fails, setting dynamic address to
1760 * the requested init_dyn_addr is retried after DAA is done in
1761 * i3c_master_add_i3c_dev_locked().
1763 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1766 * We don't reserve a dynamic address for devices that
1767 * don't explicitly request one.
1769 if (!i3cboardinfo->init_dyn_addr)
1772 ret = i3c_bus_get_addr_slot_status(&master->bus,
1773 i3cboardinfo->init_dyn_addr);
1774 if (ret != I3C_ADDR_SLOT_FREE) {
1779 i3c_bus_set_addr_slot_status(&master->bus,
1780 i3cboardinfo->init_dyn_addr,
1781 I3C_ADDR_SLOT_I3C_DEV);
1784 * Only try to create/attach devices that have a static
1785 * address. Other devices will be created/attached when
1786 * DAA happens, and the requested dynamic address will
1787 * be set using SETNEWDA once those devices become
1791 if (i3cboardinfo->static_addr)
1792 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1795 ret = i3c_master_do_daa(master);
1802 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1805 if (master->ops->bus_cleanup)
1806 master->ops->bus_cleanup(master);
1809 i3c_master_detach_free_devs(master);
1814 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1816 if (master->ops->bus_cleanup)
1817 master->ops->bus_cleanup(master);
1819 i3c_master_detach_free_devs(master);
1822 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1824 struct i3c_master_controller *master = i3cdev->common.master;
1825 struct i3c_dev_boardinfo *i3cboardinfo;
1827 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1828 if (i3cdev->info.pid != i3cboardinfo->pid)
1831 i3cdev->boardinfo = i3cboardinfo;
1832 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1837 static struct i3c_dev_desc *
1838 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1840 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1841 struct i3c_dev_desc *i3cdev;
1843 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1844 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1852 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1853 * @master: master used to send frames on the bus
1854 * @addr: I3C slave dynamic address assigned to the device
1856 * This function is instantiating an I3C device object and adding it to the
1857 * I3C device list. All device information are automatically retrieved using
1858 * standard CCC commands.
1860 * The I3C device object is returned in case the master wants to attach
1861 * private data to it using i3c_dev_set_master_data().
1863 * This function must be called with the bus lock held in write mode.
1865 * Return: a 0 in case of success, an negative error code otherwise.
1867 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1870 struct i3c_device_info info = { .dyn_addr = addr };
1871 struct i3c_dev_desc *newdev, *olddev;
1872 u8 old_dyn_addr = addr, expected_dyn_addr;
1873 struct i3c_ibi_setup ibireq = { };
1874 bool enable_ibi = false;
1880 newdev = i3c_master_alloc_i3c_dev(master, &info);
1882 return PTR_ERR(newdev);
1884 ret = i3c_master_attach_i3c_dev(master, newdev);
1888 ret = i3c_master_retrieve_dev_info(newdev);
1890 goto err_detach_dev;
1892 i3c_master_attach_boardinfo(newdev);
1894 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1896 newdev->dev = olddev->dev;
1898 newdev->dev->desc = newdev;
1901 * We need to restore the IBI state too, so let's save the
1902 * IBI information and try to restore them after olddev has
1903 * been detached+released and its IBI has been stopped and
1904 * the associated resources have been freed.
1906 mutex_lock(&olddev->ibi_lock);
1908 ibireq.handler = olddev->ibi->handler;
1909 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1910 ibireq.num_slots = olddev->ibi->num_slots;
1912 if (olddev->ibi->enabled) {
1914 i3c_dev_disable_ibi_locked(olddev);
1917 i3c_dev_free_ibi_locked(olddev);
1919 mutex_unlock(&olddev->ibi_lock);
1921 old_dyn_addr = olddev->info.dyn_addr;
1923 i3c_master_detach_i3c_dev(olddev);
1924 i3c_master_free_i3c_dev(olddev);
1928 * Depending on our previous state, the expected dynamic address might
1930 * - if the device already had a dynamic address assigned, let's try to
1932 * - if the device did not have a dynamic address and the firmware
1933 * requested a specific address, pick this one
1934 * - in any other case, keep the address automatically assigned by the
1937 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1938 expected_dyn_addr = old_dyn_addr;
1939 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1940 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1942 expected_dyn_addr = newdev->info.dyn_addr;
1944 if (newdev->info.dyn_addr != expected_dyn_addr) {
1946 * Try to apply the expected dynamic address. If it fails, keep
1947 * the address assigned by the master.
1949 ret = i3c_master_setnewda_locked(master,
1950 newdev->info.dyn_addr,
1953 old_dyn_addr = newdev->info.dyn_addr;
1954 newdev->info.dyn_addr = expected_dyn_addr;
1955 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1957 dev_err(&master->dev,
1958 "Failed to assign reserved/old address to device %d%llx",
1959 master->bus.id, newdev->info.pid);
1964 * Now is time to try to restore the IBI setup. If we're lucky,
1965 * everything works as before, otherwise, all we can do is complain.
1966 * FIXME: maybe we should add callback to inform the driver that it
1967 * should request the IBI again instead of trying to hide that from
1970 if (ibireq.handler) {
1971 mutex_lock(&newdev->ibi_lock);
1972 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1974 dev_err(&master->dev,
1975 "Failed to request IBI on device %d-%llx",
1976 master->bus.id, newdev->info.pid);
1977 } else if (enable_ibi) {
1978 ret = i3c_dev_enable_ibi_locked(newdev);
1980 dev_err(&master->dev,
1981 "Failed to re-enable IBI on device %d-%llx",
1982 master->bus.id, newdev->info.pid);
1984 mutex_unlock(&newdev->ibi_lock);
1990 if (newdev->dev && newdev->dev->desc)
1991 newdev->dev->desc = NULL;
1993 i3c_master_detach_i3c_dev(newdev);
1996 i3c_master_free_i3c_dev(newdev);
2000 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2002 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2005 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2006 struct device_node *node, u32 *reg)
2008 struct i2c_dev_boardinfo *boardinfo;
2009 struct device *dev = &master->dev;
2012 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2016 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2021 * The I3C Specification does not clearly say I2C devices with 10-bit
2022 * address are supported. These devices can't be passed properly through
2025 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2026 dev_err(dev, "I2C device with 10 bit address not supported.");
2030 /* LVR is encoded in reg[2]. */
2031 boardinfo->lvr = reg[2];
2033 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2040 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2041 struct device_node *node, u32 *reg)
2043 struct i3c_dev_boardinfo *boardinfo;
2044 struct device *dev = &master->dev;
2045 enum i3c_addr_slot_status addrstatus;
2046 u32 init_dyn_addr = 0;
2048 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2053 if (reg[0] > I3C_MAX_ADDR)
2056 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2058 if (addrstatus != I3C_ADDR_SLOT_FREE)
2062 boardinfo->static_addr = reg[0];
2064 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2065 if (init_dyn_addr > I3C_MAX_ADDR)
2068 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2070 if (addrstatus != I3C_ADDR_SLOT_FREE)
2074 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2076 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2077 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2080 boardinfo->init_dyn_addr = init_dyn_addr;
2081 boardinfo->of_node = of_node_get(node);
2082 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2087 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2088 struct device_node *node)
2093 if (!master || !node)
2096 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2101 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2102 * dealing with an I2C device.
2105 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2107 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2112 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2114 struct device *dev = &master->dev;
2115 struct device_node *i3cbus_np = dev->of_node;
2116 struct device_node *node;
2123 for_each_available_child_of_node(i3cbus_np, node) {
2124 ret = of_i3c_master_add_dev(master, node);
2132 * The user might want to limit I2C and I3C speed in case some devices
2133 * on the bus are not supporting typical rates, or if the bus topology
2134 * prevents it from using max possible rate.
2136 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2137 master->bus.scl_rate.i2c = val;
2139 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2140 master->bus.scl_rate.i3c = val;
2145 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2146 struct i2c_msg *xfers, int nxfers)
2148 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2149 struct i2c_dev_desc *dev;
2153 if (!xfers || !master || nxfers <= 0)
2156 if (!master->ops->i2c_xfers)
2159 /* Doing transfers to different devices is not supported. */
2160 addr = xfers[0].addr;
2161 for (i = 1; i < nxfers; i++) {
2162 if (addr != xfers[i].addr)
2166 i3c_bus_normaluse_lock(&master->bus);
2167 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2171 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2172 i3c_bus_normaluse_unlock(&master->bus);
2174 return ret ? ret : nxfers;
2177 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2179 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2182 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2184 /* Fall back to no spike filters and FM bus mode. */
2185 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2187 if (client->dev.of_node) {
2190 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2191 reg, ARRAY_SIZE(reg)))
2198 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2200 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2201 enum i3c_addr_slot_status status;
2202 struct i2c_dev_desc *i2cdev;
2205 /* Already added by board info? */
2206 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2209 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2210 if (status != I3C_ADDR_SLOT_FREE)
2213 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2214 I3C_ADDR_SLOT_I2C_DEV);
2216 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2217 i3c_master_i2c_get_lvr(client));
2218 if (IS_ERR(i2cdev)) {
2219 ret = PTR_ERR(i2cdev);
2220 goto out_clear_status;
2223 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2230 i3c_master_free_i2c_dev(i2cdev);
2232 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2233 I3C_ADDR_SLOT_FREE);
2238 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2240 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2241 struct i2c_dev_desc *dev;
2243 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2247 i3c_master_detach_i2c_dev(dev);
2248 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2249 I3C_ADDR_SLOT_FREE);
2250 i3c_master_free_i2c_dev(dev);
2255 static const struct i2c_algorithm i3c_master_i2c_algo = {
2256 .master_xfer = i3c_master_i2c_adapter_xfer,
2257 .functionality = i3c_master_i2c_funcs,
2260 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2263 struct i2c_adapter *adap;
2264 struct i2c_client *client;
2265 struct device *dev = data;
2266 struct i3c_master_controller *master;
2269 if (dev->type != &i2c_client_type)
2272 client = to_i2c_client(dev);
2273 adap = client->adapter;
2275 if (adap->algo != &i3c_master_i2c_algo)
2278 master = i2c_adapter_to_i3c_master(adap);
2280 i3c_bus_maintenance_lock(&master->bus);
2282 case BUS_NOTIFY_ADD_DEVICE:
2283 ret = i3c_master_i2c_attach(adap, client);
2285 case BUS_NOTIFY_DEL_DEVICE:
2286 ret = i3c_master_i2c_detach(adap, client);
2289 i3c_bus_maintenance_unlock(&master->bus);
2294 static struct notifier_block i2cdev_notifier = {
2295 .notifier_call = i3c_i2c_notifier_call,
2298 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2300 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2301 struct i2c_dev_desc *i2cdev;
2302 struct i2c_dev_boardinfo *i2cboardinfo;
2305 adap->dev.parent = master->dev.parent;
2306 adap->owner = master->dev.parent->driver->owner;
2307 adap->algo = &i3c_master_i2c_algo;
2308 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2310 /* FIXME: Should we allow i3c masters to override these values? */
2311 adap->timeout = 1000;
2314 ret = i2c_add_adapter(adap);
2319 * We silently ignore failures here. The bus should keep working
2320 * correctly even if one or more i2c devices are not registered.
2322 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2323 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2324 i2cboardinfo->base.addr);
2325 if (WARN_ON(!i2cdev))
2327 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2333 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2335 struct i2c_dev_desc *i2cdev;
2337 i2c_del_adapter(&master->i2c);
2339 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2343 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2345 struct i3c_dev_desc *i3cdev;
2347 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2351 i3cdev->dev->desc = NULL;
2352 if (device_is_registered(&i3cdev->dev->dev))
2353 device_unregister(&i3cdev->dev->dev);
2355 put_device(&i3cdev->dev->dev);
2361 * i3c_master_queue_ibi() - Queue an IBI
2362 * @dev: the device this IBI is coming from
2363 * @slot: the IBI slot used to store the payload
2365 * Queue an IBI to the controller workqueue. The IBI handler attached to
2366 * the dev will be called from a workqueue context.
2368 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2370 atomic_inc(&dev->ibi->pending_ibis);
2371 queue_work(dev->common.master->wq, &slot->work);
2373 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2375 static void i3c_master_handle_ibi(struct work_struct *work)
2377 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2379 struct i3c_dev_desc *dev = slot->dev;
2380 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2381 struct i3c_ibi_payload payload;
2383 payload.data = slot->data;
2384 payload.len = slot->len;
2387 dev->ibi->handler(dev->dev, &payload);
2389 master->ops->recycle_ibi_slot(dev, slot);
2390 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2391 complete(&dev->ibi->all_ibis_handled);
2394 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2395 struct i3c_ibi_slot *slot)
2398 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2401 struct i3c_generic_ibi_slot {
2402 struct list_head node;
2403 struct i3c_ibi_slot base;
2406 struct i3c_generic_ibi_pool {
2408 unsigned int num_slots;
2409 struct i3c_generic_ibi_slot *slots;
2411 struct list_head free_slots;
2412 struct list_head pending;
2416 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2417 * @pool: the IBI pool to free
2419 * Free all IBI slots allated by a generic IBI pool.
2421 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2423 struct i3c_generic_ibi_slot *slot;
2424 unsigned int nslots = 0;
2426 while (!list_empty(&pool->free_slots)) {
2427 slot = list_first_entry(&pool->free_slots,
2428 struct i3c_generic_ibi_slot, node);
2429 list_del(&slot->node);
2434 * If the number of freed slots is not equal to the number of allocated
2435 * slots we have a leak somewhere.
2437 WARN_ON(nslots != pool->num_slots);
2439 kfree(pool->payload_buf);
2443 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2446 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2447 * @dev: the device this pool will be used for
2448 * @req: IBI setup request describing what the device driver expects
2450 * Create a generic IBI pool based on the information provided in @req.
2452 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2454 struct i3c_generic_ibi_pool *
2455 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2456 const struct i3c_ibi_setup *req)
2458 struct i3c_generic_ibi_pool *pool;
2459 struct i3c_generic_ibi_slot *slot;
2463 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2465 return ERR_PTR(-ENOMEM);
2467 spin_lock_init(&pool->lock);
2468 INIT_LIST_HEAD(&pool->free_slots);
2469 INIT_LIST_HEAD(&pool->pending);
2471 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2477 if (req->max_payload_len) {
2478 pool->payload_buf = kcalloc(req->num_slots,
2479 req->max_payload_len, GFP_KERNEL);
2480 if (!pool->payload_buf) {
2486 for (i = 0; i < req->num_slots; i++) {
2487 slot = &pool->slots[i];
2488 i3c_master_init_ibi_slot(dev, &slot->base);
2490 if (req->max_payload_len)
2491 slot->base.data = pool->payload_buf +
2492 (i * req->max_payload_len);
2494 list_add_tail(&slot->node, &pool->free_slots);
2501 i3c_generic_ibi_free_pool(pool);
2502 return ERR_PTR(ret);
2504 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2507 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2508 * @pool: the pool to query an IBI slot on
2510 * Search for a free slot in a generic IBI pool.
2511 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2512 * when it's no longer needed.
2514 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2516 struct i3c_ibi_slot *
2517 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2519 struct i3c_generic_ibi_slot *slot;
2520 unsigned long flags;
2522 spin_lock_irqsave(&pool->lock, flags);
2523 slot = list_first_entry_or_null(&pool->free_slots,
2524 struct i3c_generic_ibi_slot, node);
2526 list_del(&slot->node);
2527 spin_unlock_irqrestore(&pool->lock, flags);
2529 return slot ? &slot->base : NULL;
2531 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2534 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2535 * @pool: the pool to return the IBI slot to
2536 * @s: IBI slot to recycle
2538 * Add an IBI slot back to its generic IBI pool. Should be called from the
2539 * master driver struct_master_controller_ops->recycle_ibi() method.
2541 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2542 struct i3c_ibi_slot *s)
2544 struct i3c_generic_ibi_slot *slot;
2545 unsigned long flags;
2550 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2551 spin_lock_irqsave(&pool->lock, flags);
2552 list_add_tail(&slot->node, &pool->free_slots);
2553 spin_unlock_irqrestore(&pool->lock, flags);
2555 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2557 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2559 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2560 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2563 if (ops->request_ibi &&
2564 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2565 !ops->recycle_ibi_slot))
2572 * i3c_master_register() - register an I3C master
2573 * @master: master used to send frames on the bus
2574 * @parent: the parent device (the one that provides this I3C master
2576 * @ops: the master controller operations
2577 * @secondary: true if you are registering a secondary master. Will return
2578 * -ENOTSUPP if set to true since secondary masters are not yet
2581 * This function takes care of everything for you:
2583 * - creates and initializes the I3C bus
2584 * - populates the bus with static I2C devs if @parent->of_node is not
2586 * - registers all I3C devices added by the controller during bus
2588 * - registers the I2C adapter and all I2C devices
2590 * Return: 0 in case of success, a negative error code otherwise.
2592 int i3c_master_register(struct i3c_master_controller *master,
2593 struct device *parent,
2594 const struct i3c_master_controller_ops *ops,
2597 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2598 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2599 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2600 struct i2c_dev_boardinfo *i2cbi;
2603 /* We do not support secondary masters yet. */
2607 ret = i3c_master_check_ops(ops);
2611 master->dev.parent = parent;
2612 master->dev.of_node = of_node_get(parent->of_node);
2613 master->dev.bus = &i3c_bus_type;
2614 master->dev.type = &i3c_masterdev_type;
2615 master->dev.release = i3c_masterdev_release;
2617 master->secondary = secondary;
2618 INIT_LIST_HEAD(&master->boardinfo.i2c);
2619 INIT_LIST_HEAD(&master->boardinfo.i3c);
2621 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2625 device_initialize(&master->dev);
2626 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2628 ret = of_populate_i3c_bus(master);
2632 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2633 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2634 case I3C_LVR_I2C_INDEX(0):
2635 if (mode < I3C_BUS_MODE_MIXED_FAST)
2636 mode = I3C_BUS_MODE_MIXED_FAST;
2638 case I3C_LVR_I2C_INDEX(1):
2639 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2640 mode = I3C_BUS_MODE_MIXED_LIMITED;
2642 case I3C_LVR_I2C_INDEX(2):
2643 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2644 mode = I3C_BUS_MODE_MIXED_SLOW;
2651 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2652 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2655 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2659 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2665 ret = i3c_master_bus_init(master);
2669 ret = device_add(&master->dev);
2671 goto err_cleanup_bus;
2674 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2675 * through the I2C subsystem.
2677 ret = i3c_master_i2c_adapter_init(master);
2682 * We're done initializing the bus and the controller, we can now
2683 * register I3C devices discovered during the initial DAA.
2685 master->init_done = true;
2686 i3c_bus_normaluse_lock(&master->bus);
2687 i3c_master_register_new_i3c_devs(master);
2688 i3c_bus_normaluse_unlock(&master->bus);
2693 device_del(&master->dev);
2696 i3c_master_bus_cleanup(master);
2699 put_device(&master->dev);
2703 EXPORT_SYMBOL_GPL(i3c_master_register);
2706 * i3c_master_unregister() - unregister an I3C master
2707 * @master: master used to send frames on the bus
2709 * Basically undo everything done in i3c_master_register().
2711 void i3c_master_unregister(struct i3c_master_controller *master)
2713 i3c_master_i2c_adapter_cleanup(master);
2714 i3c_master_unregister_i3c_devs(master);
2715 i3c_master_bus_cleanup(master);
2716 device_unregister(&master->dev);
2718 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2720 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2722 struct i3c_master_controller *master;
2727 master = i3c_dev_get_master(dev);
2731 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2732 !dev->boardinfo->static_addr)
2735 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2736 dev->boardinfo->init_dyn_addr);
2739 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2740 struct i3c_priv_xfer *xfers,
2743 struct i3c_master_controller *master;
2748 master = i3c_dev_get_master(dev);
2749 if (!master || !xfers)
2752 if (!master->ops->priv_xfers)
2755 return master->ops->priv_xfers(dev, xfers, nxfers);
2758 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2760 struct i3c_master_controller *master;
2766 master = i3c_dev_get_master(dev);
2767 ret = master->ops->disable_ibi(dev);
2771 reinit_completion(&dev->ibi->all_ibis_handled);
2772 if (atomic_read(&dev->ibi->pending_ibis))
2773 wait_for_completion(&dev->ibi->all_ibis_handled);
2775 dev->ibi->enabled = false;
2780 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2782 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2788 ret = master->ops->enable_ibi(dev);
2790 dev->ibi->enabled = true;
2795 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2796 const struct i3c_ibi_setup *req)
2798 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2799 struct i3c_device_ibi_info *ibi;
2802 if (!master->ops->request_ibi)
2808 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2812 atomic_set(&ibi->pending_ibis, 0);
2813 init_completion(&ibi->all_ibis_handled);
2814 ibi->handler = req->handler;
2815 ibi->max_payload_len = req->max_payload_len;
2816 ibi->num_slots = req->num_slots;
2819 ret = master->ops->request_ibi(dev, req);
2828 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2830 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2835 if (WARN_ON(dev->ibi->enabled))
2836 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2838 master->ops->free_ibi(dev);
2843 static int __init i3c_init(void)
2847 res = of_alias_get_highest_id("i3c");
2849 mutex_lock(&i3c_core_lock);
2850 __i3c_first_dynamic_bus_num = res + 1;
2851 mutex_unlock(&i3c_core_lock);
2854 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2858 res = bus_register(&i3c_bus_type);
2860 goto out_unreg_notifier;
2865 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2869 subsys_initcall(i3c_init);
2871 static void __exit i3c_exit(void)
2873 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2874 idr_destroy(&i3c_bus_idr);
2875 bus_unregister(&i3c_bus_type);
2877 module_exit(i3c_exit);
2879 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2880 MODULE_DESCRIPTION("I3C core");
2881 MODULE_LICENSE("GPL v2");