1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
43 down_write(&bus->lock);
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
49 * @bus: I3C bus to release the lock on
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
78 down_read(&bus->lock);
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
97 return container_of(i3cbus, struct i3c_master_controller, bus);
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
102 return container_of(dev, struct i3c_master_controller, dev);
105 static const struct device_type i3c_device_type;
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
109 struct i3c_master_controller *master;
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
114 master = dev_to_i3cmaster(dev);
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
121 struct i3c_master_controller *master;
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
126 master = dev_to_i3cmaster(dev);
131 static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
146 static DEVICE_ATTR_RO(bcr);
148 static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
163 static DEVICE_ATTR_RO(dcr);
165 static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
180 static DEVICE_ATTR_RO(pid);
182 static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
197 static DEVICE_ATTR_RO(dynamic_address);
199 static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
203 static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
220 if (!hdrcap_strings[mode])
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
231 ret = sprintf(buf + offset, "\n");
238 i3c_bus_normaluse_unlock(bus);
242 static DEVICE_ATTR_RO(hdrcap);
244 static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
263 static DEVICE_ATTR_RO(modalias);
265 static struct attribute *i3c_device_attrs[] = {
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
271 &dev_attr_modalias.attr,
274 ATTRIBUTE_GROUPS(i3c_device);
276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
291 return add_uevent_var(env,
292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 devinfo.dcr, manuf, part, ext);
296 static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
306 if (dev->type != &i3c_device_type)
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
317 static int i3c_device_probe(struct device *dev)
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
322 return driver->probe(i3cdev);
325 static void i3c_device_remove(struct device *dev)
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
331 driver->remove(i3cdev);
333 i3c_device_free_ibi(i3cdev);
336 struct bus_type i3c_bus_type = {
338 .match = i3c_device_match,
339 .probe = i3c_device_probe,
340 .remove = i3c_device_remove,
343 static enum i3c_addr_slot_status
344 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
346 unsigned long status;
347 int bitpos = addr * 2;
349 if (addr > I2C_MAX_ADDR)
350 return I3C_ADDR_SLOT_RSVD;
352 status = bus->addrslots[bitpos / BITS_PER_LONG];
353 status >>= bitpos % BITS_PER_LONG;
355 return status & I3C_ADDR_SLOT_STATUS_MASK;
358 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
359 enum i3c_addr_slot_status status)
361 int bitpos = addr * 2;
364 if (addr > I2C_MAX_ADDR)
367 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
368 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
369 (bitpos % BITS_PER_LONG));
370 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
373 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
375 enum i3c_addr_slot_status status;
377 status = i3c_bus_get_addr_slot_status(bus, addr);
379 return status == I3C_ADDR_SLOT_FREE;
382 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
384 enum i3c_addr_slot_status status;
387 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
388 status = i3c_bus_get_addr_slot_status(bus, addr);
389 if (status == I3C_ADDR_SLOT_FREE)
396 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
400 /* Addresses 0 to 7 are reserved. */
401 for (i = 0; i < 8; i++)
402 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
405 * Reserve broadcast address and all addresses that might collide
406 * with the broadcast address when facing a single bit error.
408 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
410 for (i = 0; i < 7; i++)
411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
415 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
417 mutex_lock(&i3c_core_lock);
418 idr_remove(&i3c_bus_idr, i3cbus->id);
419 mutex_unlock(&i3c_core_lock);
422 static int i3c_bus_init(struct i3c_bus *i3cbus)
426 init_rwsem(&i3cbus->lock);
427 INIT_LIST_HEAD(&i3cbus->devs.i2c);
428 INIT_LIST_HEAD(&i3cbus->devs.i3c);
429 i3c_bus_init_addrslots(i3cbus);
430 i3cbus->mode = I3C_BUS_MODE_PURE;
432 mutex_lock(&i3c_core_lock);
433 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
434 mutex_unlock(&i3c_core_lock);
444 static const char * const i3c_bus_mode_strings[] = {
445 [I3C_BUS_MODE_PURE] = "pure",
446 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
447 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
448 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
451 static ssize_t mode_show(struct device *dev,
452 struct device_attribute *da,
455 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
458 i3c_bus_normaluse_lock(i3cbus);
459 if (i3cbus->mode < 0 ||
460 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
461 !i3c_bus_mode_strings[i3cbus->mode])
462 ret = sprintf(buf, "unknown\n");
464 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
465 i3c_bus_normaluse_unlock(i3cbus);
469 static DEVICE_ATTR_RO(mode);
471 static ssize_t current_master_show(struct device *dev,
472 struct device_attribute *da,
475 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
478 i3c_bus_normaluse_lock(i3cbus);
479 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
480 i3cbus->cur_master->info.pid);
481 i3c_bus_normaluse_unlock(i3cbus);
485 static DEVICE_ATTR_RO(current_master);
487 static ssize_t i3c_scl_frequency_show(struct device *dev,
488 struct device_attribute *da,
491 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
494 i3c_bus_normaluse_lock(i3cbus);
495 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
496 i3c_bus_normaluse_unlock(i3cbus);
500 static DEVICE_ATTR_RO(i3c_scl_frequency);
502 static ssize_t i2c_scl_frequency_show(struct device *dev,
503 struct device_attribute *da,
506 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
509 i3c_bus_normaluse_lock(i3cbus);
510 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
511 i3c_bus_normaluse_unlock(i3cbus);
515 static DEVICE_ATTR_RO(i2c_scl_frequency);
517 static struct attribute *i3c_masterdev_attrs[] = {
519 &dev_attr_current_master.attr,
520 &dev_attr_i3c_scl_frequency.attr,
521 &dev_attr_i2c_scl_frequency.attr,
525 &dev_attr_dynamic_address.attr,
526 &dev_attr_hdrcap.attr,
529 ATTRIBUTE_GROUPS(i3c_masterdev);
531 static void i3c_masterdev_release(struct device *dev)
533 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
534 struct i3c_bus *bus = dev_to_i3cbus(dev);
537 destroy_workqueue(master->wq);
539 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
540 i3c_bus_cleanup(bus);
542 of_node_put(dev->of_node);
545 static const struct device_type i3c_masterdev_type = {
546 .groups = i3c_masterdev_groups,
549 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
550 unsigned long max_i2c_scl_rate)
552 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
556 switch (i3cbus->mode) {
557 case I3C_BUS_MODE_PURE:
558 if (!i3cbus->scl_rate.i3c)
559 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
561 case I3C_BUS_MODE_MIXED_FAST:
562 case I3C_BUS_MODE_MIXED_LIMITED:
563 if (!i3cbus->scl_rate.i3c)
564 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
565 if (!i3cbus->scl_rate.i2c)
566 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
568 case I3C_BUS_MODE_MIXED_SLOW:
569 if (!i3cbus->scl_rate.i2c)
570 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
571 if (!i3cbus->scl_rate.i3c ||
572 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
573 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
579 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
580 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
583 * I3C/I2C frequency may have been overridden, check that user-provided
584 * values are not exceeding max possible frequency.
586 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
587 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
593 static struct i3c_master_controller *
594 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
596 return container_of(adap, struct i3c_master_controller, i2c);
599 static struct i2c_adapter *
600 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
605 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
610 static struct i2c_dev_desc *
611 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
614 struct i2c_dev_desc *dev;
616 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
618 return ERR_PTR(-ENOMEM);
620 dev->common.master = master;
627 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
631 dest->payload.len = payloadlen;
633 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
635 dest->payload.data = NULL;
637 return dest->payload.data;
640 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
642 kfree(dest->payload.data);
645 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
646 struct i3c_ccc_cmd_dest *dests,
649 cmd->rnw = rnw ? 1 : 0;
652 cmd->ndests = ndests;
653 cmd->err = I3C_ERROR_UNKNOWN;
656 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
657 struct i3c_ccc_cmd *cmd)
664 if (WARN_ON(master->init_done &&
665 !rwsem_is_locked(&master->bus.lock)))
668 if (!master->ops->send_ccc_cmd)
671 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
674 if (master->ops->supports_ccc_cmd &&
675 !master->ops->supports_ccc_cmd(master, cmd))
678 ret = master->ops->send_ccc_cmd(master, cmd);
680 if (cmd->err != I3C_ERROR_UNKNOWN)
689 static struct i2c_dev_desc *
690 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
693 struct i2c_dev_desc *dev;
695 i3c_bus_for_each_i2cdev(&master->bus, dev) {
696 if (dev->addr == addr)
704 * i3c_master_get_free_addr() - get a free address on the bus
705 * @master: I3C master object
706 * @start_addr: where to start searching
708 * This function must be called with the bus lock held in write mode.
710 * Return: the first free address starting at @start_addr (included) or -ENOMEM
711 * if there's no more address available.
713 int i3c_master_get_free_addr(struct i3c_master_controller *master,
716 return i3c_bus_get_free_addr(&master->bus, start_addr);
718 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
720 static void i3c_device_release(struct device *dev)
722 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
724 WARN_ON(i3cdev->desc);
726 of_node_put(i3cdev->dev.of_node);
730 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
735 static struct i3c_dev_desc *
736 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
737 const struct i3c_device_info *info)
739 struct i3c_dev_desc *dev;
741 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
743 return ERR_PTR(-ENOMEM);
745 dev->common.master = master;
747 mutex_init(&dev->ibi_lock);
752 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
755 enum i3c_addr_slot_status addrstat;
756 struct i3c_ccc_cmd_dest dest;
757 struct i3c_ccc_cmd cmd;
763 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
764 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
767 i3c_ccc_cmd_dest_init(&dest, addr, 0);
768 i3c_ccc_cmd_init(&cmd, false,
769 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
771 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
772 i3c_ccc_cmd_dest_cleanup(&dest);
778 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
780 * @master: master used to send frames on the bus
782 * Send a ENTDAA CCC command to start a DAA procedure.
784 * Note that this function only sends the ENTDAA CCC command, all the logic
785 * behind dynamic address assignment has to be handled in the I3C master
788 * This function must be called with the bus lock held in write mode.
790 * Return: 0 in case of success, a positive I3C error code if the error is
791 * one of the official Mx error codes, and a negative error code otherwise.
793 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
795 struct i3c_ccc_cmd_dest dest;
796 struct i3c_ccc_cmd cmd;
799 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
800 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
801 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
802 i3c_ccc_cmd_dest_cleanup(&dest);
806 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
808 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
809 u8 addr, bool enable, u8 evts)
811 struct i3c_ccc_events *events;
812 struct i3c_ccc_cmd_dest dest;
813 struct i3c_ccc_cmd cmd;
816 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
820 events->events = evts;
821 i3c_ccc_cmd_init(&cmd, false,
823 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
824 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
826 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
827 i3c_ccc_cmd_dest_cleanup(&dest);
833 * i3c_master_disec_locked() - send a DISEC CCC command
834 * @master: master used to send frames on the bus
835 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
836 * @evts: events to disable
838 * Send a DISEC CCC command to disable some or all events coming from a
839 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
841 * This function must be called with the bus lock held in write mode.
843 * Return: 0 in case of success, a positive I3C error code if the error is
844 * one of the official Mx error codes, and a negative error code otherwise.
846 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
849 return i3c_master_enec_disec_locked(master, addr, false, evts);
851 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
854 * i3c_master_enec_locked() - send an ENEC CCC command
855 * @master: master used to send frames on the bus
856 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
857 * @evts: events to disable
859 * Sends an ENEC CCC command to enable some or all events coming from a
860 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
862 * This function must be called with the bus lock held in write mode.
864 * Return: 0 in case of success, a positive I3C error code if the error is
865 * one of the official Mx error codes, and a negative error code otherwise.
867 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
870 return i3c_master_enec_disec_locked(master, addr, true, evts);
872 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
875 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
876 * @master: master used to send frames on the bus
878 * Send a DEFSLVS CCC command containing all the devices known to the @master.
879 * This is useful when you have secondary masters on the bus to propagate
880 * device information.
882 * This should be called after all I3C devices have been discovered (in other
883 * words, after the DAA procedure has finished) and instantiated in
884 * &i3c_master_controller_ops->bus_init().
885 * It should also be called if a master ACKed an Hot-Join request and assigned
886 * a dynamic address to the device joining the bus.
888 * This function must be called with the bus lock held in write mode.
890 * Return: 0 in case of success, a positive I3C error code if the error is
891 * one of the official Mx error codes, and a negative error code otherwise.
893 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
895 struct i3c_ccc_defslvs *defslvs;
896 struct i3c_ccc_dev_desc *desc;
897 struct i3c_ccc_cmd_dest dest;
898 struct i3c_dev_desc *i3cdev;
899 struct i2c_dev_desc *i2cdev;
900 struct i3c_ccc_cmd cmd;
908 bus = i3c_master_get_bus(master);
909 i3c_bus_for_each_i3cdev(bus, i3cdev) {
912 if (i3cdev == master->this)
915 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
920 /* No other master on the bus, skip DEFSLVS. */
924 i3c_bus_for_each_i2cdev(bus, i2cdev)
927 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
928 struct_size(defslvs, slaves,
933 defslvs->count = ndevs;
934 defslvs->master.bcr = master->this->info.bcr;
935 defslvs->master.dcr = master->this->info.dcr;
936 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
937 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
939 desc = defslvs->slaves;
940 i3c_bus_for_each_i2cdev(bus, i2cdev) {
941 desc->lvr = i2cdev->lvr;
942 desc->static_addr = i2cdev->addr << 1;
946 i3c_bus_for_each_i3cdev(bus, i3cdev) {
947 /* Skip the I3C dev representing this master. */
948 if (i3cdev == master->this)
951 desc->bcr = i3cdev->info.bcr;
952 desc->dcr = i3cdev->info.dcr;
953 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
954 desc->static_addr = i3cdev->info.static_addr << 1;
958 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
959 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
960 i3c_ccc_cmd_dest_cleanup(&dest);
964 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
966 static int i3c_master_setda_locked(struct i3c_master_controller *master,
967 u8 oldaddr, u8 newaddr, bool setdasa)
969 struct i3c_ccc_cmd_dest dest;
970 struct i3c_ccc_setda *setda;
971 struct i3c_ccc_cmd cmd;
974 if (!oldaddr || !newaddr)
977 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
981 setda->addr = newaddr << 1;
982 i3c_ccc_cmd_init(&cmd, false,
983 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
985 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
986 i3c_ccc_cmd_dest_cleanup(&dest);
991 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
992 u8 static_addr, u8 dyn_addr)
994 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
997 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
998 u8 oldaddr, u8 newaddr)
1000 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1003 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1004 struct i3c_device_info *info)
1006 struct i3c_ccc_cmd_dest dest;
1007 struct i3c_ccc_mrl *mrl;
1008 struct i3c_ccc_cmd cmd;
1011 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1016 * When the device does not have IBI payload GETMRL only returns 2
1019 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1020 dest.payload.len -= 1;
1022 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1023 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1027 switch (dest.payload.len) {
1029 info->max_ibi_len = mrl->ibi_len;
1032 info->max_read_len = be16_to_cpu(mrl->read_len);
1040 i3c_ccc_cmd_dest_cleanup(&dest);
1045 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1046 struct i3c_device_info *info)
1048 struct i3c_ccc_cmd_dest dest;
1049 struct i3c_ccc_mwl *mwl;
1050 struct i3c_ccc_cmd cmd;
1053 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1057 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1058 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1062 if (dest.payload.len != sizeof(*mwl)) {
1067 info->max_write_len = be16_to_cpu(mwl->len);
1070 i3c_ccc_cmd_dest_cleanup(&dest);
1075 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1076 struct i3c_device_info *info)
1078 struct i3c_ccc_getmxds *getmaxds;
1079 struct i3c_ccc_cmd_dest dest;
1080 struct i3c_ccc_cmd cmd;
1083 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1088 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1089 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1093 if (dest.payload.len != 2 && dest.payload.len != 5) {
1098 info->max_read_ds = getmaxds->maxrd;
1099 info->max_write_ds = getmaxds->maxwr;
1100 if (dest.payload.len == 5)
1101 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1102 ((u32)getmaxds->maxrdturn[1] << 8) |
1103 ((u32)getmaxds->maxrdturn[2] << 16);
1106 i3c_ccc_cmd_dest_cleanup(&dest);
1111 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1112 struct i3c_device_info *info)
1114 struct i3c_ccc_gethdrcap *gethdrcap;
1115 struct i3c_ccc_cmd_dest dest;
1116 struct i3c_ccc_cmd cmd;
1119 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1120 sizeof(*gethdrcap));
1124 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1125 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1129 if (dest.payload.len != 1) {
1134 info->hdr_cap = gethdrcap->modes;
1137 i3c_ccc_cmd_dest_cleanup(&dest);
1142 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1143 struct i3c_device_info *info)
1145 struct i3c_ccc_getpid *getpid;
1146 struct i3c_ccc_cmd_dest dest;
1147 struct i3c_ccc_cmd cmd;
1150 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1154 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1155 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1160 for (i = 0; i < sizeof(getpid->pid); i++) {
1161 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1163 info->pid |= (u64)getpid->pid[i] << sft;
1167 i3c_ccc_cmd_dest_cleanup(&dest);
1172 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1173 struct i3c_device_info *info)
1175 struct i3c_ccc_getbcr *getbcr;
1176 struct i3c_ccc_cmd_dest dest;
1177 struct i3c_ccc_cmd cmd;
1180 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1184 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1185 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1189 info->bcr = getbcr->bcr;
1192 i3c_ccc_cmd_dest_cleanup(&dest);
1197 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1198 struct i3c_device_info *info)
1200 struct i3c_ccc_getdcr *getdcr;
1201 struct i3c_ccc_cmd_dest dest;
1202 struct i3c_ccc_cmd cmd;
1205 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1209 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1210 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1214 info->dcr = getdcr->dcr;
1217 i3c_ccc_cmd_dest_cleanup(&dest);
1222 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1224 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1225 enum i3c_addr_slot_status slot_status;
1228 if (!dev->info.dyn_addr)
1231 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1232 dev->info.dyn_addr);
1233 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1234 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1237 ret = i3c_master_getpid_locked(master, &dev->info);
1241 ret = i3c_master_getbcr_locked(master, &dev->info);
1245 ret = i3c_master_getdcr_locked(master, &dev->info);
1249 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1250 ret = i3c_master_getmxds_locked(master, &dev->info);
1255 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1256 dev->info.max_ibi_len = 1;
1258 i3c_master_getmrl_locked(master, &dev->info);
1259 i3c_master_getmwl_locked(master, &dev->info);
1261 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1262 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1270 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1272 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1274 if (dev->info.static_addr)
1275 i3c_bus_set_addr_slot_status(&master->bus,
1276 dev->info.static_addr,
1277 I3C_ADDR_SLOT_FREE);
1279 if (dev->info.dyn_addr)
1280 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1281 I3C_ADDR_SLOT_FREE);
1283 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285 I3C_ADDR_SLOT_FREE);
1288 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1290 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1291 enum i3c_addr_slot_status status;
1293 if (!dev->info.static_addr && !dev->info.dyn_addr)
1296 if (dev->info.static_addr) {
1297 status = i3c_bus_get_addr_slot_status(&master->bus,
1298 dev->info.static_addr);
1299 if (status != I3C_ADDR_SLOT_FREE)
1302 i3c_bus_set_addr_slot_status(&master->bus,
1303 dev->info.static_addr,
1304 I3C_ADDR_SLOT_I3C_DEV);
1308 * ->init_dyn_addr should have been reserved before that, so, if we're
1309 * trying to apply a pre-reserved dynamic address, we should not try
1310 * to reserve the address slot a second time.
1312 if (dev->info.dyn_addr &&
1314 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1315 status = i3c_bus_get_addr_slot_status(&master->bus,
1316 dev->info.dyn_addr);
1317 if (status != I3C_ADDR_SLOT_FREE)
1318 goto err_release_static_addr;
1320 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1321 I3C_ADDR_SLOT_I3C_DEV);
1326 err_release_static_addr:
1327 if (dev->info.static_addr)
1328 i3c_bus_set_addr_slot_status(&master->bus,
1329 dev->info.static_addr,
1330 I3C_ADDR_SLOT_FREE);
1335 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1336 struct i3c_dev_desc *dev)
1341 * We don't attach devices to the controller until they are
1342 * addressable on the bus.
1344 if (!dev->info.static_addr && !dev->info.dyn_addr)
1347 ret = i3c_master_get_i3c_addrs(dev);
1351 /* Do not attach the master device itself. */
1352 if (master->this != dev && master->ops->attach_i3c_dev) {
1353 ret = master->ops->attach_i3c_dev(dev);
1355 i3c_master_put_i3c_addrs(dev);
1360 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1365 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1368 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1369 enum i3c_addr_slot_status status;
1372 if (dev->info.dyn_addr != old_dyn_addr &&
1374 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1375 status = i3c_bus_get_addr_slot_status(&master->bus,
1376 dev->info.dyn_addr);
1377 if (status != I3C_ADDR_SLOT_FREE)
1379 i3c_bus_set_addr_slot_status(&master->bus,
1381 I3C_ADDR_SLOT_I3C_DEV);
1383 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1384 I3C_ADDR_SLOT_FREE);
1387 if (master->ops->reattach_i3c_dev) {
1388 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1390 i3c_master_put_i3c_addrs(dev);
1398 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1400 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1402 /* Do not detach the master device itself. */
1403 if (master->this != dev && master->ops->detach_i3c_dev)
1404 master->ops->detach_i3c_dev(dev);
1406 i3c_master_put_i3c_addrs(dev);
1407 list_del(&dev->common.node);
1410 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1411 struct i2c_dev_desc *dev)
1415 if (master->ops->attach_i2c_dev) {
1416 ret = master->ops->attach_i2c_dev(dev);
1421 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1426 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1428 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1430 list_del(&dev->common.node);
1432 if (master->ops->detach_i2c_dev)
1433 master->ops->detach_i2c_dev(dev);
1436 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1437 struct i3c_dev_boardinfo *boardinfo)
1439 struct i3c_device_info info = {
1440 .static_addr = boardinfo->static_addr,
1442 struct i3c_dev_desc *i3cdev;
1445 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1449 i3cdev->boardinfo = boardinfo;
1451 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1455 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1456 i3cdev->boardinfo->init_dyn_addr);
1458 goto err_detach_dev;
1460 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1461 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1465 ret = i3c_master_retrieve_dev_info(i3cdev);
1472 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1474 i3c_master_detach_i3c_dev(i3cdev);
1476 i3c_master_free_i3c_dev(i3cdev);
1482 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1484 struct i3c_dev_desc *desc;
1487 if (!master->init_done)
1490 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1491 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1494 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1498 desc->dev->bus = &master->bus;
1499 desc->dev->desc = desc;
1500 desc->dev->dev.parent = &master->dev;
1501 desc->dev->dev.type = &i3c_device_type;
1502 desc->dev->dev.bus = &i3c_bus_type;
1503 desc->dev->dev.release = i3c_device_release;
1504 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1507 if (desc->boardinfo)
1508 desc->dev->dev.of_node = desc->boardinfo->of_node;
1510 ret = device_register(&desc->dev->dev);
1512 dev_err(&master->dev,
1513 "Failed to add I3C device (err = %d)\n", ret);
1518 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1519 * @master: master doing the DAA
1521 * This function is instantiating an I3C device object and adding it to the
1522 * I3C device list. All device information are automatically retrieved using
1523 * standard CCC commands.
1525 * The I3C device object is returned in case the master wants to attach
1526 * private data to it using i3c_dev_set_master_data().
1528 * This function must be called with the bus lock held in write mode.
1530 * Return: a 0 in case of success, an negative error code otherwise.
1532 int i3c_master_do_daa(struct i3c_master_controller *master)
1536 i3c_bus_maintenance_lock(&master->bus);
1537 ret = master->ops->do_daa(master);
1538 i3c_bus_maintenance_unlock(&master->bus);
1543 i3c_bus_normaluse_lock(&master->bus);
1544 i3c_master_register_new_i3c_devs(master);
1545 i3c_bus_normaluse_unlock(&master->bus);
1549 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1552 * i3c_master_set_info() - set master device information
1553 * @master: master used to send frames on the bus
1554 * @info: I3C device information
1556 * Set master device info. This should be called from
1557 * &i3c_master_controller_ops->bus_init().
1559 * Not all &i3c_device_info fields are meaningful for a master device.
1560 * Here is a list of fields that should be properly filled:
1562 * - &i3c_device_info->dyn_addr
1563 * - &i3c_device_info->bcr
1564 * - &i3c_device_info->dcr
1565 * - &i3c_device_info->pid
1566 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1567 * &i3c_device_info->bcr
1569 * This function must be called with the bus lock held in maintenance mode.
1571 * Return: 0 if @info contains valid information (not every piece of
1572 * information can be checked, but we can at least make sure @info->dyn_addr
1573 * and @info->bcr are correct), -EINVAL otherwise.
1575 int i3c_master_set_info(struct i3c_master_controller *master,
1576 const struct i3c_device_info *info)
1578 struct i3c_dev_desc *i3cdev;
1581 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1584 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1591 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1593 return PTR_ERR(i3cdev);
1595 master->this = i3cdev;
1596 master->bus.cur_master = master->this;
1598 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1605 i3c_master_free_i3c_dev(i3cdev);
1609 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1611 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1613 struct i3c_dev_desc *i3cdev, *i3ctmp;
1614 struct i2c_dev_desc *i2cdev, *i2ctmp;
1616 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1618 i3c_master_detach_i3c_dev(i3cdev);
1620 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1621 i3c_bus_set_addr_slot_status(&master->bus,
1622 i3cdev->boardinfo->init_dyn_addr,
1623 I3C_ADDR_SLOT_FREE);
1625 i3c_master_free_i3c_dev(i3cdev);
1628 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1630 i3c_master_detach_i2c_dev(i2cdev);
1631 i3c_bus_set_addr_slot_status(&master->bus,
1633 I3C_ADDR_SLOT_FREE);
1634 i3c_master_free_i2c_dev(i2cdev);
1639 * i3c_master_bus_init() - initialize an I3C bus
1640 * @master: main master initializing the bus
1642 * This function is following all initialisation steps described in the I3C
1645 * 1. Attach I2C devs to the master so that the master can fill its internal
1646 * device table appropriately
1648 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1649 * the master controller. That's usually where the bus mode is selected
1650 * (pure bus or mixed fast/slow bus)
1652 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1653 * particularly important when the bus was previously configured by someone
1654 * else (for example the bootloader)
1656 * 4. Disable all slave events.
1658 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1659 * also have static_addr, try to pre-assign dynamic addresses requested by
1660 * the FW with SETDASA and attach corresponding statically defined I3C
1661 * devices to the master.
1663 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1664 * remaining I3C devices
1666 * Once this is done, all I3C and I2C devices should be usable.
1668 * Return: a 0 in case of success, an negative error code otherwise.
1670 static int i3c_master_bus_init(struct i3c_master_controller *master)
1672 enum i3c_addr_slot_status status;
1673 struct i2c_dev_boardinfo *i2cboardinfo;
1674 struct i3c_dev_boardinfo *i3cboardinfo;
1675 struct i2c_dev_desc *i2cdev;
1679 * First attach all devices with static definitions provided by the
1682 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1683 status = i3c_bus_get_addr_slot_status(&master->bus,
1684 i2cboardinfo->base.addr);
1685 if (status != I3C_ADDR_SLOT_FREE) {
1687 goto err_detach_devs;
1690 i3c_bus_set_addr_slot_status(&master->bus,
1691 i2cboardinfo->base.addr,
1692 I3C_ADDR_SLOT_I2C_DEV);
1694 i2cdev = i3c_master_alloc_i2c_dev(master,
1695 i2cboardinfo->base.addr,
1697 if (IS_ERR(i2cdev)) {
1698 ret = PTR_ERR(i2cdev);
1699 goto err_detach_devs;
1702 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1704 i3c_master_free_i2c_dev(i2cdev);
1705 goto err_detach_devs;
1710 * Now execute the controller specific ->bus_init() routine, which
1711 * might configure its internal logic to match the bus limitations.
1713 ret = master->ops->bus_init(master);
1715 goto err_detach_devs;
1718 * The master device should have been instantiated in ->bus_init(),
1719 * complain if this was not the case.
1721 if (!master->this) {
1722 dev_err(&master->dev,
1723 "master_set_info() was not called in ->bus_init()\n");
1725 goto err_bus_cleanup;
1729 * Reset all dynamic address that may have been assigned before
1730 * (assigned by the bootloader for example).
1732 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1733 if (ret && ret != I3C_ERROR_M2)
1734 goto err_bus_cleanup;
1736 /* Disable all slave events before starting DAA. */
1737 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1738 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1740 if (ret && ret != I3C_ERROR_M2)
1741 goto err_bus_cleanup;
1744 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1745 * address and retrieve device information if needed.
1746 * In case pre-assign dynamic address fails, setting dynamic address to
1747 * the requested init_dyn_addr is retried after DAA is done in
1748 * i3c_master_add_i3c_dev_locked().
1750 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1753 * We don't reserve a dynamic address for devices that
1754 * don't explicitly request one.
1756 if (!i3cboardinfo->init_dyn_addr)
1759 ret = i3c_bus_get_addr_slot_status(&master->bus,
1760 i3cboardinfo->init_dyn_addr);
1761 if (ret != I3C_ADDR_SLOT_FREE) {
1766 i3c_bus_set_addr_slot_status(&master->bus,
1767 i3cboardinfo->init_dyn_addr,
1768 I3C_ADDR_SLOT_I3C_DEV);
1771 * Only try to create/attach devices that have a static
1772 * address. Other devices will be created/attached when
1773 * DAA happens, and the requested dynamic address will
1774 * be set using SETNEWDA once those devices become
1778 if (i3cboardinfo->static_addr)
1779 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1782 ret = i3c_master_do_daa(master);
1789 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1792 if (master->ops->bus_cleanup)
1793 master->ops->bus_cleanup(master);
1796 i3c_master_detach_free_devs(master);
1801 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1803 if (master->ops->bus_cleanup)
1804 master->ops->bus_cleanup(master);
1806 i3c_master_detach_free_devs(master);
1809 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1811 struct i3c_master_controller *master = i3cdev->common.master;
1812 struct i3c_dev_boardinfo *i3cboardinfo;
1814 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1815 if (i3cdev->info.pid != i3cboardinfo->pid)
1818 i3cdev->boardinfo = i3cboardinfo;
1819 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1824 static struct i3c_dev_desc *
1825 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1827 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1828 struct i3c_dev_desc *i3cdev;
1830 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1831 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1839 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1840 * @master: master used to send frames on the bus
1841 * @addr: I3C slave dynamic address assigned to the device
1843 * This function is instantiating an I3C device object and adding it to the
1844 * I3C device list. All device information are automatically retrieved using
1845 * standard CCC commands.
1847 * The I3C device object is returned in case the master wants to attach
1848 * private data to it using i3c_dev_set_master_data().
1850 * This function must be called with the bus lock held in write mode.
1852 * Return: a 0 in case of success, an negative error code otherwise.
1854 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1857 struct i3c_device_info info = { .dyn_addr = addr };
1858 struct i3c_dev_desc *newdev, *olddev;
1859 u8 old_dyn_addr = addr, expected_dyn_addr;
1860 struct i3c_ibi_setup ibireq = { };
1861 bool enable_ibi = false;
1867 newdev = i3c_master_alloc_i3c_dev(master, &info);
1869 return PTR_ERR(newdev);
1871 ret = i3c_master_attach_i3c_dev(master, newdev);
1875 ret = i3c_master_retrieve_dev_info(newdev);
1877 goto err_detach_dev;
1879 i3c_master_attach_boardinfo(newdev);
1881 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1883 newdev->dev = olddev->dev;
1885 newdev->dev->desc = newdev;
1888 * We need to restore the IBI state too, so let's save the
1889 * IBI information and try to restore them after olddev has
1890 * been detached+released and its IBI has been stopped and
1891 * the associated resources have been freed.
1893 mutex_lock(&olddev->ibi_lock);
1895 ibireq.handler = olddev->ibi->handler;
1896 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1897 ibireq.num_slots = olddev->ibi->num_slots;
1899 if (olddev->ibi->enabled) {
1901 i3c_dev_disable_ibi_locked(olddev);
1904 i3c_dev_free_ibi_locked(olddev);
1906 mutex_unlock(&olddev->ibi_lock);
1908 old_dyn_addr = olddev->info.dyn_addr;
1910 i3c_master_detach_i3c_dev(olddev);
1911 i3c_master_free_i3c_dev(olddev);
1915 * Depending on our previous state, the expected dynamic address might
1917 * - if the device already had a dynamic address assigned, let's try to
1919 * - if the device did not have a dynamic address and the firmware
1920 * requested a specific address, pick this one
1921 * - in any other case, keep the address automatically assigned by the
1924 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1925 expected_dyn_addr = old_dyn_addr;
1926 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1927 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1929 expected_dyn_addr = newdev->info.dyn_addr;
1931 if (newdev->info.dyn_addr != expected_dyn_addr) {
1933 * Try to apply the expected dynamic address. If it fails, keep
1934 * the address assigned by the master.
1936 ret = i3c_master_setnewda_locked(master,
1937 newdev->info.dyn_addr,
1940 old_dyn_addr = newdev->info.dyn_addr;
1941 newdev->info.dyn_addr = expected_dyn_addr;
1942 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1944 dev_err(&master->dev,
1945 "Failed to assign reserved/old address to device %d%llx",
1946 master->bus.id, newdev->info.pid);
1951 * Now is time to try to restore the IBI setup. If we're lucky,
1952 * everything works as before, otherwise, all we can do is complain.
1953 * FIXME: maybe we should add callback to inform the driver that it
1954 * should request the IBI again instead of trying to hide that from
1957 if (ibireq.handler) {
1958 mutex_lock(&newdev->ibi_lock);
1959 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1961 dev_err(&master->dev,
1962 "Failed to request IBI on device %d-%llx",
1963 master->bus.id, newdev->info.pid);
1964 } else if (enable_ibi) {
1965 ret = i3c_dev_enable_ibi_locked(newdev);
1967 dev_err(&master->dev,
1968 "Failed to re-enable IBI on device %d-%llx",
1969 master->bus.id, newdev->info.pid);
1971 mutex_unlock(&newdev->ibi_lock);
1977 if (newdev->dev && newdev->dev->desc)
1978 newdev->dev->desc = NULL;
1980 i3c_master_detach_i3c_dev(newdev);
1983 i3c_master_free_i3c_dev(newdev);
1987 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1989 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1992 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1993 struct device_node *node, u32 *reg)
1995 struct i2c_dev_boardinfo *boardinfo;
1996 struct device *dev = &master->dev;
1999 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2003 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2008 * The I3C Specification does not clearly say I2C devices with 10-bit
2009 * address are supported. These devices can't be passed properly through
2012 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2013 dev_err(dev, "I2C device with 10 bit address not supported.");
2017 /* LVR is encoded in reg[2]. */
2018 boardinfo->lvr = reg[2];
2020 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2027 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2028 struct device_node *node, u32 *reg)
2030 struct i3c_dev_boardinfo *boardinfo;
2031 struct device *dev = &master->dev;
2032 enum i3c_addr_slot_status addrstatus;
2033 u32 init_dyn_addr = 0;
2035 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2040 if (reg[0] > I3C_MAX_ADDR)
2043 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2045 if (addrstatus != I3C_ADDR_SLOT_FREE)
2049 boardinfo->static_addr = reg[0];
2051 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2052 if (init_dyn_addr > I3C_MAX_ADDR)
2055 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2057 if (addrstatus != I3C_ADDR_SLOT_FREE)
2061 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2063 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2064 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2067 boardinfo->init_dyn_addr = init_dyn_addr;
2068 boardinfo->of_node = of_node_get(node);
2069 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2074 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2075 struct device_node *node)
2080 if (!master || !node)
2083 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2088 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2089 * dealing with an I2C device.
2092 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2094 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2099 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2101 struct device *dev = &master->dev;
2102 struct device_node *i3cbus_np = dev->of_node;
2103 struct device_node *node;
2110 for_each_available_child_of_node(i3cbus_np, node) {
2111 ret = of_i3c_master_add_dev(master, node);
2119 * The user might want to limit I2C and I3C speed in case some devices
2120 * on the bus are not supporting typical rates, or if the bus topology
2121 * prevents it from using max possible rate.
2123 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2124 master->bus.scl_rate.i2c = val;
2126 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2127 master->bus.scl_rate.i3c = val;
2132 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2133 struct i2c_msg *xfers, int nxfers)
2135 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2136 struct i2c_dev_desc *dev;
2140 if (!xfers || !master || nxfers <= 0)
2143 if (!master->ops->i2c_xfers)
2146 /* Doing transfers to different devices is not supported. */
2147 addr = xfers[0].addr;
2148 for (i = 1; i < nxfers; i++) {
2149 if (addr != xfers[i].addr)
2153 i3c_bus_normaluse_lock(&master->bus);
2154 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2158 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2159 i3c_bus_normaluse_unlock(&master->bus);
2161 return ret ? ret : nxfers;
2164 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2166 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2169 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2171 /* Fall back to no spike filters and FM bus mode. */
2172 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2174 if (client->dev.of_node) {
2177 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2178 reg, ARRAY_SIZE(reg)))
2185 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2187 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2188 enum i3c_addr_slot_status status;
2189 struct i2c_dev_desc *i2cdev;
2192 /* Already added by board info? */
2193 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2196 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2197 if (status != I3C_ADDR_SLOT_FREE)
2200 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2201 I3C_ADDR_SLOT_I2C_DEV);
2203 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2204 i3c_master_i2c_get_lvr(client));
2205 if (IS_ERR(i2cdev)) {
2206 ret = PTR_ERR(i2cdev);
2207 goto out_clear_status;
2210 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2217 i3c_master_free_i2c_dev(i2cdev);
2219 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2220 I3C_ADDR_SLOT_FREE);
2225 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2227 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2228 struct i2c_dev_desc *dev;
2230 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2234 i3c_master_detach_i2c_dev(dev);
2235 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2236 I3C_ADDR_SLOT_FREE);
2237 i3c_master_free_i2c_dev(dev);
2242 static const struct i2c_algorithm i3c_master_i2c_algo = {
2243 .master_xfer = i3c_master_i2c_adapter_xfer,
2244 .functionality = i3c_master_i2c_funcs,
2247 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2250 struct i2c_adapter *adap;
2251 struct i2c_client *client;
2252 struct device *dev = data;
2253 struct i3c_master_controller *master;
2256 if (dev->type != &i2c_client_type)
2259 client = to_i2c_client(dev);
2260 adap = client->adapter;
2262 if (adap->algo != &i3c_master_i2c_algo)
2265 master = i2c_adapter_to_i3c_master(adap);
2267 i3c_bus_maintenance_lock(&master->bus);
2269 case BUS_NOTIFY_ADD_DEVICE:
2270 ret = i3c_master_i2c_attach(adap, client);
2272 case BUS_NOTIFY_DEL_DEVICE:
2273 ret = i3c_master_i2c_detach(adap, client);
2276 i3c_bus_maintenance_unlock(&master->bus);
2281 static struct notifier_block i2cdev_notifier = {
2282 .notifier_call = i3c_i2c_notifier_call,
2285 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2287 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2288 struct i2c_dev_desc *i2cdev;
2289 struct i2c_dev_boardinfo *i2cboardinfo;
2292 adap->dev.parent = master->dev.parent;
2293 adap->owner = master->dev.parent->driver->owner;
2294 adap->algo = &i3c_master_i2c_algo;
2295 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2297 /* FIXME: Should we allow i3c masters to override these values? */
2298 adap->timeout = 1000;
2301 ret = i2c_add_adapter(adap);
2306 * We silently ignore failures here. The bus should keep working
2307 * correctly even if one or more i2c devices are not registered.
2309 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2310 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2311 i2cboardinfo->base.addr);
2312 if (WARN_ON(!i2cdev))
2314 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2320 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2322 struct i2c_dev_desc *i2cdev;
2324 i2c_del_adapter(&master->i2c);
2326 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2330 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2332 struct i3c_dev_desc *i3cdev;
2334 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2338 i3cdev->dev->desc = NULL;
2339 if (device_is_registered(&i3cdev->dev->dev))
2340 device_unregister(&i3cdev->dev->dev);
2342 put_device(&i3cdev->dev->dev);
2348 * i3c_master_queue_ibi() - Queue an IBI
2349 * @dev: the device this IBI is coming from
2350 * @slot: the IBI slot used to store the payload
2352 * Queue an IBI to the controller workqueue. The IBI handler attached to
2353 * the dev will be called from a workqueue context.
2355 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2357 atomic_inc(&dev->ibi->pending_ibis);
2358 queue_work(dev->common.master->wq, &slot->work);
2360 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2362 static void i3c_master_handle_ibi(struct work_struct *work)
2364 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2366 struct i3c_dev_desc *dev = slot->dev;
2367 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2368 struct i3c_ibi_payload payload;
2370 payload.data = slot->data;
2371 payload.len = slot->len;
2374 dev->ibi->handler(dev->dev, &payload);
2376 master->ops->recycle_ibi_slot(dev, slot);
2377 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2378 complete(&dev->ibi->all_ibis_handled);
2381 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2382 struct i3c_ibi_slot *slot)
2385 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2388 struct i3c_generic_ibi_slot {
2389 struct list_head node;
2390 struct i3c_ibi_slot base;
2393 struct i3c_generic_ibi_pool {
2395 unsigned int num_slots;
2396 struct i3c_generic_ibi_slot *slots;
2398 struct list_head free_slots;
2399 struct list_head pending;
2403 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2404 * @pool: the IBI pool to free
2406 * Free all IBI slots allated by a generic IBI pool.
2408 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2410 struct i3c_generic_ibi_slot *slot;
2411 unsigned int nslots = 0;
2413 while (!list_empty(&pool->free_slots)) {
2414 slot = list_first_entry(&pool->free_slots,
2415 struct i3c_generic_ibi_slot, node);
2416 list_del(&slot->node);
2421 * If the number of freed slots is not equal to the number of allocated
2422 * slots we have a leak somewhere.
2424 WARN_ON(nslots != pool->num_slots);
2426 kfree(pool->payload_buf);
2430 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2433 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2434 * @dev: the device this pool will be used for
2435 * @req: IBI setup request describing what the device driver expects
2437 * Create a generic IBI pool based on the information provided in @req.
2439 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2441 struct i3c_generic_ibi_pool *
2442 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2443 const struct i3c_ibi_setup *req)
2445 struct i3c_generic_ibi_pool *pool;
2446 struct i3c_generic_ibi_slot *slot;
2450 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2452 return ERR_PTR(-ENOMEM);
2454 spin_lock_init(&pool->lock);
2455 INIT_LIST_HEAD(&pool->free_slots);
2456 INIT_LIST_HEAD(&pool->pending);
2458 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2464 if (req->max_payload_len) {
2465 pool->payload_buf = kcalloc(req->num_slots,
2466 req->max_payload_len, GFP_KERNEL);
2467 if (!pool->payload_buf) {
2473 for (i = 0; i < req->num_slots; i++) {
2474 slot = &pool->slots[i];
2475 i3c_master_init_ibi_slot(dev, &slot->base);
2477 if (req->max_payload_len)
2478 slot->base.data = pool->payload_buf +
2479 (i * req->max_payload_len);
2481 list_add_tail(&slot->node, &pool->free_slots);
2488 i3c_generic_ibi_free_pool(pool);
2489 return ERR_PTR(ret);
2491 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2494 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2495 * @pool: the pool to query an IBI slot on
2497 * Search for a free slot in a generic IBI pool.
2498 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2499 * when it's no longer needed.
2501 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2503 struct i3c_ibi_slot *
2504 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2506 struct i3c_generic_ibi_slot *slot;
2507 unsigned long flags;
2509 spin_lock_irqsave(&pool->lock, flags);
2510 slot = list_first_entry_or_null(&pool->free_slots,
2511 struct i3c_generic_ibi_slot, node);
2513 list_del(&slot->node);
2514 spin_unlock_irqrestore(&pool->lock, flags);
2516 return slot ? &slot->base : NULL;
2518 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2521 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2522 * @pool: the pool to return the IBI slot to
2523 * @s: IBI slot to recycle
2525 * Add an IBI slot back to its generic IBI pool. Should be called from the
2526 * master driver struct_master_controller_ops->recycle_ibi() method.
2528 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2529 struct i3c_ibi_slot *s)
2531 struct i3c_generic_ibi_slot *slot;
2532 unsigned long flags;
2537 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2538 spin_lock_irqsave(&pool->lock, flags);
2539 list_add_tail(&slot->node, &pool->free_slots);
2540 spin_unlock_irqrestore(&pool->lock, flags);
2542 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2544 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2546 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2547 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2550 if (ops->request_ibi &&
2551 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2552 !ops->recycle_ibi_slot))
2559 * i3c_master_register() - register an I3C master
2560 * @master: master used to send frames on the bus
2561 * @parent: the parent device (the one that provides this I3C master
2563 * @ops: the master controller operations
2564 * @secondary: true if you are registering a secondary master. Will return
2565 * -ENOTSUPP if set to true since secondary masters are not yet
2568 * This function takes care of everything for you:
2570 * - creates and initializes the I3C bus
2571 * - populates the bus with static I2C devs if @parent->of_node is not
2573 * - registers all I3C devices added by the controller during bus
2575 * - registers the I2C adapter and all I2C devices
2577 * Return: 0 in case of success, a negative error code otherwise.
2579 int i3c_master_register(struct i3c_master_controller *master,
2580 struct device *parent,
2581 const struct i3c_master_controller_ops *ops,
2584 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2585 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2586 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2587 struct i2c_dev_boardinfo *i2cbi;
2590 /* We do not support secondary masters yet. */
2594 ret = i3c_master_check_ops(ops);
2598 master->dev.parent = parent;
2599 master->dev.of_node = of_node_get(parent->of_node);
2600 master->dev.bus = &i3c_bus_type;
2601 master->dev.type = &i3c_masterdev_type;
2602 master->dev.release = i3c_masterdev_release;
2604 master->secondary = secondary;
2605 INIT_LIST_HEAD(&master->boardinfo.i2c);
2606 INIT_LIST_HEAD(&master->boardinfo.i3c);
2608 ret = i3c_bus_init(i3cbus);
2612 device_initialize(&master->dev);
2613 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2615 ret = of_populate_i3c_bus(master);
2619 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2620 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2621 case I3C_LVR_I2C_INDEX(0):
2622 if (mode < I3C_BUS_MODE_MIXED_FAST)
2623 mode = I3C_BUS_MODE_MIXED_FAST;
2625 case I3C_LVR_I2C_INDEX(1):
2626 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2627 mode = I3C_BUS_MODE_MIXED_LIMITED;
2629 case I3C_LVR_I2C_INDEX(2):
2630 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2631 mode = I3C_BUS_MODE_MIXED_SLOW;
2638 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2639 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2642 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2646 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2652 ret = i3c_master_bus_init(master);
2656 ret = device_add(&master->dev);
2658 goto err_cleanup_bus;
2661 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2662 * through the I2C subsystem.
2664 ret = i3c_master_i2c_adapter_init(master);
2669 * We're done initializing the bus and the controller, we can now
2670 * register I3C devices discovered during the initial DAA.
2672 master->init_done = true;
2673 i3c_bus_normaluse_lock(&master->bus);
2674 i3c_master_register_new_i3c_devs(master);
2675 i3c_bus_normaluse_unlock(&master->bus);
2680 device_del(&master->dev);
2683 i3c_master_bus_cleanup(master);
2686 put_device(&master->dev);
2690 EXPORT_SYMBOL_GPL(i3c_master_register);
2693 * i3c_master_unregister() - unregister an I3C master
2694 * @master: master used to send frames on the bus
2696 * Basically undo everything done in i3c_master_register().
2698 * Return: 0 in case of success, a negative error code otherwise.
2700 int i3c_master_unregister(struct i3c_master_controller *master)
2702 i3c_master_i2c_adapter_cleanup(master);
2703 i3c_master_unregister_i3c_devs(master);
2704 i3c_master_bus_cleanup(master);
2705 device_unregister(&master->dev);
2709 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2711 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2713 struct i3c_master_controller *master;
2718 master = i3c_dev_get_master(dev);
2722 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2723 !dev->boardinfo->static_addr)
2726 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2727 dev->boardinfo->init_dyn_addr);
2730 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2731 struct i3c_priv_xfer *xfers,
2734 struct i3c_master_controller *master;
2739 master = i3c_dev_get_master(dev);
2740 if (!master || !xfers)
2743 if (!master->ops->priv_xfers)
2746 return master->ops->priv_xfers(dev, xfers, nxfers);
2749 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2751 struct i3c_master_controller *master;
2757 master = i3c_dev_get_master(dev);
2758 ret = master->ops->disable_ibi(dev);
2762 reinit_completion(&dev->ibi->all_ibis_handled);
2763 if (atomic_read(&dev->ibi->pending_ibis))
2764 wait_for_completion(&dev->ibi->all_ibis_handled);
2766 dev->ibi->enabled = false;
2771 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2773 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2779 ret = master->ops->enable_ibi(dev);
2781 dev->ibi->enabled = true;
2786 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2787 const struct i3c_ibi_setup *req)
2789 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2790 struct i3c_device_ibi_info *ibi;
2793 if (!master->ops->request_ibi)
2799 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2803 atomic_set(&ibi->pending_ibis, 0);
2804 init_completion(&ibi->all_ibis_handled);
2805 ibi->handler = req->handler;
2806 ibi->max_payload_len = req->max_payload_len;
2807 ibi->num_slots = req->num_slots;
2810 ret = master->ops->request_ibi(dev, req);
2819 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2821 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2826 if (WARN_ON(dev->ibi->enabled))
2827 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2829 master->ops->free_ibi(dev);
2834 static int __init i3c_init(void)
2836 int res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
2841 res = bus_register(&i3c_bus_type);
2843 goto out_unreg_notifier;
2848 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2852 subsys_initcall(i3c_init);
2854 static void __exit i3c_exit(void)
2856 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
2857 idr_destroy(&i3c_bus_idr);
2858 bus_unregister(&i3c_bus_type);
2860 module_exit(i3c_exit);
2862 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2863 MODULE_DESCRIPTION("I3C core");
2864 MODULE_LICENSE("GPL v2");