1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
43 down_write(&bus->lock);
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
49 * @bus: I3C bus to release the lock on
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
78 down_read(&bus->lock);
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
97 return container_of(i3cbus, struct i3c_master_controller, bus);
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
102 return container_of(dev, struct i3c_master_controller, dev);
105 static const struct device_type i3c_device_type;
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
109 struct i3c_master_controller *master;
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
114 master = dev_to_i3cmaster(dev);
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
121 struct i3c_master_controller *master;
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
126 master = dev_to_i3cmaster(dev);
131 static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
146 static DEVICE_ATTR_RO(bcr);
148 static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
163 static DEVICE_ATTR_RO(dcr);
165 static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
180 static DEVICE_ATTR_RO(pid);
182 static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
197 static DEVICE_ATTR_RO(dynamic_address);
199 static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
203 static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
220 if (!hdrcap_strings[mode])
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
231 ret = sprintf(buf + offset, "\n");
238 i3c_bus_normaluse_unlock(bus);
242 static DEVICE_ATTR_RO(hdrcap);
244 static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
263 static DEVICE_ATTR_RO(modalias);
265 static struct attribute *i3c_device_attrs[] = {
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
271 &dev_attr_modalias.attr,
274 ATTRIBUTE_GROUPS(i3c_device);
276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
291 return add_uevent_var(env,
292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 devinfo.dcr, manuf, part, ext);
296 static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
306 if (dev->type != &i3c_device_type)
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
317 static int i3c_device_probe(struct device *dev)
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
322 return driver->probe(i3cdev);
325 static void i3c_device_remove(struct device *dev)
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
331 driver->remove(i3cdev);
333 i3c_device_free_ibi(i3cdev);
336 struct bus_type i3c_bus_type = {
338 .match = i3c_device_match,
339 .probe = i3c_device_probe,
340 .remove = i3c_device_remove,
343 static enum i3c_addr_slot_status
344 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
346 unsigned long status;
347 int bitpos = addr * 2;
349 if (addr > I2C_MAX_ADDR)
350 return I3C_ADDR_SLOT_RSVD;
352 status = bus->addrslots[bitpos / BITS_PER_LONG];
353 status >>= bitpos % BITS_PER_LONG;
355 return status & I3C_ADDR_SLOT_STATUS_MASK;
358 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
359 enum i3c_addr_slot_status status)
361 int bitpos = addr * 2;
364 if (addr > I2C_MAX_ADDR)
367 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
368 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
369 (bitpos % BITS_PER_LONG));
370 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
373 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
375 enum i3c_addr_slot_status status;
377 status = i3c_bus_get_addr_slot_status(bus, addr);
379 return status == I3C_ADDR_SLOT_FREE;
382 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
384 enum i3c_addr_slot_status status;
387 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
388 status = i3c_bus_get_addr_slot_status(bus, addr);
389 if (status == I3C_ADDR_SLOT_FREE)
396 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
400 /* Addresses 0 to 7 are reserved. */
401 for (i = 0; i < 8; i++)
402 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
405 * Reserve broadcast address and all addresses that might collide
406 * with the broadcast address when facing a single bit error.
408 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
410 for (i = 0; i < 7; i++)
411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
415 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
417 mutex_lock(&i3c_core_lock);
418 idr_remove(&i3c_bus_idr, i3cbus->id);
419 mutex_unlock(&i3c_core_lock);
422 static int i3c_bus_init(struct i3c_bus *i3cbus)
426 init_rwsem(&i3cbus->lock);
427 INIT_LIST_HEAD(&i3cbus->devs.i2c);
428 INIT_LIST_HEAD(&i3cbus->devs.i3c);
429 i3c_bus_init_addrslots(i3cbus);
430 i3cbus->mode = I3C_BUS_MODE_PURE;
432 mutex_lock(&i3c_core_lock);
433 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
434 mutex_unlock(&i3c_core_lock);
444 static const char * const i3c_bus_mode_strings[] = {
445 [I3C_BUS_MODE_PURE] = "pure",
446 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
447 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
448 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
451 static ssize_t mode_show(struct device *dev,
452 struct device_attribute *da,
455 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
458 i3c_bus_normaluse_lock(i3cbus);
459 if (i3cbus->mode < 0 ||
460 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
461 !i3c_bus_mode_strings[i3cbus->mode])
462 ret = sprintf(buf, "unknown\n");
464 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
465 i3c_bus_normaluse_unlock(i3cbus);
469 static DEVICE_ATTR_RO(mode);
471 static ssize_t current_master_show(struct device *dev,
472 struct device_attribute *da,
475 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
478 i3c_bus_normaluse_lock(i3cbus);
479 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
480 i3cbus->cur_master->info.pid);
481 i3c_bus_normaluse_unlock(i3cbus);
485 static DEVICE_ATTR_RO(current_master);
487 static ssize_t i3c_scl_frequency_show(struct device *dev,
488 struct device_attribute *da,
491 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
494 i3c_bus_normaluse_lock(i3cbus);
495 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
496 i3c_bus_normaluse_unlock(i3cbus);
500 static DEVICE_ATTR_RO(i3c_scl_frequency);
502 static ssize_t i2c_scl_frequency_show(struct device *dev,
503 struct device_attribute *da,
506 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
509 i3c_bus_normaluse_lock(i3cbus);
510 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
511 i3c_bus_normaluse_unlock(i3cbus);
515 static DEVICE_ATTR_RO(i2c_scl_frequency);
517 static struct attribute *i3c_masterdev_attrs[] = {
519 &dev_attr_current_master.attr,
520 &dev_attr_i3c_scl_frequency.attr,
521 &dev_attr_i2c_scl_frequency.attr,
525 &dev_attr_dynamic_address.attr,
526 &dev_attr_hdrcap.attr,
529 ATTRIBUTE_GROUPS(i3c_masterdev);
531 static void i3c_masterdev_release(struct device *dev)
533 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
534 struct i3c_bus *bus = dev_to_i3cbus(dev);
537 destroy_workqueue(master->wq);
539 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
540 i3c_bus_cleanup(bus);
542 of_node_put(dev->of_node);
545 static const struct device_type i3c_masterdev_type = {
546 .groups = i3c_masterdev_groups,
549 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
550 unsigned long max_i2c_scl_rate)
552 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
556 switch (i3cbus->mode) {
557 case I3C_BUS_MODE_PURE:
558 if (!i3cbus->scl_rate.i3c)
559 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
561 case I3C_BUS_MODE_MIXED_FAST:
562 case I3C_BUS_MODE_MIXED_LIMITED:
563 if (!i3cbus->scl_rate.i3c)
564 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
565 if (!i3cbus->scl_rate.i2c)
566 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
568 case I3C_BUS_MODE_MIXED_SLOW:
569 if (!i3cbus->scl_rate.i2c)
570 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
571 if (!i3cbus->scl_rate.i3c ||
572 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
573 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
579 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
580 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
583 * I3C/I2C frequency may have been overridden, check that user-provided
584 * values are not exceeding max possible frequency.
586 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
587 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
593 static struct i3c_master_controller *
594 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
596 return container_of(adap, struct i3c_master_controller, i2c);
599 static struct i2c_adapter *
600 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
605 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
610 static struct i2c_dev_desc *
611 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
612 const struct i2c_dev_boardinfo *boardinfo)
614 struct i2c_dev_desc *dev;
616 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
618 return ERR_PTR(-ENOMEM);
620 dev->common.master = master;
621 dev->boardinfo = boardinfo;
622 dev->addr = boardinfo->base.addr;
623 dev->lvr = boardinfo->lvr;
628 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
632 dest->payload.len = payloadlen;
634 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
636 dest->payload.data = NULL;
638 return dest->payload.data;
641 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
643 kfree(dest->payload.data);
646 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
647 struct i3c_ccc_cmd_dest *dests,
650 cmd->rnw = rnw ? 1 : 0;
653 cmd->ndests = ndests;
654 cmd->err = I3C_ERROR_UNKNOWN;
657 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
658 struct i3c_ccc_cmd *cmd)
665 if (WARN_ON(master->init_done &&
666 !rwsem_is_locked(&master->bus.lock)))
669 if (!master->ops->send_ccc_cmd)
672 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
675 if (master->ops->supports_ccc_cmd &&
676 !master->ops->supports_ccc_cmd(master, cmd))
679 ret = master->ops->send_ccc_cmd(master, cmd);
681 if (cmd->err != I3C_ERROR_UNKNOWN)
690 static struct i2c_dev_desc *
691 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
694 struct i2c_dev_desc *dev;
696 i3c_bus_for_each_i2cdev(&master->bus, dev) {
697 if (dev->boardinfo->base.addr == addr)
705 * i3c_master_get_free_addr() - get a free address on the bus
706 * @master: I3C master object
707 * @start_addr: where to start searching
709 * This function must be called with the bus lock held in write mode.
711 * Return: the first free address starting at @start_addr (included) or -ENOMEM
712 * if there's no more address available.
714 int i3c_master_get_free_addr(struct i3c_master_controller *master,
717 return i3c_bus_get_free_addr(&master->bus, start_addr);
719 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
721 static void i3c_device_release(struct device *dev)
723 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
725 WARN_ON(i3cdev->desc);
727 of_node_put(i3cdev->dev.of_node);
731 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
736 static struct i3c_dev_desc *
737 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
738 const struct i3c_device_info *info)
740 struct i3c_dev_desc *dev;
742 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
744 return ERR_PTR(-ENOMEM);
746 dev->common.master = master;
748 mutex_init(&dev->ibi_lock);
753 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
756 enum i3c_addr_slot_status addrstat;
757 struct i3c_ccc_cmd_dest dest;
758 struct i3c_ccc_cmd cmd;
764 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
765 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
768 i3c_ccc_cmd_dest_init(&dest, addr, 0);
769 i3c_ccc_cmd_init(&cmd, false,
770 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
772 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
773 i3c_ccc_cmd_dest_cleanup(&dest);
779 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
781 * @master: master used to send frames on the bus
783 * Send a ENTDAA CCC command to start a DAA procedure.
785 * Note that this function only sends the ENTDAA CCC command, all the logic
786 * behind dynamic address assignment has to be handled in the I3C master
789 * This function must be called with the bus lock held in write mode.
791 * Return: 0 in case of success, a positive I3C error code if the error is
792 * one of the official Mx error codes, and a negative error code otherwise.
794 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
796 struct i3c_ccc_cmd_dest dest;
797 struct i3c_ccc_cmd cmd;
800 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
801 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
802 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
803 i3c_ccc_cmd_dest_cleanup(&dest);
807 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
809 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
810 u8 addr, bool enable, u8 evts)
812 struct i3c_ccc_events *events;
813 struct i3c_ccc_cmd_dest dest;
814 struct i3c_ccc_cmd cmd;
817 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
821 events->events = evts;
822 i3c_ccc_cmd_init(&cmd, false,
824 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
825 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
827 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
828 i3c_ccc_cmd_dest_cleanup(&dest);
834 * i3c_master_disec_locked() - send a DISEC CCC command
835 * @master: master used to send frames on the bus
836 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
837 * @evts: events to disable
839 * Send a DISEC CCC command to disable some or all events coming from a
840 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
842 * This function must be called with the bus lock held in write mode.
844 * Return: 0 in case of success, a positive I3C error code if the error is
845 * one of the official Mx error codes, and a negative error code otherwise.
847 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
850 return i3c_master_enec_disec_locked(master, addr, false, evts);
852 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
855 * i3c_master_enec_locked() - send an ENEC CCC command
856 * @master: master used to send frames on the bus
857 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
858 * @evts: events to disable
860 * Sends an ENEC CCC command to enable some or all events coming from a
861 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
863 * This function must be called with the bus lock held in write mode.
865 * Return: 0 in case of success, a positive I3C error code if the error is
866 * one of the official Mx error codes, and a negative error code otherwise.
868 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
871 return i3c_master_enec_disec_locked(master, addr, true, evts);
873 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
876 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
877 * @master: master used to send frames on the bus
879 * Send a DEFSLVS CCC command containing all the devices known to the @master.
880 * This is useful when you have secondary masters on the bus to propagate
881 * device information.
883 * This should be called after all I3C devices have been discovered (in other
884 * words, after the DAA procedure has finished) and instantiated in
885 * &i3c_master_controller_ops->bus_init().
886 * It should also be called if a master ACKed an Hot-Join request and assigned
887 * a dynamic address to the device joining the bus.
889 * This function must be called with the bus lock held in write mode.
891 * Return: 0 in case of success, a positive I3C error code if the error is
892 * one of the official Mx error codes, and a negative error code otherwise.
894 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
896 struct i3c_ccc_defslvs *defslvs;
897 struct i3c_ccc_dev_desc *desc;
898 struct i3c_ccc_cmd_dest dest;
899 struct i3c_dev_desc *i3cdev;
900 struct i2c_dev_desc *i2cdev;
901 struct i3c_ccc_cmd cmd;
909 bus = i3c_master_get_bus(master);
910 i3c_bus_for_each_i3cdev(bus, i3cdev) {
913 if (i3cdev == master->this)
916 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
921 /* No other master on the bus, skip DEFSLVS. */
925 i3c_bus_for_each_i2cdev(bus, i2cdev)
928 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
929 struct_size(defslvs, slaves,
934 defslvs->count = ndevs;
935 defslvs->master.bcr = master->this->info.bcr;
936 defslvs->master.dcr = master->this->info.dcr;
937 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
938 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
940 desc = defslvs->slaves;
941 i3c_bus_for_each_i2cdev(bus, i2cdev) {
942 desc->lvr = i2cdev->lvr;
943 desc->static_addr = i2cdev->addr << 1;
947 i3c_bus_for_each_i3cdev(bus, i3cdev) {
948 /* Skip the I3C dev representing this master. */
949 if (i3cdev == master->this)
952 desc->bcr = i3cdev->info.bcr;
953 desc->dcr = i3cdev->info.dcr;
954 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
955 desc->static_addr = i3cdev->info.static_addr << 1;
959 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
960 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
961 i3c_ccc_cmd_dest_cleanup(&dest);
965 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
967 static int i3c_master_setda_locked(struct i3c_master_controller *master,
968 u8 oldaddr, u8 newaddr, bool setdasa)
970 struct i3c_ccc_cmd_dest dest;
971 struct i3c_ccc_setda *setda;
972 struct i3c_ccc_cmd cmd;
975 if (!oldaddr || !newaddr)
978 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
982 setda->addr = newaddr << 1;
983 i3c_ccc_cmd_init(&cmd, false,
984 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
986 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
987 i3c_ccc_cmd_dest_cleanup(&dest);
992 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
993 u8 static_addr, u8 dyn_addr)
995 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
998 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
999 u8 oldaddr, u8 newaddr)
1001 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1004 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1005 struct i3c_device_info *info)
1007 struct i3c_ccc_cmd_dest dest;
1008 struct i3c_ccc_mrl *mrl;
1009 struct i3c_ccc_cmd cmd;
1012 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1017 * When the device does not have IBI payload GETMRL only returns 2
1020 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1021 dest.payload.len -= 1;
1023 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1024 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1028 switch (dest.payload.len) {
1030 info->max_ibi_len = mrl->ibi_len;
1033 info->max_read_len = be16_to_cpu(mrl->read_len);
1041 i3c_ccc_cmd_dest_cleanup(&dest);
1046 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1047 struct i3c_device_info *info)
1049 struct i3c_ccc_cmd_dest dest;
1050 struct i3c_ccc_mwl *mwl;
1051 struct i3c_ccc_cmd cmd;
1054 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1058 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1059 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1063 if (dest.payload.len != sizeof(*mwl)) {
1068 info->max_write_len = be16_to_cpu(mwl->len);
1071 i3c_ccc_cmd_dest_cleanup(&dest);
1076 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1077 struct i3c_device_info *info)
1079 struct i3c_ccc_getmxds *getmaxds;
1080 struct i3c_ccc_cmd_dest dest;
1081 struct i3c_ccc_cmd cmd;
1084 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1089 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1090 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1094 if (dest.payload.len != 2 && dest.payload.len != 5) {
1099 info->max_read_ds = getmaxds->maxrd;
1100 info->max_write_ds = getmaxds->maxwr;
1101 if (dest.payload.len == 5)
1102 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1103 ((u32)getmaxds->maxrdturn[1] << 8) |
1104 ((u32)getmaxds->maxrdturn[2] << 16);
1107 i3c_ccc_cmd_dest_cleanup(&dest);
1112 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1113 struct i3c_device_info *info)
1115 struct i3c_ccc_gethdrcap *gethdrcap;
1116 struct i3c_ccc_cmd_dest dest;
1117 struct i3c_ccc_cmd cmd;
1120 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1121 sizeof(*gethdrcap));
1125 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1126 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1130 if (dest.payload.len != 1) {
1135 info->hdr_cap = gethdrcap->modes;
1138 i3c_ccc_cmd_dest_cleanup(&dest);
1143 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1144 struct i3c_device_info *info)
1146 struct i3c_ccc_getpid *getpid;
1147 struct i3c_ccc_cmd_dest dest;
1148 struct i3c_ccc_cmd cmd;
1151 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1155 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1156 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1161 for (i = 0; i < sizeof(getpid->pid); i++) {
1162 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1164 info->pid |= (u64)getpid->pid[i] << sft;
1168 i3c_ccc_cmd_dest_cleanup(&dest);
1173 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1174 struct i3c_device_info *info)
1176 struct i3c_ccc_getbcr *getbcr;
1177 struct i3c_ccc_cmd_dest dest;
1178 struct i3c_ccc_cmd cmd;
1181 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1185 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1186 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1190 info->bcr = getbcr->bcr;
1193 i3c_ccc_cmd_dest_cleanup(&dest);
1198 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1199 struct i3c_device_info *info)
1201 struct i3c_ccc_getdcr *getdcr;
1202 struct i3c_ccc_cmd_dest dest;
1203 struct i3c_ccc_cmd cmd;
1206 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1210 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1211 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1215 info->dcr = getdcr->dcr;
1218 i3c_ccc_cmd_dest_cleanup(&dest);
1223 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1225 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1226 enum i3c_addr_slot_status slot_status;
1229 if (!dev->info.dyn_addr)
1232 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1233 dev->info.dyn_addr);
1234 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1235 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1238 ret = i3c_master_getpid_locked(master, &dev->info);
1242 ret = i3c_master_getbcr_locked(master, &dev->info);
1246 ret = i3c_master_getdcr_locked(master, &dev->info);
1250 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1251 ret = i3c_master_getmxds_locked(master, &dev->info);
1256 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1257 dev->info.max_ibi_len = 1;
1259 i3c_master_getmrl_locked(master, &dev->info);
1260 i3c_master_getmwl_locked(master, &dev->info);
1262 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1263 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1271 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1273 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1275 if (dev->info.static_addr)
1276 i3c_bus_set_addr_slot_status(&master->bus,
1277 dev->info.static_addr,
1278 I3C_ADDR_SLOT_FREE);
1280 if (dev->info.dyn_addr)
1281 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1282 I3C_ADDR_SLOT_FREE);
1284 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1285 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1286 I3C_ADDR_SLOT_FREE);
1289 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1291 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1292 enum i3c_addr_slot_status status;
1294 if (!dev->info.static_addr && !dev->info.dyn_addr)
1297 if (dev->info.static_addr) {
1298 status = i3c_bus_get_addr_slot_status(&master->bus,
1299 dev->info.static_addr);
1300 if (status != I3C_ADDR_SLOT_FREE)
1303 i3c_bus_set_addr_slot_status(&master->bus,
1304 dev->info.static_addr,
1305 I3C_ADDR_SLOT_I3C_DEV);
1309 * ->init_dyn_addr should have been reserved before that, so, if we're
1310 * trying to apply a pre-reserved dynamic address, we should not try
1311 * to reserve the address slot a second time.
1313 if (dev->info.dyn_addr &&
1315 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1316 status = i3c_bus_get_addr_slot_status(&master->bus,
1317 dev->info.dyn_addr);
1318 if (status != I3C_ADDR_SLOT_FREE)
1319 goto err_release_static_addr;
1321 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1322 I3C_ADDR_SLOT_I3C_DEV);
1327 err_release_static_addr:
1328 if (dev->info.static_addr)
1329 i3c_bus_set_addr_slot_status(&master->bus,
1330 dev->info.static_addr,
1331 I3C_ADDR_SLOT_FREE);
1336 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1337 struct i3c_dev_desc *dev)
1342 * We don't attach devices to the controller until they are
1343 * addressable on the bus.
1345 if (!dev->info.static_addr && !dev->info.dyn_addr)
1348 ret = i3c_master_get_i3c_addrs(dev);
1352 /* Do not attach the master device itself. */
1353 if (master->this != dev && master->ops->attach_i3c_dev) {
1354 ret = master->ops->attach_i3c_dev(dev);
1356 i3c_master_put_i3c_addrs(dev);
1361 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1366 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1369 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1370 enum i3c_addr_slot_status status;
1373 if (dev->info.dyn_addr != old_dyn_addr &&
1375 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1376 status = i3c_bus_get_addr_slot_status(&master->bus,
1377 dev->info.dyn_addr);
1378 if (status != I3C_ADDR_SLOT_FREE)
1380 i3c_bus_set_addr_slot_status(&master->bus,
1382 I3C_ADDR_SLOT_I3C_DEV);
1385 if (master->ops->reattach_i3c_dev) {
1386 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1388 i3c_master_put_i3c_addrs(dev);
1396 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1398 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1400 /* Do not detach the master device itself. */
1401 if (master->this != dev && master->ops->detach_i3c_dev)
1402 master->ops->detach_i3c_dev(dev);
1404 i3c_master_put_i3c_addrs(dev);
1405 list_del(&dev->common.node);
1408 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1409 struct i2c_dev_desc *dev)
1413 if (master->ops->attach_i2c_dev) {
1414 ret = master->ops->attach_i2c_dev(dev);
1419 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1424 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1426 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1428 list_del(&dev->common.node);
1430 if (master->ops->detach_i2c_dev)
1431 master->ops->detach_i2c_dev(dev);
1434 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1435 struct i3c_dev_boardinfo *boardinfo)
1437 struct i3c_device_info info = {
1438 .static_addr = boardinfo->static_addr,
1440 struct i3c_dev_desc *i3cdev;
1443 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1447 i3cdev->boardinfo = boardinfo;
1449 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1453 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1454 i3cdev->boardinfo->init_dyn_addr);
1456 goto err_detach_dev;
1458 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1459 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1463 ret = i3c_master_retrieve_dev_info(i3cdev);
1470 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1472 i3c_master_detach_i3c_dev(i3cdev);
1474 i3c_master_free_i3c_dev(i3cdev);
1480 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1482 struct i3c_dev_desc *desc;
1485 if (!master->init_done)
1488 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1489 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1492 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1496 desc->dev->bus = &master->bus;
1497 desc->dev->desc = desc;
1498 desc->dev->dev.parent = &master->dev;
1499 desc->dev->dev.type = &i3c_device_type;
1500 desc->dev->dev.bus = &i3c_bus_type;
1501 desc->dev->dev.release = i3c_device_release;
1502 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1505 if (desc->boardinfo)
1506 desc->dev->dev.of_node = desc->boardinfo->of_node;
1508 ret = device_register(&desc->dev->dev);
1510 dev_err(&master->dev,
1511 "Failed to add I3C device (err = %d)\n", ret);
1516 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1517 * @master: master doing the DAA
1519 * This function is instantiating an I3C device object and adding it to the
1520 * I3C device list. All device information are automatically retrieved using
1521 * standard CCC commands.
1523 * The I3C device object is returned in case the master wants to attach
1524 * private data to it using i3c_dev_set_master_data().
1526 * This function must be called with the bus lock held in write mode.
1528 * Return: a 0 in case of success, an negative error code otherwise.
1530 int i3c_master_do_daa(struct i3c_master_controller *master)
1534 i3c_bus_maintenance_lock(&master->bus);
1535 ret = master->ops->do_daa(master);
1536 i3c_bus_maintenance_unlock(&master->bus);
1541 i3c_bus_normaluse_lock(&master->bus);
1542 i3c_master_register_new_i3c_devs(master);
1543 i3c_bus_normaluse_unlock(&master->bus);
1547 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1550 * i3c_master_set_info() - set master device information
1551 * @master: master used to send frames on the bus
1552 * @info: I3C device information
1554 * Set master device info. This should be called from
1555 * &i3c_master_controller_ops->bus_init().
1557 * Not all &i3c_device_info fields are meaningful for a master device.
1558 * Here is a list of fields that should be properly filled:
1560 * - &i3c_device_info->dyn_addr
1561 * - &i3c_device_info->bcr
1562 * - &i3c_device_info->dcr
1563 * - &i3c_device_info->pid
1564 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1565 * &i3c_device_info->bcr
1567 * This function must be called with the bus lock held in maintenance mode.
1569 * Return: 0 if @info contains valid information (not every piece of
1570 * information can be checked, but we can at least make sure @info->dyn_addr
1571 * and @info->bcr are correct), -EINVAL otherwise.
1573 int i3c_master_set_info(struct i3c_master_controller *master,
1574 const struct i3c_device_info *info)
1576 struct i3c_dev_desc *i3cdev;
1579 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1582 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1589 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1591 return PTR_ERR(i3cdev);
1593 master->this = i3cdev;
1594 master->bus.cur_master = master->this;
1596 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1603 i3c_master_free_i3c_dev(i3cdev);
1607 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1609 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1611 struct i3c_dev_desc *i3cdev, *i3ctmp;
1612 struct i2c_dev_desc *i2cdev, *i2ctmp;
1614 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1616 i3c_master_detach_i3c_dev(i3cdev);
1618 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1619 i3c_bus_set_addr_slot_status(&master->bus,
1620 i3cdev->boardinfo->init_dyn_addr,
1621 I3C_ADDR_SLOT_FREE);
1623 i3c_master_free_i3c_dev(i3cdev);
1626 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1628 i3c_master_detach_i2c_dev(i2cdev);
1629 i3c_bus_set_addr_slot_status(&master->bus,
1631 I3C_ADDR_SLOT_FREE);
1632 i3c_master_free_i2c_dev(i2cdev);
1637 * i3c_master_bus_init() - initialize an I3C bus
1638 * @master: main master initializing the bus
1640 * This function is following all initialisation steps described in the I3C
1643 * 1. Attach I2C devs to the master so that the master can fill its internal
1644 * device table appropriately
1646 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1647 * the master controller. That's usually where the bus mode is selected
1648 * (pure bus or mixed fast/slow bus)
1650 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1651 * particularly important when the bus was previously configured by someone
1652 * else (for example the bootloader)
1654 * 4. Disable all slave events.
1656 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1657 * also have static_addr, try to pre-assign dynamic addresses requested by
1658 * the FW with SETDASA and attach corresponding statically defined I3C
1659 * devices to the master.
1661 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1662 * remaining I3C devices
1664 * Once this is done, all I3C and I2C devices should be usable.
1666 * Return: a 0 in case of success, an negative error code otherwise.
1668 static int i3c_master_bus_init(struct i3c_master_controller *master)
1670 enum i3c_addr_slot_status status;
1671 struct i2c_dev_boardinfo *i2cboardinfo;
1672 struct i3c_dev_boardinfo *i3cboardinfo;
1673 struct i2c_dev_desc *i2cdev;
1677 * First attach all devices with static definitions provided by the
1680 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1681 status = i3c_bus_get_addr_slot_status(&master->bus,
1682 i2cboardinfo->base.addr);
1683 if (status != I3C_ADDR_SLOT_FREE) {
1685 goto err_detach_devs;
1688 i3c_bus_set_addr_slot_status(&master->bus,
1689 i2cboardinfo->base.addr,
1690 I3C_ADDR_SLOT_I2C_DEV);
1692 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1693 if (IS_ERR(i2cdev)) {
1694 ret = PTR_ERR(i2cdev);
1695 goto err_detach_devs;
1698 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1700 i3c_master_free_i2c_dev(i2cdev);
1701 goto err_detach_devs;
1706 * Now execute the controller specific ->bus_init() routine, which
1707 * might configure its internal logic to match the bus limitations.
1709 ret = master->ops->bus_init(master);
1711 goto err_detach_devs;
1714 * The master device should have been instantiated in ->bus_init(),
1715 * complain if this was not the case.
1717 if (!master->this) {
1718 dev_err(&master->dev,
1719 "master_set_info() was not called in ->bus_init()\n");
1721 goto err_bus_cleanup;
1725 * Reset all dynamic address that may have been assigned before
1726 * (assigned by the bootloader for example).
1728 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1729 if (ret && ret != I3C_ERROR_M2)
1730 goto err_bus_cleanup;
1732 /* Disable all slave events before starting DAA. */
1733 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1734 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1736 if (ret && ret != I3C_ERROR_M2)
1737 goto err_bus_cleanup;
1740 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1741 * address and retrieve device information if needed.
1742 * In case pre-assign dynamic address fails, setting dynamic address to
1743 * the requested init_dyn_addr is retried after DAA is done in
1744 * i3c_master_add_i3c_dev_locked().
1746 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1749 * We don't reserve a dynamic address for devices that
1750 * don't explicitly request one.
1752 if (!i3cboardinfo->init_dyn_addr)
1755 ret = i3c_bus_get_addr_slot_status(&master->bus,
1756 i3cboardinfo->init_dyn_addr);
1757 if (ret != I3C_ADDR_SLOT_FREE) {
1762 i3c_bus_set_addr_slot_status(&master->bus,
1763 i3cboardinfo->init_dyn_addr,
1764 I3C_ADDR_SLOT_I3C_DEV);
1767 * Only try to create/attach devices that have a static
1768 * address. Other devices will be created/attached when
1769 * DAA happens, and the requested dynamic address will
1770 * be set using SETNEWDA once those devices become
1774 if (i3cboardinfo->static_addr)
1775 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1778 ret = i3c_master_do_daa(master);
1785 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1788 if (master->ops->bus_cleanup)
1789 master->ops->bus_cleanup(master);
1792 i3c_master_detach_free_devs(master);
1797 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1799 if (master->ops->bus_cleanup)
1800 master->ops->bus_cleanup(master);
1802 i3c_master_detach_free_devs(master);
1805 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1807 struct i3c_master_controller *master = i3cdev->common.master;
1808 struct i3c_dev_boardinfo *i3cboardinfo;
1810 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1811 if (i3cdev->info.pid != i3cboardinfo->pid)
1814 i3cdev->boardinfo = i3cboardinfo;
1815 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1820 static struct i3c_dev_desc *
1821 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1823 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1824 struct i3c_dev_desc *i3cdev;
1826 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1827 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1835 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1836 * @master: master used to send frames on the bus
1837 * @addr: I3C slave dynamic address assigned to the device
1839 * This function is instantiating an I3C device object and adding it to the
1840 * I3C device list. All device information are automatically retrieved using
1841 * standard CCC commands.
1843 * The I3C device object is returned in case the master wants to attach
1844 * private data to it using i3c_dev_set_master_data().
1846 * This function must be called with the bus lock held in write mode.
1848 * Return: a 0 in case of success, an negative error code otherwise.
1850 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1853 struct i3c_device_info info = { .dyn_addr = addr };
1854 struct i3c_dev_desc *newdev, *olddev;
1855 u8 old_dyn_addr = addr, expected_dyn_addr;
1856 struct i3c_ibi_setup ibireq = { };
1857 bool enable_ibi = false;
1863 newdev = i3c_master_alloc_i3c_dev(master, &info);
1865 return PTR_ERR(newdev);
1867 ret = i3c_master_attach_i3c_dev(master, newdev);
1871 ret = i3c_master_retrieve_dev_info(newdev);
1873 goto err_detach_dev;
1875 i3c_master_attach_boardinfo(newdev);
1877 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1879 newdev->dev = olddev->dev;
1881 newdev->dev->desc = newdev;
1884 * We need to restore the IBI state too, so let's save the
1885 * IBI information and try to restore them after olddev has
1886 * been detached+released and its IBI has been stopped and
1887 * the associated resources have been freed.
1889 mutex_lock(&olddev->ibi_lock);
1891 ibireq.handler = olddev->ibi->handler;
1892 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1893 ibireq.num_slots = olddev->ibi->num_slots;
1895 if (olddev->ibi->enabled) {
1897 i3c_dev_disable_ibi_locked(olddev);
1900 i3c_dev_free_ibi_locked(olddev);
1902 mutex_unlock(&olddev->ibi_lock);
1904 old_dyn_addr = olddev->info.dyn_addr;
1906 i3c_master_detach_i3c_dev(olddev);
1907 i3c_master_free_i3c_dev(olddev);
1910 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1912 goto err_detach_dev;
1915 * Depending on our previous state, the expected dynamic address might
1917 * - if the device already had a dynamic address assigned, let's try to
1919 * - if the device did not have a dynamic address and the firmware
1920 * requested a specific address, pick this one
1921 * - in any other case, keep the address automatically assigned by the
1924 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1925 expected_dyn_addr = old_dyn_addr;
1926 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1927 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1929 expected_dyn_addr = newdev->info.dyn_addr;
1931 if (newdev->info.dyn_addr != expected_dyn_addr) {
1933 * Try to apply the expected dynamic address. If it fails, keep
1934 * the address assigned by the master.
1936 ret = i3c_master_setnewda_locked(master,
1937 newdev->info.dyn_addr,
1940 old_dyn_addr = newdev->info.dyn_addr;
1941 newdev->info.dyn_addr = expected_dyn_addr;
1942 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1944 dev_err(&master->dev,
1945 "Failed to assign reserved/old address to device %d%llx",
1946 master->bus.id, newdev->info.pid);
1951 * Now is time to try to restore the IBI setup. If we're lucky,
1952 * everything works as before, otherwise, all we can do is complain.
1953 * FIXME: maybe we should add callback to inform the driver that it
1954 * should request the IBI again instead of trying to hide that from
1957 if (ibireq.handler) {
1958 mutex_lock(&newdev->ibi_lock);
1959 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1961 dev_err(&master->dev,
1962 "Failed to request IBI on device %d-%llx",
1963 master->bus.id, newdev->info.pid);
1964 } else if (enable_ibi) {
1965 ret = i3c_dev_enable_ibi_locked(newdev);
1967 dev_err(&master->dev,
1968 "Failed to re-enable IBI on device %d-%llx",
1969 master->bus.id, newdev->info.pid);
1971 mutex_unlock(&newdev->ibi_lock);
1977 if (newdev->dev && newdev->dev->desc)
1978 newdev->dev->desc = NULL;
1980 i3c_master_detach_i3c_dev(newdev);
1983 i3c_master_free_i3c_dev(newdev);
1987 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1989 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1992 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1993 struct device_node *node, u32 *reg)
1995 struct i2c_dev_boardinfo *boardinfo;
1996 struct device *dev = &master->dev;
1999 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2003 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2008 * The I3C Specification does not clearly say I2C devices with 10-bit
2009 * address are supported. These devices can't be passed properly through
2012 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2013 dev_err(dev, "I2C device with 10 bit address not supported.");
2017 /* LVR is encoded in reg[2]. */
2018 boardinfo->lvr = reg[2];
2020 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2027 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2028 struct device_node *node, u32 *reg)
2030 struct i3c_dev_boardinfo *boardinfo;
2031 struct device *dev = &master->dev;
2032 enum i3c_addr_slot_status addrstatus;
2033 u32 init_dyn_addr = 0;
2035 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2040 if (reg[0] > I3C_MAX_ADDR)
2043 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2045 if (addrstatus != I3C_ADDR_SLOT_FREE)
2049 boardinfo->static_addr = reg[0];
2051 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2052 if (init_dyn_addr > I3C_MAX_ADDR)
2055 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2057 if (addrstatus != I3C_ADDR_SLOT_FREE)
2061 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2063 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2064 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2067 boardinfo->init_dyn_addr = init_dyn_addr;
2068 boardinfo->of_node = of_node_get(node);
2069 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2074 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2075 struct device_node *node)
2080 if (!master || !node)
2083 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2088 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2089 * dealing with an I2C device.
2092 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2094 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2099 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2101 struct device *dev = &master->dev;
2102 struct device_node *i3cbus_np = dev->of_node;
2103 struct device_node *node;
2110 for_each_available_child_of_node(i3cbus_np, node) {
2111 ret = of_i3c_master_add_dev(master, node);
2119 * The user might want to limit I2C and I3C speed in case some devices
2120 * on the bus are not supporting typical rates, or if the bus topology
2121 * prevents it from using max possible rate.
2123 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2124 master->bus.scl_rate.i2c = val;
2126 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2127 master->bus.scl_rate.i3c = val;
2132 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2133 struct i2c_msg *xfers, int nxfers)
2135 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2136 struct i2c_dev_desc *dev;
2140 if (!xfers || !master || nxfers <= 0)
2143 if (!master->ops->i2c_xfers)
2146 /* Doing transfers to different devices is not supported. */
2147 addr = xfers[0].addr;
2148 for (i = 1; i < nxfers; i++) {
2149 if (addr != xfers[i].addr)
2153 i3c_bus_normaluse_lock(&master->bus);
2154 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2158 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2159 i3c_bus_normaluse_unlock(&master->bus);
2161 return ret ? ret : nxfers;
2164 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2166 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2169 static const struct i2c_algorithm i3c_master_i2c_algo = {
2170 .master_xfer = i3c_master_i2c_adapter_xfer,
2171 .functionality = i3c_master_i2c_funcs,
2174 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2176 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2177 struct i2c_dev_desc *i2cdev;
2180 adap->dev.parent = master->dev.parent;
2181 adap->owner = master->dev.parent->driver->owner;
2182 adap->algo = &i3c_master_i2c_algo;
2183 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2185 /* FIXME: Should we allow i3c masters to override these values? */
2186 adap->timeout = 1000;
2189 ret = i2c_add_adapter(adap);
2194 * We silently ignore failures here. The bus should keep working
2195 * correctly even if one or more i2c devices are not registered.
2197 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2198 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2203 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2205 struct i2c_dev_desc *i2cdev;
2207 i2c_del_adapter(&master->i2c);
2209 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2213 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2215 struct i3c_dev_desc *i3cdev;
2217 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2221 i3cdev->dev->desc = NULL;
2222 if (device_is_registered(&i3cdev->dev->dev))
2223 device_unregister(&i3cdev->dev->dev);
2225 put_device(&i3cdev->dev->dev);
2231 * i3c_master_queue_ibi() - Queue an IBI
2232 * @dev: the device this IBI is coming from
2233 * @slot: the IBI slot used to store the payload
2235 * Queue an IBI to the controller workqueue. The IBI handler attached to
2236 * the dev will be called from a workqueue context.
2238 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2240 atomic_inc(&dev->ibi->pending_ibis);
2241 queue_work(dev->common.master->wq, &slot->work);
2243 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2245 static void i3c_master_handle_ibi(struct work_struct *work)
2247 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2249 struct i3c_dev_desc *dev = slot->dev;
2250 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2251 struct i3c_ibi_payload payload;
2253 payload.data = slot->data;
2254 payload.len = slot->len;
2257 dev->ibi->handler(dev->dev, &payload);
2259 master->ops->recycle_ibi_slot(dev, slot);
2260 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2261 complete(&dev->ibi->all_ibis_handled);
2264 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2265 struct i3c_ibi_slot *slot)
2268 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2271 struct i3c_generic_ibi_slot {
2272 struct list_head node;
2273 struct i3c_ibi_slot base;
2276 struct i3c_generic_ibi_pool {
2278 unsigned int num_slots;
2279 struct i3c_generic_ibi_slot *slots;
2281 struct list_head free_slots;
2282 struct list_head pending;
2286 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2287 * @pool: the IBI pool to free
2289 * Free all IBI slots allated by a generic IBI pool.
2291 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2293 struct i3c_generic_ibi_slot *slot;
2294 unsigned int nslots = 0;
2296 while (!list_empty(&pool->free_slots)) {
2297 slot = list_first_entry(&pool->free_slots,
2298 struct i3c_generic_ibi_slot, node);
2299 list_del(&slot->node);
2304 * If the number of freed slots is not equal to the number of allocated
2305 * slots we have a leak somewhere.
2307 WARN_ON(nslots != pool->num_slots);
2309 kfree(pool->payload_buf);
2313 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2316 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2317 * @dev: the device this pool will be used for
2318 * @req: IBI setup request describing what the device driver expects
2320 * Create a generic IBI pool based on the information provided in @req.
2322 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2324 struct i3c_generic_ibi_pool *
2325 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2326 const struct i3c_ibi_setup *req)
2328 struct i3c_generic_ibi_pool *pool;
2329 struct i3c_generic_ibi_slot *slot;
2333 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2335 return ERR_PTR(-ENOMEM);
2337 spin_lock_init(&pool->lock);
2338 INIT_LIST_HEAD(&pool->free_slots);
2339 INIT_LIST_HEAD(&pool->pending);
2341 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2347 if (req->max_payload_len) {
2348 pool->payload_buf = kcalloc(req->num_slots,
2349 req->max_payload_len, GFP_KERNEL);
2350 if (!pool->payload_buf) {
2356 for (i = 0; i < req->num_slots; i++) {
2357 slot = &pool->slots[i];
2358 i3c_master_init_ibi_slot(dev, &slot->base);
2360 if (req->max_payload_len)
2361 slot->base.data = pool->payload_buf +
2362 (i * req->max_payload_len);
2364 list_add_tail(&slot->node, &pool->free_slots);
2371 i3c_generic_ibi_free_pool(pool);
2372 return ERR_PTR(ret);
2374 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2377 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2378 * @pool: the pool to query an IBI slot on
2380 * Search for a free slot in a generic IBI pool.
2381 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2382 * when it's no longer needed.
2384 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2386 struct i3c_ibi_slot *
2387 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2389 struct i3c_generic_ibi_slot *slot;
2390 unsigned long flags;
2392 spin_lock_irqsave(&pool->lock, flags);
2393 slot = list_first_entry_or_null(&pool->free_slots,
2394 struct i3c_generic_ibi_slot, node);
2396 list_del(&slot->node);
2397 spin_unlock_irqrestore(&pool->lock, flags);
2399 return slot ? &slot->base : NULL;
2401 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2404 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2405 * @pool: the pool to return the IBI slot to
2406 * @s: IBI slot to recycle
2408 * Add an IBI slot back to its generic IBI pool. Should be called from the
2409 * master driver struct_master_controller_ops->recycle_ibi() method.
2411 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2412 struct i3c_ibi_slot *s)
2414 struct i3c_generic_ibi_slot *slot;
2415 unsigned long flags;
2420 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2421 spin_lock_irqsave(&pool->lock, flags);
2422 list_add_tail(&slot->node, &pool->free_slots);
2423 spin_unlock_irqrestore(&pool->lock, flags);
2425 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2427 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2429 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2430 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2433 if (ops->request_ibi &&
2434 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2435 !ops->recycle_ibi_slot))
2442 * i3c_master_register() - register an I3C master
2443 * @master: master used to send frames on the bus
2444 * @parent: the parent device (the one that provides this I3C master
2446 * @ops: the master controller operations
2447 * @secondary: true if you are registering a secondary master. Will return
2448 * -ENOTSUPP if set to true since secondary masters are not yet
2451 * This function takes care of everything for you:
2453 * - creates and initializes the I3C bus
2454 * - populates the bus with static I2C devs if @parent->of_node is not
2456 * - registers all I3C devices added by the controller during bus
2458 * - registers the I2C adapter and all I2C devices
2460 * Return: 0 in case of success, a negative error code otherwise.
2462 int i3c_master_register(struct i3c_master_controller *master,
2463 struct device *parent,
2464 const struct i3c_master_controller_ops *ops,
2467 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2468 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2469 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2470 struct i2c_dev_boardinfo *i2cbi;
2473 /* We do not support secondary masters yet. */
2477 ret = i3c_master_check_ops(ops);
2481 master->dev.parent = parent;
2482 master->dev.of_node = of_node_get(parent->of_node);
2483 master->dev.bus = &i3c_bus_type;
2484 master->dev.type = &i3c_masterdev_type;
2485 master->dev.release = i3c_masterdev_release;
2487 master->secondary = secondary;
2488 INIT_LIST_HEAD(&master->boardinfo.i2c);
2489 INIT_LIST_HEAD(&master->boardinfo.i3c);
2491 ret = i3c_bus_init(i3cbus);
2495 device_initialize(&master->dev);
2496 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2498 ret = of_populate_i3c_bus(master);
2502 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2503 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2504 case I3C_LVR_I2C_INDEX(0):
2505 if (mode < I3C_BUS_MODE_MIXED_FAST)
2506 mode = I3C_BUS_MODE_MIXED_FAST;
2508 case I3C_LVR_I2C_INDEX(1):
2509 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2510 mode = I3C_BUS_MODE_MIXED_LIMITED;
2512 case I3C_LVR_I2C_INDEX(2):
2513 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2514 mode = I3C_BUS_MODE_MIXED_SLOW;
2521 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2522 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2525 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2529 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2535 ret = i3c_master_bus_init(master);
2539 ret = device_add(&master->dev);
2541 goto err_cleanup_bus;
2544 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2545 * through the I2C subsystem.
2547 ret = i3c_master_i2c_adapter_init(master);
2552 * We're done initializing the bus and the controller, we can now
2553 * register I3C devices discovered during the initial DAA.
2555 master->init_done = true;
2556 i3c_bus_normaluse_lock(&master->bus);
2557 i3c_master_register_new_i3c_devs(master);
2558 i3c_bus_normaluse_unlock(&master->bus);
2563 device_del(&master->dev);
2566 i3c_master_bus_cleanup(master);
2569 put_device(&master->dev);
2573 EXPORT_SYMBOL_GPL(i3c_master_register);
2576 * i3c_master_unregister() - unregister an I3C master
2577 * @master: master used to send frames on the bus
2579 * Basically undo everything done in i3c_master_register().
2581 * Return: 0 in case of success, a negative error code otherwise.
2583 int i3c_master_unregister(struct i3c_master_controller *master)
2585 i3c_master_i2c_adapter_cleanup(master);
2586 i3c_master_unregister_i3c_devs(master);
2587 i3c_master_bus_cleanup(master);
2588 device_unregister(&master->dev);
2592 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2594 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2595 struct i3c_priv_xfer *xfers,
2598 struct i3c_master_controller *master;
2603 master = i3c_dev_get_master(dev);
2604 if (!master || !xfers)
2607 if (!master->ops->priv_xfers)
2610 return master->ops->priv_xfers(dev, xfers, nxfers);
2613 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2615 struct i3c_master_controller *master;
2621 master = i3c_dev_get_master(dev);
2622 ret = master->ops->disable_ibi(dev);
2626 reinit_completion(&dev->ibi->all_ibis_handled);
2627 if (atomic_read(&dev->ibi->pending_ibis))
2628 wait_for_completion(&dev->ibi->all_ibis_handled);
2630 dev->ibi->enabled = false;
2635 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2637 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2643 ret = master->ops->enable_ibi(dev);
2645 dev->ibi->enabled = true;
2650 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2651 const struct i3c_ibi_setup *req)
2653 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2654 struct i3c_device_ibi_info *ibi;
2657 if (!master->ops->request_ibi)
2663 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2667 atomic_set(&ibi->pending_ibis, 0);
2668 init_completion(&ibi->all_ibis_handled);
2669 ibi->handler = req->handler;
2670 ibi->max_payload_len = req->max_payload_len;
2671 ibi->num_slots = req->num_slots;
2674 ret = master->ops->request_ibi(dev, req);
2683 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2685 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2690 if (WARN_ON(dev->ibi->enabled))
2691 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2693 master->ops->free_ibi(dev);
2698 static int __init i3c_init(void)
2700 return bus_register(&i3c_bus_type);
2702 subsys_initcall(i3c_init);
2704 static void __exit i3c_exit(void)
2706 idr_destroy(&i3c_bus_idr);
2707 bus_unregister(&i3c_bus_type);
2709 module_exit(i3c_exit);
2711 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2712 MODULE_DESCRIPTION("I3C core");
2713 MODULE_LICENSE("GPL v2");