1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
5 * Based on allwinner u-boot sources rsb code which is:
6 * (C) Copyright 2007-2013
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 * lixiang <lixiang@allwinnertech.com>
17 #include <asm/arch/cpu.h>
18 #include <asm/arch/gpio.h>
19 #include <asm/arch/prcm.h>
20 #include <asm/arch/rsb.h>
22 static int sun8i_rsb_await_trans(struct sunxi_rsb_reg *base)
24 unsigned long tmo = timer_get_us() + 1000000;
29 stat = readl(&base->stat);
30 if (stat & RSB_STAT_LBSY_INT) {
34 if (stat & RSB_STAT_TERR_INT) {
38 if (stat & RSB_STAT_TOVER_INT) {
42 if (timer_get_us() > tmo) {
47 writel(stat, &base->stat); /* Clear status bits */
52 static int sun8i_rsb_do_trans(struct sunxi_rsb_reg *base)
54 setbits_le32(&base->ctrl, RSB_CTRL_START_TRANS);
56 return sun8i_rsb_await_trans(base);
59 static int sun8i_rsb_read(struct sunxi_rsb_reg *base, u16 runtime_addr,
60 u8 reg_addr, u8 *data)
64 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr), &base->devaddr);
65 writel(reg_addr, &base->addr);
66 writel(RSB_CMD_BYTE_READ, &base->cmd);
68 ret = sun8i_rsb_do_trans(base);
72 *data = readl(&base->data) & 0xff;
77 static int sun8i_rsb_write(struct sunxi_rsb_reg *base, u16 runtime_addr,
80 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr), &base->devaddr);
81 writel(reg_addr, &base->addr);
82 writel(data, &base->data);
83 writel(RSB_CMD_BYTE_WRITE, &base->cmd);
85 return sun8i_rsb_do_trans(base);
88 static int sun8i_rsb_set_device_address(struct sunxi_rsb_reg *base,
89 u16 device_addr, u16 runtime_addr)
91 writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr) |
92 RSB_DEVADDR_DEVICE_ADDR(device_addr), &base->devaddr);
93 writel(RSB_CMD_SET_RTSADDR, &base->cmd);
95 return sun8i_rsb_do_trans(base);
98 static void sun8i_rsb_cfg_io(void)
100 #ifdef CONFIG_MACH_SUN8I
101 sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
102 sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
103 sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
104 sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
105 sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
106 sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
107 #elif defined CONFIG_MACH_SUN9I
108 sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
109 sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
110 sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
111 sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
112 sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
113 sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
115 #error unsupported MACH_SUNXI
119 static void sun8i_rsb_set_clk(struct sunxi_rsb_reg *base)
124 /* Source is Hosc24M, set RSB clk to 3Mhz */
125 div = 24000000 / 3000000 / 2 - 1;
130 writel((cd_odly << 8) | div, &base->ccr);
133 static int sun8i_rsb_set_device_mode(struct sunxi_rsb_reg *base)
135 unsigned long tmo = timer_get_us() + 1000000;
137 writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA,
140 while (readl(&base->dmcr) & RSB_DMCR_DEVICE_MODE_START) {
141 if (timer_get_us() > tmo)
145 return sun8i_rsb_await_trans(base);
148 static int sun8i_rsb_init(struct sunxi_rsb_reg *base)
150 /* Enable RSB and PIO clk, and de-assert their resets */
151 prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
153 /* Setup external pins */
156 writel(RSB_CTRL_SOFT_RST, &base->ctrl);
157 sun8i_rsb_set_clk(base);
159 return sun8i_rsb_set_device_mode(base);
162 #if IS_ENABLED(CONFIG_AXP_PMIC_BUS)
163 int rsb_read(const u16 runtime_addr, const u8 reg_addr, u8 *data)
165 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
167 return sun8i_rsb_read(base, runtime_addr, reg_addr, data);
170 int rsb_write(const u16 runtime_addr, const u8 reg_addr, u8 data)
172 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
174 return sun8i_rsb_write(base, runtime_addr, reg_addr, data);
177 int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
179 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
181 return sun8i_rsb_set_device_address(base, device_addr, runtime_addr);
186 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
188 return sun8i_rsb_init(base);
192 #if CONFIG_IS_ENABLED(DM_I2C)
193 struct sun8i_rsb_priv {
194 struct sunxi_rsb_reg *base;
198 * The mapping from hardware address to runtime address is fixed, and shared
199 * among all RSB drivers. See the comment in drivers/bus/sunxi-rsb.c in Linux.
201 static int sun8i_rsb_get_runtime_address(u16 device_addr)
203 if (device_addr == AXP_PMIC_PRI_DEVICE_ADDR)
204 return AXP_PMIC_PRI_RUNTIME_ADDR;
205 if (device_addr == AXP_PMIC_SEC_DEVICE_ADDR)
206 return AXP_PMIC_SEC_RUNTIME_ADDR;
211 static int sun8i_rsb_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
213 int runtime_addr = sun8i_rsb_get_runtime_address(msg->addr);
214 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
216 if (runtime_addr < 0)
219 /* The hardware only supports SMBus-style transfers. */
220 if (nmsgs == 2 && msg[1].flags == I2C_M_RD && msg[1].len == 1)
221 return sun8i_rsb_read(priv->base, runtime_addr,
222 msg[0].buf[0], &msg[1].buf[0]);
224 if (nmsgs == 1 && msg[0].len == 2)
225 return sun8i_rsb_write(priv->base, runtime_addr,
226 msg[0].buf[0], msg[0].buf[1]);
231 static int sun8i_rsb_probe_chip(struct udevice *bus, uint chip_addr,
234 int runtime_addr = sun8i_rsb_get_runtime_address(chip_addr);
235 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
237 if (runtime_addr < 0)
240 return sun8i_rsb_set_device_address(priv->base, chip_addr, runtime_addr);
243 static int sun8i_rsb_probe(struct udevice *bus)
245 struct sun8i_rsb_priv *priv = dev_get_priv(bus);
247 priv->base = dev_read_addr_ptr(bus);
249 return sun8i_rsb_init(priv->base);
252 static int sun8i_rsb_child_pre_probe(struct udevice *child)
254 struct dm_i2c_chip *chip = dev_get_parent_plat(child);
256 /* Ensure each transfer is for a single register. */
257 chip->flags |= DM_I2C_CHIP_RD_ADDRESS | DM_I2C_CHIP_WR_ADDRESS;
262 static const struct dm_i2c_ops sun8i_rsb_ops = {
263 .xfer = sun8i_rsb_xfer,
264 .probe_chip = sun8i_rsb_probe_chip,
267 static const struct udevice_id sun8i_rsb_ids[] = {
268 { .compatible = "allwinner,sun8i-a23-rsb" },
272 U_BOOT_DRIVER(sun8i_rsb) = {
275 .of_match = sun8i_rsb_ids,
276 .probe = sun8i_rsb_probe,
277 .child_pre_probe = sun8i_rsb_child_pre_probe,
278 .priv_auto = sizeof(struct sun8i_rsb_priv),
279 .ops = &sun8i_rsb_ops,
281 #endif /* CONFIG_IS_ENABLED(DM_I2C) */