drivers/i2c/soft_i2c.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2009
   4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   5  * Changes for multibus/multiadapter I2C support.
   6  *
   7  * (C) Copyright 2001, 2002
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  11  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
  12  * Neil Russell.
  13  *
  14  * NOTE: This driver should be converted to driver model before June 2017.
  15  * Please see doc/driver-model/i2c-howto.rst for instructions.
  16  */
  17
  18 #include <config.h>
  19 #if defined(CONFIG_AT91FAMILY)
  20 #include <asm/io.h>
  21 #include <asm/arch/hardware.h>
  22 #include <asm/arch/at91_pio.h>
  23 #ifdef CONFIG_ATMEL_LEGACY
  24 #include <asm/arch/gpio.h>
  25 #endif
  26 #endif
  27 #include <i2c.h>
  28 #include <asm/global_data.h>
  29 #include <linux/delay.h>
  30
  31 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
  32 # include <asm/gpio.h>
  33
  34 # ifndef I2C_GPIO_SYNC
  35 #  define I2C_GPIO_SYNC
  36 # endif
  37
  38 # ifndef I2C_INIT
  39 #  define I2C_INIT \
  40         do { \
  41                 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
  42                 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
  43         } while (0)
  44 # endif
  45
  46 # ifndef I2C_ACTIVE
  47 #  define I2C_ACTIVE do { } while (0)
  48 # endif
  49
  50 # ifndef I2C_TRISTATE
  51 #  define I2C_TRISTATE do { } while (0)
  52 # endif
  53
  54 # ifndef I2C_READ
  55 #  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
  56 # endif
  57
  58 # ifndef I2C_SDA
  59 #  define I2C_SDA(bit) \
  60         do { \
  61                 if (bit) \
  62                         gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
  63                 else \
  64                         gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
  65                 I2C_GPIO_SYNC; \
  66         } while (0)
  67 # endif
  68
  69 # ifndef I2C_SCL
  70 #  define I2C_SCL(bit) \
  71         do { \
  72                 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
  73                 I2C_GPIO_SYNC; \
  74         } while (0)
  75 # endif
  76
  77 # ifndef I2C_DELAY
  78 #  define I2C_DELAY udelay(5)   /* 1/4 I2C clock duration */
  79 # endif
  80
  81 #endif
  82
  83 /* #define      DEBUG_I2C       */
  84
  85 DECLARE_GLOBAL_DATA_PTR;
  86
  87 #ifndef I2C_SOFT_DECLARATIONS
  88 #  define I2C_SOFT_DECLARATIONS
  89 #endif
  90
  91 /*-----------------------------------------------------------------------
  92  * Definitions
  93  */
  94 #define RETRIES         0
  95
  96 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
  97 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
  98
  99 #ifdef DEBUG_I2C
 100 #define PRINTD(fmt,args...)     do {    \
 101                 printf (fmt ,##args);   \
 102         } while (0)
 103 #else
 104 #define PRINTD(fmt,args...)
 105 #endif
 106
 107 /*-----------------------------------------------------------------------
 108  * Local functions
 109  */
 110 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
 111 static void  send_reset (void);
 112 #endif
 113 static void  send_start (void);
 114 static void  send_stop  (void);
 115 static void  send_ack   (int);
 116 static int   write_byte (uchar byte);
 117 static uchar read_byte  (int);
 118
 119 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
 120 /*-----------------------------------------------------------------------
 121  * Send a reset sequence consisting of 9 clocks with the data signal high
 122  * to clock any confused device back into an idle state.  Also send a
 123  * <stop> at the end of the sequence for belts & suspenders.
 124  */
 125 static void send_reset(void)
 126 {
 127         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 128         int j;
 129
 130         I2C_SCL(1);
 131         I2C_SDA(1);
 132 #ifdef  I2C_INIT
 133         I2C_INIT;
 134 #endif
 135         I2C_TRISTATE;
 136         for(j = 0; j < 9; j++) {
 137                 I2C_SCL(0);
 138                 I2C_DELAY;
 139                 I2C_DELAY;
 140                 I2C_SCL(1);
 141                 I2C_DELAY;
 142                 I2C_DELAY;
 143         }
 144         send_stop();
 145         I2C_TRISTATE;
 146 }
 147 #endif
 148
 149 /*-----------------------------------------------------------------------
 150  * START: High -> Low on SDA while SCL is High
 151  */
 152 static void send_start(void)
 153 {
 154         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 155
 156         I2C_DELAY;
 157         I2C_SDA(1);
 158         I2C_ACTIVE;
 159         I2C_DELAY;
 160         I2C_SCL(1);
 161         I2C_DELAY;
 162         I2C_SDA(0);
 163         I2C_DELAY;
 164 }
 165
 166 /*-----------------------------------------------------------------------
 167  * STOP: Low -> High on SDA while SCL is High
 168  */
 169 static void send_stop(void)
 170 {
 171         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 172
 173         I2C_SCL(0);
 174         I2C_DELAY;
 175         I2C_SDA(0);
 176         I2C_ACTIVE;
 177         I2C_DELAY;
 178         I2C_SCL(1);
 179         I2C_DELAY;
 180         I2C_SDA(1);
 181         I2C_DELAY;
 182         I2C_TRISTATE;
 183 }
 184
 185 /*-----------------------------------------------------------------------
 186  * ack should be I2C_ACK or I2C_NOACK
 187  */
 188 static void send_ack(int ack)
 189 {
 190         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 191
 192         I2C_SCL(0);
 193         I2C_DELAY;
 194         I2C_ACTIVE;
 195         I2C_SDA(ack);
 196         I2C_DELAY;
 197         I2C_SCL(1);
 198         I2C_DELAY;
 199         I2C_DELAY;
 200         I2C_SCL(0);
 201         I2C_DELAY;
 202 }
 203
 204 /*-----------------------------------------------------------------------
 205  * Send 8 bits and look for an acknowledgement.
 206  */
 207 static int write_byte(uchar data)
 208 {
 209         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 210         int j;
 211         int nack;
 212
 213         I2C_ACTIVE;
 214         for(j = 0; j < 8; j++) {
 215                 I2C_SCL(0);
 216                 I2C_DELAY;
 217                 I2C_SDA(data & 0x80);
 218                 I2C_DELAY;
 219                 I2C_SCL(1);
 220                 I2C_DELAY;
 221                 I2C_DELAY;
 222
 223                 data <<= 1;
 224         }
 225
 226         /*
 227          * Look for an <ACK>(negative logic) and return it.
 228          */
 229         I2C_SCL(0);
 230         I2C_DELAY;
 231         I2C_SDA(1);
 232         I2C_TRISTATE;
 233         I2C_DELAY;
 234         I2C_SCL(1);
 235         I2C_DELAY;
 236         I2C_DELAY;
 237         nack = I2C_READ;
 238         I2C_SCL(0);
 239         I2C_DELAY;
 240         I2C_ACTIVE;
 241
 242         return(nack);   /* not a nack is an ack */
 243 }
 244
 245 /*-----------------------------------------------------------------------
 246  * if ack == I2C_ACK, ACK the byte so can continue reading, else
 247  * send I2C_NOACK to end the read.
 248  */
 249 static uchar read_byte(int ack)
 250 {
 251         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
 252         int  data;
 253         int  j;
 254
 255         /*
 256          * Read 8 bits, MSB first.
 257          */
 258         I2C_TRISTATE;
 259         I2C_SDA(1);
 260         data = 0;
 261         for(j = 0; j < 8; j++) {
 262                 I2C_SCL(0);
 263                 I2C_DELAY;
 264                 I2C_SCL(1);
 265                 I2C_DELAY;
 266                 data <<= 1;
 267                 data |= I2C_READ;
 268                 I2C_DELAY;
 269         }
 270         send_ack(ack);
 271
 272         return(data);
 273 }
 274
 275 /*-----------------------------------------------------------------------
 276  * Initialization
 277  */
 278 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 279 {
 280 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
 281         /* call board specific i2c bus reset routine before accessing the   */
 282         /* environment, which might be in a chip on that bus. For details   */
 283         /* about this problem see doc/I2C_Edge_Conditions.                  */
 284         i2c_init_board();
 285 #else
 286         /*
 287          * WARNING: Do NOT save speed in a static variable: if the
 288          * I2C routines are called before RAM is initialized (to read
 289          * the DIMM SPD, for instance), RAM won't be usable and your
 290          * system will crash.
 291          */
 292         send_reset ();
 293 #endif
 294 }
 295
 296 /*-----------------------------------------------------------------------
 297  * Probe to see if a chip is present.  Also good for checking for the
 298  * completion of EEPROM writes since the chip stops responding until
 299  * the write completes (typically 10mSec).
 300  */
 301 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
 302 {
 303         int rc;
 304
 305         /*
 306          * perform 1 byte write transaction with just address byte
 307          * (fake write)
 308          */
 309         send_start();
 310         rc = write_byte ((addr << 1) | 0);
 311         send_stop();
 312
 313         return (rc ? 1 : 0);
 314 }
 315
 316 /*-----------------------------------------------------------------------
 317  * Read bytes
 318  */
 319 static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
 320                         int alen, uchar *buffer, int len)
 321 {
 322         int shift;
 323         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
 324                 chip, addr, alen, buffer, len);
 325
 326 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
 327         /*
 328          * EEPROM chips that implement "address overflow" are ones
 329          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
 330          * address and the extra bits end up in the "chip address"
 331          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
 332          * four 256 byte chips.
 333          *
 334          * Note that we consider the length of the address field to
 335          * still be one byte because the extra address bits are
 336          * hidden in the chip address.
 337          */
 338         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
 339
 340         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
 341                 chip, addr);
 342 #endif
 343
 344         /*
 345          * Do the addressing portion of a write cycle to set the
 346          * chip's address pointer.  If the address length is zero,
 347          * don't do the normal write cycle to set the address pointer,
 348          * there is no address pointer in this chip.
 349          */
 350         send_start();
 351         if(alen > 0) {
 352                 if(write_byte(chip << 1)) {     /* write cycle */
 353                         send_stop();
 354                         PRINTD("i2c_read, no chip responded %02X\n", chip);
 355                         return(1);
 356                 }
 357                 shift = (alen-1) * 8;
 358                 while(alen-- > 0) {
 359                         if(write_byte(addr >> shift)) {
 360                                 PRINTD("i2c_read, address not <ACK>ed\n");
 361                                 return(1);
 362                         }
 363                         shift -= 8;
 364                 }
 365
 366                 /* Some I2C chips need a stop/start sequence here,
 367                  * other chips don't work with a full stop and need
 368                  * only a start.  Default behaviour is to send the
 369                  * stop/start sequence.
 370                  */
 371 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
 372                 send_start();
 373 #else
 374                 send_stop();
 375                 send_start();
 376 #endif
 377         }
 378         /*
 379          * Send the chip address again, this time for a read cycle.
 380          * Then read the data.  On the last byte, we do a NACK instead
 381          * of an ACK(len == 0) to terminate the read.
 382          */
 383         write_byte((chip << 1) | 1);    /* read cycle */
 384         while(len-- > 0) {
 385                 *buffer++ = read_byte(len == 0);
 386         }
 387         send_stop();
 388         return(0);
 389 }
 390
 391 /*-----------------------------------------------------------------------
 392  * Write bytes
 393  */
 394 static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
 395                         int alen, uchar *buffer, int len)
 396 {
 397         int shift, failures = 0;
 398
 399         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
 400                 chip, addr, alen, buffer, len);
 401
 402         send_start();
 403         if(write_byte(chip << 1)) {     /* write cycle */
 404                 send_stop();
 405                 PRINTD("i2c_write, no chip responded %02X\n", chip);
 406                 return(1);
 407         }
 408         shift = (alen-1) * 8;
 409         while(alen-- > 0) {
 410                 if(write_byte(addr >> shift)) {
 411                         PRINTD("i2c_write, address not <ACK>ed\n");
 412                         return(1);
 413                 }
 414                 shift -= 8;
 415         }
 416
 417         while(len-- > 0) {
 418                 if(write_byte(*buffer++)) {
 419                         failures++;
 420                 }
 421         }
 422         send_stop();
 423         return(failures);
 424 }
 425
 426 /*
 427  * Register soft i2c adapters
 428  */
 429 U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
 430                          soft_i2c_read, soft_i2c_write, NULL,
 431                          CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
 432                          0)