Merge branch 'master' of git://git.denx.de/u-boot-sunxi
[platform/kernel/u-boot.git] / drivers / i2c / soft_i2c.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2009
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  * Changes for multibus/multiadapter I2C support.
6  *
7  * (C) Copyright 2001, 2002
8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9  *
10  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
11  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
12  * Neil Russell.
13  *
14  * NOTE: This driver should be converted to driver model before June 2017.
15  * Please see doc/driver-model/i2c-howto.txt for instructions.
16  */
17
18 #include <common.h>
19 #if defined(CONFIG_AT91FAMILY)
20 #include <asm/io.h>
21 #include <asm/arch/hardware.h>
22 #include <asm/arch/at91_pio.h>
23 #ifdef CONFIG_ATMEL_LEGACY
24 #include <asm/arch/gpio.h>
25 #endif
26 #endif
27 #include <i2c.h>
28
29 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
30 # include <asm/gpio.h>
31
32 # ifndef I2C_GPIO_SYNC
33 #  define I2C_GPIO_SYNC
34 # endif
35
36 # ifndef I2C_INIT
37 #  define I2C_INIT \
38         do { \
39                 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
40                 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
41         } while (0)
42 # endif
43
44 # ifndef I2C_ACTIVE
45 #  define I2C_ACTIVE do { } while (0)
46 # endif
47
48 # ifndef I2C_TRISTATE
49 #  define I2C_TRISTATE do { } while (0)
50 # endif
51
52 # ifndef I2C_READ
53 #  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
54 # endif
55
56 # ifndef I2C_SDA
57 #  define I2C_SDA(bit) \
58         do { \
59                 if (bit) \
60                         gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
61                 else \
62                         gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
63                 I2C_GPIO_SYNC; \
64         } while (0)
65 # endif
66
67 # ifndef I2C_SCL
68 #  define I2C_SCL(bit) \
69         do { \
70                 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
71                 I2C_GPIO_SYNC; \
72         } while (0)
73 # endif
74
75 # ifndef I2C_DELAY
76 #  define I2C_DELAY udelay(5)   /* 1/4 I2C clock duration */
77 # endif
78
79 #endif
80
81 /* #define      DEBUG_I2C       */
82
83 DECLARE_GLOBAL_DATA_PTR;
84
85 #ifndef I2C_SOFT_DECLARATIONS
86 #  define I2C_SOFT_DECLARATIONS
87 #endif
88
89 #if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
90 #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
91 #endif
92 #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
93 #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
94 #endif
95
96 /*-----------------------------------------------------------------------
97  * Definitions
98  */
99 #define RETRIES         0
100
101 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
102 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
103
104
105 #ifdef DEBUG_I2C
106 #define PRINTD(fmt,args...)     do {    \
107                 printf (fmt ,##args);   \
108         } while (0)
109 #else
110 #define PRINTD(fmt,args...)
111 #endif
112
113 /*-----------------------------------------------------------------------
114  * Local functions
115  */
116 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
117 static void  send_reset (void);
118 #endif
119 static void  send_start (void);
120 static void  send_stop  (void);
121 static void  send_ack   (int);
122 static int   write_byte (uchar byte);
123 static uchar read_byte  (int);
124
125 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
126 /*-----------------------------------------------------------------------
127  * Send a reset sequence consisting of 9 clocks with the data signal high
128  * to clock any confused device back into an idle state.  Also send a
129  * <stop> at the end of the sequence for belts & suspenders.
130  */
131 static void send_reset(void)
132 {
133         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
134         int j;
135
136         I2C_SCL(1);
137         I2C_SDA(1);
138 #ifdef  I2C_INIT
139         I2C_INIT;
140 #endif
141         I2C_TRISTATE;
142         for(j = 0; j < 9; j++) {
143                 I2C_SCL(0);
144                 I2C_DELAY;
145                 I2C_DELAY;
146                 I2C_SCL(1);
147                 I2C_DELAY;
148                 I2C_DELAY;
149         }
150         send_stop();
151         I2C_TRISTATE;
152 }
153 #endif
154
155 /*-----------------------------------------------------------------------
156  * START: High -> Low on SDA while SCL is High
157  */
158 static void send_start(void)
159 {
160         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
161
162         I2C_DELAY;
163         I2C_SDA(1);
164         I2C_ACTIVE;
165         I2C_DELAY;
166         I2C_SCL(1);
167         I2C_DELAY;
168         I2C_SDA(0);
169         I2C_DELAY;
170 }
171
172 /*-----------------------------------------------------------------------
173  * STOP: Low -> High on SDA while SCL is High
174  */
175 static void send_stop(void)
176 {
177         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
178
179         I2C_SCL(0);
180         I2C_DELAY;
181         I2C_SDA(0);
182         I2C_ACTIVE;
183         I2C_DELAY;
184         I2C_SCL(1);
185         I2C_DELAY;
186         I2C_SDA(1);
187         I2C_DELAY;
188         I2C_TRISTATE;
189 }
190
191 /*-----------------------------------------------------------------------
192  * ack should be I2C_ACK or I2C_NOACK
193  */
194 static void send_ack(int ack)
195 {
196         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
197
198         I2C_SCL(0);
199         I2C_DELAY;
200         I2C_ACTIVE;
201         I2C_SDA(ack);
202         I2C_DELAY;
203         I2C_SCL(1);
204         I2C_DELAY;
205         I2C_DELAY;
206         I2C_SCL(0);
207         I2C_DELAY;
208 }
209
210 /*-----------------------------------------------------------------------
211  * Send 8 bits and look for an acknowledgement.
212  */
213 static int write_byte(uchar data)
214 {
215         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
216         int j;
217         int nack;
218
219         I2C_ACTIVE;
220         for(j = 0; j < 8; j++) {
221                 I2C_SCL(0);
222                 I2C_DELAY;
223                 I2C_SDA(data & 0x80);
224                 I2C_DELAY;
225                 I2C_SCL(1);
226                 I2C_DELAY;
227                 I2C_DELAY;
228
229                 data <<= 1;
230         }
231
232         /*
233          * Look for an <ACK>(negative logic) and return it.
234          */
235         I2C_SCL(0);
236         I2C_DELAY;
237         I2C_SDA(1);
238         I2C_TRISTATE;
239         I2C_DELAY;
240         I2C_SCL(1);
241         I2C_DELAY;
242         I2C_DELAY;
243         nack = I2C_READ;
244         I2C_SCL(0);
245         I2C_DELAY;
246         I2C_ACTIVE;
247
248         return(nack);   /* not a nack is an ack */
249 }
250
251 /*-----------------------------------------------------------------------
252  * if ack == I2C_ACK, ACK the byte so can continue reading, else
253  * send I2C_NOACK to end the read.
254  */
255 static uchar read_byte(int ack)
256 {
257         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
258         int  data;
259         int  j;
260
261         /*
262          * Read 8 bits, MSB first.
263          */
264         I2C_TRISTATE;
265         I2C_SDA(1);
266         data = 0;
267         for(j = 0; j < 8; j++) {
268                 I2C_SCL(0);
269                 I2C_DELAY;
270                 I2C_SCL(1);
271                 I2C_DELAY;
272                 data <<= 1;
273                 data |= I2C_READ;
274                 I2C_DELAY;
275         }
276         send_ack(ack);
277
278         return(data);
279 }
280
281 /*-----------------------------------------------------------------------
282  * Initialization
283  */
284 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
285 {
286 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
287         /* call board specific i2c bus reset routine before accessing the   */
288         /* environment, which might be in a chip on that bus. For details   */
289         /* about this problem see doc/I2C_Edge_Conditions.                  */
290         i2c_init_board();
291 #else
292         /*
293          * WARNING: Do NOT save speed in a static variable: if the
294          * I2C routines are called before RAM is initialized (to read
295          * the DIMM SPD, for instance), RAM won't be usable and your
296          * system will crash.
297          */
298         send_reset ();
299 #endif
300 }
301
302 /*-----------------------------------------------------------------------
303  * Probe to see if a chip is present.  Also good for checking for the
304  * completion of EEPROM writes since the chip stops responding until
305  * the write completes (typically 10mSec).
306  */
307 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
308 {
309         int rc;
310
311         /*
312          * perform 1 byte write transaction with just address byte
313          * (fake write)
314          */
315         send_start();
316         rc = write_byte ((addr << 1) | 0);
317         send_stop();
318
319         return (rc ? 1 : 0);
320 }
321
322 /*-----------------------------------------------------------------------
323  * Read bytes
324  */
325 static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
326                         int alen, uchar *buffer, int len)
327 {
328         int shift;
329         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
330                 chip, addr, alen, buffer, len);
331
332 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
333         /*
334          * EEPROM chips that implement "address overflow" are ones
335          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
336          * address and the extra bits end up in the "chip address"
337          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
338          * four 256 byte chips.
339          *
340          * Note that we consider the length of the address field to
341          * still be one byte because the extra address bits are
342          * hidden in the chip address.
343          */
344         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
345
346         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
347                 chip, addr);
348 #endif
349
350         /*
351          * Do the addressing portion of a write cycle to set the
352          * chip's address pointer.  If the address length is zero,
353          * don't do the normal write cycle to set the address pointer,
354          * there is no address pointer in this chip.
355          */
356         send_start();
357         if(alen > 0) {
358                 if(write_byte(chip << 1)) {     /* write cycle */
359                         send_stop();
360                         PRINTD("i2c_read, no chip responded %02X\n", chip);
361                         return(1);
362                 }
363                 shift = (alen-1) * 8;
364                 while(alen-- > 0) {
365                         if(write_byte(addr >> shift)) {
366                                 PRINTD("i2c_read, address not <ACK>ed\n");
367                                 return(1);
368                         }
369                         shift -= 8;
370                 }
371
372                 /* Some I2C chips need a stop/start sequence here,
373                  * other chips don't work with a full stop and need
374                  * only a start.  Default behaviour is to send the
375                  * stop/start sequence.
376                  */
377 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
378                 send_start();
379 #else
380                 send_stop();
381                 send_start();
382 #endif
383         }
384         /*
385          * Send the chip address again, this time for a read cycle.
386          * Then read the data.  On the last byte, we do a NACK instead
387          * of an ACK(len == 0) to terminate the read.
388          */
389         write_byte((chip << 1) | 1);    /* read cycle */
390         while(len-- > 0) {
391                 *buffer++ = read_byte(len == 0);
392         }
393         send_stop();
394         return(0);
395 }
396
397 /*-----------------------------------------------------------------------
398  * Write bytes
399  */
400 static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
401                         int alen, uchar *buffer, int len)
402 {
403         int shift, failures = 0;
404
405         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
406                 chip, addr, alen, buffer, len);
407
408         send_start();
409         if(write_byte(chip << 1)) {     /* write cycle */
410                 send_stop();
411                 PRINTD("i2c_write, no chip responded %02X\n", chip);
412                 return(1);
413         }
414         shift = (alen-1) * 8;
415         while(alen-- > 0) {
416                 if(write_byte(addr >> shift)) {
417                         PRINTD("i2c_write, address not <ACK>ed\n");
418                         return(1);
419                 }
420                 shift -= 8;
421         }
422
423         while(len-- > 0) {
424                 if(write_byte(*buffer++)) {
425                         failures++;
426                 }
427         }
428         send_stop();
429         return(failures);
430 }
431
432 /*
433  * Register soft i2c adapters
434  */
435 U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
436                          soft_i2c_read, soft_i2c_write, NULL,
437                          CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
438                          0)
439 #if defined(I2C_SOFT_DECLARATIONS2)
440 U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
441                          soft_i2c_read, soft_i2c_write, NULL,
442                          CONFIG_SYS_I2C_SOFT_SPEED_2,
443                          CONFIG_SYS_I2C_SOFT_SLAVE_2,
444                          1)
445 #endif
446 #if defined(I2C_SOFT_DECLARATIONS3)
447 U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
448                          soft_i2c_read, soft_i2c_write, NULL,
449                          CONFIG_SYS_I2C_SOFT_SPEED_3,
450                          CONFIG_SYS_I2C_SOFT_SLAVE_3,
451                          2)
452 #endif
453 #if defined(I2C_SOFT_DECLARATIONS4)
454 U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
455                          soft_i2c_read, soft_i2c_write, NULL,
456                          CONFIG_SYS_I2C_SOFT_SPEED_4,
457                          CONFIG_SYS_I2C_SOFT_SLAVE_4,
458                          3)
459 #endif
460 #if defined(I2C_SOFT_DECLARATIONS5)
461 U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
462                          soft_i2c_read, soft_i2c_write, NULL,
463                          CONFIG_SYS_I2C_SOFT_SPEED_5,
464                          CONFIG_SYS_I2C_SOFT_SLAVE_5,
465                          4)
466 #endif
467 #if defined(I2C_SOFT_DECLARATIONS6)
468 U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
469                          soft_i2c_read, soft_i2c_write, NULL,
470                          CONFIG_SYS_I2C_SOFT_SPEED_6,
471                          CONFIG_SYS_I2C_SOFT_SLAVE_6,
472                          5)
473 #endif
474 #if defined(I2C_SOFT_DECLARATIONS7)
475 U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
476                          soft_i2c_read, soft_i2c_write, NULL,
477                          CONFIG_SYS_I2C_SOFT_SPEED_7,
478                          CONFIG_SYS_I2C_SOFT_SLAVE_7,
479                          6)
480 #endif
481 #if defined(I2C_SOFT_DECLARATIONS8)
482 U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
483                          soft_i2c_read, soft_i2c_write, NULL,
484                          CONFIG_SYS_I2C_SOFT_SPEED_8,
485                          CONFIG_SYS_I2C_SOFT_SLAVE_8,
486                          7)
487 #endif
488 #if defined(I2C_SOFT_DECLARATIONS9)
489 U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
490                          soft_i2c_read, soft_i2c_write, NULL,
491                          CONFIG_SYS_I2C_SOFT_SPEED_9,
492                          CONFIG_SYS_I2C_SOFT_SLAVE_9,
493                          8)
494 #endif
495 #if defined(I2C_SOFT_DECLARATIONS10)
496 U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
497                          soft_i2c_read, soft_i2c_write, NULL,
498                          CONFIG_SYS_I2C_SOFT_SPEED_10,
499                          CONFIG_SYS_I2C_SOFT_SLAVE_10,
500                          9)
501 #endif
502 #if defined(I2C_SOFT_DECLARATIONS11)
503 U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
504                          soft_i2c_read, soft_i2c_write, NULL,
505                          CONFIG_SYS_I2C_SOFT_SPEED_11,
506                          CONFIG_SYS_I2C_SOFT_SLAVE_11,
507                          10)
508 #endif
509 #if defined(I2C_SOFT_DECLARATIONS12)
510 U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
511                          soft_i2c_read, soft_i2c_write, NULL,
512                          CONFIG_SYS_I2C_SOFT_SPEED_12,
513                          CONFIG_SYS_I2C_SOFT_SLAVE_12,
514                          11)
515 #endif