3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 * Changes for multibus/multiadapter I2C support.
6 * (C) Copyright 2001, 2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * SPDX-License-Identifier: GPL-2.0+
11 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
12 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
15 * NOTE: This driver should be converted to driver model before June 2017.
16 * Please see doc/driver-model/i2c-howto.txt for instructions.
20 #if defined(CONFIG_AT91FAMILY)
22 #include <asm/arch/hardware.h>
23 #include <asm/arch/at91_pio.h>
24 #ifdef CONFIG_ATMEL_LEGACY
25 #include <asm/arch/gpio.h>
28 #if defined(CONFIG_8xx)
33 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
34 # include <asm/gpio.h>
36 # ifndef I2C_GPIO_SYNC
37 # define I2C_GPIO_SYNC
43 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
44 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
49 # define I2C_ACTIVE do { } while (0)
53 # define I2C_TRISTATE do { } while (0)
57 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
61 # define I2C_SDA(bit) \
64 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
66 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
72 # define I2C_SCL(bit) \
74 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
80 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
85 /* #define DEBUG_I2C */
87 DECLARE_GLOBAL_DATA_PTR;
89 #ifndef I2C_SOFT_DECLARATIONS
90 # define I2C_SOFT_DECLARATIONS
93 #if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
94 #define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
96 #if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
97 #define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
100 /*-----------------------------------------------------------------------
105 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
106 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
110 #define PRINTD(fmt,args...) do { \
111 printf (fmt ,##args); \
114 #define PRINTD(fmt,args...)
117 /*-----------------------------------------------------------------------
120 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
121 static void send_reset (void);
123 static void send_start (void);
124 static void send_stop (void);
125 static void send_ack (int);
126 static int write_byte (uchar byte);
127 static uchar read_byte (int);
129 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
130 /*-----------------------------------------------------------------------
131 * Send a reset sequence consisting of 9 clocks with the data signal high
132 * to clock any confused device back into an idle state. Also send a
133 * <stop> at the end of the sequence for belts & suspenders.
135 static void send_reset(void)
137 I2C_SOFT_DECLARATIONS /* intentional without ';' */
146 for(j = 0; j < 9; j++) {
159 /*-----------------------------------------------------------------------
160 * START: High -> Low on SDA while SCL is High
162 static void send_start(void)
164 I2C_SOFT_DECLARATIONS /* intentional without ';' */
176 /*-----------------------------------------------------------------------
177 * STOP: Low -> High on SDA while SCL is High
179 static void send_stop(void)
181 I2C_SOFT_DECLARATIONS /* intentional without ';' */
195 /*-----------------------------------------------------------------------
196 * ack should be I2C_ACK or I2C_NOACK
198 static void send_ack(int ack)
200 I2C_SOFT_DECLARATIONS /* intentional without ';' */
214 /*-----------------------------------------------------------------------
215 * Send 8 bits and look for an acknowledgement.
217 static int write_byte(uchar data)
219 I2C_SOFT_DECLARATIONS /* intentional without ';' */
224 for(j = 0; j < 8; j++) {
227 I2C_SDA(data & 0x80);
237 * Look for an <ACK>(negative logic) and return it.
252 return(nack); /* not a nack is an ack */
255 /*-----------------------------------------------------------------------
256 * if ack == I2C_ACK, ACK the byte so can continue reading, else
257 * send I2C_NOACK to end the read.
259 static uchar read_byte(int ack)
261 I2C_SOFT_DECLARATIONS /* intentional without ';' */
266 * Read 8 bits, MSB first.
271 for(j = 0; j < 8; j++) {
285 /*-----------------------------------------------------------------------
288 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
290 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
291 /* call board specific i2c bus reset routine before accessing the */
292 /* environment, which might be in a chip on that bus. For details */
293 /* about this problem see doc/I2C_Edge_Conditions. */
297 * WARNING: Do NOT save speed in a static variable: if the
298 * I2C routines are called before RAM is initialized (to read
299 * the DIMM SPD, for instance), RAM won't be usable and your
306 /*-----------------------------------------------------------------------
307 * Probe to see if a chip is present. Also good for checking for the
308 * completion of EEPROM writes since the chip stops responding until
309 * the write completes (typically 10mSec).
311 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
316 * perform 1 byte write transaction with just address byte
320 rc = write_byte ((addr << 1) | 0);
326 /*-----------------------------------------------------------------------
329 static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
330 int alen, uchar *buffer, int len)
333 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
334 chip, addr, alen, buffer, len);
336 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
338 * EEPROM chips that implement "address overflow" are ones
339 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
340 * address and the extra bits end up in the "chip address"
341 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
342 * four 256 byte chips.
344 * Note that we consider the length of the address field to
345 * still be one byte because the extra address bits are
346 * hidden in the chip address.
348 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
350 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
355 * Do the addressing portion of a write cycle to set the
356 * chip's address pointer. If the address length is zero,
357 * don't do the normal write cycle to set the address pointer,
358 * there is no address pointer in this chip.
362 if(write_byte(chip << 1)) { /* write cycle */
364 PRINTD("i2c_read, no chip responded %02X\n", chip);
367 shift = (alen-1) * 8;
369 if(write_byte(addr >> shift)) {
370 PRINTD("i2c_read, address not <ACK>ed\n");
376 /* Some I2C chips need a stop/start sequence here,
377 * other chips don't work with a full stop and need
378 * only a start. Default behaviour is to send the
379 * stop/start sequence.
381 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
389 * Send the chip address again, this time for a read cycle.
390 * Then read the data. On the last byte, we do a NACK instead
391 * of an ACK(len == 0) to terminate the read.
393 write_byte((chip << 1) | 1); /* read cycle */
395 *buffer++ = read_byte(len == 0);
401 /*-----------------------------------------------------------------------
404 static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
405 int alen, uchar *buffer, int len)
407 int shift, failures = 0;
409 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
410 chip, addr, alen, buffer, len);
413 if(write_byte(chip << 1)) { /* write cycle */
415 PRINTD("i2c_write, no chip responded %02X\n", chip);
418 shift = (alen-1) * 8;
420 if(write_byte(addr >> shift)) {
421 PRINTD("i2c_write, address not <ACK>ed\n");
428 if(write_byte(*buffer++)) {
437 * Register soft i2c adapters
439 U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
440 soft_i2c_read, soft_i2c_write, NULL,
441 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
443 #if defined(I2C_SOFT_DECLARATIONS2)
444 U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
445 soft_i2c_read, soft_i2c_write, NULL,
446 CONFIG_SYS_I2C_SOFT_SPEED_2,
447 CONFIG_SYS_I2C_SOFT_SLAVE_2,
450 #if defined(I2C_SOFT_DECLARATIONS3)
451 U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
452 soft_i2c_read, soft_i2c_write, NULL,
453 CONFIG_SYS_I2C_SOFT_SPEED_3,
454 CONFIG_SYS_I2C_SOFT_SLAVE_3,
457 #if defined(I2C_SOFT_DECLARATIONS4)
458 U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
459 soft_i2c_read, soft_i2c_write, NULL,
460 CONFIG_SYS_I2C_SOFT_SPEED_4,
461 CONFIG_SYS_I2C_SOFT_SLAVE_4,
464 #if defined(I2C_SOFT_DECLARATIONS5)
465 U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
466 soft_i2c_read, soft_i2c_write, NULL,
467 CONFIG_SYS_I2C_SOFT_SPEED_5,
468 CONFIG_SYS_I2C_SOFT_SLAVE_5,
471 #if defined(I2C_SOFT_DECLARATIONS6)
472 U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
473 soft_i2c_read, soft_i2c_write, NULL,
474 CONFIG_SYS_I2C_SOFT_SPEED_6,
475 CONFIG_SYS_I2C_SOFT_SLAVE_6,
478 #if defined(I2C_SOFT_DECLARATIONS7)
479 U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
480 soft_i2c_read, soft_i2c_write, NULL,
481 CONFIG_SYS_I2C_SOFT_SPEED_7,
482 CONFIG_SYS_I2C_SOFT_SLAVE_7,
485 #if defined(I2C_SOFT_DECLARATIONS8)
486 U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
487 soft_i2c_read, soft_i2c_write, NULL,
488 CONFIG_SYS_I2C_SOFT_SPEED_8,
489 CONFIG_SYS_I2C_SOFT_SLAVE_8,
492 #if defined(I2C_SOFT_DECLARATIONS9)
493 U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
494 soft_i2c_read, soft_i2c_write, NULL,
495 CONFIG_SYS_I2C_SOFT_SPEED_9,
496 CONFIG_SYS_I2C_SOFT_SLAVE_9,
499 #if defined(I2C_SOFT_DECLARATIONS10)
500 U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
501 soft_i2c_read, soft_i2c_write, NULL,
502 CONFIG_SYS_I2C_SOFT_SPEED_10,
503 CONFIG_SYS_I2C_SOFT_SLAVE_10,
506 #if defined(I2C_SOFT_DECLARATIONS11)
507 U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
508 soft_i2c_read, soft_i2c_write, NULL,
509 CONFIG_SYS_I2C_SOFT_SPEED_11,
510 CONFIG_SYS_I2C_SOFT_SLAVE_11,
513 #if defined(I2C_SOFT_DECLARATIONS12)
514 U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
515 soft_i2c_read, soft_i2c_write, NULL,
516 CONFIG_SYS_I2C_SOFT_SPEED_12,
517 CONFIG_SYS_I2C_SOFT_SLAVE_12,