2 * (C) Copyright 2015 Google, Inc
4 * (C) Copyright 2008-2014 Rockchip Electronics
5 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
7 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/clock.h>
17 #include <asm/arch/i2c.h>
18 #include <asm/arch/periph.h>
19 #include <dm/pinctrl.h>
20 #include <linux/sizes.h>
22 DECLARE_GLOBAL_DATA_PTR;
25 #define I2C_TIMEOUT_MS 100
26 #define I2C_RETRY_COUNT 3
28 /* rk i2c fifo max transfer bytes */
29 #define RK_I2C_FIFO_SIZE 32
33 struct i2c_regs *regs;
37 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
43 *divh = DIV_ROUND_UP(div, 2);
47 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
48 * SCL = PCLK / SCLK Divisor
51 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
56 /* First get i2c rate from pclk */
57 i2c_rate = clk_get_rate(&i2c->clk);
59 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
63 rk_i2c_get_div(div, &divh, &divl);
64 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
66 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
68 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
69 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
72 static void rk_i2c_show_regs(struct i2c_regs *regs)
77 debug("i2c_con: 0x%08x\n", readl(®s->con));
78 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv));
79 debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr));
80 debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr));
81 debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt));
82 debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt));
83 debug("i2c_ien: 0x%08x\n", readl(®s->ien));
84 debug("i2c_ipd: 0x%08x\n", readl(®s->ipd));
85 debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt));
86 for (i = 0; i < 8; i++)
87 debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i]));
88 for (i = 0; i < 8; i++)
89 debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i]));
93 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
95 struct i2c_regs *regs = i2c->regs;
98 debug("I2c Send Start bit.\n");
99 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
101 writel(I2C_CON_EN | I2C_CON_START, ®s->con);
102 writel(I2C_STARTIEN, ®s->ien);
104 start = get_timer(0);
106 if (readl(®s->ipd) & I2C_STARTIPD) {
107 writel(I2C_STARTIPD, ®s->ipd);
110 if (get_timer(start) > I2C_TIMEOUT_MS) {
111 debug("I2C Send Start Bit Timeout\n");
112 rk_i2c_show_regs(regs);
121 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
123 struct i2c_regs *regs = i2c->regs;
126 debug("I2c Send Stop bit.\n");
127 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
129 writel(I2C_CON_EN | I2C_CON_STOP, ®s->con);
130 writel(I2C_CON_STOP, ®s->ien);
132 start = get_timer(0);
134 if (readl(®s->ipd) & I2C_STOPIPD) {
135 writel(I2C_STOPIPD, ®s->ipd);
138 if (get_timer(start) > I2C_TIMEOUT_MS) {
139 debug("I2C Send Start Bit Timeout\n");
140 rk_i2c_show_regs(regs);
149 static inline void rk_i2c_disable(struct rk_i2c *i2c)
151 writel(0, &i2c->regs->con);
154 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
155 uchar *buf, uint b_len)
157 struct i2c_regs *regs = i2c->regs;
159 uint bytes_remain_len = b_len;
160 uint bytes_xferred = 0;
161 uint words_xferred = 0;
167 bool snd_chunk = false;
169 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
170 chip, reg, r_len, b_len);
172 err = rk_i2c_send_start_bit(i2c);
176 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr);
178 writel(0, ®s->mrxraddr);
179 } else if (r_len < 4) {
180 writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr);
182 debug("I2C Read: addr len %d not supported\n", r_len);
186 while (bytes_remain_len) {
187 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
192 * The hw can read up to 32 bytes at a time. If we need
193 * more than one chunk, send an ACK after the last byte.
195 con = I2C_CON_EN | I2C_CON_LASTACK;
196 bytes_xferred = bytes_remain_len;
198 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
201 * make sure we are in plain RX mode if we read a second chunk
204 con |= I2C_CON_MOD(I2C_MODE_RX);
206 con |= I2C_CON_MOD(I2C_MODE_TRX);
208 writel(con, ®s->con);
209 writel(bytes_xferred, ®s->mrxcnt);
210 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien);
212 start = get_timer(0);
214 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
215 writel(I2C_NAKRCVIPD, ®s->ipd);
218 if (readl(®s->ipd) & I2C_MBRFIPD) {
219 writel(I2C_MBRFIPD, ®s->ipd);
222 if (get_timer(start) > I2C_TIMEOUT_MS) {
223 debug("I2C Read Data Timeout\n");
225 rk_i2c_show_regs(regs);
231 for (i = 0; i < words_xferred; i++) {
232 rxdata = readl(®s->rxdata[i]);
233 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
234 for (j = 0; j < 4; j++) {
235 if ((i * 4 + j) == bytes_xferred)
237 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
241 bytes_remain_len -= bytes_xferred;
243 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
247 rk_i2c_send_stop_bit(i2c);
253 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
254 uchar *buf, uint b_len)
256 struct i2c_regs *regs = i2c->regs;
259 uint bytes_remain_len = b_len + r_len + 1;
260 uint bytes_xferred = 0;
261 uint words_xferred = 0;
266 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
267 chip, reg, r_len, b_len);
268 err = rk_i2c_send_start_bit(i2c);
272 while (bytes_remain_len) {
273 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
274 bytes_xferred = RK_I2C_FIFO_SIZE;
276 bytes_xferred = bytes_remain_len;
277 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
279 for (i = 0; i < words_xferred; i++) {
281 for (j = 0; j < 4; j++) {
282 if ((i * 4 + j) == bytes_xferred)
285 if (i == 0 && j == 0 && pbuf == buf) {
286 txdata |= (chip << 1);
287 } else if (i == 0 && j <= r_len && pbuf == buf) {
289 (0xff << ((j - 1) * 8))) << 8;
291 txdata |= (*pbuf++)<<(j * 8);
294 writel(txdata, ®s->txdata[i]);
295 debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
298 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con);
299 writel(bytes_xferred, ®s->mtxcnt);
300 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien);
302 start = get_timer(0);
304 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
305 writel(I2C_NAKRCVIPD, ®s->ipd);
308 if (readl(®s->ipd) & I2C_MBTFIPD) {
309 writel(I2C_MBTFIPD, ®s->ipd);
312 if (get_timer(start) > I2C_TIMEOUT_MS) {
313 debug("I2C Write Data Timeout\n");
315 rk_i2c_show_regs(regs);
321 bytes_remain_len -= bytes_xferred;
322 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
326 rk_i2c_send_stop_bit(i2c);
332 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
335 struct rk_i2c *i2c = dev_get_priv(bus);
338 debug("i2c_xfer: %d messages\n", nmsgs);
339 for (; nmsgs > 0; nmsgs--, msg++) {
340 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
341 if (msg->flags & I2C_M_RD) {
342 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
345 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
349 debug("i2c_write: error sending\n");
357 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
359 struct rk_i2c *i2c = dev_get_priv(bus);
361 rk_i2c_set_clk(i2c, speed);
366 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
368 struct rk_i2c *priv = dev_get_priv(bus);
371 ret = clk_get_by_index(bus, 0, &priv->clk);
373 debug("%s: Could not get clock for %s: %d\n", __func__,
381 static int rockchip_i2c_probe(struct udevice *bus)
383 struct rk_i2c *priv = dev_get_priv(bus);
385 priv->regs = dev_read_addr_ptr(bus);
390 static const struct dm_i2c_ops rockchip_i2c_ops = {
391 .xfer = rockchip_i2c_xfer,
392 .set_bus_speed = rockchip_i2c_set_bus_speed,
395 static const struct udevice_id rockchip_i2c_ids[] = {
396 { .compatible = "rockchip,rk3066-i2c" },
397 { .compatible = "rockchip,rk3188-i2c" },
398 { .compatible = "rockchip,rk3288-i2c" },
399 { .compatible = "rockchip,rk3399-i2c" },
403 U_BOOT_DRIVER(i2c_rockchip) = {
404 .name = "i2c_rockchip",
406 .of_match = rockchip_i2c_ids,
407 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
408 .probe = rockchip_i2c_probe,
409 .priv_auto_alloc_size = sizeof(struct rk_i2c),
410 .ops = &rockchip_i2c_ops,