2 * (C) Copyright 2015 Google, Inc
4 * (C) Copyright 2008-2014 Rockchip Electronics
5 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
7 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/clock.h>
17 #include <asm/arch/i2c.h>
18 #include <asm/arch/periph.h>
19 #include <dm/pinctrl.h>
20 #include <linux/sizes.h>
22 DECLARE_GLOBAL_DATA_PTR;
25 #define I2C_TIMEOUT_MS 100
26 #define I2C_RETRY_COUNT 3
28 /* rk i2c fifo max transfer bytes */
29 #define RK_I2C_FIFO_SIZE 32
33 struct i2c_regs *regs;
38 static inline void rk_i2c_get_div(int div, int *divh, int *divl)
44 *divh = DIV_ROUND_UP(div, 2);
48 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
49 * SCL = PCLK / SCLK Divisor
52 static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
57 /* First get i2c rate from pclk */
58 i2c_rate = clk_get_periph_rate(i2c->clk, i2c->clk_id);
60 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
64 rk_i2c_get_div(div, &divh, &divl);
65 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
67 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
69 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
70 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
73 static void rk_i2c_show_regs(struct i2c_regs *regs)
78 debug("i2c_con: 0x%08x\n", readl(®s->con));
79 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv));
80 debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr));
81 debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr));
82 debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt));
83 debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt));
84 debug("i2c_ien: 0x%08x\n", readl(®s->ien));
85 debug("i2c_ipd: 0x%08x\n", readl(®s->ipd));
86 debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt));
87 for (i = 0; i < 8; i++)
88 debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i]));
89 for (i = 0; i < 8; i++)
90 debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i]));
94 static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
96 struct i2c_regs *regs = i2c->regs;
99 debug("I2c Send Start bit.\n");
100 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
102 writel(I2C_CON_EN | I2C_CON_START, ®s->con);
103 writel(I2C_STARTIEN, ®s->ien);
105 start = get_timer(0);
107 if (readl(®s->ipd) & I2C_STARTIPD) {
108 writel(I2C_STARTIPD, ®s->ipd);
111 if (get_timer(start) > I2C_TIMEOUT_MS) {
112 debug("I2C Send Start Bit Timeout\n");
113 rk_i2c_show_regs(regs);
122 static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
124 struct i2c_regs *regs = i2c->regs;
127 debug("I2c Send Stop bit.\n");
128 writel(I2C_IPD_ALL_CLEAN, ®s->ipd);
130 writel(I2C_CON_EN | I2C_CON_STOP, ®s->con);
131 writel(I2C_CON_STOP, ®s->ien);
133 start = get_timer(0);
135 if (readl(®s->ipd) & I2C_STOPIPD) {
136 writel(I2C_STOPIPD, ®s->ipd);
139 if (get_timer(start) > I2C_TIMEOUT_MS) {
140 debug("I2C Send Start Bit Timeout\n");
141 rk_i2c_show_regs(regs);
150 static inline void rk_i2c_disable(struct rk_i2c *i2c)
152 writel(0, &i2c->regs->con);
155 static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
156 uchar *buf, uint b_len)
158 struct i2c_regs *regs = i2c->regs;
160 uint bytes_remain_len = b_len;
161 uint bytes_xferred = 0;
162 uint words_xferred = 0;
169 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
170 chip, reg, r_len, b_len);
172 err = rk_i2c_send_start_bit(i2c);
176 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr);
178 writel(0, ®s->mrxraddr);
179 } else if (r_len < 4) {
180 writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr);
182 debug("I2C Read: addr len %d not supported\n", r_len);
186 while (bytes_remain_len) {
187 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
188 con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX);
191 con = I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TRX) |
193 bytes_xferred = bytes_remain_len;
195 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
197 writel(con, ®s->con);
198 writel(bytes_xferred, ®s->mrxcnt);
199 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien);
201 start = get_timer(0);
203 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
204 writel(I2C_NAKRCVIPD, ®s->ipd);
207 if (readl(®s->ipd) & I2C_MBRFIPD) {
208 writel(I2C_MBRFIPD, ®s->ipd);
211 if (get_timer(start) > I2C_TIMEOUT_MS) {
212 debug("I2C Read Data Timeout\n");
214 rk_i2c_show_regs(regs);
220 for (i = 0; i < words_xferred; i++) {
221 rxdata = readl(®s->rxdata[i]);
222 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
223 for (j = 0; j < 4; j++) {
224 if ((i * 4 + j) == bytes_xferred)
226 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
230 bytes_remain_len -= bytes_xferred;
231 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
235 rk_i2c_send_stop_bit(i2c);
241 static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
242 uchar *buf, uint b_len)
244 struct i2c_regs *regs = i2c->regs;
247 uint bytes_remain_len = b_len + r_len + 1;
248 uint bytes_xferred = 0;
249 uint words_xferred = 0;
254 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
255 chip, reg, r_len, b_len);
256 err = rk_i2c_send_start_bit(i2c);
260 while (bytes_remain_len) {
261 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
264 bytes_xferred = bytes_remain_len;
265 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
267 for (i = 0; i < words_xferred; i++) {
269 for (j = 0; j < 4; j++) {
270 if ((i * 4 + j) == bytes_xferred)
273 if (i == 0 && j == 0) {
274 txdata |= (chip << 1);
275 } else if (i == 0 && j <= r_len) {
277 (0xff << ((j - 1) * 8))) << 8;
279 txdata |= (*pbuf++)<<(j * 8);
281 writel(txdata, ®s->txdata[i]);
283 debug("I2c Write TXDATA[%d] = 0x%x\n", i, txdata);
286 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con);
287 writel(bytes_xferred, ®s->mtxcnt);
288 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien);
290 start = get_timer(0);
292 if (readl(®s->ipd) & I2C_NAKRCVIPD) {
293 writel(I2C_NAKRCVIPD, ®s->ipd);
296 if (readl(®s->ipd) & I2C_MBTFIPD) {
297 writel(I2C_MBTFIPD, ®s->ipd);
300 if (get_timer(start) > I2C_TIMEOUT_MS) {
301 debug("I2C Write Data Timeout\n");
303 rk_i2c_show_regs(regs);
309 bytes_remain_len -= bytes_xferred;
310 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
314 rk_i2c_send_stop_bit(i2c);
320 static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
323 struct rk_i2c *i2c = dev_get_priv(bus);
326 debug("i2c_xfer: %d messages\n", nmsgs);
327 for (; nmsgs > 0; nmsgs--, msg++) {
328 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
329 if (msg->flags & I2C_M_RD) {
330 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
333 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
337 debug("i2c_write: error sending\n");
345 int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
347 struct rk_i2c *i2c = dev_get_priv(bus);
349 rk_i2c_set_clk(i2c, speed);
354 static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
356 struct rk_i2c *priv = dev_get_priv(bus);
359 ret = clk_get_by_index(bus, 0, &priv->clk);
361 debug("%s: Could not get clock for %s: %d\n", __func__,
370 static int rockchip_i2c_probe(struct udevice *bus)
372 struct rk_i2c *priv = dev_get_priv(bus);
374 priv->regs = (void *)dev_get_addr(bus);
379 static const struct dm_i2c_ops rockchip_i2c_ops = {
380 .xfer = rockchip_i2c_xfer,
381 .set_bus_speed = rockchip_i2c_set_bus_speed,
384 static const struct udevice_id rockchip_i2c_ids[] = {
385 { .compatible = "rockchip,rk3288-i2c" },
389 U_BOOT_DRIVER(i2c_rockchip) = {
390 .name = "i2c_rockchip",
392 .of_match = rockchip_i2c_ids,
393 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
394 .probe = rockchip_i2c_probe,
395 .priv_auto_alloc_size = sizeof(struct rk_i2c),
396 .ops = &rockchip_i2c_ops,