drivers/i2c/omap24xx_i2c.c

   1 /*
   2  * Basic I2C functions
   3  *
   4  * Copyright (c) 2004 Texas Instruments
   5  *
   6  * This package is free software;  you can redistribute it and/or
   7  * modify it under the terms of the license found in the file
   8  * named COPYING that should have accompanied this file.
   9  *
  10  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
  11  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
  12  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  13  *
  14  * Author: Jian Zhang jzhang@ti.com, Texas Instruments
  15  *
  16  * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
  17  * Rewritten to fit into the current U-Boot framework
  18  *
  19  * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
  20  *
  21  */
  22
  23 #include <common.h>
  24
  25 #include <asm/arch/i2c.h>
  26 #include <asm/io.h>
  27
  28 #include "omap24xx_i2c.h"
  29
  30 DECLARE_GLOBAL_DATA_PTR;
  31
  32 #define I2C_TIMEOUT     1000
  33
  34 static int wait_for_bb(void);
  35 static u16 wait_for_pin(void);
  36 static void flush_fifo(void);
  37
  38 /*
  39  * For SPL boot some boards need i2c before SDRAM is initialised so force
  40  * variables to live in SRAM
  41  */
  42 static struct i2c __attribute__((section (".data"))) *i2c_base =
  43                                         (struct i2c *)I2C_DEFAULT_BASE;
  44 static unsigned int __attribute__((section (".data"))) bus_initialized[I2C_BUS_MAX] =
  45                                         { [0 ... (I2C_BUS_MAX-1)] = 0 };
  46 static unsigned int __attribute__((section (".data"))) current_bus = 0;
  47
  48 void i2c_init(int speed, int slaveadd)
  49 {
  50         int psc, fsscll, fssclh;
  51         int hsscll = 0, hssclh = 0;
  52         u32 scll, sclh;
  53         int timeout = I2C_TIMEOUT;
  54
  55         /* Only handle standard, fast and high speeds */
  56         if ((speed != OMAP_I2C_STANDARD) &&
  57             (speed != OMAP_I2C_FAST_MODE) &&
  58             (speed != OMAP_I2C_HIGH_SPEED)) {
  59                 printf("Error : I2C unsupported speed %d\n", speed);
  60                 return;
  61         }
  62
  63         psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
  64         psc -= 1;
  65         if (psc < I2C_PSC_MIN) {
  66                 printf("Error : I2C unsupported prescalar %d\n", psc);
  67                 return;
  68         }
  69
  70         if (speed == OMAP_I2C_HIGH_SPEED) {
  71                 /* High speed */
  72
  73                 /* For first phase of HS mode */
  74                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
  75                         (2 * OMAP_I2C_FAST_MODE);
  76
  77                 fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
  78                 fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
  79                 if (((fsscll < 0) || (fssclh < 0)) ||
  80                     ((fsscll > 255) || (fssclh > 255))) {
  81                         puts("Error : I2C initializing first phase clock\n");
  82                         return;
  83                 }
  84
  85                 /* For second phase of HS mode */
  86                 hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
  87
  88                 hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
  89                 hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
  90                 if (((fsscll < 0) || (fssclh < 0)) ||
  91                     ((fsscll > 255) || (fssclh > 255))) {
  92                         puts("Error : I2C initializing second phase clock\n");
  93                         return;
  94                 }
  95
  96                 scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
  97                 sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh;
  98
  99         } else {
 100                 /* Standard and fast speed */
 101                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
 102
 103                 fsscll -= I2C_FASTSPEED_SCLL_TRIM;
 104                 fssclh -= I2C_FASTSPEED_SCLH_TRIM;
 105                 if (((fsscll < 0) || (fssclh < 0)) ||
 106                     ((fsscll > 255) || (fssclh > 255))) {
 107                         puts("Error : I2C initializing clock\n");
 108                         return;
 109                 }
 110
 111                 scll = (unsigned int)fsscll;
 112                 sclh = (unsigned int)fssclh;
 113         }
 114
 115         if (readw(&i2c_base->con) & I2C_CON_EN) {
 116                 writew(0, &i2c_base->con);
 117                 udelay(50000);
 118         }
 119
 120         writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */
 121         udelay(1000);
 122
 123         writew(I2C_CON_EN, &i2c_base->con);
 124         while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
 125                 if (timeout <= 0) {
 126                         puts("ERROR: Timeout in soft-reset\n");
 127                         return;
 128                 }
 129                 udelay(1000);
 130         }
 131
 132         writew(0, &i2c_base->con);
 133         writew(psc, &i2c_base->psc);
 134         writew(scll, &i2c_base->scll);
 135         writew(sclh, &i2c_base->sclh);
 136
 137         /* own address */
 138         writew(slaveadd, &i2c_base->oa);
 139         writew(I2C_CON_EN, &i2c_base->con);
 140
 141         /* have to enable intrrupts or OMAP i2c module doesn't work */
 142         writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
 143                 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
 144         udelay(1000);
 145         flush_fifo();
 146         writew(0xFFFF, &i2c_base->stat);
 147         writew(0, &i2c_base->cnt);
 148
 149         if (gd->flags & GD_FLG_RELOC)
 150                 bus_initialized[current_bus] = 1;
 151 }
 152
 153 static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value)
 154 {
 155         int i2c_error = 0;
 156         u16 status;
 157         int i = 2 - alen;
 158         u8 tmpbuf[2] = {(regoffset) >> 8, regoffset & 0xff};
 159         u16 w;
 160
 161         /* wait until bus not busy */
 162         if (wait_for_bb())
 163                 return 1;
 164
 165         /* one byte only */
 166         writew(alen, &i2c_base->cnt);
 167         /* set slave address */
 168         writew(devaddr, &i2c_base->sa);
 169         /* no stop bit needed here */
 170         writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |
 171               I2C_CON_TRX, &i2c_base->con);
 172
 173         /* send register offset */
 174         while (1) {
 175                 status = wait_for_pin();
 176                 if (status == 0 || status & I2C_STAT_NACK) {
 177                         i2c_error = 1;
 178                         goto read_exit;
 179                 }
 180                 if (status & I2C_STAT_XRDY) {
 181                         w = tmpbuf[i++];
 182 #if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
 183         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
 184                         w |= tmpbuf[i++] << 8;
 185 #endif
 186                         writew(w, &i2c_base->data);
 187                         writew(I2C_STAT_XRDY, &i2c_base->stat);
 188                 }
 189                 if (status & I2C_STAT_ARDY) {
 190                         writew(I2C_STAT_ARDY, &i2c_base->stat);
 191                         break;
 192                 }
 193         }
 194
 195         /* set slave address */
 196         writew(devaddr, &i2c_base->sa);
 197         /* read one byte from slave */
 198         writew(1, &i2c_base->cnt);
 199         /* need stop bit here */
 200         writew(I2C_CON_EN | I2C_CON_MST |
 201                 I2C_CON_STT | I2C_CON_STP,
 202                 &i2c_base->con);
 203
 204         /* receive data */
 205         while (1) {
 206                 status = wait_for_pin();
 207                 if (status == 0 || status & I2C_STAT_NACK) {
 208                         i2c_error = 1;
 209                         goto read_exit;
 210                 }
 211                 if (status & I2C_STAT_RRDY) {
 212 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
 213         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
 214                         *value = readb(&i2c_base->data);
 215 #else
 216                         *value = readw(&i2c_base->data);
 217 #endif
 218                         writew(I2C_STAT_RRDY, &i2c_base->stat);
 219                 }
 220                 if (status & I2C_STAT_ARDY) {
 221                         writew(I2C_STAT_ARDY, &i2c_base->stat);
 222                         break;
 223                 }
 224         }
 225
 226 read_exit:
 227         flush_fifo();
 228         writew(0xFFFF, &i2c_base->stat);
 229         writew(0, &i2c_base->cnt);
 230         return i2c_error;
 231 }
 232
 233 static void flush_fifo(void)
 234 {       u16 stat;
 235
 236         /* note: if you try and read data when its not there or ready
 237          * you get a bus error
 238          */
 239         while (1) {
 240                 stat = readw(&i2c_base->stat);
 241                 if (stat == I2C_STAT_RRDY) {
 242 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
 243         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
 244                         readb(&i2c_base->data);
 245 #else
 246                         readw(&i2c_base->data);
 247 #endif
 248                         writew(I2C_STAT_RRDY, &i2c_base->stat);
 249                         udelay(1000);
 250                 } else
 251                         break;
 252         }
 253 }
 254
 255 int i2c_probe(uchar chip)
 256 {
 257         u16 status;
 258         int res = 1; /* default = fail */
 259
 260         if (chip == readw(&i2c_base->oa))
 261                 return res;
 262
 263         /* wait until bus not busy */
 264         if (wait_for_bb())
 265                 return res;
 266
 267         /* try to read one byte */
 268         writew(1, &i2c_base->cnt);
 269         /* set slave address */
 270         writew(chip, &i2c_base->sa);
 271         /* stop bit needed here */
 272         writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c_base->con);
 273
 274         while (1) {
 275                 status = wait_for_pin();
 276                 if (status == 0 || status & I2C_STAT_AL) {
 277                         res = 1;
 278                         goto probe_exit;
 279                 }
 280                 if (status & I2C_STAT_NACK) {
 281                         res = 1;
 282                         writew(0xff, &i2c_base->stat);
 283                         writew (readw (&i2c_base->con) | I2C_CON_STP, &i2c_base->con);
 284
 285                         if (wait_for_bb())
 286                                 res = 1;
 287
 288                         break;
 289                 }
 290                 if (status & I2C_STAT_ARDY) {
 291                         writew(I2C_STAT_ARDY, &i2c_base->stat);
 292                         break;
 293                 }
 294                 if (status & I2C_STAT_RRDY) {
 295                         res = 0;
 296 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
 297     defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX)
 298                         readb(&i2c_base->data);
 299 #else
 300                         readw(&i2c_base->data);
 301 #endif
 302                         writew(I2C_STAT_RRDY, &i2c_base->stat);
 303                 }
 304         }
 305
 306 probe_exit:
 307         flush_fifo();
 308         /* don't allow any more data in... we don't want it. */
 309         writew(0, &i2c_base->cnt);
 310         writew(0xFFFF, &i2c_base->stat);
 311         return res;
 312 }
 313
 314 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 315 {
 316         int i;
 317
 318         if (alen > 2) {
 319                 printf("I2C read: addr len %d not supported\n", alen);
 320                 return 1;
 321         }
 322
 323         if (addr + len > (1 << 16)) {
 324                 puts("I2C read: address out of range\n");
 325                 return 1;
 326         }
 327
 328         for (i = 0; i < len; i++) {
 329                 if (i2c_read_byte(chip, addr + i, alen, &buffer[i])) {
 330                         puts("I2C read: I/O error\n");
 331                         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 332                         return 1;
 333                 }
 334         }
 335
 336         return 0;
 337 }
 338
 339 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 340 {
 341         int i;
 342         u16 status;
 343         int i2c_error = 0;
 344         u16 w;
 345         u8 tmpbuf[2] = {addr >> 8, addr & 0xff};
 346
 347         if (alen > 2) {
 348                 printf("I2C write: addr len %d not supported\n", alen);
 349                 return 1;
 350         }
 351
 352         if (addr + len > (1 << 16)) {
 353                 printf("I2C write: address 0x%x + 0x%x out of range\n",
 354                                 addr, len);
 355                 return 1;
 356         }
 357
 358         /* wait until bus not busy */
 359         if (wait_for_bb())
 360                 return 1;
 361
 362         /* start address phase - will write regoffset + len bytes data */
 363         /* TODO consider case when !CONFIG_OMAP243X/34XX/44XX */
 364         writew(alen + len, &i2c_base->cnt);
 365         /* set slave address */
 366         writew(chip, &i2c_base->sa);
 367         /* stop bit needed here */
 368         writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
 369                 I2C_CON_STP, &i2c_base->con);
 370
 371         /* Send address and data */
 372         for (i = -alen; i < len; i++) {
 373                 status = wait_for_pin();
 374
 375                 if (status == 0 || status & I2C_STAT_NACK) {
 376                         i2c_error = 1;
 377                         printf("i2c error waiting for data ACK (status=0x%x)\n",
 378                                         status);
 379                         goto write_exit;
 380                 }
 381
 382                 if (status & I2C_STAT_XRDY) {
 383                         w = (i < 0) ? tmpbuf[2+i] : buffer[i];
 384 #if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
 385         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
 386                         w |= ((++i < 0) ? tmpbuf[2+i] : buffer[i]) << 8;
 387 #endif
 388                         writew(w, &i2c_base->data);
 389                         writew(I2C_STAT_XRDY, &i2c_base->stat);
 390                 } else {
 391                         i2c_error = 1;
 392                         printf("i2c bus not ready for Tx (i=%d)\n", i);
 393                         goto write_exit;
 394                 }
 395         }
 396
 397 write_exit:
 398         flush_fifo();
 399         writew(0xFFFF, &i2c_base->stat);
 400         return i2c_error;
 401 }
 402
 403 static int wait_for_bb(void)
 404 {
 405         int timeout = I2C_TIMEOUT;
 406         u16 stat;
 407
 408         writew(0xFFFF, &i2c_base->stat);        /* clear current interrupts...*/
 409         while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
 410                 writew(stat, &i2c_base->stat);
 411                 udelay(1000);
 412         }
 413
 414         if (timeout <= 0) {
 415                 printf("timed out in wait_for_bb: I2C_STAT=%x\n",
 416                         readw(&i2c_base->stat));
 417                 return 1;
 418         }
 419         writew(0xFFFF, &i2c_base->stat);         /* clear delayed stuff*/
 420         return 0;
 421 }
 422
 423 static u16 wait_for_pin(void)
 424 {
 425         u16 status;
 426         int timeout = I2C_TIMEOUT;
 427
 428         do {
 429                 udelay(1000);
 430                 status = readw(&i2c_base->stat);
 431         } while (!(status &
 432                    (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
 433                     I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
 434                     I2C_STAT_AL)) && timeout--);
 435
 436         if (timeout <= 0) {
 437                 printf("timed out in wait_for_pin: I2C_STAT=%x\n",
 438                         readw(&i2c_base->stat));
 439                 writew(0xFFFF, &i2c_base->stat);
 440                 status = 0;
 441         }
 442
 443         return status;
 444 }
 445
 446 int i2c_set_bus_num(unsigned int bus)
 447 {
 448         if ((bus < 0) || (bus >= I2C_BUS_MAX)) {
 449                 printf("Bad bus: %d\n", bus);
 450                 return -1;
 451         }
 452
 453 #if I2C_BUS_MAX == 4
 454         if (bus == 3)
 455                 i2c_base = (struct i2c *)I2C_BASE4;
 456         else
 457         if (bus == 2)
 458                 i2c_base = (struct i2c *)I2C_BASE3;
 459         else
 460 #endif
 461 #if I2C_BUS_MAX == 3
 462         if (bus == 2)
 463                 i2c_base = (struct i2c *)I2C_BASE3;
 464         else
 465 #endif
 466         if (bus == 1)
 467                 i2c_base = (struct i2c *)I2C_BASE2;
 468         else
 469                 i2c_base = (struct i2c *)I2C_BASE1;
 470
 471         current_bus = bus;
 472
 473         if (!bus_initialized[current_bus])
 474                 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 475
 476         return 0;
 477 }
 478
 479 int i2c_get_bus_num(void)
 480 {
 481         return (int) current_bus;
 482 }