1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for the TWSI (i2c) controller found on the Marvell
4 * orion5x and kirkwood SoC families.
6 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
7 * Copyright (c) 2010 Albert Aribaud.
13 #include <linux/errno.h>
15 #include <linux/bitops.h>
16 #include <linux/compat.h>
21 DECLARE_GLOBAL_DATA_PTR;
24 * Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other
29 #if defined(CONFIG_ARCH_ORION5X)
30 #include <asm/arch/orion5x.h>
31 #elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
32 #include <asm/arch/soc.h>
33 #elif defined(CONFIG_ARCH_SUNXI)
34 #include <asm/arch/i2c.h>
36 #error Driver mvtwsi not supported by SoC or board
38 #endif /* CONFIG_DM_I2C */
41 * On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
44 #if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
45 #include <asm/arch/i2c.h>
49 * TWSI register structure
52 #ifdef CONFIG_ARCH_SUNXI
54 struct mvtwsi_registers {
62 u32 debug; /* Dummy field for build compatibility with mvebu */
67 struct mvtwsi_registers {
72 u32 status; /* When reading */
73 u32 baudrate; /* When writing */
85 struct mvtwsi_i2c_dev {
86 /* TWSI Register base for the device */
87 struct mvtwsi_registers *base;
88 /* Number of the device (determined from cell-index property) */
90 /* The I2C slave address for the device */
92 /* The configured I2C speed in Hz */
94 /* The current length of a clock period (depending on speed) */
97 #endif /* CONFIG_DM_I2C */
100 * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
103 enum mvtwsi_ctrl_register_fields {
104 /* Acknowledge bit */
105 MVTWSI_CONTROL_ACK = 0x00000004,
107 MVTWSI_CONTROL_IFLG = 0x00000008,
109 MVTWSI_CONTROL_STOP = 0x00000010,
111 MVTWSI_CONTROL_START = 0x00000020,
113 MVTWSI_CONTROL_TWSIEN = 0x00000040,
114 /* Interrupt enable */
115 MVTWSI_CONTROL_INTEN = 0x00000080,
119 * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
120 * on other platforms, it is a normal r/w bit, which is cleared by writing 0.
123 #ifdef CONFIG_SUNXI_GEN_SUN6I
124 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
126 #define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
130 * enum mvstwsi_status_values - Possible values of I2C controller's status
133 * Only those statuses expected in normal master operation on
134 * non-10-bit-address devices are specified.
136 * Every status that's unexpected during normal operation (bus errors,
137 * arbitration losses, missing ACKs...) is passed back to the caller as an error
140 enum mvstwsi_status_values {
141 /* START condition transmitted */
142 MVTWSI_STATUS_START = 0x08,
143 /* Repeated START condition transmitted */
144 MVTWSI_STATUS_REPEATED_START = 0x10,
145 /* Address + write bit transmitted, ACK received */
146 MVTWSI_STATUS_ADDR_W_ACK = 0x18,
147 /* Data transmitted, ACK received */
148 MVTWSI_STATUS_DATA_W_ACK = 0x28,
149 /* Address + read bit transmitted, ACK received */
150 MVTWSI_STATUS_ADDR_R_ACK = 0x40,
151 /* Address + read bit transmitted, ACK not received */
152 MVTWSI_STATUS_ADDR_R_NAK = 0x48,
153 /* Data received, ACK transmitted */
154 MVTWSI_STATUS_DATA_R_ACK = 0x50,
155 /* Data received, ACK not transmitted */
156 MVTWSI_STATUS_DATA_R_NAK = 0x58,
157 /* No relevant status */
158 MVTWSI_STATUS_IDLE = 0xF8,
162 * enum mvstwsi_ack_flags - Determine whether a read byte should be
163 * acknowledged or not.
165 enum mvtwsi_ack_flags {
166 /* Send NAK after received byte */
168 /* Send ACK after received byte */
173 * calc_tick() - Calculate the duration of a clock cycle from the I2C speed
175 * @speed: The speed in Hz to calculate the clock cycle duration for.
176 * @return The duration of a clock cycle in ns.
178 inline uint calc_tick(uint speed)
180 /* One tick = the duration of a period at the specified speed in ns (we
181 * add 100 ns to be on the safe side) */
182 return (1000000000u / speed) + 100;
185 #ifndef CONFIG_DM_I2C
188 * twsi_get_base() - Get controller register base for specified adapter
190 * @adap: Adapter to get the register base for.
191 * @return Register base for the specified adapter.
193 static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
195 switch (adap->hwadapnr) {
196 #ifdef CONFIG_I2C_MVTWSI_BASE0
198 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
200 #ifdef CONFIG_I2C_MVTWSI_BASE1
202 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
204 #ifdef CONFIG_I2C_MVTWSI_BASE2
206 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
208 #ifdef CONFIG_I2C_MVTWSI_BASE3
210 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
212 #ifdef CONFIG_I2C_MVTWSI_BASE4
214 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
216 #ifdef CONFIG_I2C_MVTWSI_BASE5
218 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
221 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
230 * enum mvtwsi_error_class - types of I2C errors
232 enum mvtwsi_error_class {
233 /* The controller returned a different status than expected */
234 MVTWSI_ERROR_WRONG_STATUS = 0x01,
235 /* The controller timed out */
236 MVTWSI_ERROR_TIMEOUT = 0x02,
240 * mvtwsi_error() - Build I2C return code from error information
242 * For debugging purposes, this function packs some information of an occurred
243 * error into a return code. These error codes are returned from I2C API
244 * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
246 * @ec: The error class of the error (enum mvtwsi_error_class).
247 * @lc: The last value of the control register.
248 * @ls: The last value of the status register.
249 * @es: The expected value of the status register.
250 * @return The generated error code.
252 inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
254 return ((ec << 24) & 0xFF000000)
255 | ((lc << 16) & 0x00FF0000)
256 | ((ls << 8) & 0x0000FF00)
261 * twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out.
263 * @return Zero if status is as expected, or a non-zero code if either a time
264 * out occurred, or the status was not the expected one.
266 static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
273 control = readl(&twsi->control);
274 if (control & MVTWSI_CONTROL_IFLG) {
276 * On Armada 38x it seems that the controller works as
277 * if it first set the MVTWSI_CONTROL_IFLAG in the
278 * control register and only after that it changed the
280 * This sometimes caused weird bugs which only appeared
281 * on selected I2C speeds and even then only sometimes.
282 * We therefore add here a simple ndealy(100), which
283 * seems to fix this weird bug.
286 status = readl(&twsi->status);
287 if (status == expected_status)
291 MVTWSI_ERROR_WRONG_STATUS,
292 control, status, expected_status);
294 ndelay(tick); /* One clock cycle */
296 status = readl(&twsi->status);
297 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
302 * twsi_start() - Assert a START condition on the bus.
304 * This function is used in both single I2C transactions and inside
305 * back-to-back transactions (repeated starts).
307 * @twsi: The MVTWSI register structure to use.
308 * @expected_status: The I2C bus status expected to be asserted after the
309 * operation completion.
310 * @tick: The duration of a clock cycle at the current I2C speed.
311 * @return Zero if status is as expected, or a non-zero code if either a time
312 * out occurred or the status was not the expected one.
314 static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
318 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
319 MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
320 /* Wait for controller to process START */
321 return twsi_wait(twsi, expected_status, tick);
325 * twsi_send() - Send a byte on the I2C bus.
327 * The byte may be part of an address byte or data.
329 * @twsi: The MVTWSI register structure to use.
330 * @byte: The byte to send.
331 * @expected_status: The I2C bus status expected to be asserted after the
332 * operation completion.
333 * @tick: The duration of a clock cycle at the current I2C speed.
334 * @return Zero if status is as expected, or a non-zero code if either a time
335 * out occurred or the status was not the expected one.
337 static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
338 int expected_status, uint tick)
340 /* Write byte to data register for sending */
341 writel(byte, &twsi->data);
342 /* Clear any pending interrupt -- that will cause sending */
343 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
345 /* Wait for controller to receive byte, and check ACK */
346 return twsi_wait(twsi, expected_status, tick);
350 * twsi_recv() - Receive a byte on the I2C bus.
352 * The static variable mvtwsi_control_flags controls whether we ack or nak.
354 * @twsi: The MVTWSI register structure to use.
355 * @byte: The byte to send.
356 * @ack_flag: Flag that determines whether the received byte should
357 * be acknowledged by the controller or not (sent ACK/NAK).
358 * @tick: The duration of a clock cycle at the current I2C speed.
359 * @return Zero if status is as expected, or a non-zero code if either a time
360 * out occurred or the status was not the expected one.
362 static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
365 int expected_status, status, control;
367 /* Compute expected status based on passed ACK flag */
368 expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
369 MVTWSI_STATUS_DATA_R_NAK;
370 /* Acknowledge *previous state*, and launch receive */
371 control = MVTWSI_CONTROL_TWSIEN;
372 control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
373 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
374 /* Wait for controller to receive byte, and assert ACK or NAK */
375 status = twsi_wait(twsi, expected_status, tick);
376 /* If we did receive the expected byte, store it */
378 *byte = readl(&twsi->data);
383 * twsi_stop() - Assert a STOP condition on the bus.
385 * This function is also used to force the bus back to idle state (SDA =
388 * @twsi: The MVTWSI register structure to use.
389 * @tick: The duration of a clock cycle at the current I2C speed.
390 * @return Zero if the operation succeeded, or a non-zero code if a time out
393 static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
395 int control, stop_status;
400 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
401 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
402 /* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */
404 stop_status = readl(&twsi->status);
405 if (stop_status == MVTWSI_STATUS_IDLE)
407 ndelay(tick); /* One clock cycle */
409 control = readl(&twsi->control);
410 if (stop_status != MVTWSI_STATUS_IDLE)
411 status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
412 control, status, MVTWSI_STATUS_IDLE);
417 * twsi_calc_freq() - Compute I2C frequency depending on m and n parameters.
419 * @n: Parameter 'n' for the frequency calculation algorithm.
420 * @m: Parameter 'm' for the frequency calculation algorithm.
421 * @return The I2C frequency corresponding to the passed m and n parameters.
423 static uint twsi_calc_freq(const int n, const int m)
425 #ifdef CONFIG_ARCH_SUNXI
426 return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
428 return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
433 * twsi_reset() - Reset the I2C controller.
435 * Resetting the controller also resets the baud rate and slave address, hence
436 * they must be re-established after the reset.
438 * @twsi: The MVTWSI register structure to use.
440 static void twsi_reset(struct mvtwsi_registers *twsi)
442 /* Reset controller */
443 writel(0, &twsi->soft_reset);
444 /* Wait 2 ms -- this is what the Marvell LSP does */
449 * __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller.
451 * This function sets baud rate to the highest possible value that does not
452 * exceed the requested rate.
454 * @twsi: The MVTWSI register structure to use.
455 * @requested_speed: The desired frequency the controller should run at
457 * @return The actual frequency the controller was configured to.
459 static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
460 uint requested_speed)
462 uint tmp_speed, highest_speed, n, m;
463 uint baud = 0x44; /* Baud rate after controller reset */
466 /* Successively try m, n combinations, and use the combination
467 * resulting in the largest speed that's not above the requested
469 for (n = 0; n < 8; n++) {
470 for (m = 0; m < 16; m++) {
471 tmp_speed = twsi_calc_freq(n, m);
472 if ((tmp_speed <= requested_speed) &&
473 (tmp_speed > highest_speed)) {
474 highest_speed = tmp_speed;
479 writel(baud, &twsi->baudrate);
481 /* Wait for controller for one tick */
483 ndelay(calc_tick(highest_speed));
487 return highest_speed;
491 * __twsi_i2c_init() - Initialize the I2C controller.
493 * @twsi: The MVTWSI register structure to use.
494 * @speed: The initial frequency the controller should run at
496 * @slaveadd: The I2C address to be set for the I2C master.
497 * @actual_speed: A output parameter that receives the actual frequency
498 * in Hz the controller was set to by the function.
499 * @return Zero if the operation succeeded, or a non-zero code if a time out
502 static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
503 int slaveadd, uint *actual_speed)
507 /* Reset controller */
510 tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed);
512 *actual_speed = tmp_speed;
513 /* Set slave address; even though we don't use it */
514 writel(slaveadd, &twsi->slave_address);
515 writel(0, &twsi->xtnd_slave_addr);
516 /* Assert STOP, but don't care for the result */
518 (void) twsi_stop(twsi, calc_tick(*actual_speed));
520 (void) twsi_stop(twsi, 10000);
525 * i2c_begin() - Start a I2C transaction.
527 * Begin a I2C transaction with a given expected start status and chip address.
528 * A START is asserted, and the address byte is sent to the I2C controller. The
529 * expected address status will be derived from the direction bit (bit 0) of
532 * @twsi: The MVTWSI register structure to use.
533 * @expected_start_status: The I2C status the controller is expected to
534 * assert after the address byte was sent.
535 * @addr: The address byte to be sent.
536 * @tick: The duration of a clock cycle at the current
538 * @return Zero if the operation succeeded, or a non-zero code if a time out or
539 * unexpected I2C status occurred.
541 static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
544 int status, expected_addr_status;
546 /* Compute the expected address status from the direction bit in
547 * the address byte */
548 if (addr & 1) /* Reading */
549 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
551 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
553 status = twsi_start(twsi, expected_start_status, tick);
554 /* Send out the address if the start went well */
556 status = twsi_send(twsi, addr, expected_addr_status, tick);
557 /* Return 0, or the status of the first failure */
562 * __twsi_i2c_probe_chip() - Probe the given I2C chip address.
564 * This function begins a I2C read transaction, does a dummy read and NAKs; if
565 * the procedure succeeds, the chip is considered to be present.
567 * @twsi: The MVTWSI register structure to use.
568 * @chip: The chip address to probe.
569 * @tick: The duration of a clock cycle at the current I2C speed.
570 * @return Zero if the operation succeeded, or a non-zero code if a time out or
571 * unexpected I2C status occurred.
573 static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
580 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
581 /* Dummy read was accepted: receive byte, but NAK it. */
583 status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
584 /* Stop transaction */
585 twsi_stop(twsi, tick);
586 /* Return 0, or the status of the first failure */
591 * __twsi_i2c_read() - Read data from a I2C chip.
593 * This function begins a I2C write transaction, and transmits the address
594 * bytes; then begins a I2C read transaction, and receives the data bytes.
596 * NOTE: Some devices want a stop right before the second start, while some
597 * will choke if it is there. Since deciding this is not yet supported in
598 * higher level APIs, we need to make a decision here, and for the moment that
599 * will be a repeated start without a preceding stop.
601 * @twsi: The MVTWSI register structure to use.
602 * @chip: The chip address to read from.
603 * @addr: The address bytes to send.
604 * @alen: The length of the address bytes in bytes.
605 * @data: The buffer to receive the data read from the chip (has to have
606 * a size of at least 'length' bytes).
607 * @length: The amount of data to be read from the chip in bytes.
608 * @tick: The duration of a clock cycle at the current I2C speed.
609 * @return Zero if the operation succeeded, or a non-zero code if a time out or
610 * unexpected I2C status occurred.
612 static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
613 u8 *addr, int alen, uchar *data, int length,
618 int expected_start = MVTWSI_STATUS_START;
621 /* Begin i2c write to send the address bytes */
622 status = i2c_begin(twsi, expected_start, (chip << 1), tick);
623 /* Send address bytes */
624 while ((status == 0) && alen--)
625 status = twsi_send(twsi, addr[alen],
626 MVTWSI_STATUS_DATA_W_ACK, tick);
627 /* Send repeated STARTs after the initial START */
628 expected_start = MVTWSI_STATUS_REPEATED_START;
630 /* Begin i2c read to receive data bytes */
632 status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
633 /* Receive actual data bytes; set NAK if we if we have nothing more to
635 while ((status == 0) && length--)
636 status = twsi_recv(twsi, data++,
638 MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
639 /* Stop transaction */
640 stop_status = twsi_stop(twsi, tick);
641 /* Return 0, or the status of the first failure */
642 return status != 0 ? status : stop_status;
646 * __twsi_i2c_write() - Send data to a I2C chip.
648 * This function begins a I2C write transaction, and transmits the address
649 * bytes; then begins a new I2C write transaction, and sends the data bytes.
651 * @twsi: The MVTWSI register structure to use.
652 * @chip: The chip address to read from.
653 * @addr: The address bytes to send.
654 * @alen: The length of the address bytes in bytes.
655 * @data: The buffer containing the data to be sent to the chip.
656 * @length: The length of data to be sent to the chip in bytes.
657 * @tick: The duration of a clock cycle at the current I2C speed.
658 * @return Zero if the operation succeeded, or a non-zero code if a time out or
659 * unexpected I2C status occurred.
661 static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
662 u8 *addr, int alen, uchar *data, int length,
665 int status, stop_status;
667 /* Begin i2c write to send first the address bytes, then the
669 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
670 /* Send address bytes */
671 while ((status == 0) && (alen-- > 0))
672 status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
674 /* Send data bytes */
675 while ((status == 0) && (length-- > 0))
676 status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
678 /* Stop transaction */
679 stop_status = twsi_stop(twsi, tick);
680 /* Return 0, or the status of the first failure */
681 return status != 0 ? status : stop_status;
684 #ifndef CONFIG_DM_I2C
685 static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
688 struct mvtwsi_registers *twsi = twsi_get_base(adap);
689 __twsi_i2c_init(twsi, speed, slaveadd, NULL);
692 static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
693 uint requested_speed)
695 struct mvtwsi_registers *twsi = twsi_get_base(adap);
696 __twsi_i2c_set_bus_speed(twsi, requested_speed);
700 static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
702 struct mvtwsi_registers *twsi = twsi_get_base(adap);
703 return __twsi_i2c_probe_chip(twsi, chip, 10000);
706 static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
707 int alen, uchar *data, int length)
709 struct mvtwsi_registers *twsi = twsi_get_base(adap);
712 addr_bytes[0] = (addr >> 0) & 0xFF;
713 addr_bytes[1] = (addr >> 8) & 0xFF;
714 addr_bytes[2] = (addr >> 16) & 0xFF;
715 addr_bytes[3] = (addr >> 24) & 0xFF;
717 return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
721 static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
722 int alen, uchar *data, int length)
724 struct mvtwsi_registers *twsi = twsi_get_base(adap);
727 addr_bytes[0] = (addr >> 0) & 0xFF;
728 addr_bytes[1] = (addr >> 8) & 0xFF;
729 addr_bytes[2] = (addr >> 16) & 0xFF;
730 addr_bytes[3] = (addr >> 24) & 0xFF;
732 return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
736 #ifdef CONFIG_I2C_MVTWSI_BASE0
737 U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
738 twsi_i2c_read, twsi_i2c_write,
739 twsi_i2c_set_bus_speed,
740 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
742 #ifdef CONFIG_I2C_MVTWSI_BASE1
743 U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
744 twsi_i2c_read, twsi_i2c_write,
745 twsi_i2c_set_bus_speed,
746 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
749 #ifdef CONFIG_I2C_MVTWSI_BASE2
750 U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
751 twsi_i2c_read, twsi_i2c_write,
752 twsi_i2c_set_bus_speed,
753 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
756 #ifdef CONFIG_I2C_MVTWSI_BASE3
757 U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
758 twsi_i2c_read, twsi_i2c_write,
759 twsi_i2c_set_bus_speed,
760 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
763 #ifdef CONFIG_I2C_MVTWSI_BASE4
764 U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
765 twsi_i2c_read, twsi_i2c_write,
766 twsi_i2c_set_bus_speed,
767 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
770 #ifdef CONFIG_I2C_MVTWSI_BASE5
771 U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
772 twsi_i2c_read, twsi_i2c_write,
773 twsi_i2c_set_bus_speed,
774 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
777 #else /* CONFIG_DM_I2C */
779 static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
782 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
783 return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
786 static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
788 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
790 dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
791 dev->tick = calc_tick(dev->speed);
796 static int mvtwsi_i2c_ofdata_to_platdata(struct udevice *bus)
798 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
800 dev->base = devfdt_get_addr_ptr(bus);
805 dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
807 dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
808 "u-boot,i2c-slave-addr", 0x0);
809 dev->speed = dev_read_u32_default(bus, "clock-frequency",
810 I2C_SPEED_STANDARD_RATE);
815 static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi)
817 clrbits_le32(&twsi->debug, BIT(18));
820 static int mvtwsi_i2c_bind(struct udevice *bus)
822 struct mvtwsi_registers *twsi = devfdt_get_addr_ptr(bus);
824 /* Disable the hidden slave in i2c0 of these platforms */
825 if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARCH_KIRKWOOD))
826 && bus->req_seq == 0)
827 twsi_disable_i2c_slave(twsi);
832 static int mvtwsi_i2c_probe(struct udevice *bus)
834 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
837 __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
838 dev->speed = actual_speed;
839 dev->tick = calc_tick(dev->speed);
843 static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
845 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
846 struct i2c_msg *dmsg, *omsg, dummy;
848 memset(&dummy, 0, sizeof(struct i2c_msg));
850 /* We expect either two messages (one with an offset and one with the
851 * actual data) or one message (just data or offset/data combined) */
852 if (nmsgs > 2 || nmsgs == 0) {
853 debug("%s: Only one or two messages are supported.", __func__);
857 omsg = nmsgs == 1 ? &dummy : msg;
858 dmsg = nmsgs == 1 ? msg : msg + 1;
860 if (dmsg->flags & I2C_M_RD)
861 return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf,
862 omsg->len, dmsg->buf, dmsg->len,
865 return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf,
866 omsg->len, dmsg->buf, dmsg->len,
870 static const struct dm_i2c_ops mvtwsi_i2c_ops = {
871 .xfer = mvtwsi_i2c_xfer,
872 .probe_chip = mvtwsi_i2c_probe_chip,
873 .set_bus_speed = mvtwsi_i2c_set_bus_speed,
876 static const struct udevice_id mvtwsi_i2c_ids[] = {
877 { .compatible = "marvell,mv64xxx-i2c", },
878 { .compatible = "marvell,mv78230-i2c", },
879 { .compatible = "allwinner,sun6i-a31-i2c", },
883 U_BOOT_DRIVER(i2c_mvtwsi) = {
884 .name = "i2c_mvtwsi",
886 .of_match = mvtwsi_i2c_ids,
887 .bind = mvtwsi_i2c_bind,
888 .probe = mvtwsi_i2c_probe,
889 .ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
890 .priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
891 .ops = &mvtwsi_i2c_ops,
893 #endif /* CONFIG_DM_I2C */