2 * Driver for the TWSI (i2c) controller found on the Marvell
3 * orion5x and kirkwood SoC families.
5 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
6 * Copyright (c) 2010 Albert Aribaud.
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/errno.h>
17 * include a file that will provide CONFIG_I2C_MVTWSI_BASE
18 * and possibly other settings
21 #if defined(CONFIG_ORION5X)
22 #include <asm/arch/orion5x.h>
23 #elif defined(CONFIG_KIRKWOOD)
24 #include <asm/arch/kirkwood.h>
26 #error Driver mvtwsi not supported by SoC or board
30 * TWSI register structure
33 struct mvtwsi_registers {
38 u32 status; /* when reading */
39 u32 baudrate; /* when writing */
47 * Control register fields
50 #define MVTWSI_CONTROL_ACK 0x00000004
51 #define MVTWSI_CONTROL_IFLG 0x00000008
52 #define MVTWSI_CONTROL_STOP 0x00000010
53 #define MVTWSI_CONTROL_START 0x00000020
54 #define MVTWSI_CONTROL_TWSIEN 0x00000040
55 #define MVTWSI_CONTROL_INTEN 0x00000080
58 * Status register values -- only those expected in normal master
59 * operation on non-10-bit-address devices; whatever status we don't
60 * expect in nominal conditions (bus errors, arbitration losses,
61 * missing ACKs...) we just pass back to the caller as an error
65 #define MVTWSI_STATUS_START 0x08
66 #define MVTWSI_STATUS_REPEATED_START 0x10
67 #define MVTWSI_STATUS_ADDR_W_ACK 0x18
68 #define MVTWSI_STATUS_DATA_W_ACK 0x28
69 #define MVTWSI_STATUS_ADDR_R_ACK 0x40
70 #define MVTWSI_STATUS_ADDR_R_NAK 0x48
71 #define MVTWSI_STATUS_DATA_R_ACK 0x50
72 #define MVTWSI_STATUS_DATA_R_NAK 0x58
73 #define MVTWSI_STATUS_IDLE 0xF8
76 * The single instance of the controller we'll be dealing with
79 static struct mvtwsi_registers *twsi =
80 (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
83 * Returned statuses are 0 for success and nonzero otherwise.
84 * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
85 * Thus to ease debugging, the return status contains some debug info:
86 * - bits 31..24 are error class: 1 is timeout, 2 is 'status mismatch'.
87 * - bits 23..16 are the last value of the control register.
88 * - bits 15..8 are the last value of the status register.
89 * - bits 7..0 are the expected value of the status register.
92 #define MVTWSI_ERROR_WRONG_STATUS 0x01
93 #define MVTWSI_ERROR_TIMEOUT 0x02
95 #define MVTWSI_ERROR(ec, lc, ls, es) (((ec << 24) & 0xFF000000) | \
96 ((lc << 16) & 0x00FF0000) | ((ls<<8) & 0x0000FF00) | (es & 0xFF))
99 * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
100 * return 0 (ok) or return 'wrong status'.
102 static int twsi_wait(int expected_status)
108 control = readl(&twsi->control);
109 if (control & MVTWSI_CONTROL_IFLG) {
110 status = readl(&twsi->status);
111 if (status == expected_status)
115 MVTWSI_ERROR_WRONG_STATUS,
116 control, status, expected_status);
118 udelay(10); /* one clock cycle at 100 kHz */
120 status = readl(&twsi->status);
122 MVTWSI_ERROR_TIMEOUT, control, status, expected_status);
126 * These flags are ORed to any write to the control register
127 * They allow global setting of TWSIEN and ACK.
128 * By default none are set.
129 * twsi_start() sets TWSIEN (in case the controller was disabled)
130 * twsi_recv() sets ACK or resets it depending on expected status.
132 static u8 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
135 * Assert the START condition, either in a single I2C transaction
136 * or inside back-to-back ones (repeated starts).
138 static int twsi_start(int expected_status)
140 /* globally set TWSIEN in case it was not */
141 twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
143 writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
144 /* wait for controller to process START */
145 return twsi_wait(expected_status);
149 * Send a byte (i2c address or data).
151 static int twsi_send(u8 byte, int expected_status)
153 /* put byte in data register for sending */
154 writel(byte, &twsi->data);
155 /* clear any pending interrupt -- that'll cause sending */
156 writel(twsi_control_flags, &twsi->control);
157 /* wait for controller to receive byte and check ACK */
158 return twsi_wait(expected_status);
163 * Global mvtwsi_control_flags variable says if we should ack or nak.
165 static int twsi_recv(u8 *byte)
167 int expected_status, status;
169 /* compute expected status based on ACK bit in global control flags */
170 if (twsi_control_flags & MVTWSI_CONTROL_ACK)
171 expected_status = MVTWSI_STATUS_DATA_R_ACK;
173 expected_status = MVTWSI_STATUS_DATA_R_NAK;
174 /* acknowledge *previous state* and launch receive */
175 writel(twsi_control_flags, &twsi->control);
176 /* wait for controller to receive byte and assert ACK or NAK */
177 status = twsi_wait(expected_status);
178 /* if we did receive expected byte then store it */
180 *byte = readl(&twsi->data);
186 * Assert the STOP condition.
187 * This is also used to force the bus back in idle (SDA=SCL=1).
189 static int twsi_stop(int status)
191 int control, stop_status;
195 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
196 writel(control, &twsi->control);
197 /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
199 stop_status = readl(&twsi->status);
200 if (stop_status == MVTWSI_STATUS_IDLE)
202 udelay(10); /* one clock cycle at 100 kHz */
204 control = readl(&twsi->control);
205 if (stop_status != MVTWSI_STATUS_IDLE)
207 status = MVTWSI_ERROR(
208 MVTWSI_ERROR_TIMEOUT,
209 control, status, MVTWSI_STATUS_IDLE);
214 * Ugly formula to convert m and n values to a frequency comes from
215 * TWSI specifications
218 #define TWSI_FREQUENCY(m, n) \
219 (CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n)))
223 * Controller reset also resets the baud rate and slave address, so
224 * they must be re-established afterwards.
226 static void twsi_reset(struct i2c_adapter *adap)
228 /* ensure controller will be enabled by any twsi*() function */
229 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
230 /* reset controller */
231 writel(0, &twsi->soft_reset);
232 /* wait 2 ms -- this is what the Marvell LSP does */
237 * I2C init called by cmd_i2c when doing 'i2c reset'.
238 * Sets baud to the highest possible value not exceeding requested one.
240 static unsigned int twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
241 unsigned int requested_speed)
243 unsigned int tmp_speed, highest_speed, n, m;
244 unsigned int baud = 0x44; /* baudrate at controller reset */
246 /* use actual speed to collect progressively higher values */
248 /* compute m, n setting for highest speed not above requested speed */
249 for (n = 0; n < 8; n++) {
250 for (m = 0; m < 16; m++) {
251 tmp_speed = TWSI_FREQUENCY(m, n);
252 if ((tmp_speed <= requested_speed)
253 && (tmp_speed > highest_speed)) {
254 highest_speed = tmp_speed;
259 writel(baud, &twsi->baudrate);
263 static void twsi_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
265 /* reset controller */
268 twsi_i2c_set_bus_speed(adap, speed);
269 /* set slave address even though we don't use it */
270 writel(slaveadd, &twsi->slave_address);
271 writel(0, &twsi->xtnd_slave_addr);
272 /* assert STOP but don't care for the result */
277 * Begin I2C transaction with expected start status, at given address.
278 * Common to i2c_probe, i2c_read and i2c_write.
279 * Expected address status will derive from direction bit (bit 0) in addr.
281 static int i2c_begin(int expected_start_status, u8 addr)
283 int status, expected_addr_status;
285 /* compute expected address status from direction bit in addr */
286 if (addr & 1) /* reading */
287 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
289 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
291 status = twsi_start(expected_start_status);
292 /* send out the address if the start went well */
294 status = twsi_send(addr, expected_addr_status);
295 /* return ok or status of first failure to caller */
300 * I2C probe called by cmd_i2c when doing 'i2c probe'.
301 * Begin read, nak data byte, end.
303 static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
309 status = i2c_begin(MVTWSI_STATUS_START, (chip << 1) | 1);
310 /* dummy read was accepted: receive byte but NAK it. */
312 status = twsi_recv(&dummy_byte);
313 /* Stop transaction */
315 /* return 0 or status of first failure */
320 * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
321 * Begin write, send address byte(s), begin read, receive data bytes, end.
323 * NOTE: some EEPROMS want a stop right before the second start, while
324 * some will choke if it is there. Deciding which we should do is eeprom
325 * stuff, not i2c, but at the moment the APIs won't let us put it in
326 * cmd_eeprom, so we have to choose here, and for the moment that'll be
327 * a repeated start without a preceding stop.
329 static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
330 int alen, uchar *data, int length)
334 /* begin i2c write to send the address bytes */
335 status = i2c_begin(MVTWSI_STATUS_START, (chip << 1));
336 /* send addr bytes */
337 while ((status == 0) && alen--)
338 status = twsi_send(addr >> (8*alen),
339 MVTWSI_STATUS_DATA_W_ACK);
340 /* begin i2c read to receive eeprom data bytes */
343 MVTWSI_STATUS_REPEATED_START, (chip << 1) | 1);
344 /* prepare ACK if at least one byte must be received */
346 twsi_control_flags |= MVTWSI_CONTROL_ACK;
347 /* now receive actual bytes */
348 while ((status == 0) && length--) {
349 /* reset NAK if we if no more to read now */
351 twsi_control_flags &= ~MVTWSI_CONTROL_ACK;
352 /* read current byte */
353 status = twsi_recv(data++);
355 /* Stop transaction */
356 status = twsi_stop(status);
357 /* return 0 or status of first failure */
362 * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
363 * Begin write, send address byte(s), send data bytes, end.
365 static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
366 int alen, uchar *data, int length)
370 /* begin i2c write to send the eeprom adress bytes then data bytes */
371 status = i2c_begin(MVTWSI_STATUS_START, (chip << 1));
372 /* send addr bytes */
373 while ((status == 0) && alen--)
374 status = twsi_send(addr >> (8*alen),
375 MVTWSI_STATUS_DATA_W_ACK);
376 /* send data bytes */
377 while ((status == 0) && (length-- > 0))
378 status = twsi_send(*(data++), MVTWSI_STATUS_DATA_W_ACK);
379 /* Stop transaction */
380 status = twsi_stop(status);
381 /* return 0 or status of first failure */
385 U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
386 twsi_i2c_read, twsi_i2c_write,
387 twsi_i2c_set_bus_speed,
388 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)